1 /* 2 $License: 3 Copyright 2011 InvenSense, Inc. 4 5 Licensed under the Apache License, Version 2.0 (the "License"); 6 you may not use this file except in compliance with the License. 7 You may obtain a copy of the License at 8 9 http://www.apache.org/licenses/LICENSE-2.0 10 11 Unless required by applicable law or agreed to in writing, software 12 distributed under the License is distributed on an "AS IS" BASIS, 13 WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. 14 See the License for the specific language governing permissions and 15 limitations under the License. 16 $ 17 */ 18 /***************************************************************************** * 19 * $Id: dmpDefault.c 5627 2011-06-10 22:34:18Z nroyer $ 20 ******************************************************************************/ 21 22 /* WARNING: autogenerated code, do not modify */ 23 /** 24 * @defgroup DMPDEFAULT 25 * @brief Data and configuration for MLDmpDefaultOpen. 26 * 27 * @{ 28 * @file inv_setup_dmp.c 29 * @brief Data and configuration for MLDmpDefaultOpen. 30 */ 31 32 #include "mltypes.h" 33 #include "dmpDefault.h" 34 #include "dmpKey.h" 35 #include "dmpmap.h" 36 #include "ml.h" 37 #include "mpu.h" 38 #include "mldl.h" 39 #include "mldl_cfg.h" 40 41 #define CFG_25 703 42 #define CFG_24 699 43 #define CFG_26 707 44 #define CFG_21 802 45 #define CFG_20 645 46 #define CFG_23 814 47 #define CFG_TAP4 808 48 #define CFG_TAP5 809 49 #define CFG_TAP6 810 50 #define CFG_1 783 51 #define CFG_TAP0 802 52 #define CFG_TAP1 804 53 #define CFG_TAP2 805 54 #define CFG_TAP3 806 55 #define FCFG_AZ 878 56 #define CFG_ORIENT_IRQ_1 715 57 #define CFG_ORIENT_IRQ_2 738 58 #define CFG_ORIENT_IRQ_3 743 59 #define CFG_TAP_QUANTIZE 647 60 #define FCFG_3 936 61 #define CFG_TAP_CLEAR_STICKY 817 62 #define FCFG_1 868 63 #define CFG_ACCEL_FILTER 968 64 #define FCFG_2 872 65 #define CFG_3D 521 66 #define CFG_3B 517 67 #define CFG_3C 519 68 #define FCFG_5 942 69 #define FCFG_4 857 70 #define FCFG_FSCALE 877 71 #define CFG_TAP_JERK 639 72 #define FCFG_6 996 73 #define CFG_12 797 74 #define FCFG_7 930 75 #define CFG_14 790 76 #define CFG_15 790 77 #define CFG_16 815 78 #define CFG_18 551 79 #define CFG_6 823 80 #define CFG_7 564 81 #define CFG_4 526 82 #define CFG_5 749 83 #define CFG_3 515 84 #define CFG_GYRO_SOURCE 777 85 #define CFG_8 772 86 #define CFG_9 778 87 #define CFG_ORIENT_2 733 88 #define CFG_ORIENT_1 713 89 #define FCFG_ACCEL_INPUT 904 90 #define CFG_TAP7 811 91 #define CFG_TAP_SAVE_ACCB 687 92 #define FCFG_ACCEL_INIT 831 93 94 95 #define D_0_22 (22) 96 #define D_0_24 (24) 97 #define D_0_36 (36) 98 #define D_0_52 (52) 99 #define D_0_96 (96) 100 #define D_0_104 (104) 101 #define D_0_108 (108) 102 #define D_0_163 (163) 103 #define D_0_188 (188) 104 #define D_0_192 (192) 105 #define D_0_224 (224) 106 #define D_0_228 (228) 107 #define D_0_232 (232) 108 #define D_0_236 (236) 109 110 #define D_1_2 (256 + 2) 111 #define D_1_4 (256 + 4) 112 #define D_1_8 (256 + 8) 113 #define D_1_10 (256 + 10) 114 #define D_1_24 (256 + 24) 115 #define D_1_28 (256 + 28) 116 #define D_1_92 (256 + 92) 117 #define D_1_96 (256 + 96) 118 #define D_1_98 (256 + 98) 119 #define D_1_106 (256 + 106) 120 #define D_1_108 (256 + 108) 121 #define D_1_112 (256 + 112) 122 #define D_1_128 (256 + 144) 123 #define D_1_152 (256 + 12) 124 #define D_1_168 (256 + 168) 125 #define D_1_175 (256 + 175) 126 #define D_1_178 (256 + 178) 127 #define D_1_236 (256 + 236) 128 #define D_1_244 (256 + 244) 129 130 131 static const tKeyLabel dmpTConfig[] = { 132 {KEY_CFG_25, CFG_25}, 133 {KEY_CFG_24, CFG_24}, 134 {KEY_CFG_26, CFG_26}, 135 {KEY_CFG_21, CFG_21}, 136 {KEY_CFG_20, CFG_20}, 137 {KEY_CFG_23, CFG_23}, 138 {KEY_CFG_TAP4, CFG_TAP4}, 139 {KEY_CFG_TAP5, CFG_TAP5}, 140 {KEY_CFG_TAP6, CFG_TAP6}, 141 {KEY_CFG_1, CFG_1}, 142 {KEY_CFG_TAP0, CFG_TAP0}, 143 {KEY_CFG_TAP1, CFG_TAP1}, 144 {KEY_CFG_TAP2, CFG_TAP2}, 145 {KEY_CFG_TAP3, CFG_TAP3}, 146 {KEY_FCFG_AZ, FCFG_AZ}, 147 {KEY_CFG_ORIENT_IRQ_1, CFG_ORIENT_IRQ_1}, 148 {KEY_CFG_ORIENT_IRQ_2, CFG_ORIENT_IRQ_2}, 149 {KEY_CFG_ORIENT_IRQ_3, CFG_ORIENT_IRQ_3}, 150 {KEY_CFG_TAP_QUANTIZE, CFG_TAP_QUANTIZE}, 151 {KEY_FCFG_3, FCFG_3}, 152 {KEY_CFG_TAP_CLEAR_STICKY, CFG_TAP_CLEAR_STICKY}, 153 {KEY_FCFG_1, FCFG_1}, 154 //{KEY_CFG_ACCEL_FILTER, CFG_ACCEL_FILTER}, 155 {KEY_FCFG_2, FCFG_2}, 156 {KEY_CFG_3D, CFG_3D}, 157 {KEY_CFG_3B, CFG_3B}, 158 {KEY_CFG_3C, CFG_3C}, 159 {KEY_FCFG_5, FCFG_5}, 160 {KEY_FCFG_4, FCFG_4}, 161 {KEY_FCFG_FSCALE, FCFG_FSCALE}, 162 {KEY_CFG_TAP_JERK, CFG_TAP_JERK}, 163 {KEY_FCFG_6, FCFG_6}, 164 {KEY_CFG_12, CFG_12}, 165 {KEY_FCFG_7, FCFG_7}, 166 {KEY_CFG_14, CFG_14}, 167 {KEY_CFG_15, CFG_15}, 168 {KEY_CFG_16, CFG_16}, 169 {KEY_CFG_18, CFG_18}, 170 {KEY_CFG_6, CFG_6}, 171 {KEY_CFG_7, CFG_7}, 172 {KEY_CFG_4, CFG_4}, 173 {KEY_CFG_5, CFG_5}, 174 {KEY_CFG_3, CFG_3}, 175 {KEY_CFG_GYRO_SOURCE, CFG_GYRO_SOURCE}, 176 {KEY_CFG_8, CFG_8}, 177 {KEY_CFG_9, CFG_9}, 178 {KEY_CFG_ORIENT_2, CFG_ORIENT_2}, 179 {KEY_CFG_ORIENT_1, CFG_ORIENT_1}, 180 {KEY_FCFG_ACCEL_INPUT, FCFG_ACCEL_INPUT}, 181 {KEY_CFG_TAP7, CFG_TAP7}, 182 {KEY_CFG_TAP_SAVE_ACCB, CFG_TAP_SAVE_ACCB}, 183 {KEY_FCFG_ACCEL_INIT, FCFG_ACCEL_INIT}, 184 185 {KEY_D_0_22, D_0_22}, 186 {KEY_D_0_24, D_0_24}, 187 {KEY_D_0_36, D_0_36}, 188 {KEY_D_0_52, D_0_52}, 189 {KEY_D_0_96, D_0_96}, 190 {KEY_D_0_104, D_0_104}, 191 {KEY_D_0_108, D_0_108}, 192 {KEY_D_0_163, D_0_163}, 193 {KEY_D_0_188, D_0_188}, 194 {KEY_D_0_192, D_0_192}, 195 {KEY_D_0_224, D_0_224}, 196 {KEY_D_0_228, D_0_228}, 197 {KEY_D_0_232, D_0_232}, 198 {KEY_D_0_236, D_0_236}, 199 200 {KEY_DMP_PREVPTAT, DMP_PREVPTAT}, 201 {KEY_D_1_2, D_1_2}, 202 {KEY_D_1_4, D_1_4}, 203 {KEY_D_1_8, D_1_8}, 204 {KEY_D_1_10, D_1_10}, 205 {KEY_D_1_24, D_1_24}, 206 {KEY_D_1_28, D_1_28}, 207 {KEY_D_1_92, D_1_92}, 208 {KEY_D_1_96, D_1_96}, 209 {KEY_D_1_98, D_1_98}, 210 {KEY_D_1_106, D_1_106}, 211 {KEY_D_1_108, D_1_108}, 212 {KEY_D_1_112, D_1_112}, 213 {KEY_D_1_128, D_1_128}, 214 {KEY_D_1_152, D_1_152}, 215 {KEY_D_1_168, D_1_168}, 216 {KEY_D_1_175, D_1_175}, 217 {KEY_D_1_178, D_1_178}, 218 {KEY_D_1_236, D_1_236}, 219 {KEY_D_1_244, D_1_244}, 220 221 {KEY_DMP_TAPW_MIN, DMP_TAPW_MIN}, 222 {KEY_DMP_TAP_THR_X, DMP_TAP_THX}, 223 {KEY_DMP_TAP_THR_Y, DMP_TAP_THY}, 224 {KEY_DMP_TAP_THR_Z, DMP_TAP_THZ}, 225 {KEY_DMP_SH_TH_Y, DMP_SH_TH_Y}, 226 {KEY_DMP_SH_TH_X, DMP_SH_TH_X}, 227 {KEY_DMP_SH_TH_Z, DMP_SH_TH_Z}, 228 {KEY_DMP_ORIENT, DMP_ORIENT} 229 }; 230 231 #define NUM_LOCAL_KEYS (sizeof(dmpTConfig)/sizeof(dmpTConfig[0])) 232 static const unsigned short sConfig = 0x013f; 233 #define SCD (1024) 234 static const unsigned char dmpMemory[SCD] = { 235 0xfb, 0x00, 0x00, 0x3e, 0x00, 0x0b, 0x00, 0x36, 0x5a, 0xd6, 0x96, 0x06, 0x3f, 0xa3, 0x00, 0x00, 236 0x20, 0x40, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x03, 0x77, 0x8e, 0x00, 0x01, 0x00, 0x01, 237 0x00, 0x02, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 238 0x00, 0x28, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 239 0x00, 0x00, 0x03, 0xe8, 0x00, 0x00, 0x00, 0x01, 0x00, 0x01, 0x7f, 0xff, 0xff, 0xfe, 0x80, 0x01, 240 0x02, 0x00, 0x00, 0x01, 0x04, 0x00, 0x00, 0x03, 0x06, 0x00, 0x00, 0x05, 0x01, 0xe9, 0xa2, 0x0f, 241 0x00, 0x3e, 0x03, 0x30, 0x40, 0x00, 0x00, 0x00, 0x02, 0xca, 0xe3, 0x09, 0x3e, 0x80, 0x00, 0x00, 242 0x20, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x40, 0x00, 0x00, 0x00, 0x60, 0x00, 0x00, 0x00, 243 0x00, 0x00, 0x00, 0x3e, 0x00, 0x02, 0xb4, 0x8b, 0x00, 0x00, 0x7a, 0xdf, 0x00, 0x02, 0x5b, 0x2f, 244 0xfc, 0xba, 0xfa, 0x00, 0x01, 0x00, 0x80, 0x00, 0x02, 0x01, 0x80, 0x00, 0x03, 0x02, 0x80, 0x00, 245 0x00, 0x00, 0x00, 0x00, 0x00, 0x02, 0xb4, 0x8b, 0x00, 0x00, 0x7a, 0xdf, 0x00, 0x02, 0x5b, 0x2f, 246 0x00, 0x7d, 0x32, 0xba, 0x00, 0x0a, 0x1e, 0xd1, 0x00, 0x3a, 0xe8, 0x25, 0x00, 0x00, 0x00, 0x00, 247 0x3f, 0xd7, 0x96, 0x08, 0xff, 0xb3, 0x39, 0xf5, 0xfe, 0x11, 0x1b, 0x62, 0xfb, 0xf4, 0xb4, 0x52, 248 0xfb, 0x8c, 0x6f, 0x5d, 0xfd, 0x5d, 0x08, 0xd9, 0x00, 0x7c, 0x73, 0x3b, 0x00, 0x6c, 0x12, 0xcc, 249 0x32, 0x00, 0x13, 0x9d, 0x32, 0x00, 0xd0, 0xd6, 0x32, 0x00, 0x08, 0x00, 0x40, 0x00, 0x01, 0xf4, 250 0x0d, 0x68, 0x00, 0x00, 0x40, 0x00, 0x00, 0x00, 0x00, 0x00, 0xd0, 0xd6, 0x00, 0x00, 0x27, 0x10, 251 252 0xfb, 0x00, 0x00, 0x00, 0x40, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 253 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x01, 0x00, 0x01, 0x00, 0x00, 0x00, 254 0x00, 0x00, 0xfa, 0x36, 0xff, 0xbc, 0x30, 0x8e, 0x00, 0x05, 0xfb, 0xf0, 0xff, 0xd9, 0x5b, 0xc8, 255 0x3e, 0x80, 0x00, 0x00, 0x3e, 0x80, 0x00, 0x00, 0x3e, 0x80, 0x00, 0x00, 0x12, 0x82, 0x2d, 0x90, 256 0x00, 0x00, 0x00, 0x02, 0x00, 0x00, 0x00, 0x02, 0xff, 0xff, 0x00, 0x05, 0x02, 0x00, 0x00, 0x0c, 257 0x00, 0x03, 0x80, 0x00, 0x00, 0x01, 0x80, 0x00, 0x00, 0x03, 0x80, 0x00, 0x40, 0x00, 0x00, 0x00, 258 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x06, 0x00, 0x00, 0x00, 0x00, 0x14, 259 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 260 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 261 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x20, 0x00, 0xff, 0x00, 262 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 263 0x80, 0x00, 0x00, 0x00, 0x40, 0x00, 0x00, 0x00, 0x00, 0x00, 0xb2, 0x6a, 0x00, 0x00, 0x00, 0x00, 264 0xff, 0xec, 0x3f, 0xc8, 0xff, 0xee, 0x00, 0x00, 0xff, 0xfe, 0x40, 0x00, 0xff, 0xff, 0xff, 0xc8, 265 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 266 0xff, 0xff, 0xff, 0xff, 0x00, 0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x40, 0x00, 0x00, 267 0x00, 0x00, 0x00, 0x33, 0x00, 0x00, 0x03, 0x65, 0x00, 0x00, 0x00, 0x99, 0x00, 0x00, 0x02, 0xf5, 268 269 0x9e, 0xc5, 0xa3, 0x8a, 0x22, 0x8a, 0x6e, 0x8a, 0x56, 0x8a, 0x5e, 0x9f, 0xc1, 0x83, 0x06, 0x26, 270 0x46, 0x66, 0x0e, 0x2e, 0x4e, 0x6e, 0x9d, 0xc4, 0xad, 0x00, 0x2c, 0x54, 0x7c, 0xf9, 0xc5, 0xa3, 271 0xc1, 0xc3, 0x8f, 0x96, 0x19, 0xa6, 0x81, 0xda, 0x0c, 0xd9, 0x2e, 0xd8, 0xa3, 0x86, 0x31, 0x81, 272 0xa6, 0xd9, 0x30, 0x26, 0xd8, 0xd8, 0xfa, 0xc1, 0x8c, 0xc2, 0x99, 0xc5, 0xa3, 0x2d, 0x55, 0x7d, 273 0x81, 0x91, 0xac, 0x38, 0xad, 0x3a, 0xc3, 0x83, 0x91, 0xac, 0x2d, 0xd9, 0x28, 0xd8, 0x4d, 0xd9, 274 0x48, 0xd8, 0x6d, 0xd9, 0x68, 0xd8, 0x8c, 0x9d, 0xae, 0x29, 0xd9, 0x04, 0xae, 0xd8, 0x51, 0xd9, 275 0x04, 0xae, 0xd8, 0x79, 0xd9, 0x04, 0xd8, 0x81, 0xfb, 0x9d, 0xad, 0x00, 0x8d, 0xae, 0x19, 0x81, 276 0xad, 0xd9, 0x01, 0xd8, 0xfa, 0xae, 0xda, 0x26, 0xd8, 0x8e, 0x91, 0x29, 0x83, 0xa7, 0xd9, 0xad, 277 0xad, 0xad, 0xad, 0xfb, 0x2a, 0xd8, 0xd8, 0xf9, 0xc0, 0xac, 0x89, 0x91, 0x3e, 0x5e, 0x76, 0xfb, 278 0xac, 0x2e, 0x2e, 0xf9, 0xc1, 0x8c, 0x5a, 0x9c, 0xac, 0x2c, 0x28, 0x28, 0x28, 0x9c, 0xac, 0x30, 279 0x18, 0xa8, 0x98, 0x81, 0x28, 0x34, 0x3c, 0x97, 0x24, 0xa7, 0x28, 0x34, 0x3c, 0x9c, 0x24, 0xfa, 280 0xc0, 0x89, 0xac, 0x91, 0x2c, 0x4c, 0x6c, 0x8a, 0x9b, 0x2d, 0xd9, 0xd8, 0xd8, 0x51, 0xd9, 0xd8, 281 0xd8, 0x79, 0xd9, 0xd8, 0xd8, 0xf9, 0x9e, 0x88, 0xa3, 0x31, 0xda, 0xd8, 0xd8, 0x91, 0x2d, 0xd9, 282 0x28, 0xd8, 0x4d, 0xd9, 0x48, 0xd8, 0x6d, 0xd9, 0x68, 0xd8, 0xc1, 0x83, 0x93, 0x35, 0x3d, 0x80, 283 0x25, 0xda, 0xd8, 0xd8, 0x85, 0x69, 0xda, 0xd8, 0xd8, 0xf9, 0xc2, 0x93, 0x81, 0xa3, 0x28, 0x34, 284 0x3c, 0xfb, 0x91, 0xab, 0x8b, 0x18, 0xa3, 0x09, 0xd9, 0xab, 0x97, 0x0a, 0x91, 0x3c, 0xc0, 0x87, 285 286 0x9c, 0xc5, 0xa3, 0xdd, 0xf9, 0xa3, 0xa3, 0xa3, 0xa3, 0x95, 0xf9, 0xa3, 0xa3, 0xa3, 0x9d, 0xf9, 287 0xa3, 0xa3, 0xa3, 0xa3, 0xf9, 0x90, 0xa3, 0xa3, 0xa3, 0xa3, 0x91, 0xc3, 0x99, 0xf9, 0xa3, 0xa3, 288 0xa3, 0x98, 0xf9, 0xa3, 0xa3, 0xa3, 0xa3, 0x97, 0xa3, 0xa3, 0xa3, 0xa3, 0xfb, 0x9b, 0xa3, 0xa3, 289 0xdc, 0xc5, 0xa7, 0xf9, 0x26, 0x26, 0x26, 0xd8, 0xd8, 0xff, 0xd8, 0xd8, 0xd8, 0xd8, 0xd8, 0xc1, 290 0xc2, 0xc4, 0x81, 0xa0, 0x90, 0xfa, 0x2c, 0x80, 0x74, 0xfb, 0x70, 0xfa, 0x7c, 0xc0, 0x86, 0x98, 291 0xa8, 0xf9, 0xc9, 0x88, 0xa1, 0xfa, 0x0e, 0x97, 0x80, 0xf9, 0xa9, 0x2e, 0x2e, 0x2e, 0xaa, 0x2e, 292 0x2e, 0x2e, 0xfa, 0xaa, 0xc9, 0x2c, 0xcb, 0xa9, 0x4c, 0xcd, 0x6c, 0xf9, 0x89, 0xa5, 0xca, 0xcd, 293 0xcf, 0xc3, 0x9e, 0xa9, 0x3e, 0x5e, 0x7e, 0x85, 0xa5, 0x1a, 0x3e, 0x5e, 0xc2, 0xa5, 0x99, 0xfb, 294 0x08, 0x34, 0x5c, 0xf9, 0xa9, 0xc9, 0xcb, 0xcd, 0x97, 0x97, 0x97, 0x97, 0x97, 0x97, 0x97, 0x97, 295 0x97, 0x97, 0x97, 0x97, 0x97, 0x97, 0x97, 0x97, 0x97, 0x97, 0x97, 0x97, 0x97, 0x97, 0x97, 0xa9, 296 0xf9, 0x89, 0x26, 0x46, 0x66, 0x8a, 0xa8, 0x96, 0x36, 0x56, 0x76, 0xaa, 0x98, 0x82, 0x87, 0x2d, 297 0x35, 0x3d, 0xc5, 0xa3, 0xc2, 0xc1, 0x97, 0x80, 0x4a, 0x4e, 0x4e, 0xa3, 0xfa, 0x48, 0xcd, 0xc9, 298 0xf9, 0xc4, 0xa9, 0x99, 0x83, 0x0d, 0x35, 0x5d, 0x89, 0xc5, 0xa3, 0x2d, 0x55, 0x7d, 0xc3, 0x93, 299 0xa3, 0x0e, 0x16, 0x1e, 0xa9, 0x2c, 0x54, 0x7c, 0xc0, 0xc2, 0x83, 0x97, 0xaf, 0x08, 0xc4, 0xa8, 300 0x11, 0xc1, 0x8f, 0xc5, 0xaf, 0x98, 0xf8, 0x24, 0x08, 0x44, 0x10, 0x64, 0x18, 0xf9, 0xa3, 0x29, 301 0x55, 0x7d, 0xaf, 0x83, 0xc3, 0x93, 0xaf, 0xf8, 0x00, 0x28, 0x50, 0xc4, 0xc2, 0xc0, 0xf9, 0x97, 302 }; 303 static tKeyLabel keys[NUM_KEYS]; 304 305 static unsigned short inv_setup_dmpGetAddress(unsigned short key) 306 { 307 static int isSorted = 0; 308 if ( !isSorted ) { 309 int kk; 310 for (kk=0; kk<NUM_KEYS; ++kk) { 311 keys[ kk ].addr = 0xffff; 312 keys[ kk ].key = kk; 313 } 314 for (kk=0; kk<NUM_LOCAL_KEYS; ++kk) { 315 keys[ dmpTConfig[kk].key ].addr = dmpTConfig[kk].addr; 316 } 317 isSorted = 1; 318 } 319 if ( key >= NUM_KEYS ) 320 return 0xffff; 321 return keys[ key ].addr; 322 } 323 324 325 /** 326 * @brief 327 * @return INV_SUCCESS or a non-zero error code. 328 */ 329 inv_error_t inv_setup_dmp(void) 330 { 331 inv_error_t result; 332 inv_set_get_address( inv_setup_dmpGetAddress ); 333 334 result = inv_clock_source(MPU_CLK_SEL_PLLGYROZ); 335 if (result) { 336 LOG_RESULT_LOCATION(result); 337 return result; 338 } 339 result = inv_dl_cfg_sampling(MPU_FILTER_42HZ, 4); 340 if (result) { 341 LOG_RESULT_LOCATION(result); 342 return result; 343 } 344 result = inv_set_full_scale(2000.f); 345 if (result) { 346 LOG_RESULT_LOCATION(result); 347 return result; 348 } 349 result = inv_load_dmp(dmpMemory, SCD, sConfig); 350 if (result) { 351 LOG_RESULT_LOCATION(result); 352 return result; 353 } 354 result = inv_set_ignore_system_suspend(FALSE); 355 if (result) { 356 LOG_RESULT_LOCATION(result); 357 return result; 358 } 359 360 { 361 struct ext_slave_config config; 362 long odr; 363 config.key = MPU_SLAVE_CONFIG_ODR_SUSPEND; 364 config.len = sizeof(long); 365 config.apply = FALSE; 366 config.data = &odr; 367 368 odr = 0; 369 result = inv_mpu_config_accel(inv_get_dl_config(), 370 inv_get_serial_handle(), 371 inv_get_serial_handle(), 372 &config); 373 if (result) { 374 LOG_RESULT_LOCATION(result); 375 return result; 376 } 377 config.key = MPU_SLAVE_CONFIG_ODR_RESUME; 378 odr = 200000; 379 result = inv_mpu_config_accel(inv_get_dl_config(), 380 inv_get_serial_handle(), 381 inv_get_serial_handle(), 382 &config); 383 if (result) { 384 LOG_RESULT_LOCATION(result); 385 return result; 386 } 387 config.key = MPU_SLAVE_CONFIG_IRQ_SUSPEND; 388 odr = MPU_SLAVE_IRQ_TYPE_NONE; 389 result = inv_mpu_config_accel(inv_get_dl_config(), 390 inv_get_serial_handle(), 391 inv_get_serial_handle(), 392 &config); 393 if (result) { 394 LOG_RESULT_LOCATION(result); 395 return result; 396 } 397 398 config.key = MPU_SLAVE_CONFIG_IRQ_RESUME; 399 odr = MPU_SLAVE_IRQ_TYPE_NONE; 400 result = inv_mpu_config_accel(inv_get_dl_config(), 401 inv_get_serial_handle(), 402 inv_get_serial_handle(), 403 &config); 404 if (result) { 405 LOG_RESULT_LOCATION(result); 406 return result; 407 } 408 409 } 410 411 return result; 412 } 413 /** 414 * @} 415 */ 416 417
