/external/llvm/include/llvm/CodeGen/ |
ISDOpcodes.h | 191 // SMUL_LOHI/UMUL_LOHI - Multiply two integers of type iN, producing 194 SMUL_LOHI, UMUL_LOHI, [all...] |
SelectionDAG.h | [all...] |
/external/llvm/lib/Target/Mips/ |
MipsISelDAGToDAG.cpp | 241 case ISD::SMUL_LOHI:
|
MipsISelLowering.cpp | 269 if (MultOpc != ISD::SMUL_LOHI && MultOpc != ISD::UMUL_LOHI) 343 if (MultOpc != ISD::SMUL_LOHI && MultOpc != ISD::UMUL_LOHI) [all...] |
/external/llvm/lib/Target/MBlaze/ |
MBlazeISelLowering.cpp | 133 setOperationAction(ISD::SMUL_LOHI, MVT::i32, Expand); 135 setOperationAction(ISD::SMUL_LOHI, MVT::i64, Expand); [all...] |
/external/llvm/lib/Target/X86/ |
X86ISelDAGToDAG.cpp | 817 case ISD::SMUL_LOHI: [all...] |
X86ISelLowering.cpp | 711 setOperationAction(ISD::SMUL_LOHI, (MVT::SimpleValueType)VT, Expand); [all...] |
/external/llvm/lib/Target/XCore/ |
XCoreISelLowering.cpp | 100 setOperationAction(ISD::SMUL_LOHI, MVT::i32, Custom); 179 case ISD::SMUL_LOHI: return LowerSMUL_LOHI(Op, DAG); 554 assert(Op.getValueType() == MVT::i32 && Op.getOpcode() == ISD::SMUL_LOHI && [all...] |
/external/llvm/lib/Target/MSP430/ |
MSP430ISelLowering.cpp | 145 setOperationAction(ISD::SMUL_LOHI, MVT::i8, Expand); 150 setOperationAction(ISD::SMUL_LOHI, MVT::i16, Expand); [all...] |
/external/llvm/lib/Target/Blackfin/ |
BlackfinISelLowering.cpp | 92 setOperationAction(ISD::SMUL_LOHI, MVT::i32, Expand);
|
/external/llvm/lib/Target/CellSPU/ |
SPUISelLowering.cpp | 261 setOperationAction(ISD::SMUL_LOHI, MVT::i8, Expand); 265 setOperationAction(ISD::SMUL_LOHI, MVT::i16, Expand); 269 setOperationAction(ISD::SMUL_LOHI, MVT::i32, Expand); 273 setOperationAction(ISD::SMUL_LOHI, MVT::i64, Expand); [all...] |
/external/llvm/lib/Target/SystemZ/ |
SystemZISelLowering.cpp | 131 setOperationAction(ISD::SMUL_LOHI, MVT::i64, Expand); [all...] |
/external/llvm/lib/CodeGen/SelectionDAG/ |
LegalizeDAG.cpp | [all...] |
TargetLowering.cpp | [all...] |
LegalizeIntegerTypes.cpp | [all...] |
DAGCombiner.cpp | [all...] |
SelectionDAG.cpp | [all...] |
/external/llvm/lib/Target/Alpha/ |
AlphaISelLowering.cpp | 108 setOperationAction(ISD::SMUL_LOHI, MVT::i64, Expand); [all...] |
/external/llvm/lib/Target/Sparc/ |
SparcISelLowering.cpp | 781 setOperationAction(ISD::SMUL_LOHI, MVT::i32, Expand); [all...] |
/external/llvm/lib/Target/PowerPC/ |
PPCISelLowering.cpp | 113 // Don't use SMUL_LOHI/UMUL_LOHI or SDIVREM/UDIVREM to lower SREM/UREM. 115 setOperationAction(ISD::SMUL_LOHI, MVT::i32, Expand); 117 setOperationAction(ISD::SMUL_LOHI, MVT::i64, Expand); 329 setOperationAction(ISD::SMUL_LOHI, VT, Expand); [all...] |
/external/llvm/lib/Target/ARM/ |
ARMISelDAGToDAG.cpp | [all...] |
ARMISelLowering.cpp | 554 setOperationAction(ISD::SMUL_LOHI, MVT::i32, Expand); [all...] |