| /external/llvm/lib/Transforms/InstCombine/ |
| InstCombineSimplifyDemanded.cpp | 576 uint64_t ShiftAmt = SA->getLimitedValue(BitWidth-1);
577 APInt DemandedMaskIn(DemandedMask.lshr(ShiftAmt));
582 DemandedMaskIn |= APInt::getHighBitsSet(BitWidth, ShiftAmt+1);
584 DemandedMaskIn |= APInt::getHighBitsSet(BitWidth, ShiftAmt);
590 KnownZero <<= ShiftAmt;
591 KnownOne <<= ShiftAmt;
593 if (ShiftAmt)
594 KnownZero |= APInt::getLowBitsSet(BitWidth, ShiftAmt);
600 uint64_t ShiftAmt = SA->getLimitedValue(BitWidth-1);
603 APInt DemandedMaskIn(DemandedMask.shl(ShiftAmt));
[all...] |
| InstCombineCasts.cpp | 565 uint32_t ShiftAmt = KnownZeroMask.logBase2();
567 if (ShiftAmt) {
568 // Perform a logical shr by shiftamt.
570 In = Builder->CreateLShr(In, ConstantInt::get(In->getType(),ShiftAmt),
[all...] |
| /external/llvm/lib/Analysis/ |
| ValueTracking.cpp | 329 uint64_t ShiftAmt = SA->getLimitedValue(BitWidth);
330 APInt Mask2(Mask.lshr(ShiftAmt));
334 KnownZero <<= ShiftAmt;
335 KnownOne <<= ShiftAmt;
336 KnownZero |= APInt::getLowBitsSet(BitWidth, ShiftAmt); // low bits known 0
344 uint64_t ShiftAmt = SA->getLimitedValue(BitWidth);
347 APInt Mask2(Mask.shl(ShiftAmt));
351 KnownZero = APIntOps::lshr(KnownZero, ShiftAmt);
352 KnownOne = APIntOps::lshr(KnownOne, ShiftAmt);
354 KnownZero |= APInt::getHighBitsSet(BitWidth, ShiftAmt);
[all...] |
| ConstantFolding.cpp | 132 unsigned ShiftAmt = isLittleEndian ? 0 : SrcBitSize*(Ratio-1);
143 ConstantInt::get(Src->getType(), ShiftAmt));
144 ShiftAmt += isLittleEndian ? SrcBitSize : -SrcBitSize;
162 unsigned ShiftAmt = isLittleEndian ? 0 : DstBitSize*(Ratio-1);
167 ConstantInt::get(Src->getType(), ShiftAmt));
168 ShiftAmt += isLittleEndian ? DstBitSize : -DstBitSize;
[all...] |
| /external/llvm/lib/Target/CellSPU/ |
| SPUISelDAGToDAG.cpp | [all...] |
| /external/llvm/lib/Target/ARM/ |
| ARMCodeEmitter.cpp | [all...] |
| ARMISelLowering.cpp | [all...] |
| /external/llvm/lib/Target/Mips/ |
| MipsISelLowering.cpp | [all...] |
| /external/llvm/lib/Transforms/Scalar/ |
| GVN.cpp | [all...] |
| /external/llvm/lib/Target/PowerPC/ |
| PPCISelLowering.cpp | 591 unsigned ShiftAmt = SVOp->getMaskElt(i);
592 if (ShiftAmt < i) return -1;
593 ShiftAmt -= i;
598 if (!isConstantOrUndef(SVOp->getMaskElt(i), ShiftAmt+i))
603 if (!isConstantOrUndef(SVOp->getMaskElt(i), (ShiftAmt+i) & 15))
606 return ShiftAmt;
[all...] |
| /external/llvm/lib/Support/ |
| APInt.cpp | [all...] |
| /external/llvm/lib/Target/X86/ |
| X86ISelLowering.cpp | [all...] |
| /external/llvm/lib/CodeGen/SelectionDAG/ |
| DAGCombiner.cpp | [all...] |
