| /external/llvm/lib/CodeGen/SelectionDAG/ |
| LegalizeVectorOps.cpp | 139 StoreSDNode *ST = cast<StoreSDNode>(Op.getNode());
336 StoreSDNode *ST = cast<StoreSDNode>(Op.getNode());
|
| LegalizeTypes.h | 283 SDValue PromoteIntOp_STORE(StoreSDNode *N, unsigned OpNo);
355 SDValue ExpandIntOp_STORE(StoreSDNode *N, unsigned OpNo);
536 SDValue ScalarizeVecOp_STORE(StoreSDNode *N, unsigned OpNo);
580 SDValue SplitVecOp_STORE(StoreSDNode *N, unsigned OpNo);
663 void GenWidenVectorStores(SmallVector<SDValue, 16>& StChain, StoreSDNode *ST);
670 StoreSDNode *ST);
[all...] |
| LegalizeTypesGeneric.cpp | 392 StoreSDNode *St = cast<StoreSDNode>(N);
|
| LegalizeVectorTypes.cpp | 323 Res = ScalarizeVecOp_STORE(cast<StoreSDNode>(N), OpNo);
374 SDValue DAGTypeLegalizer::ScalarizeVecOp_STORE(StoreSDNode *N, unsigned OpNo){
[all...] |
| LegalizeFloatTypes.cpp | [all...] |
| DAGCombiner.cpp | [all...] |
| LegalizeDAG.cpp | 91 SDValue OptimizeFloatStore(StoreSDNode *ST);
384 SDValue ExpandUnalignedStore(StoreSDNode *ST, SelectionDAG &DAG,
706 SDValue SelectionDAGLegalize::OptimizeFloatStore(StoreSDNode* ST) {
[all...] |
| SelectionDAG.cpp | 419 const StoreSDNode *ST = cast<StoreSDNode>(N);
[all...] |
| LegalizeIntegerTypes.cpp | [all...] |
| /external/llvm/include/llvm/CodeGen/ |
| SelectionDAGNodes.h | [all...] |
| /external/llvm/lib/Target/XCore/ |
| XCoreISelLowering.cpp | 495 StoreSDNode *ST = cast<StoreSDNode>(Op);
[all...] |
| /external/llvm/lib/Target/ARM/ |
| ARMISelDAGToDAG.cpp | 729 : cast<StoreSDNode>(Op)->getAddressingMode();
765 : cast<StoreSDNode>(Op)->getAddressingMode();
785 : cast<StoreSDNode>(Op)->getAddressingMode();
858 : cast<StoreSDNode>(Op)->getAddressingMode();
[all...] |
| ARMISelLowering.cpp | [all...] |
| /external/llvm/lib/Target/PowerPC/ |
| PPCISelLowering.cpp | [all...] |
| /external/llvm/lib/Target/CellSPU/ |
| SPUISelLowering.cpp | 767 StoreSDNode *SN = cast<StoreSDNode>(Op);
[all...] |
| /external/llvm/lib/Target/X86/ |
| X86ISelLowering.cpp | [all...] |
