| /external/llvm/lib/CodeGen/ |
| RegisterClassInfo.cpp | 27 RegisterClassInfo::RegisterClassInfo() : Tag(0), MF(0), TRI(0), CalleeSaved(0)
35 if (MF->getTarget().getRegisterInfo() != TRI) {
36 TRI = MF->getTarget().getRegisterInfo();
37 RegClass.reset(new RCInfo[TRI->getNumRegClasses()]);
42 const unsigned *CSR = TRI->getCalleeSavedRegs(MF);
47 CSRNum.resize(TRI->getNumRegs(), 0);
49 for (const unsigned *AS = TRI->getOverlaps(Reg);
57 BitVector RR = TRI->getReservedRegs(*MF);
103 if (const TargetRegisterClass *Super = TRI->getLargestLegalSuperClass(RC))
110 dbgs() << ' ' << PrintReg(RCI.Order[I], TRI);
[all...] |
| RegisterScavenging.cpp | 40 for (const unsigned *SubRegs = TRI->getSubRegisters(Reg);
48 for (const unsigned *R = TRI->getAliasSet(Reg); *R; ++R)
83 TRI = TM.getRegisterInfo();
86 assert((NumPhysRegs == 0 || NumPhysRegs == TRI->getNumRegs()) &&
91 NumPhysRegs = TRI->getNumRegs();
95 ReservedRegs = TRI->getReservedRegs(MF);
99 const unsigned *CSRegs = TRI->getCalleeSavedRegs();
113 for (const unsigned *R = TRI->getSubRegisters(Reg); *R; R++)
119 for (const unsigned *R = TRI->getAliasSet(Reg); *R; R++)
202 for (const unsigned *SubRegs = TRI->getSubRegisters(Reg)
[all...] |
| VirtRegRewriter.cpp | 69 const TargetRegisterInfo &TRI) {
71 MO.substPhysReg(Reg, TRI);
80 MI.addRegisterKilled(Reg, &TRI, /*AddIfNotFound=*/ true);
103 const TargetRegisterInfo *tri = MF.getTarget().getRegisterInfo(); local
129 pReg, *tri);
160 const TargetRegisterInfo *TRI;
178 AvailableSpills(const TargetRegisterInfo *tri, const TargetInstrInfo *tii)
179 : TRI(tri), TII(tii) {
188 const TargetRegisterInfo *getRegInfo() const { return TRI; }
[all...] |
| MachineRegisterInfo.cpp | 20 MachineRegisterInfo::MachineRegisterInfo(const TargetRegisterInfo &TRI)
21 : TRI(&TRI), IsSSA(true) {
24 UsedPhysRegs.resize(TRI.getNumRegs());
27 PhysRegUseDefLists = new MachineOperand*[TRI.getNumRegs()];
28 memset(PhysRegUseDefLists, 0, sizeof(MachineOperand*)*TRI.getNumRegs());
57 const TargetRegisterClass *NewRC = TRI->getCommonSubClass(OldRC, RC);
70 const TargetRegisterClass *NewRC = TRI->getLargestLegalSuperClass(OldRC);
79 // TRI doesn't have accurate enough information to model this yet.
83 I->getRegClassConstraint(I.getOperandNo(), TII, TRI);
[all...] |
| RegisterCoalescer.h | 30 const TargetRegisterInfo &TRI;
59 CoalescerPair(const TargetInstrInfo &tii, const TargetRegisterInfo &tri)
60 : TII(tii), TRI(tri), DstReg(0), SrcReg(0), SubIdx(0),
|
| AllocationOrder.cpp | 42 const TargetRegisterInfo &TRI = VRM.getTargetRegInfo();
45 TRI.getRawAllocationOrder(RC, HintPair.first, Hint,
60 Hint = TRI.ResolveRegAllocHint(HintPair.first, Hint,
|
| AggressiveAntiDepBreaker.cpp | 123 TRI(MF.getTarget().getRegisterInfo()),
129 BitVector CPSet = TRI->getAllocatableSet(MF, CriticalPathRCs[i]);
139 dbgs() << " " << TRI->getName(r));
149 State = new AggressiveAntiDepState(TRI->getNumRegs(), BB);
160 for (const unsigned *Alias = TRI->getOverlaps(*I);
176 for (const unsigned *Alias = TRI->getOverlaps(*I);
189 for (const unsigned *I = TRI->getCalleeSavedRegs(); *I; ++I) {
192 for (const unsigned *Alias = TRI->getOverlaps(Reg);
220 for (unsigned Reg = 0; Reg != TRI->getNumRegs(); ++Reg) {
229 dbgs() << " " << TRI->getName(Reg) << "=g" <
[all...] |
| LocalStackSlotAllocation.cpp | 90 const TargetRegisterInfo *TRI = MF.getTarget().getRegisterInfo();
95 if (!TRI->requiresVirtualBaseRegisters(MF) || LocalObjectCount == 0)
206 const TargetRegisterInfo *TRI) {
213 if (TRI->isFrameOffsetLegal(MI, Offset))
229 const TargetRegisterInfo *TRI = Fn.getTarget().getRegisterInfo();
293 if (TRI->needsFrameBaseReg(MI, LocalOffsets[FrameIdx])) {
310 MI, TRI)) {
320 int64_t InstrOffset = TRI->getFrameIndexInstrOffset(MI, idx);
321 const TargetRegisterClass *RC = TRI->getPointerRegClass();
331 TRI->materializeFrameBaseRegister(Entry, BaseReg, FrameIdx
[all...] |
| VirtRegMap.cpp | 58 TRI = mf.getTarget().getRegisterInfo();
82 for (TargetRegisterInfo::regclass_iterator I = TRI->regclass_begin(),
83 E = TRI->regclass_end(); I != E; ++I)
85 TRI->getAllocatableSet(mf, *I)));
126 return TRI->ResolveRegAllocHint(Hint.first, physReg, *MF);
227 unsigned NumRegs = TRI->getNumRegs();
238 BitVector Allocatable = TRI->getAllocatableSet(*MF);
243 for (const unsigned *AS = TRI->getAliasSet(Reg); *AS; ++AS) {
308 PhysReg = TRI->getSubReg(PhysReg, MO.getSubReg());
320 MI->addRegisterKilled(SuperKills.pop_back_val(), TRI, true)
[all...] |
| InterferenceCache.h | 22 const TargetRegisterInfo *TRI;
92 bool valid(LiveIntervalUnion *LIUArray, const TargetRegisterInfo *TRI);
97 const TargetRegisterInfo *TRI,
127 InterferenceCache() : TRI(0), LIUArray(0), Indexes(0), MF(0), RoundRobin(0) {}
|
| CriticalAntiDepBreaker.cpp | 34 TRI(MF.getTarget().getRegisterInfo()),
36 Classes(TRI->getNumRegs(), static_cast<const TargetRegisterClass *>(0)),
37 KillIndices(TRI->getNumRegs(), 0),
38 DefIndices(TRI->getNumRegs(), 0) {}
45 for (unsigned i = 0, e = TRI->getNumRegs(); i != e; ++i) {
70 for (const unsigned *Alias = TRI->getAliasSet(Reg); *Alias; ++Alias) {
92 for (const unsigned *Alias = TRI->getAliasSet(Reg); *Alias; ++Alias) {
105 for (const unsigned *I = TRI->getCalleeSavedRegs(); *I; ++I) {
113 for (const unsigned *Alias = TRI->getAliasSet(Reg); *Alias; ++Alias) {
133 for (unsigned Reg = 0; Reg != TRI->getNumRegs(); ++Reg)
[all...] |
| RegAllocFast.cpp | 60 const TargetRegisterInfo *TRI;
219 LR.LastUse->addRegisterKilled(LR.PhysReg, TRI, true);
264 DEBUG(dbgs() << "Spilling " << PrintReg(LRI->first, TRI)
265 << " in " << PrintReg(LR.PhysReg, TRI));
269 TII->storeRegToStackSlot(*MBB, MI, LR.PhysReg, SpillKill, FI, RC, TRI);
346 for (const unsigned *AS = TRI->getAliasSet(PhysReg);
352 assert(TRI->isSuperRegister(PhysReg, Alias) &&
357 MO.getParent()->addRegisterKilled(Alias, TRI, true);
360 if (TRI->isSuperRegister(PhysReg, Alias)) {
363 MO.getParent()->addRegisterKilled(Alias, TRI, true)
[all...] |
| ExpandPostRAPseudos.cpp | 32 const TargetRegisterInfo *TRI;
58 const TargetRegisterInfo *TRI);
74 const TargetRegisterInfo *TRI) {
77 if (MII->addRegisterDead(DstReg, TRI))
113 unsigned DstSubReg = TRI->getSubReg(DstReg, SubIdx);
140 TransferDeadFlag(MI, DstSubReg, TRI);
177 TransferDeadFlag(MI, DstMO.getReg(), TRI);
196 TRI = MF.getTarget().getRegisterInfo();
|
| InterferenceCache.cpp | 27 const TargetRegisterInfo *tri) {
30 TRI = tri;
31 PhysRegEntries.assign(TRI->getNumRegs(), 0);
39 if (!Entries[E].valid(LIUArray, TRI))
54 Entries[E].reset(PhysReg, LIUArray, TRI, MF);
73 const TargetRegisterInfo *TRI,
81 for (const unsigned *AS = TRI->getOverlaps(PhysReg); *AS; ++AS) {
95 const TargetRegisterInfo *TRI) {
97 for (const unsigned *AS = TRI->getOverlaps(PhysReg); *AS; ++AS, ++i)
[all...] |
| /external/llvm/lib/Target/ARM/ |
| Thumb2InstrInfo.h | 50 const TargetRegisterInfo *TRI) const;
56 const TargetRegisterInfo *TRI) const;
61 const TargetRegisterInfo &TRI) const;
|
| ARMHazardRecognizer.h | 28 const ARMBaseRegisterInfo &TRI;
39 const ARMBaseRegisterInfo &tri,
43 TRI(tri), STI(sti), LastMI(0), ITBlockSize(0) {}
|
| Thumb1FrameLowering.h | 41 const TargetRegisterInfo *TRI) const;
45 const TargetRegisterInfo *TRI) const;
|
| Thumb1InstrInfo.h | 48 const TargetRegisterInfo *TRI) const;
54 const TargetRegisterInfo *TRI) const;
|
| /external/llvm/lib/Target/MSP430/ |
| MSP430FrameLowering.h | 41 const TargetRegisterInfo *TRI) const;
45 const TargetRegisterInfo *TRI) const;
|
| /external/llvm/lib/Target/XCore/ |
| XCoreFrameLowering.h | 37 const TargetRegisterInfo *TRI) const;
41 const TargetRegisterInfo *TRI) const;
|
| /external/llvm/include/llvm/CodeGen/ |
| MachineInstr.h | 308 bool readsRegister(unsigned Reg, const TargetRegisterInfo *TRI = NULL) const {
309 return findRegisterUseOperandIdx(Reg, false, TRI) != -1;
329 bool killsRegister(unsigned Reg, const TargetRegisterInfo *TRI = NULL) const {
330 return findRegisterUseOperandIdx(Reg, true, TRI) != -1;
337 bool definesRegister(unsigned Reg, const TargetRegisterInfo *TRI=NULL) const {
338 return findRegisterDefOperandIdx(Reg, false, false, TRI) != -1;
344 bool modifiesRegister(unsigned Reg, const TargetRegisterInfo *TRI) const {
345 return findRegisterDefOperandIdx(Reg, false, true, TRI) != -1;
352 const TargetRegisterInfo *TRI = NULL) const {
353 return findRegisterDefOperandIdx(Reg, true, false, TRI) != -1
[all...] |
| ProcessImplicitDefs.h | 29 const TargetRegisterInfo *TRI;
|
| /external/llvm/lib/Target/SystemZ/ |
| SystemZFrameLowering.h | 41 const TargetRegisterInfo *TRI) const;
45 const TargetRegisterInfo *TRI) const;
|
| /external/llvm/lib/Target/ |
| TargetRegisterInfo.cpp | 39 else if (TRI && Reg < TRI->getNumRegs())
40 OS << '%' << TRI->getName(Reg);
44 if (TRI)
45 OS << ':' << TRI->getSubRegIndexName(SubIdx);
|
| /external/llvm/include/llvm/Target/ |
| TargetFrameLowering.h | 128 const TargetRegisterInfo *TRI) const {
139 const TargetRegisterInfo *TRI) const {
|
