/external/llvm/lib/Target/CellSPU/ |
SPUInstrInfo.cpp | 375 MIB.addMBB(TBB); 384 MIB.addMBB(TBB); 389 MIB.addReg(Cond[1].getReg()).addMBB(TBB); 394 MIB.addMBB(TBB); 406 MIB.addReg(Cond[1].getReg()).addMBB(TBB); 407 MIB2.addMBB(FBB); 412 MIB.addMBB(FBB);
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/external/llvm/lib/Target/Alpha/ |
AlphaInstrInfo.cpp | 99 BuildMI(&MBB, DL, get(Alpha::BR)).addMBB(TBB); 103 .addImm(Cond[0].getImm()).addReg(Cond[1].getReg()).addMBB(TBB); 106 .addImm(Cond[0].getImm()).addReg(Cond[1].getReg()).addMBB(TBB); 113 .addImm(Cond[0].getImm()).addReg(Cond[1].getReg()).addMBB(TBB); 116 .addImm(Cond[0].getImm()).addReg(Cond[1].getReg()).addMBB(TBB); 117 BuildMI(&MBB, DL, get(Alpha::BR)).addMBB(FBB);
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AlphaISelLowering.cpp | [all...] |
/external/llvm/lib/Target/Sparc/ |
SparcInstrInfo.cpp | 195 .addMBB(UnCondBrIter->getOperand(0).getMBB()).addImm(BranchCode); 197 .addMBB(TargetBB); 229 BuildMI(&MBB, DL, get(SP::BA)).addMBB(TBB); 237 BuildMI(&MBB, DL, get(SP::BCOND)).addMBB(TBB).addImm(CC); 239 BuildMI(&MBB, DL, get(SP::FBCOND)).addMBB(TBB).addImm(CC); 243 BuildMI(&MBB, DL, get(SP::BA)).addMBB(FBB);
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SparcISelLowering.cpp | [all...] |
/external/llvm/lib/Target/MBlaze/ |
MBlazeInstrInfo.cpp | 202 BuildMI(&MBB, DL, get(Opc)).addMBB(TBB); 204 BuildMI(&MBB, DL, get(Opc)).addReg(Cond[1].getReg()).addMBB(TBB); 208 BuildMI(&MBB, DL, get(Opc)).addReg(Cond[1].getReg()).addMBB(TBB); 209 BuildMI(&MBB, DL, get(MBlaze::BRID)).addMBB(FBB);
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MBlazeISelLowering.cpp | 304 .addMBB(finish); 309 .addReg(IVAL).addMBB(MBB) 310 .addReg(NDST).addMBB(loop); 315 .addReg(IAMT).addMBB(MBB) 316 .addReg(NAMT).addMBB(loop); 333 .addMBB(loop); 337 .addReg(IVAL).addMBB(MBB) 338 .addReg(NDST).addMBB(loop); 395 .addMBB(dneBB); 401 // .addReg(MI->getOperand(1).getReg()).addMBB(flsBB [all...] |
/external/llvm/lib/Target/XCore/ |
XCoreInstrInfo.cpp | 287 BuildMI(&MBB, DL, get(XCore::BRFU_lu6)).addMBB(TBB); 292 .addMBB(TBB); 301 .addMBB(TBB); 302 BuildMI(&MBB, DL, get(XCore::BRFU_lu6)).addMBB(FBB);
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/external/llvm/lib/Target/MSP430/ |
MSP430InstrInfo.cpp | 278 BuildMI(&MBB, DL, get(MSP430::JMP)).addMBB(TBB); 284 BuildMI(&MBB, DL, get(MSP430::JCC)).addMBB(TBB).addImm(Cond[0].getImm()); 289 BuildMI(&MBB, DL, get(MSP430::JMP)).addMBB(FBB);
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MSP430BranchSelector.cpp | 161 I = BuildMI(MBB, I, dl, TII->get(MSP430::Bi)).addMBB(Dest);
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MSP430ISelLowering.cpp | [all...] |
/external/llvm/lib/Target/PTX/ |
PTXInstrInfo.cpp | 284 .addMBB(TBB).addReg(Cond[0].getReg()).addImm(Cond[1].getImm()); 286 .addMBB(FBB).addReg(PTX::NoRegister).addImm(PTXPredicate::None); 290 .addMBB(TBB).addReg(Cond[0].getReg()).addImm(Cond[1].getImm()); 294 .addMBB(TBB).addReg(PTX::NoRegister).addImm(PTXPredicate::None);
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/external/llvm/lib/Target/PowerPC/ |
PPCBranchSelector.cpp | 155 I = BuildMI(MBB, I, dl, TII->get(PPC::B)).addMBB(Dest);
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PPCInstrInfo.cpp | 296 BuildMI(&MBB, DL, get(PPC::B)).addMBB(TBB); 299 .addImm(Cond[0].getImm()).addReg(Cond[1].getReg()).addMBB(TBB); 305 .addImm(Cond[0].getImm()).addReg(Cond[1].getReg()).addMBB(TBB); 306 BuildMI(&MBB, DL, get(PPC::B)).addMBB(FBB);
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PPCISelLowering.cpp | [all...] |
/external/llvm/lib/Target/ARM/ |
ARMConstantIslandPass.cpp | 743 BuildMI(OrigBB, DebugLoc(), TII->get(Opc)).addMBB(NewBB); 745 BuildMI(OrigBB, DebugLoc(), TII->get(Opc)).addMBB(NewBB) [all...] |
ARMBaseInstrInfo.cpp | 417 BuildMI(&MBB, DL, get(BOpc)).addMBB(TBB).addImm(ARMCC::AL).addReg(0); 419 BuildMI(&MBB, DL, get(BOpc)).addMBB(TBB); 421 BuildMI(&MBB, DL, get(BccOpc)).addMBB(TBB) 427 BuildMI(&MBB, DL, get(BccOpc)).addMBB(TBB) 430 BuildMI(&MBB, DL, get(BOpc)).addMBB(FBB).addImm(ARMCC::AL).addReg(0); 432 BuildMI(&MBB, DL, get(BOpc)).addMBB(FBB); [all...] |
/external/llvm/lib/Target/Mips/ |
MipsInstrInfo.cpp | 366 MIB.addMBB(TBB); 388 BuildMI(&MBB, DL, get(Mips::J)).addMBB(FBB); 395 BuildMI(&MBB, DL, get(Mips::J)).addMBB(TBB);
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/external/llvm/lib/Target/SystemZ/ |
SystemZInstrInfo.cpp | 332 BuildMI(&MBB, DL, get(SystemZ::JMP)).addMBB(TBB); 339 BuildMI(&MBB, DL, getBrCond(CC)).addMBB(TBB); 344 BuildMI(&MBB, DL, get(SystemZ::JMP)).addMBB(FBB);
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SystemZISelLowering.cpp | 847 BuildMI(BB, dl, TII.getBrCond(CC)).addMBB(copy1MBB); [all...] |
/external/llvm/include/llvm/CodeGen/ |
MachineInstrBuilder.h | 90 const MachineInstrBuilder &addMBB(MachineBasicBlock *MBB,
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/external/llvm/lib/Target/Blackfin/ |
BlackfinInstrInfo.cpp | 92 BuildMI(&MBB, DL, get(BF::JUMPa)).addMBB(TBB);
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/external/llvm/lib/CodeGen/ |
MachineSSAUpdater.cpp | 192 MIB.addReg(PredValues[i].second).addMBB(PredValues[i].first);
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/external/llvm/lib/Target/X86/ |
X86InstrInfo.cpp | [all...] |
X86FastISel.cpp | [all...] |