/external/llvm/lib/CodeGen/ |
DeadMachineInstructionElim.cpp | 44 bool isDead(const MachineInstr *MI) const; 56 bool DeadMachineInstructionElim::isDead(const MachineInstr *MI) const { 129 if (isDead(MI)) {
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ExpandPostRAPseudos.cpp | 139 if (MI->getOperand(0).isDead()) 160 if (DstMO.isDead() || SrcMO.isUndef() || MI->getNumOperands() > 2) { 176 if (DstMO.isDead())
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MachineInstr.cpp | 156 bool isKill, bool isDead, bool isUndef, 179 IsDead = isDead; 242 if (isDef() || isKill() || isDead() || isImplicit() || isUndef() || 259 if (isKill() || isDead() || isUndef()) { 262 if (isDead()) OS << "dead"; 264 if (isKill() || isDead()) 770 if (Check == CheckKillDead && MO.isDead() != OMO.isDead()) [all...] |
PHIElimination.cpp | 200 bool isDead = MPhi->getOperand(0).isDead(); 270 if (isDead) {
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RegAllocFast.cpp | 602 } else if (MO.isDead()) { 613 } else if (MO.isDead()) { 631 return MO.isKill() || MO.isDead(); 644 return MO.isDead(); [all...] |
TailDuplication.cpp | 94 void UpdateSuccessorsPHIs(MachineBasicBlock *FromBB, bool isDead, 207 bool isDead = MBB->pred_empty() && !MBB->hasAddressTaken(); 209 UpdateSuccessorsPHIs(MBB, isDead, TDBBs, Succs); 212 if (isDead) { 442 TailDuplicatePass::UpdateSuccessorsPHIs(MachineBasicBlock *FromBB, bool isDead, 464 if (isDead) { [all...] |
RegisterScavenging.cpp | 172 if (!isPred && MO.isDead())
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TwoAddressInstructionPass.cpp | 783 if (MO.isDef() && !MO.isDead()) 839 bool isDead = NewKills.back().first.second; 842 if (isDead) [all...] |
LiveInterval.cpp | 308 bool isDead = true; 311 isDead = false; 314 if (isDead) {
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ScheduleDAGInstrs.cpp | 280 (Kind != SDep::Output || !MO.isDead() || 291 (Kind != SDep::Output || !MO.isDead() || 393 if (!MO.isDead())
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RegisterCoalescer.cpp | [all...] |
VirtRegRewriter.cpp | 577 /// (since its spill instruction is removed), mark it isDead. Also checks if 594 else if (!MO.isDead()) [all...] |
BranchFolding.cpp | [all...] |
MachineLICM.cpp | 425 if (!MO.isDead()) 839 } else if (!MO.isDead()) { [all...] |
MachineSink.cpp | 460 } else if (!MO.isDead()) {
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TargetInstrInfoImpl.cpp | 96 bool Reg0IsDead = HasDef ? MI->getOperand(0).isDead() : false;
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VirtRegMap.cpp | 301 if (MO.isDead())
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/external/llvm/include/llvm/CodeGen/ |
MachineInstr.h | 371 /// the specified register or -1 if it is not found. If isDead is true, defs 376 bool isDead = false, bool Overlap = false, 381 MachineOperand *findRegisterDefOperand(unsigned Reg, bool isDead = false, 383 int Idx = findRegisterDefOperandIdx(Reg, isDead, false, TRI); 452 /// Look for the operand that defines it and mark it as IsDead. If
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MachineOperand.h | 67 /// IsDef/IsImp/IsKill/IsDead flags - These are only valid for MO_Register 82 /// IsDead - True if this register is never used by a subsequent instruction. 84 bool IsDead : 1; 246 bool isDead() const { 248 return IsDead; 338 IsDead = Val; 452 /// operand. Note: This method ignores isKill and isDead properties. 464 bool isKill = false, bool isDead = false, 490 bool isKill = false, bool isDead = false, 499 Op.IsDead = isDead [all...] |
/external/llvm/lib/Target/ARM/ |
ARMBaseInstrInfo.h | 305 bool isDead = false) { 306 return MIB.addReg(ARM::CPSR, getDefRegState(true) | getDeadRegState(isDead));
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ARMExpandPseudoInsts.cpp | 421 bool DstIsDead = MI.getOperand(OpIdx).isDead(); 549 DstIsDead = MI.getOperand(OpIdx).isDead(); 650 bool DstIsDead = MI.getOperand(0).isDead(); [all...] |
MLxExpansionPass.cpp | 210 bool DstDead = MI->getOperand(0).isDead();
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Thumb2SizeReduction.cpp | 631 if (HasCC && MI->getOperand(NumOps-1).isDead()) 721 if (HasCC && MI->getOperand(NumOps-1).isDead()) 790 if (!MO.isDead())
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/external/llvm/lib/Target/X86/ |
X86InstrInfo.cpp | [all...] |
/external/clang/include/clang/StaticAnalyzer/Core/PathSensitive/ |
SymbolManager.h | 508 bool isDead(SymbolRef sym) const {
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