| /external/llvm/lib/Target/ARM/ |
| ARMFastISel.cpp | 88 const TargetInstrInfo &TII;
100 TII(*TM.getInstrInfo()),
263 if (TII.isPredicable(MI) || isARMNEONPred(MI))
281 const MCInstrDesc &II = TII.get(MachineInstOpcode);
291 const MCInstrDesc &II = TII.get(MachineInstOpcode);
300 TII.get(TargetOpcode::COPY), ResultReg)
311 const MCInstrDesc &II = TII.get(MachineInstOpcode);
322 TII.get(TargetOpcode::COPY), ResultReg)
334 const MCInstrDesc &II = TII.get(MachineInstOpcode);
347 TII.get(TargetOpcode::COPY), ResultReg
[all...] |
| ARMISelDAGToDAG.cpp | 68 const ARMBaseInstrInfo *TII;
78 TII(static_cast<const ARMBaseInstrInfo*>(TM.getInstrInfo())),
354 const MCInstrDesc &MCID = TII->get(Use->getMachineOpcode());
373 return TII->isFpMLxInstruction(Opcode);
[all...] |
| ARMLoadStoreOptimizer.cpp | 63 const TargetInstrInfo *TII;
119 const TargetInstrInfo *TII,
344 BuildMI(MBB, MBBI, dl, TII->get(BaseOpc), NewBase)
355 MachineInstrBuilder MIB = BuildMI(MBB, MBBI, dl, TII->get(Opcode))
747 MachineInstrBuilder MIB = BuildMI(MBB, MBBI, dl, TII->get(NewOpc))
819 const TargetInstrInfo *TII,
902 BuildMI(MBB, MBBI, dl, TII->get(NewOpc))
913 BuildMI(MBB, MBBI, dl, TII->get(NewOpc), MI->getOperand(0).getReg())
918 BuildMI(MBB, MBBI, dl, TII->get(NewOpc), MI->getOperand(0).getReg())
925 BuildMI(MBB, MBBI, dl, TII->get(NewOpc), MI->getOperand(0).getReg()
[all...] |
| ARMISelLowering.cpp | [all...] |
| /external/llvm/lib/Target/X86/ |
| X86ISelDAGToDAG.cpp | 540 const TargetInstrInfo *TII = TM.getInstrInfo();
545 TII->get(CallOp)).addExternalSymbol("__main");
[all...] |
| X86InstrInfo.cpp | [all...] |
| X86ISelLowering.cpp | [all...] |
| /external/llvm/lib/Target/XCore/ |
| XCoreISelLowering.cpp | [all...] |
| /external/llvm/lib/CodeGen/SelectionDAG/ |
| ScheduleDAGRRList.cpp | 285 const TargetInstrInfo *TII,
305 const MCInstrDesc Desc = TII->get(Opcode);
306 const TargetRegisterClass *RC = TII->getRegClass(Desc, Idx, TRI);
805 if (!TII->unfoldMemoryOperand(*DAG, N, NewNodes))
840 const MCInstrDesc &MCID = TII->get(N->getMachineOpcode());
[all...] |
| SelectionDAGBuilder.cpp | [all...] |
| /external/llvm/lib/Target/Mips/ |
| MipsISelLowering.cpp | 715 const TargetInstrInfo *TII,
755 BuildMI(BB, dl, TII->get(Opc)).addMBB(sinkMBB);
757 BuildMI(BB, dl, TII->get(Opc)).addReg(MI->getOperand(2).getReg())
775 TII->get(Mips::PHI), MI->getOperand(0).getReg())
780 TII->get(Mips::PHI), MI->getOperand(0).getReg())
[all...] |
| /external/apache-harmony/luni/src/test/api/common/org/apache/harmony/luni/tests/java/util/ |
| ArraysTest.java | [all...] |
| /external/llvm/lib/Target/PowerPC/ |
| PPCISelLowering.cpp | [all...] |
