| /external/llvm/lib/CodeGen/SelectionDAG/ |
| SelectionDAG.cpp | 89 const APFloat& Val) {
94 &Val.getSemantics() == &APFloat::PPCDoubleDouble)
98 APFloat Val2 = APFloat(Val);
914 /// getNOT - Create a bitwise NOT operation as (XOR Val, -1).
916 SDValue SelectionDAG::getNOT(DebugLoc DL, SDValue Val, EVT VT) {
920 return getNode(ISD::XOR, DL, VT, Val, NegOne);
923 SDValue SelectionDAG::getConstant(uint64_t Val, EVT VT, bool isT) {
[all...] |
| DAGCombiner.cpp | [all...] |
| SelectionDAGBuilder.cpp | 106 SDValue Val = Parts[0];
137 Val = DAG.getNode(ISD::BUILD_PAIR, DL, RoundVT, Lo, Hi);
147 Lo = Val;
156 Val = DAG.getNode(ISD::OR, DL, TotalVT, Lo, Hi);
167 Val = DAG.getNode(ISD::BUILD_PAIR, DL, ValueVT, Lo, Hi);
173 Val = getCopyFromParts(DAG, DL, Parts, NumParts, PartVT, IntVT);
177 // There is now one part, held in Val. Correct it to match ValueVT.
178 PartVT = Val.getValueType();
181 return Val;
189 Val = DAG.getNode(AssertOp, DL, PartVT, Val
[all...] |
| /external/llvm/lib/Target/ARM/AsmParser/ |
| ARMAsmParser.cpp | 280 ARMCC::CondCodes Val;
284 unsigned Val;
288 unsigned Val;
296 ARM_MB::MemBOpt Val;
300 ARM_PROC::IFlags Val;
304 unsigned Val;
323 unsigned Val;
327 const MCExpr *Val;
331 unsigned Val; // encoded 8-bit representation
463 return CC.Val;
[all...] |
| /external/llvm/lib/VMCore/ |
| Core.cpp | 397 LLVMTypeRef LLVMTypeOf(LLVMValueRef Val) {
398 return wrap(unwrap(Val)->getType());
401 const char *LLVMGetValueName(LLVMValueRef Val) {
402 return unwrap(Val)->getName().data();
405 void LLVMSetValueName(LLVMValueRef Val, const char *Name) {
406 unwrap(Val)->setName(Name);
409 void LLVMDumpValue(LLVMValueRef Val) {
410 unwrap(Val)->dump();
432 LLVMValueRef LLVMIsA##name(LLVMValueRef Val) { \
433 return wrap(static_cast<Value*>(dyn_cast_or_null<name>(unwrap(Val)))); \
[all...] |
| /external/clang/include/clang/AST/ |
| Expr.h | 457 /// Val - This is the value the expression can be folded to.
458 APValue Val;
[all...] |
| /external/clang/lib/Sema/ |
| SemaDecl.cpp | [all...] |
| SemaExpr.cpp | [all...] |
| /external/llvm/lib/Target/PowerPC/ |
| PPCISelLowering.cpp | 496 static bool isConstantOrUndef(int Op, int Val) {
497 return Op < 0 || Op == Val;
711 int Val = cast<ConstantSDNode>(UniquedVals[Multiple-1])->getZExtValue();
712 if (Val < 16)
713 return DAG.getTargetConstant(Val, MVT::i32); // 0,0,0,4 -> vspltisw(4)
718 int Val =cast<ConstantSDNode>(UniquedVals[Multiple-1])->getSExtValue();
719 if (Val >= -16) // -1,-1,-1,-2 -> vspltisw(-2)
720 return DAG.getTargetConstant(Val, MVT::i32);
[all...] |
| /external/llvm/lib/Target/ARM/ |
| ARMISelLowering.cpp | [all...] |
| /external/llvm/lib/Target/X86/ |
| X86ISelLowering.cpp | [all...] |
