/external/valgrind/main/memcheck/ |
mc_malloc_wrappers.c | 373 accesses via the old address after reallocation, regardless of 374 the change in size. (Of course the ability to detect accesses 407 than recycling the old one, so that any erroneous accesses to the 460 than recycling the old one, so that any erroneous accesses to the
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/external/valgrind/tsan/ |
thread_sanitizer.h | 259 // Returns true if accesses and locks at the given address should be ignored
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ts_valgrind.cc | 239 // If true, ignore all accesses in all threads. 839 // Register memory accesses. 897 // Unregister accesses from the old trace_info. [all...] |
/external/webkit/Tools/DumpRenderTree/chromium/ |
CppBoundClass.h | 59 // CppBoundClass lets you map Javascript method calls and property accesses
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/frameworks/base/core/java/android/text/ |
AutoText.java | 33 * This class accesses a dictionary of corrections to frequent misspellings.
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/frameworks/base/docs/html/guide/market/billing/ |
billing_best_practices.jd | 102 purchase state of the unlocked content whenever a user accesses the content. This allows you to
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/frameworks/base/docs/html/resources/faq/ |
framework.jd | 88 this object just accesses this static field.</p>
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/frameworks/base/services/java/com/android/server/ |
NetworkTimeUpdateService.java | 250 /** Handler to do the network accesses on */
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/libcore/luni/src/main/java/java/util/concurrent/atomic/ |
package-info.java | 53 * <p>The memory effects for accesses and updates of atomics generally
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/libcore/luni/src/main/java/org/apache/harmony/xml/ |
ExpatReader.java | 40 * ExpatParser accesses these fields directly during parsing. The user
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/external/llvm/include/llvm/ |
Intrinsics.td | 212 // with respect to nearby accesses to the same memory. 283 // None of these intrinsics accesses memory at all. 294 // None of these intrinsics accesses memory at all...but that doesn't mean the
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/external/qemu/ |
cpu-all.h | 28 * memory accesses. 174 * the generic syntax for the memory accesses is: 226 /* conservative code for little endian unaligned accesses */
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/external/valgrind/main/drd/ |
drd_main.c | 192 " and subsequent accesses of that memory[no].\n" 363 * Discard all information DRD has about memory accesses and client objects 379 * such calls can cause conflicting accesses. See also Ulrich Drepper's
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/external/clang/lib/Sema/ |
SemaAccess.cpp | 523 // Whitelist accesses if there's an invalid or unsupported friend 753 // C. All other accesses involve a (possibly implicit) object 949 // Only applies to instance accesses. [all...] |
/external/valgrind/main/drd/tests/ |
tsan_unittest.cpp | 357 // Two write accesses to GLOB are synchronized because 406 // Two write accesses to GLOB are synchronized via conditional critical section. 451 // Two write accesses to GLOB are separated by PCQ Put/Get. 485 // Two write accesses to GLOB are synchronized via CondVar. 590 // Two write accesses to GLOB are synchronized via conditional critical section. 635 // Three accesses to GLOB are separated by thread start/join. [all...] |
/external/valgrind/main/docs/ |
valgrind.1 | 475 You may need to use this option if your program has large stack\-allocated arrays\&. Valgrind keeps track of your program\*(Aqs stack pointer\&. If it changes by more than the threshold amount, Valgrind assumes your program is switching to a different stack, and Memcheck behaves differently than it would for a stack pointer change smaller than the threshold\&. Usually this heuristic works well\&. However, if your program allocates large structures on the stack, this heuristic will be fooled, and Memcheck will subsequently report large numbers of invalid stack accesses\&. This option allows you to change the threshold to a different value\&. [all...] |
/external/valgrind/main/helgrind/ |
libhb_core.c | 319 static UWord stats__cache_totrefs = 0; // # total accesses 338 static UWord stats__cline_64to32splits = 0; // # 64-bit accesses split 339 static UWord stats__cline_32to16splits = 0; // # 32-bit accesses split 340 static UWord stats__cline_16to8splits = 0; // # 16-bit accesses split [all...] |
/external/valgrind/main/cachegrind/docs/ |
cg-manual.xml | 27 runtime, as it masks accesses to main memory. Furthermore, the L1 caches 72 <para>Note that D1 total accesses is given by 75 accesses is given by <computeroutput>ILmr</computeroutput> + 146 <para>Cache accesses for instruction fetches are summarised 152 <para>Cache accesses for data follow. The information is similar 161 number of memory accesses, not the number of L1 misses. I.e. it is [all...] |
/external/oprofile/events/x86-64/family10/ |
events | 53 event:0x40 counters:0,1,2,3 um:zero minimum:500 name:DATA_CACHE_ACCESSES : Data cache accesses 61 event:0x47 counters:0,1,2,3 um:zero minimum:500 name:MISALIGNED_ACCESSES : Misaligned Accesses 138 event:0xe0 counters:0,1,2,3 um:page_access minimum:500 name:DRAM_ACCESSES : DRAM accesses
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/external/chromium/testing/gtest/src/ |
gtest-printers.cc | 317 // memory accesses. MSVC defines _NATIVE_WCHAR_T_DEFINED symbol when
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/external/grub/netboot/ |
etherboot.h | 460 /* Block size used for NFS read accesses. A RPC reply packet (including all
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/external/jsr305/javadoc/javax/annotation/concurrent/ |
ThreadSafe.html | 102 no sequences of accesses (reads and writes to public fields, calls to public
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/external/kernel-headers/original/linux/ |
fd.h | 218 /* Prevent "aliased" accesses. */
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/external/libvpx/ |
CHANGELOG | 242 * Prevent out-of-bounds accesses on invalid data
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/external/llvm/lib/Target/MBlaze/ |
MBlazeDelaySlotFiller.cpp | 124 // 5. a accesses memory, and the middle bit
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