| /external/llvm/test/Transforms/ScalarRepl/ |
| debuginfo-preserved.ll | 3 target datalayout = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-s0:64:64-f80:128:128-n8:16:32:64"
48 !3 = metadata !{i32 589845, metadata !2, metadata !"", metadata !2, i32 0, i64 0, i64 0, i32 0, i32 0, i32 0, metadata !4, i32 0, i32 0} ; [ DW_TAG_subroutine_type ]
50 !5 = metadata !{i32 589860, metadata !0, metadata !"int", null, i32 0, i64 32, i64 32, i64 0, i32 0, i32 5} ; [ DW_TAG_base_type ]
|
| /external/llvm/lib/Target/Alpha/ |
| AlphaISelDAGToDAG.cpp | 138 /// i64.
140 return CurDAG->getTargetConstant(Imm, MVT::i64);
221 return CurDAG->SelectNodeTo(N, Alpha::LDA, MVT::i64,
244 Chain = CurDAG->getCopyFromReg(Chain, dl, Alpha::R27, MVT::i64,
246 return CurDAG->SelectNodeTo(N, Alpha::BISr, MVT::i64, Chain, Chain);
251 return CurDAG->getMachineNode(Alpha::RPCC, dl, MVT::i64, MVT::Other,
260 Alpha::R31, MVT::i64);
277 SDValue CPI = CurDAG->getTargetConstantPool(C, MVT::i64);
278 SDNode *Tmp = CurDAG->getMachineNode(Alpha::LDAHr, dl, MVT::i64, CPI,
280 return CurDAG->SelectNodeTo(N, Alpha::LDQr, MVT::i64, MVT::Other,
[all...] |
| /external/llvm/test/CodeGen/X86/ |
| avx-arith.ll | 141 define <4 x i64> @vpaddq(<4 x i64> %i, <4 x i64> %j) nounwind readnone {
142 %x = add <4 x i64> %i, %j
143 ret <4 x i64> %x
181 define <4 x i64> @vpsubq(<4 x i64> %i, <4 x i64> %j) nounwind readnone {
182 %x = sub <4 x i64> %i, %j
183 ret <4 x i64> %
[all...] |
| cmov.ll | 2 target datalayout = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-s0:64:64-f80:128:128"
40 declare void @bar(i64) nounwind
42 define void @test3(i64 %a, i64 %b, i1 %p) nounwind {
47 %c = trunc i64 %a to i32
48 %d = trunc i64 %b to i32
50 %f = zext i32 %e to i64
51 call void @bar(i64 %f)
111 %7 = tail call i32 (i8*, ...)* @printf(i8* noalias getelementptr ([15 x i8]* @_2E_str, i64 0, i64 0), i32 %6) nounwind ; <i32> [#uses=0
[all...] |
| loop-strength-reduce8.ll | 10 %struct.bitmap_element = type { %struct.bitmap_element*, %struct.bitmap_element*, i32, [2 x i64] }
20 %struct.function = type { %struct.eh_status*, %struct.stmt_status*, %struct.expr_status*, %struct.emit_status*, %struct.varasm_status*, i8*, %struct.tree_node*, %struct.function*, i32, i32, i32, i32, %struct.rtx_def*, %struct.CUMULATIVE_ARGS, %struct.rtx_def*, %struct.rtx_def*, i8*, %struct.initial_value_struct*, i32, %struct.tree_node*, %struct.rtx_def*, %struct.rtx_def*, %struct.rtx_def*, %struct.rtx_def*, %struct.rtx_def*, %struct.rtx_def*, %struct.rtx_def*, %struct.tree_node*, %struct.rtx_def*, %struct.rtx_def*, %struct.rtx_def*, %struct.rtx_def*, i64, %struct.tree_node*, %struct.tree_node*, %struct.rtx_def*, %struct.rtx_def*, i32, %struct.rtx_def**, %struct.temp_slot*, i32, i32, i32, %struct.var_refs_queue*, i32, i32, i8*, %struct.tree_node*, %struct.rtx_def*, i32, i32, %struct.machine_function*, i32, i32, %struct.language_function*, %struct.rtx_def*, i8, i8, i8 }
28 %struct.pool_constant = type { %struct.constant_descriptor*, %struct.pool_constant*, %struct.pool_constant*, %struct.rtx_def*, i32, i32, i32, i64, i32 }
29 %struct.rtunion = type { i64 }
34 %struct.temp_slot = type { %struct.temp_slot*, %struct.rtx_def*, %struct.rtx_def*, i32, i64, %struct.tree_node*, %struct.tree_node*, i8, i8, i32, i32, i64, i64 }
36 %struct.tree_decl = type { %struct.tree_common, i8*, i32, i32, %struct.tree_node*, i8, i8, i8, i8, i8, i8, %struct.rtunion, %struct.tree_node*, %struct.tree_node*, %struct.tree_node*, %struct.tree_node*, %struct.tree_node*, %struct.tree_node*, %struct.tree_node*, %struct.tree_node*, %struct.tree_node*, %struct.tree_node*, %struct.rtx_def*, %struct.rtx_def*, { %struct.function* }, %struct.tree_node*, %struct.tree_node*, %struct.tree_node*, i64, %struct.lang_decl* }
40 %struct.varasm_status = type { %struct.constant_descriptor**, %struct.pool_constant**, %struct.pool_constant*, %struct.pool_constant*, i64, %struct.rtx_def* }
41 %struct.varray_data = type { [1 x i64] }
[all...] |
| 2009-11-17-UpdateTerminator.ll | 5 target datalayout = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-s0:64:64-f80:128:128-n8:16:32:64"
18 define zeroext i8 @_ZN4llvm9InlineAsm14ConstraintInfo5ParseENS_9StringRefERSt6vectorIS1_SaIS1_EE(%"struct.llvm::InlineAsm::ConstraintInfo"* nocapture %this, i64 %Str.0, i64 %Str.1, %"struct.std::vector<llvm::InlineAsm::ConstraintInfo,std::allocator<llvm::InlineAsm::ConstraintInfo> >"* nocapture %ConstraintsSoFar) nounwind ssp align 2 {
46 %I.2.ph109 = getelementptr i8* %I.2.ph, i64 undef ; <i8*> [#uses=1]
47 %scevgep = getelementptr i8* %I.2.ph, i64 undef ; <i8*> [#uses=0]
|
| 2011-06-14-mmx-inlineasm.ll | 3 target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-a0:0:64-f80:128:128-n8:16:32"
10 %conv = zext i32 %xor to i64
11 %shl = shl nuw i64 %conv, 32
12 %or = or i64 %shl, %conv
13 %0 = bitcast i64 %or to x86_mmx
|
| /external/llvm/test/Transforms/InstCombine/ |
| vec_demanded_elts.ll | 39 define i64 @test3(float %f, double %d) {
53 %tmp1 = tail call i64 @llvm.x86.sse.cvtss2si64(<4 x float> %v13)
63 %tmp3 = tail call i64 @llvm.x86.sse.cvttss2si64(<4 x float> %v33)
69 %tmp5 = tail call i64 @llvm.x86.sse2.cvtsd2si64(<2 x double> %v51)
75 %tmp7 = tail call i64 @llvm.x86.sse2.cvttsd2si64(<2 x double> %v71)
79 %tmp11 = sext i32 %tmp10 to i64
80 %tmp12 = add i64 %tmp1, %tmp3
81 %tmp13 = add i64 %tmp5, %tmp7
82 %tmp14 = add i64 %tmp12, %tmp13
83 %tmp15 = add i64 %tmp11, %tmp1
[all...] |
| mul.ll | 43 define i64 @test8(i64 %i) {
45 %j = mul i64 %i, -1 ; <i64> [#uses=1]
46 ret i64 %j
|
| /external/llvm/test/CodeGen/CellSPU/ |
| extract_elt.ll | 32 target datalayout = "E-p:32:32:128-f64:64:128-f32:32:128-i64:32:128-i32:32:128-i16:16:128-i8:8:128-i1:8:128-a0:0:128-v128:128:128-s0:128:128"
255 define i64 @extract_varadic_i64(i32 %i) nounwind readnone {
257 %0 = extractelement <2 x i64> < i64 0, i64 1>, i32 %i
258 ret i64 %0
261 define i64 @extract_varadic_i64_1(<2 x i64> %v, i32 %i) nounwind readnone {
263 %0 = extractelement <2 x i64> %v, i32 %i
264 ret i64 %
[all...] |
| stores.ll | 20 target datalayout = "E-p:32:32:128-f64:64:128-f32:32:128-i64:32:128-i32:32:128-i16:16:128-i8:8:128-i1:8:128-a0:0:128-v128:128:128-s0:128:128"
126 define zeroext i8 @tstore_i64_i8(i64 %val, i8* %dest) nounwind {
128 %conv = trunc i64 %val to i8
133 define signext i16 @tstore_i64_i16(i64 %val, i16* %dest) nounwind {
135 %conv = trunc i64 %val to i16
140 define i32 @tstore_i64_i32(i64 %val, i32* %dest) nounwind {
142 %conv = trunc i64 %val to i32
|
| /external/llvm/docs/ |
| SourceLevelDebugging.html | 510 i64, ;; Size in bits
511 i64, ;; Alignment in bits
512 i64, ;; Offset in bits
561 i64, ;; Size in bits
562 i64, ;; Alignment in bits
563 i64, ;; Offset in bits
633 i64, ;; Size in bits
634 i64, ;; Alignment in bits
635 i64, ;; Offset in bits
716 i64, ;; Low valu
[all...] |
| /external/llvm/test/Transforms/GlobalDCE/ |
| 2009-09-03-MDNode.ll | 6 %struct.pthread_attr_t = type { i64, [48 x i8] }
12 @_ZL22__gthrw_pthread_createPmPK14pthread_attr_tPFPvS3_ES3_ = alias weak i32 (i64*, %struct.pthread_attr_t*, i8* (i8*)*, i8*)* @pthread_create ; <i32 (i64*, %struct.pthread_attr_t*, i8* (i8*)*, i8*)*> [#uses=0]
13 @_ZL22__gthrw_pthread_cancelm = alias weak i32 (i64)* @pthread_cancel ; <i32 (i64)*> [#uses=0]
212 declare extern_weak i32 @pthread_create(i64*, %struct.pthread_attr_t*, i8* (i8*)*, i8*)
214 declare extern_weak i32 @pthread_cancel(i64)
237 !3 = metadata !{i32 458773, metadata !1, metadata !"", metadata !1, i32 0, i64 0, i64 0, i64 0, i32 0, null, metadata !4, i32 0
[all...] |
| /external/clang/test/CodeGenCXX/ |
| constructor-init.cpp | 98 // CHECK-NEXT: store i8** getelementptr inbounds ([3 x i8*]* @_ZTVN10InitVTable1BE, i64 0, i64 2), i8*** [[T0]]
100 // CHECK-NEXT: [[FNP:%.*]] = getelementptr inbounds i32 ([[B]]*)** [[VTBL]], i64 0
105 // CHECK-NEXT: store i8** getelementptr inbounds ([3 x i8*]* @_ZTVN10InitVTable1BE, i64 0, i64 2), i8*** [[T0]]
113 // CHECK-NEXT: store i8** getelementptr inbounds ([3 x i8*]* @_ZTVN10InitVTable1BE, i64 0, i64 2), i8*** [[T0]]
|
| reference-cast.cpp | 113 // CHECK: call i64 @_Z26get_pointer_to_member_datav()
118 // CHECK: call i64 @_Z26get_pointer_to_member_datav()
122 // CHECK: call i64 @_Z26get_pointer_to_member_datav()
192 // CHECK: define i64 @_ZN7PR106504testEPNS_6HelperE
193 // CHECK: store i64
|
| /external/llvm/test/Transforms/LoopRotate/ |
| crash.ll | 3 target datalayout = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-s0:64:64-f80:128:128-n8:16:32:64"
101 %struct.NSRange = type { i64, i64 }
116 %mrv_gr125 = extractvalue %struct.NSRange %tmp123, 1 ; <i64> [#uses=0]
127 %gep.upgrd.1 = zext i32 %offset.1 to i64 ; <i64> [#uses=1]
128 %tmp11 = getelementptr i8* %msg, i64 %gep.upgrd.1 ; <i8*> [#uses=0]
|
| /external/llvm/test/Transforms/SimplifyCFG/ |
| switch_switch_fold_dbginfo.ll | 5 target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-a0:0:64-f80:32:32"
8 %llvm.dbg.basictype.type = type { i32, { }*, i8*, { }*, i32, i64, i64, i64, i32, i32 }
10 %llvm.dbg.composite.type = type { i32, { }*, i8*, { }*, i32, i64, i64, i64, i32, { }*, { }*, i32 }
19 @llvm.dbg.basictype = internal constant %llvm.dbg.basictype.type { i32 458788, { }* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to { }*), i8* getelementptr ([4 x i8]* @.str3, i32 0, i32 0), { }* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to { }*), i32 0, i64 32, i64 32, i64 0, i32 0, i32 5 }, section "llvm.metadata" ; <%llvm.dbg.basictype.type*> [#uses=1
[all...] |
| /external/llvm/test/CodeGen/ARM/ |
| vld4.ll | 7 %struct.__neon_int64x1x4_t = type { <1 x i64>, <1 x i64>, <1 x i64>, <1 x i64> }
74 define <1 x i64> @vld4i64(i64* %A) nounwind {
78 %tmp0 = bitcast i64* %A to i8*
82 %tmp4 = add <1 x i64> %tmp2, %tmp3
83 ret <1 x i64> %tmp4
|
| /external/llvm/include/llvm/CodeGen/ |
| ValueTypes.td | 27 def i64 : ValueType<64 , 5>; // 64-bit integer value
47 def v1i64 : ValueType<64 , 24>; // 1 x i64 vector value
48 def v2i64 : ValueType<128, 25>; // 2 x i64 vector value
49 def v4i64 : ValueType<256, 26>; // 4 x i64 vector value
50 def v8i64 : ValueType<512, 27>; // 8 x i64 vector value
|
| /external/llvm/lib/Target/CellSPU/ |
| SPU64InstrInfo.td | 18 // 3. i64 setcc results are i32, which are subsequently converted to a FSM
30 // selb instruction definition for i64. Note that the selection mask is
36 // The generic i64 select pattern, which assumes that the comparison result
54 // The i64 seteq fragment that does the scalar->vector conversion and
60 // The i64 seteq fragment that does the vector comparison
64 // i64 seteq (equality): the setcc result is i32, which is converted to a
85 // i64 setne:
90 // i64 setugt/setule:
135 // i64 setult:
140 // i64 setuge/setult
[all...] |
| /external/llvm/test/Analysis/BasicAA/ |
| modref.ll | 2 target datalayout = "E-p:64:64:64-a0:0:8-f32:32:32-f64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-v64:64:64-v128:128:128"
4 declare void @llvm.lifetime.end(i64, i8* nocapture)
70 call void @llvm.lifetime.end(i64 1, i8* %P)
84 call void @llvm.lifetime.end(i64 10, i8* %P)
138 %add.ptr = getelementptr inbounds i32* %x, i64 1
|
| /external/llvm/test/Transforms/GlobalOpt/ |
| ctor-list-opt.ll | 90 @GV2 = constant [3 x i8*] [i8* inttoptr (i64 16 to i8*), i8* null, i8* bitcast ({ i8*, i8*, i32, i32, i8*, i64 }* null to i8*)]
95 %1 = getelementptr inbounds i8* %0, i64 16
98 store i8** getelementptr inbounds ([3 x i8*]* @GV2, i64 1, i64 0), i8*** %3
|
| /external/qemu/ |
| def-helper.h | 7 (i32, i64 and ptr). Additional aliases are provided for convenience and
31 #define dh_alias_i64 i64
32 #define dh_alias_s64 i64
34 #define dh_alias_f64 i64
38 #define dh_alias_tl i64
|
| /external/qemu/target-i386/ |
| helper.h | 97 DEF_HELPER_2(svm_check_intercept_param, void, i32, i64)
98 DEF_HELPER_2(vmexit, void, i32, i64)
112 DEF_HELPER_1(fldl_FT0, void, i64)
115 DEF_HELPER_1(fldl_ST0, void, i64)
119 DEF_HELPER_0(fstl_ST0, i64)
|
| /external/llvm/lib/Target/SystemZ/ |
| SystemZISelLowering.cpp | 50 addRegisterClass(MVT::i64, SystemZ::GR64RegisterClass);
89 setOperationAction(ISD::BR_CC, MVT::i64, Custom);
93 setOperationAction(ISD::ConstantPool, MVT::i64, Custom);
94 setOperationAction(ISD::GlobalAddress, MVT::i64, Custom);
95 setOperationAction(ISD::JumpTable, MVT::i64, Custom);
96 setOperationAction(ISD::DYNAMIC_STACKALLOC, MVT::i64, Expand);
100 setOperationAction(ISD::SDIV, MVT::i64, Expand);
101 setOperationAction(ISD::UDIV, MVT::i64, Expand);
104 setOperationAction(ISD::SREM, MVT::i64, Expand);
105 setOperationAction(ISD::UREM, MVT::i64, Expand)
[all...] |
