| /external/llvm/test/Transforms/InstCombine/ |
| 2006-10-20-mask.ll | 4 define i64 @foo(i64 %tmp, i64 %tmp2) {
5 %tmp.upgrd.1 = trunc i64 %tmp to i32 ; <i32> [#uses=1]
6 %tmp2.upgrd.2 = trunc i64 %tmp2 to i32 ; <i32> [#uses=1]
8 %tmp4 = zext i32 %tmp3 to i64 ; <i64> [#uses=1]
9 ret i64 %tmp4
|
| 2006-12-08-Select-ICmp.ll | 8 define i32 @visible(i32 %direction, i64 %p1.0, i64 %p2.0, i64 %p3.0) {
13 %tmp = bitcast %struct.point* %p1_addr to { i64 }* ; <{ i64 }*> [#uses=1]
14 %tmp.upgrd.1 = getelementptr { i64 }* %tmp, i32 0, i32 0 ; <i64*> [#uses=1]
15 store i64 %p1.0, i64* %tmp.upgrd.1
16 %tmp1 = bitcast %struct.point* %p2_addr to { i64 }* ; <{ i64 }*> [#uses=1
[all...] |
| loadstore-alignment.ll | 2 target datalayout = "E-p:64:64:64-a0:0:8-f32:32:32-f64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-v64:64:64-v128:128:128"
4 @x = external global <2 x i64>, align 16
5 @xx = external global [13 x <2 x i64>], align 16
7 define <2 x i64> @static_hem() {
8 %t = getelementptr <2 x i64>* @x, i32 7
9 %tmp1 = load <2 x i64>* %t, align 1
10 ret <2 x i64> %tmp1
13 define <2 x i64> @hem(i32 %i) {
14 %t = getelementptr <2 x i64>* @x, i32 %i
15 %tmp1 = load <2 x i64>* %t, align
[all...] |
| /external/llvm/test/Transforms/LICM/ |
| 2003-02-26-LoopExitNotDominated.ll | 7 %X = alloca [2 x i64] ; <[2 x i64]*> [#uses=1]
10 %reg3011 = getelementptr [2 x i64]* %X, i64 0, i64 0 ; <i64*> [#uses=1]
13 store i64 0, i64* %reg3011
|
| /external/llvm/test/Transforms/Reassociate/ |
| optional-flags.ll | 7 ; CHECK: %y = add i64 %b, %a
8 ; CHECK: %z = add i64 %y, %c
9 define i64 @test0(i64 %a, i64 %b, i64 %c) {
10 %y = add nsw i64 %c, %b
11 %z = add i64 %y, %a
12 ret i64 %z
16 ; CHECK: %y = add i64 %b, %
[all...] |
| /external/llvm/test/CodeGen/X86/ |
| palignr-2.ll | 8 define void @t1(<2 x i64> %a, <2 x i64> %b) nounwind ssp {
12 %0 = tail call <2 x i64> @llvm.x86.ssse3.palign.r.128(<2 x i64> %a, <2 x i64> %b, i8 24) nounwind readnone
13 store <2 x i64> %0, <2 x i64>* bitcast ([4 x i32]* @c to <2 x i64>*), align 16
17 declare <2 x i64> @llvm.x86.ssse3.palign.r.128(<2 x i64>, <2 x i64>, i8) nounwind readnon
[all...] |
| 2007-05-14-LiveIntervalAssert.ll | 8 declare void @r_raise(i64, i8*, ...)
10 define i64 @app_send_event(i64 %self, i64 %event_class, i64 %event_id, i64 %params, i64 %need_retval) {
15 ret i64 0
22 call void (i64, i8*, ...)* @r_raise( i64 0, i8* null
[all...] |
| avx-vmovddup.ll | 4 define <4 x i64> @A(<4 x i64> %a) {
5 %c = shufflevector <4 x i64> %a, <4 x i64> undef, <4 x i32> <i32 0, i32 0, i32 2, i32 2>
6 ret <4 x i64> %c
10 define <4 x i64> @B(<4 x i64>* %ptr) {
11 %a = load <4 x i64>* %ptr
12 %c = shufflevector <4 x i64> %a, <4 x i64> undef, <4 x i32> <i32 0, i32 0, i32 2, i32 2
[all...] |
| sext-subreg.ll | 4 define i64 @t(i64 %A, i64 %B, i32* %P, i64 *%P2) nounwind {
9 %C = add i64 %A, %B
10 %D = trunc i64 %C to i32
12 %E = shl i64 %C, 32
13 %F = ashr i64 %E, 32
14 volatile store i64 %F, i64 *%P
[all...] |
| shift-coalesce.ll | 8 define i64 @foo(i64 %x, i64* %X) {
9 %tmp.1 = load i64* %X ; <i64> [#uses=1]
10 %tmp.3 = trunc i64 %tmp.1 to i8 ; <i8> [#uses=1]
11 %shift.upgrd.1 = zext i8 %tmp.3 to i64 ; <i64> [#uses=1]
12 %tmp.4 = shl i64 %x, %shift.upgrd.1 ; <i64> [#uses=1
[all...] |
| subreg-to-reg-6.ll | 3 define i64 @foo() nounwind {
18 %a = phi i64 [ 0, %bb ], [ 0, %entry ]
19 tail call void asm "", "{cx}"(i64 %a) nounwind
20 %t15 = and i64 %a, 4294967295
21 ret i64 %t15
24 define i64 @bar(i64 %t0) nounwind {
25 call void asm "", "{cx}"(i64 0) nounwind
26 %t1 = sub i64 0, %t0
27 %t2 = and i64 %t1, 429496729
[all...] |
| vec_shuffle-11.ll | 5 %tmp131 = call <2 x i64> @llvm.x86.sse2.psrl.dq( <2 x i64> < i64 -1, i64 -1 >, i32 96 ) ; <<2 x i64>> [#uses=1]
6 %tmp137 = bitcast <2 x i64> %tmp131 to <4 x i32> ; <<4 x i32>> [#uses=1]
7 %tmp138 = and <4 x i32> %tmp137, bitcast (<2 x i64> < i64 -1, i64 -1 > to <4 x i32>) ; <<4 x i32>> [#uses=1]
11 declare <2 x i64> @llvm.x86.sse2.psrl.dq(<2 x i64>, i32
[all...] |
| movbe.ll | 4 declare i64 @llvm.bswap.i64(i64) nounwind readnone
22 define void @test3(i64* %x, i64 %y) nounwind {
23 %bswap = call i64 @llvm.bswap.i64(i64 %y)
24 store i64 %bswap, i64* %x, align
[all...] |
| 2008-04-28-CoalescerBug.ll | 36 %tmp13111 = load i64* null, align 8 ; <i64> [#uses=3]
37 %tmp13116 = lshr i64 %tmp13111, 16 ; <i64> [#uses=1]
38 %tmp1311613117 = trunc i64 %tmp13116 to i32 ; <i32> [#uses=1]
40 %tmp13120 = lshr i64 %tmp13111, 32 ; <i64> [#uses=1]
41 %tmp1312013121 = trunc i64 %tmp13120 to i32 ; <i32> [#uses=1]
43 %tmp13124 = lshr i64 %tmp13111, 48 ; <i64> [#uses=1
[all...] |
| /external/clang/test/CodeGenCXX/ |
| vtt-layout.cpp | 61 // CHECK: @_ZTTN5Test11BE = unnamed_addr constant [1 x i8*] [i8* bitcast (i8** getelementptr inbounds ([4 x i8*]* @_ZTVN5Test11BE, i64 0, i64 3) to i8*)]
62 // CHECK: @_ZTTN5Test41DE = linkonce_odr unnamed_addr constant [19 x i8*] [i8* bitcast (i8** getelementptr inbounds ([25 x i8*]* @_ZTVN5Test41DE, i64 0, i64 6) to i8*), i8* bitcast (i8** getelementptr inbounds ([11 x i8*]* @_ZTCN5Test41DE0_NS_2C1E, i64 0, i64 4) to i8*), i8* bitcast (i8** getelementptr inbounds ([11 x i8*]* @_ZTCN5Test41DE0_NS_2C1E, i64 0, i64 7) to i8*), i8* bitcast (i8** getelementptr inbounds ([11 x i8*]* @_ZTCN5Test41DE0_NS_2C1E, i64 0, i64 10) to i8*), i8* bitcast (i8** getelementptr inbounds ([19 x i8*]* @_ZTCN5Test41DE16_NS_2C2E, i64 (…)
[all...] |
| /external/llvm/test/CodeGen/Blackfin/ |
| 2009-08-11-RegScavenger-CSR.ll | 3 declare i64 @llvm.cttz.i64(i64) nounwind readnone
9 define void @cttztest(i8 %A, i16 %B, i32 %C, i64 %D, i8* %AP, i16* %BP, i32* %CP, i64* %DP) {
12 %d = call i64 @llvm.cttz.i64(i64 %D) ; <i64> [#uses=1]
15 store i64 %d, i64* %D
[all...] |
| /external/llvm/test/CodeGen/Mips/ |
| 2008-06-05-Carry.ll | 6 "e-p:32:32:32-i1:8:8-i8:8:32-i16:16:32-i32:32:32-i64:32:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64"
9 define i64 @add64(i64 %u, i64 %v) nounwind {
11 %tmp2 = add i64 %u, %v
12 ret i64 %tmp2
15 define i64 @sub64(i64 %u, i64 %v) nounwind {
17 %tmp2 = sub i64 %u, %
[all...] |
| /external/llvm/test/CodeGen/Thumb2/ |
| carry.ll | 3 define i64 @f1(i64 %a, i64 %b) {
8 %tmp = sub i64 %a, %b
9 ret i64 %tmp
12 define i64 @f2(i64 %a, i64 %b) {
19 %tmp1 = shl i64 %a, 1
20 %tmp2 = sub i64 %tmp1, %
[all...] |
| /external/llvm/test/CodeGen/ARM/ |
| fixunsdfdi.ll | 4 define hidden i64 @__fixunsdfdi(double %x) nounwind readnone {
6 %x14 = bitcast double %x to i64 ; <i64> [#uses=1]
13 %u.in.mask = and i64 %x14, -4294967296 ; <i64> [#uses=1]
14 %.ins = or i64 0, %u.in.mask ; <i64> [#uses=1]
15 %0 = bitcast i64 %.ins to double ; <double> [#uses=1]
19 %4 = zext i32 %3 to i64 ; <i64> [#uses=1
[all...] |
| arguments-nosplit-i64.ll | 4 define i32 @f(i64 %z, i32 %a, i64 %b) {
5 %tmp = call i32 @g(i64 %b)
9 declare i32 @g(i64)
|
| /external/llvm/test/CodeGen/PowerPC/ |
| 2008-03-24-AddressRegImm.ll | 5 %tmp2627 = ptrtoint i8* %rec to i64 ; <i64> [#uses=2]
6 %tmp28 = and i64 %tmp2627, -16384 ; <i64> [#uses=2]
7 %tmp2829 = inttoptr i64 %tmp28 to i8* ; <i8*> [#uses=1]
8 %tmp37 = getelementptr i8* %tmp2829, i64 42 ; <i8*> [#uses=1]
10 %tmp4041 = zext i8 %tmp40 to i64 ; <i64> [#uses=1]
11 %tmp42 = shl i64 %tmp4041, 8 ; <i64> [#uses=1
[all...] |
| /external/llvm/test/CodeGen/SystemZ/ |
| 09-Globals.ll | 3 target datalayout = "E-p:64:64:64-i1:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-f128:128:128"
5 @bar = common global i64 0, align 8 ; <i64*> [#uses=3]
7 define i64 @foo() nounwind readonly {
9 %tmp = load i64* @bar ; <i64> [#uses=1]
10 ret i64 %tmp
13 define i64* @foo2() nounwind readnone {
15 ret i64* @bar
18 define i64* @foo3(i64 %idx) nounwind readnone
[all...] |
| /external/llvm/test/Transforms/ScalarRepl/ |
| 2009-02-05-LoadFCA.ll | 3 target datalayout = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-f80:128:128"
7 define i32 @f({ i64, i64 }) nounwind {
9 %tmp = alloca { i64, i64 }, align 8 ; <{ i64, i64 }*> [#uses=2]
10 store { i64, i64 } %0, { i64, i64 }* %tm
[all...] |
| /external/llvm/test/CodeGen/CellSPU/ |
| i64ops.ll | 16 target datalayout = "E-p:32:32:128-f64:64:128-f32:32:128-i64:32:128-i32:32:128-i16:16:128-i8:8:128-i1:8:128-a0:0:128-v128:128:128-s0:128:128"
19 define i64 @sext_i64_i8(i8 %a) nounwind {
20 %1 = sext i8 %a to i64
21 ret i64 %1
24 define i64 @sext_i64_i16(i16 %a) nounwind {
25 %1 = sext i16 %a to i64
26 ret i64 %1
29 define i64 @sext_i64_i32(i32 %a) nounwind {
30 %1 = sext i32 %a to i64
31 ret i64 %
[all...] |
| /external/llvm/test/Assembler/ |
| 2004-01-20-MaxLongLong.ll | 3 global i64 -9223372036854775808
|
