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  /external/tcpdump/
print-tcp.c 130 /* pseudo-header.. */
163 /* pseudo-header */
756 * Step 1: Update MD5 hash with IP pseudo-header.
  /external/valgrind/main/VEX/priv/
host_arm_defs.h 650 /* Pseudo-insn; make a 32-bit immediate */
679 /* Pseudo-insn. Go to guest address gnext, on given
693 /* Pseudo-insn. Call target (an absolute address), on given
  /frameworks/base/media/libstagefright/codecs/amrnb/common/src/
shr.cpp 44 2. Removed pseudo-code.
55 Filled in the PSEUDO CODE section
140 PSEUDO-CODE
vad1.cpp 140 PSEUDO-CODE
271 PSEUDO-CODE
375 PSEUDO-CODE
479 PSEUDO-CODE
587 PSEUDO-CODE
724 PSEUDO-CODE
918 PSEUDO-CODE
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  /frameworks/base/media/libstagefright/codecs/amrnb/dec/src/
amrdecode.cpp 62 Description: Modified pseudo-code to include IF2 and ETS input formats.
67 pseudo-code to use correct table names. Renamed input_type to
223 PSEUDO-CODE
int_lsf.cpp 47 Deleted pseudo-code.
54 2. Made some cosmetic changes in the Pseudo-code section.
149 PSEUDO-CODE
agc.cpp 123 PSEUDO-CODE
227 PSEUDO-CODE
314 PSEUDO-CODE
445 PSEUDO-CODE
539 PSEUDO-CODE
643 PSEUDO-CODE
884 PSEUDO-CODE
  /frameworks/base/opengl/tests/hwc/
hwcStress.cpp 21 * Performs a pseudo-random (prandom) sequence of operations to the
529 srand48(0); // Defensively set pseudo random number generator.
532 // so that future code that uses pseudo random numbers
  /prebuilt/linux-x86/toolchain/arm-eabi-4.4.0/lib/gcc/arm-eabi/4.4.0/plugin/include/config/
elfos.h 103 pseudo-op is used for this on most svr4 assemblers. */
196 /* This is the pseudo-op used to generate a contiguous sequence of byte
237 different pseudo-op names for these, they may be overridden in the
  /prebuilt/linux-x86/toolchain/arm-eabi-4.4.0/lib/gcc/arm-eabi/4.4.0/plugin/include/
output.h 59 assembler pseudo-ops have already been output in
213 /* Assemble an alignment pseudo op for an ALIGN-bit boundary. */
303 This includes the pseudo-op such as ".int" or ".byte", and a newline.
  /prebuilt/linux-x86/toolchain/arm-eabi-4.4.3/lib/gcc/arm-eabi/4.4.3/plugin/include/config/
elfos.h 103 pseudo-op is used for this on most svr4 assemblers. */
196 /* This is the pseudo-op used to generate a contiguous sequence of byte
237 different pseudo-op names for these, they may be overridden in the
  /prebuilt/linux-x86/toolchain/arm-eabi-4.4.3/lib/gcc/arm-eabi/4.4.3/plugin/include/
output.h 59 assembler pseudo-ops have already been output in
213 /* Assemble an alignment pseudo op for an ALIGN-bit boundary. */
303 This includes the pseudo-op such as ".int" or ".byte", and a newline.
  /prebuilt/linux-x86/toolchain/arm-linux-androideabi-4.4.x/lib/gcc/arm-linux-androideabi/4.4.3/plugin/include/config/
elfos.h 103 pseudo-op is used for this on most svr4 assemblers. */
196 /* This is the pseudo-op used to generate a contiguous sequence of byte
237 different pseudo-op names for these, they may be overridden in the
  /prebuilt/linux-x86/toolchain/arm-linux-androideabi-4.4.x/lib/gcc/arm-linux-androideabi/4.4.3/plugin/include/
output.h 59 assembler pseudo-ops have already been output in
213 /* Assemble an alignment pseudo op for an ALIGN-bit boundary. */
303 This includes the pseudo-op such as ".int" or ".byte", and a newline.
  /external/llvm/lib/Target/X86/
X86InstrFPStack.td 102 // pseudo instructions and use the "_Fp" suffix.
115 // Pseudo Instruction for FP stack return values.
118 // FpIf32, FpIf64 - Floating Point Pseudo Instruction template.
631 // FP extensions map onto simple pseudo-value conversions if they are to/from
    [all...]
  /frameworks/base/media/libstagefright/codecs/amrnb/enc/src/
sid_sync.cpp 141 PSEUDO-CODE
234 PSEUDO-CODE
311 PSEUDO-CODE
395 PSEUDO-CODE
471 PSEUDO-CODE
sp_enc.cpp 150 PSEUDO-CODE
294 PSEUDO-CODE
399 PSEUDO-CODE
513 PSEUDO-CODE
640 PSEUDO-CODE
dtx_enc.cpp 66 3. Fixed comment in dtx_enc pseudo-code.
191 PSEUDO-CODE
304 PSEUDO-CODE
430 PSEUDO-CODE
530 PSEUDO-CODE
871 PSEUDO-CODE
1049 PSEUDO-CODE
    [all...]
  /docs/source.android.com/src/tech/dalvik/
dalvik-bytecode.html 61 <li>There are several "pseudo-instructions" that are used to hold
471 <code>B:</code> signed "branch" offset to table data pseudo-instruction
520 <code>B:</code> signed "branch" offset to table data pseudo-instruction
534 <code>B:</code> signed "branch" offset to table data pseudo-instruction
    [all...]
  /external/icu4c/tools/genpname/
preparse.pl 29 # pseudo-property gcm/General_Category_Mask, which corresponds to the
185 # 'qc' is a pseudo-property matching any quick-check property
546 # pseudo-name, e.g. "Basic Latin".
561 # Convert code point to pseudo-name:
689 # For blocks, do a loose match from Blocks.txt pseudo-name
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  /external/llvm/lib/Target/ARM/
ARMInstrThumb.td 497 // Just a pseudo for a tBL instruction. Needed to let regalloc know about
726 // Writeback version is just a pseudo, as there's no encoding difference.
730 InstTemplate<AddrModeNone, 0, IndexModeNone, Pseudo, GenericDomain,
    [all...]
  /libcore/luni/src/main/java/java/sql/
DatabaseMetaData.java 54 * States the best row identifier is <em>NOT</em> a pseudo column.
59 * States that the best row identifier is a pseudo column.
82 * States that the best row identifier may or may not be a pseudo column.
284 * States that the version column is known to be not a pseudo column.
289 * States that this version column is known to be a pseudo column.
294 * States that the version column may be a pseudo column or not.
550 * <li>{@code PSEUDO_COLUMN} - short - whether this is a pseudo column (e.g.
554 * a pseudo column</li>
555 * <li>{@code DatabaseMetaData.bestRowNotPseudo} - the column is not pseudo</li>
556 * <li>{@code DatabaseMetaData.bestRowPseudo} - the column is a pseudo column</li
    [all...]
  /external/webkit/Source/WebCore/css/
CSSStyleSelector.cpp 770 // If we're matching normal rules, set a pseudo bit if
771 // we really just matched a pseudo-element.
    [all...]
  /external/webkit/Source/WebCore/rendering/
RenderObject.cpp     [all...]
  /external/llvm/lib/Target/MBlaze/
MBlazeInstrInfo.td 142 // Pseudo instructions
603 "; SELECT_CC PSEUDO!",
608 "; ShiftL PSEUDO!",
613 "; ShiftRA PSEUDO!",
618 "; ShiftRL PSEUDO!",
682 // Pseudo instructions for atomic operations
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