| /external/llvm/include/llvm/CodeGen/ |
| RegisterScavenging.h | 34 MachineBasicBlock *MBB;
73 : MBB(NULL), NumPhysRegs(0), Tracking(false),
78 void enterBasicBlock(MachineBasicBlock *mbb);
84 /// forward - Move the internal MBB iterator and update register states.
87 /// forward - Move the internal MBB iterator and update register states until
90 if (!Tracking && MBB->begin() != I) forward();
94 /// skipTo - Move the internal MBB iterator but do not update register states.
|
| ObjectCodeEmitter.h | 35 /// MBBLocations - This vector is a mapping from MBB ID's to their address.
133 virtual void StartMachineBasicBlock(MachineBasicBlock *MBB);
136 /// MachineBasicBlock, only usable after the label for the MBB has been
138 virtual uintptr_t getMachineBasicBlockAddress(MachineBasicBlock *MBB) const;
|
| /external/llvm/lib/CodeGen/ |
| LiveRangeCalc.h | 53 /// For every basic block, MBB, one of these conditions shall be true:
55 /// 1. !Seen.count(MBB->getNumber())
57 /// 2. LiveOut[MBB].second.getNode() == MBB
58 /// The live-out value is defined in MBB.
59 /// 3. forall P in preds(MBB): LiveOut[P] == LiveOut[MBB]
60 /// The live-out value passses through MBB. All predecessors must carry
186 /// setLiveOutValue - Indicate that VNI is live out from MBB. The
187 /// calculateValues() function will not add liveness for MBB, the calle
[all...] |
| LiveDebugVariables.cpp | 87 bool dominates(MachineBasicBlock *MBB) {
90 if (LBlocks.count(MBB) != 0 || LS.dominates(DL, MBB))
127 /// insertDebugValue - Insert a DBG_VALUE into MBB at Idx for LocNo.
128 void insertDebugValue(MachineBasicBlock *MBB, SlotIndex Idx, unsigned LocNo,
461 MachineBasicBlock *MBB = MFI;
462 for (MachineBasicBlock::iterator MBBI = MBB->begin(), MBBE = MBB->end();
469 SlotIndex Idx = MBBI == MBB->begin() ?
470 LIS->getMBBStartIdx(MBB)
[all...] |
| PeepholeOptimizer.cpp | 98 bool OptimizeBitcastInstr(MachineInstr *MI, MachineBasicBlock *MBB);
99 bool OptimizeCmpInstr(MachineInstr *MI, MachineBasicBlock *MBB);
100 bool OptimizeExtInstr(MachineInstr *MI, MachineBasicBlock *MBB,
105 bool FoldImmediate(MachineInstr *MI, MachineBasicBlock *MBB,
132 OptimizeExtInstr(MachineInstr *MI, MachineBasicBlock *MBB,
196 if (UseMBB == MBB) {
204 } else if (Aggressive && DT->dominates(MBB, UseMBB)) {
209 // Both will be live out of the def MBB anyway. Don't extend live range of
268 MachineBasicBlock *MBB) {
334 MachineBasicBlock *MBB) {
[all...] |
| PostRASchedulerList.cpp | 68 // If DebugDiv > 0 then only schedule MBB with (ID % DebugDiv) == DebugMod
167 void FixupKills(MachineBasicBlock *MBB);
243 for (MachineFunction::iterator MBB = Fn.begin(), MBBe = Fn.end();
244 MBB != MBBe; ++MBB) {
246 // If DebugDiv > 0 then only schedule MBB with (ID % DebugDiv) == DebugMod
252 ":BB#" << MBB->getNumber() << " ***\n";
257 Scheduler.StartBlock(MBB);
261 MachineBasicBlock::iterator Current = MBB->end();
262 unsigned Count = MBB->size(), CurrentCount = Count
[all...] |
| MachineSink.cpp | 81 bool ProcessBlock(MachineBasicBlock &MBB);
90 bool AllUsesDominatedByBlock(unsigned Reg, MachineBasicBlock *MBB,
94 MachineBasicBlock *MBB);
110 MachineBasicBlock *MBB) {
143 MachineBasicBlock *MBB,
158 // BreakPHIEdge is true if all the uses are in the successor MBB being sunken
179 if (!(UseBlock == MBB && UseInst->isPHI() &&
204 if (!DT->dominates(MBB, UseBlock))
241 bool MachineSinking::ProcessBlock(MachineBasicBlock &MBB) {
243 if (MBB.succ_size() <= 1 || MBB.empty()) return false
[all...] |
| TailDuplication.cpp | 111 bool TailDuplicateAndUpdate(MachineBasicBlock *MBB,
115 void RemoveDeadBlock(MachineBasicBlock *MBB);
139 MachineBasicBlock *MBB = I;
140 SmallSetVector<MachineBasicBlock*, 8> Preds(MBB->pred_begin(),
141 MBB->pred_end());
142 MachineBasicBlock::iterator MI = MBB->begin();
143 while (MI != MBB->end()) {
158 dbgs() << "Malformed PHI in BB#" << MBB->getNumber() << ": " << *MI;
168 dbgs() << "Warning: malformed PHI in BB#" << MBB->getNumber()
175 dbgs() << "Malformed PHI in BB#" << MBB->getNumber() << ": " << *MI
[all...] |
| /external/llvm/lib/Target/ARM/ |
| Thumb2ITBlockPass.cpp | 47 bool InsertITInstructions(MachineBasicBlock &MBB);
163 bool Thumb2ITBlockPass::InsertITInstructions(MachineBasicBlock &MBB) {
168 MachineBasicBlock::iterator MBBI = MBB.begin(), E = MBB.end();
184 MachineInstrBuilder MIB = BuildMI(MBB, MBBI, dl, TII->get(ARM::t2IT))
220 MBB.remove(NMI);
221 MBB.insert(InsertPos, NMI);
258 MachineBasicBlock &MBB = *MFI;
260 Modified |= InsertITInstructions(MBB);
|
| Thumb2SizeReduction.cpp | 155 bool ReduceLoadStore(MachineBasicBlock &MBB, MachineInstr *MI,
158 bool ReduceSpecial(MachineBasicBlock &MBB, MachineInstr *MI,
164 bool ReduceTo2Addr(MachineBasicBlock &MBB, MachineInstr *MI,
170 bool ReduceToNarrow(MachineBasicBlock &MBB, MachineInstr *MI,
175 bool ReduceMBB(MachineBasicBlock &MBB);
316 Thumb2SizeReduce::ReduceLoadStore(MachineBasicBlock &MBB, MachineInstr *MI,
445 MachineInstrBuilder MIB = BuildMI(MBB, *MI, dl, TII->get(Opc));
471 MBB.erase(MI);
477 Thumb2SizeReduce::ReduceSpecial(MachineBasicBlock &MBB, MachineInstr *MI,
485 if (ReduceTo2Addr(MBB, MI, Entry, LiveCPSR, CPSRDef)
[all...] |
| ARMLoadStoreOptimizer.cpp | 90 bool MergeOps(MachineBasicBlock &MBB, MachineBasicBlock::iterator MBBI,
94 void MergeOpsUpdate(MachineBasicBlock &MBB,
108 void MergeLDR_STR(MachineBasicBlock &MBB, unsigned SIndex, unsigned Base,
114 void AdvanceRS(MachineBasicBlock &MBB, MemOpQueue &MemOps);
115 bool FixInvalidRegPairOp(MachineBasicBlock &MBB,
117 bool MergeBaseUpdateLoadStore(MachineBasicBlock &MBB,
122 bool MergeBaseUpdateLSMultiple(MachineBasicBlock &MBB,
126 bool LoadStoreMultipleOpti(MachineBasicBlock &MBB);
127 bool MergeReturnIntoLDM(MachineBasicBlock &MBB);
289 ARMLoadStoreOpt::MergeOps(MachineBasicBlock &MBB,
[all...] |
| ARMFastISel.cpp | 283 AddOptionalDefs(BuildMI(*FuncInfo.MBB, FuncInfo.InsertPt, DL, II, ResultReg));
294 AddOptionalDefs(BuildMI(*FuncInfo.MBB, FuncInfo.InsertPt, DL, II, ResultReg)
297 AddOptionalDefs(BuildMI(*FuncInfo.MBB, FuncInfo.InsertPt, DL, II)
299 AddOptionalDefs(BuildMI(*FuncInfo.MBB, FuncInfo.InsertPt, DL,
314 AddOptionalDefs(BuildMI(*FuncInfo.MBB, FuncInfo.InsertPt, DL, II, ResultReg)
318 AddOptionalDefs(BuildMI(*FuncInfo.MBB, FuncInfo.InsertPt, DL, II)
321 AddOptionalDefs(BuildMI(*FuncInfo.MBB, FuncInfo.InsertPt, DL,
337 AddOptionalDefs(BuildMI(*FuncInfo.MBB, FuncInfo.InsertPt, DL, II, ResultReg)
342 AddOptionalDefs(BuildMI(*FuncInfo.MBB, FuncInfo.InsertPt, DL, II)
346 AddOptionalDefs(BuildMI(*FuncInfo.MBB, FuncInfo.InsertPt, DL
[all...] |
| /external/llvm/lib/Target/Alpha/ |
| AlphaRegisterInfo.h | 38 MachineBasicBlock &MBB,
|
| /external/llvm/lib/Target/CellSPU/ |
| SPUFrameLowering.h | 38 void emitEpilogue(MachineFunction &MF, MachineBasicBlock &MBB) const;
|
| /external/llvm/lib/Target/MBlaze/ |
| MBlazeRegisterInfo.h | 54 MachineBasicBlock &MBB,
|
| MBlazeFrameLowering.cpp | 57 MachineBasicBlock::iterator MBB = MB->begin();
60 for (; MBB != MBE; ++MBB) {
61 MachineInstr::mop_iterator MIB = MBB->operands_begin();
62 const MachineInstr::mop_iterator MIE = MBB->operands_end();
100 MachineBasicBlock *MBB = MF.getBlockNumbered(0);
101 MachineBasicBlock::iterator MIB = MBB->begin();
102 MachineBasicBlock::iterator MIE = MBB->end();
207 MBB->erase(EraseInstr[i]);
343 MachineBasicBlock &MBB = MF.front()
[all...] |
| MBlazeISelLowering.cpp | 214 MachineBasicBlock *MBB)
222 return EmitCustomShift(MI, MBB);
226 return EmitCustomSelect(MI, MBB);
236 return EmitCustomAtomic(MI, MBB);
242 return MBB;
248 MachineBasicBlock *MBB) const {
255 const BasicBlock *LLVM_BB = MBB->getBasicBlock();
256 MachineFunction::iterator It = MBB;
269 MachineFunction *F = MBB->getParent();
279 finish->splice(finish->begin(), MBB,
[all...] |
| /external/llvm/lib/Target/Mips/ |
| MipsRegisterInfo.h | 50 MachineBasicBlock &MBB,
|
| /external/llvm/lib/Target/Sparc/ |
| SparcRegisterInfo.h | 40 MachineBasicBlock &MBB,
|
| /external/llvm/lib/Target/SystemZ/ |
| SystemZRegisterInfo.h | 44 MachineBasicBlock &MBB,
|
| SystemZInstrInfo.cpp | 43 void SystemZInstrInfo::storeRegToStackSlot(MachineBasicBlock &MBB,
49 if (MI != MBB.end()) DL = MI->getDebugLoc();
69 addFrameReference(BuildMI(MBB, MI, DL, get(Opc)), FrameIdx)
73 void SystemZInstrInfo::loadRegFromStackSlot(MachineBasicBlock &MBB,
79 if (MI != MBB.end()) DL = MI->getDebugLoc();
99 addFrameReference(BuildMI(MBB, MI, DL, get(Opc), DestReg), FrameIdx);
102 void SystemZInstrInfo::copyPhysReg(MachineBasicBlock &MBB,
122 BuildMI(MBB, I, DL, get(Opc), DestReg)
217 bool SystemZInstrInfo::AnalyzeBranch(MachineBasicBlock &MBB,
224 MachineBasicBlock::iterator I = MBB.end()
[all...] |
| /external/llvm/lib/Target/MSP430/ |
| MSP430RegisterInfo.cpp | 104 eliminateCallFramePseudoInstr(MachineFunction &MF, MachineBasicBlock &MBB,
142 MBB.insert(I, New);
156 MBB.insert(I, New);
160 MBB.erase(I);
170 MachineBasicBlock &MBB = *MI.getParent();
171 MachineFunction &MF = *MBB.getParent();
209 BuildMI(MBB, llvm::next(II), dl, TII.get(MSP430::SUB16ri), DstReg)
212 BuildMI(MBB, llvm::next(II), dl, TII.get(MSP430::ADD16ri), DstReg)
|
| /external/llvm/lib/CodeGen/SelectionDAG/ |
| FastISel.cpp | 73 I = FuncInfo.MBB->begin(), E = FuncInfo.MBB->end();
208 BuildMI(*FuncInfo.MBB, FuncInfo.InsertPt, DL,
289 FuncInfo.MBB = FuncInfo.InsertPt->getParent();
292 FuncInfo.InsertPt = FuncInfo.MBB->getFirstNonPHI();
295 while (FuncInfo.InsertPt != FuncInfo.MBB->end() &&
310 if (FuncInfo.InsertPt != FuncInfo.MBB->begin())
508 BuildMI(*FuncInfo.MBB, FuncInfo.InsertPt, DL,
543 BuildMI(*FuncInfo.MBB, FuncInfo.InsertPt, DL,
557 BuildMI(*FuncInfo.MBB, FuncInfo.InsertPt, DL, II
[all...] |
| /external/llvm/lib/Target/PowerPC/ |
| PPCInstrInfo.cpp | 170 void PPCInstrInfo::insertNoop(MachineBasicBlock &MBB,
173 BuildMI(MBB, MI, DL, get(PPC::NOP));
178 bool PPCInstrInfo::AnalyzeBranch(MachineBasicBlock &MBB,MachineBasicBlock *&TBB,
183 MachineBasicBlock::iterator I = MBB.end();
184 if (I == MBB.begin())
188 if (I == MBB.begin())
199 if (I == MBB.begin() || !isUnpredicatedTerminator(--I)) {
222 if (SecondLastInst && I != MBB.begin() &&
256 unsigned PPCInstrInfo::RemoveBranch(MachineBasicBlock &MBB) const {
257 MachineBasicBlock::iterator I = MBB.end()
[all...] |
| PPCRegisterInfo.cpp | 281 eliminateCallFramePseudoInstr(MachineFunction &MF, MachineBasicBlock &MBB,
298 BuildMI(MBB, I, dl, TII.get(ADDIInstr), StackReg).addReg(StackReg).
302 BuildMI(MBB, MBBI, dl, TII.get(LISInstr), TmpReg)
304 BuildMI(MBB, MBBI, dl, TII.get(ORIInstr), TmpReg)
307 BuildMI(MBB, MBBI, dl, TII.get(ADDInstr))
315 MBB.erase(I);
344 MachineBasicBlock &MBB = *MI.getParent();
346 MachineFunction &MF = *MBB.getParent();
382 BuildMI(MBB, II, dl, TII.get(PPC::ADDI), Reg)
387 BuildMI(MBB, II, dl, TII.get(PPC::LD), Reg
[all...] |
