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    Searched refs:NumOps (Results 26 - 45 of 45) sorted by null

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  /external/llvm/lib/CodeGen/SelectionDAG/
ScheduleDAGRRList.cpp     [all...]
ScheduleDAGSDNodes.cpp 173 unsigned NumOps = Node->getNumOperands();
174 if (Node->getOperand(NumOps-1).getValueType() == MVT::Other)
175 Chain = Node->getOperand(NumOps-1).getNode();
LegalizeVectorTypes.cpp     [all...]
SelectionDAGISel.cpp     [all...]
LegalizeTypes.h 161 const SDValue *Ops, unsigned NumOps, bool isSigned,
    [all...]
LegalizeDAG.cpp 118 unsigned NumOps, bool isSigned, DebugLoc dl);
    [all...]
DAGCombiner.cpp     [all...]
  /external/llvm/lib/CodeGen/
TwoAddressInstructionPass.cpp 455 unsigned NumOps = MI.isInlineAsm()
457 for (unsigned i = 0; i != NumOps; ++i) {
    [all...]
MachineInstr.cpp 839 unsigned NumOps;
841 i += NumOps) {
846 NumOps = 1 + InlineAsm::getNumOperandRegisters(FlagMO.getImm());
847 if (i + NumOps > OpIdx) {
    [all...]
  /external/llvm/lib/Target/X86/
X86InstrInfo.cpp     [all...]
X86ISelLowering.cpp     [all...]
  /external/llvm/lib/Target/ARM/
ARMConstantIslandPass.cpp     [all...]
ARMBaseInstrInfo.cpp 149 unsigned NumOps = MCID.getNumOperands();
153 const MachineOperand &Offset = MI->getOperand(NumOps-3);
157 unsigned OffImm = MI->getOperand(NumOps-2).getImm();
158 ARMCC::CondCodes Pred = (ARMCC::CondCodes)MI->getOperand(NumOps-1).getImm();
595 unsigned NumOps = MCID.getNumOperands();
597 MI->getOperand(NumOps - (MCID.isPredicable() ? 3 : 2));
    [all...]
ARMAsmPrinter.cpp     [all...]
ARMLoadStoreOptimizer.cpp     [all...]
  /external/llvm/lib/Bitcode/Writer/
BitcodeWriter.cpp 842 unsigned NumOps = CA->getNumOperands();
844 if (CA->getOperand(NumOps-1)->isNullValue()) {
846 --NumOps; // Don't encode the null, which isn't allowed by char6.
    [all...]
  /frameworks/compile/slang/BitWriter_2_9/
BitcodeWriter.cpp     [all...]
  /external/llvm/lib/Target/ARM/Disassembler/
ARMDisassembler.cpp 567 unsigned short NumOps = ARMInsts[MI.getOpcode()].NumOperands;
569 for (unsigned i = 0; i < NumOps; ++i, ++I) {
634 unsigned short NumOps = ARMInsts[MI.getOpcode()].NumOperands;
636 for (unsigned i = 0; i < NumOps; ++i, ++I) {
674 unsigned short NumOps = ARMInsts[MI.getOpcode()].NumOperands;
675 for (unsigned i = 0; i < NumOps; ++i, ++I) {
    [all...]
  /external/llvm/lib/Target/PowerPC/
PPCISelLowering.cpp     [all...]
  /external/llvm/lib/Target/CellSPU/
SPUISelLowering.cpp     [all...]

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