1 /* 2 * Compare two 64-bit values. Puts 0, 1, or -1 into the destination 3 * register based on the results of the comparison. 4 * 5 * We load the full values with LDM, but in practice many values could 6 * be resolved by only looking at the high word. This could be made 7 * faster or slower by splitting the LDM into a pair of LDRs. 8 * 9 * If we just wanted to set condition flags, we could do this: 10 * subs ip, r0, r2 11 * sbcs ip, r1, r3 12 * subeqs ip, r0, r2 13 * Leaving { <0, 0, >0 } in ip. However, we have to set it to a specific 14 * integer value, which we can do with 2 conditional mov/mvn instructions 15 * (set 1, set -1; if they're equal we already have 0 in ip), giving 16 * us a constant 5-cycle path plus a branch at the end to the 17 * instruction epilogue code. The multi-compare approach below needs 18 * 2 or 3 cycles + branch if the high word doesn't match, 6 + branch 19 * in the worst case (the 64-bit values are equal). 20 */ 21 /* cmp-long vAA, vBB, vCC */ 22 cmp r1, r3 @ compare (vBB+1, vCC+1) 23 blt .L${opcode}_less @ signed compare on high part 24 bgt .L${opcode}_greater 25 subs r0, r0, r2 @ r0<- r0 - r2 26 bxeq lr 27 bhi .L${opcode}_greater @ unsigned compare on low part 28 .L${opcode}_less: 29 mvn r0, #0 @ r0<- -1 30 bx lr 31 .L${opcode}_greater: 32 mov r0, #1 @ r0<- 1 33 bx lr 34
