1 //===-- SparcTargetMachine.h - Define TargetMachine for Sparc ---*- C++ -*-===// 2 // 3 // The LLVM Compiler Infrastructure 4 // 5 // This file is distributed under the University of Illinois Open Source 6 // License. See LICENSE.TXT for details. 7 // 8 //===----------------------------------------------------------------------===// 9 // 10 // This file declares the Sparc specific subclass of TargetMachine. 11 // 12 //===----------------------------------------------------------------------===// 13 14 #ifndef SPARCTARGETMACHINE_H 15 #define SPARCTARGETMACHINE_H 16 17 #include "SparcInstrInfo.h" 18 #include "SparcISelLowering.h" 19 #include "SparcFrameLowering.h" 20 #include "SparcSelectionDAGInfo.h" 21 #include "SparcSubtarget.h" 22 #include "llvm/Target/TargetMachine.h" 23 #include "llvm/Target/TargetData.h" 24 #include "llvm/Target/TargetFrameLowering.h" 25 26 namespace llvm { 27 28 class SparcTargetMachine : public LLVMTargetMachine { 29 SparcSubtarget Subtarget; 30 const TargetData DataLayout; // Calculates type size & alignment 31 SparcTargetLowering TLInfo; 32 SparcSelectionDAGInfo TSInfo; 33 SparcInstrInfo InstrInfo; 34 SparcFrameLowering FrameLowering; 35 public: 36 SparcTargetMachine(const Target &T, StringRef TT, 37 StringRef CPU, StringRef FS, 38 Reloc::Model RM, CodeModel::Model CM, bool is64bit); 39 40 virtual const SparcInstrInfo *getInstrInfo() const { return &InstrInfo; } 41 virtual const TargetFrameLowering *getFrameLowering() const { 42 return &FrameLowering; 43 } 44 virtual const SparcSubtarget *getSubtargetImpl() const{ return &Subtarget; } 45 virtual const SparcRegisterInfo *getRegisterInfo() const { 46 return &InstrInfo.getRegisterInfo(); 47 } 48 virtual const SparcTargetLowering* getTargetLowering() const { 49 return &TLInfo; 50 } 51 virtual const SparcSelectionDAGInfo* getSelectionDAGInfo() const { 52 return &TSInfo; 53 } 54 virtual const TargetData *getTargetData() const { return &DataLayout; } 55 56 // Pass Pipeline Configuration 57 virtual bool addInstSelector(PassManagerBase &PM, CodeGenOpt::Level OptLevel); 58 virtual bool addPreEmitPass(PassManagerBase &PM, CodeGenOpt::Level OptLevel); 59 }; 60 61 /// SparcV8TargetMachine - Sparc 32-bit target machine 62 /// 63 class SparcV8TargetMachine : public SparcTargetMachine { 64 public: 65 SparcV8TargetMachine(const Target &T, StringRef TT, 66 StringRef CPU, StringRef FS, 67 Reloc::Model RM, CodeModel::Model CM); 68 }; 69 70 /// SparcV9TargetMachine - Sparc 64-bit target machine 71 /// 72 class SparcV9TargetMachine : public SparcTargetMachine { 73 public: 74 SparcV9TargetMachine(const Target &T, StringRef TT, 75 StringRef CPU, StringRef FS, 76 Reloc::Model RM, CodeModel::Model CM); 77 }; 78 79 } // end namespace llvm 80 81 #endif 82
