1 ; RUN: llc < %s -march=thumb -mattr=-thumb2 | not grep pld 2 ; RUN: llc < %s -march=thumb -mattr=+v7 | FileCheck %s -check-prefix=THUMB2 3 ; RUN: llc < %s -march=arm -mattr=+v7 | FileCheck %s -check-prefix=ARM 4 ; RUN: llc < %s -march=arm -mcpu=cortex-a9-mp | FileCheck %s -check-prefix=ARM-MP 5 ; rdar://8601536 6 7 define void @t1(i8* %ptr) nounwind { 8 entry: 9 ; ARM: t1: 10 ; ARM-NOT: pldw [r0] 11 ; ARM: pld [r0] 12 13 ; ARM-MP: t1: 14 ; ARM-MP: pldw [r0] 15 ; ARM-MP: pld [r0] 16 17 ; THUMB2: t1: 18 ; THUMB2-NOT: pldw [r0] 19 ; THUMB2: pld [r0] 20 tail call void @llvm.prefetch( i8* %ptr, i32 1, i32 3, i32 1 ) 21 tail call void @llvm.prefetch( i8* %ptr, i32 0, i32 3, i32 1 ) 22 ret void 23 } 24 25 define void @t2(i8* %ptr) nounwind { 26 entry: 27 ; ARM: t2: 28 ; ARM: pld [r0, #1023] 29 30 ; THUMB2: t2: 31 ; THUMB2: pld [r0, #1023] 32 %tmp = getelementptr i8* %ptr, i32 1023 33 tail call void @llvm.prefetch( i8* %tmp, i32 0, i32 3, i32 1 ) 34 ret void 35 } 36 37 define void @t3(i32 %base, i32 %offset) nounwind { 38 entry: 39 ; ARM: t3: 40 ; ARM: pld [r0, r1, lsr #2] 41 42 ; THUMB2: t3: 43 ; THUMB2: lsrs r1, r1, #2 44 ; THUMB2: pld [r0, r1] 45 %tmp1 = lshr i32 %offset, 2 46 %tmp2 = add i32 %base, %tmp1 47 %tmp3 = inttoptr i32 %tmp2 to i8* 48 tail call void @llvm.prefetch( i8* %tmp3, i32 0, i32 3, i32 1 ) 49 ret void 50 } 51 52 define void @t4(i32 %base, i32 %offset) nounwind { 53 entry: 54 ; ARM: t4: 55 ; ARM: pld [r0, r1, lsl #2] 56 57 ; THUMB2: t4: 58 ; THUMB2: pld [r0, r1, lsl #2] 59 %tmp1 = shl i32 %offset, 2 60 %tmp2 = add i32 %base, %tmp1 61 %tmp3 = inttoptr i32 %tmp2 to i8* 62 tail call void @llvm.prefetch( i8* %tmp3, i32 0, i32 3, i32 1 ) 63 ret void 64 } 65 66 declare void @llvm.prefetch(i8*, i32, i32, i32) nounwind 67 68 define void @t5(i8* %ptr) nounwind { 69 entry: 70 ; ARM: t5: 71 ; ARM: pli [r0] 72 73 ; THUMB2: t5: 74 ; THUMB2: pli [r0] 75 tail call void @llvm.prefetch( i8* %ptr, i32 0, i32 3, i32 0 ) 76 ret void 77 } 78
