1 @ RUN: llvm-mc -mcpu=cortex-a8 -triple arm-unknown-unknown -show-encoding < %s | FileCheck %s 2 3 4 vmul.i8 d16, d16, d17 5 vmul.i16 d16, d16, d17 6 vmul.i32 d16, d16, d17 7 vmul.f32 d16, d16, d17 8 vmul.i8 q8, q8, q9 9 vmul.i16 q8, q8, q9 10 vmul.i32 q8, q8, q9 11 vmul.f32 q8, q8, q9 12 vmul.p8 d16, d16, d17 13 vmul.p8 q8, q8, q9 14 vmul.i16 d18, d8, d0[3] 15 16 @ CHECK: vmul.i8 d16, d16, d17 @ encoding: [0xb1,0x09,0x40,0xf2] 17 @ CHECK: vmul.i16 d16, d16, d17 @ encoding: [0xb1,0x09,0x50,0xf2] 18 @ CHECK: vmul.i32 d16, d16, d17 @ encoding: [0xb1,0x09,0x60,0xf2] 19 @ CHECK: vmul.f32 d16, d16, d17 @ encoding: [0xb1,0x0d,0x40,0xf3] 20 @ CHECK: vmul.i8 q8, q8, q9 @ encoding: [0xf2,0x09,0x40,0xf2] 21 @ CHECK: vmul.i16 q8, q8, q9 @ encoding: [0xf2,0x09,0x50,0xf2] 22 @ CHECK: vmul.i32 q8, q8, q9 @ encoding: [0xf2,0x09,0x60,0xf2] 23 @ CHECK: vmul.f32 q8, q8, q9 @ encoding: [0xf2,0x0d,0x40,0xf3] 24 @ CHECK: vmul.p8 d16, d16, d17 @ encoding: [0xb1,0x09,0x40,0xf3] 25 @ CHECK: vmul.p8 q8, q8, q9 @ encoding: [0xf2,0x09,0x40,0xf3] 26 @ CHECK: vmul.i16 d18, d8, d0[3] @ encoding: [0x68,0x28,0xd8,0xf2] 27 28 29 vqdmulh.s16 d16, d16, d17 30 vqdmulh.s32 d16, d16, d17 31 vqdmulh.s16 q8, q8, q9 32 vqdmulh.s32 q8, q8, q9 33 vqdmulh.s16 d11, d2, d3[0] 34 35 @ CHECK: vqdmulh.s16 d16, d16, d17 @ encoding: [0xa1,0x0b,0x50,0xf2] 36 @ CHECK: vqdmulh.s32 d16, d16, d17 @ encoding: [0xa1,0x0b,0x60,0xf2] 37 @ CHECK: vqdmulh.s16 q8, q8, q9 @ encoding: [0xe2,0x0b,0x50,0xf2] 38 @ CHECK: vqdmulh.s32 q8, q8, q9 @ encoding: [0xe2,0x0b,0x60,0xf2] 39 @ CHECK: vqdmulh.s16 d11, d2, d3[0] @ encoding: [0x43,0xbc,0x92,0xf2] 40 41 42 vqrdmulh.s16 d16, d16, d17 43 vqrdmulh.s32 d16, d16, d17 44 vqrdmulh.s16 q8, q8, q9 45 vqrdmulh.s32 q8, q8, q9 46 47 @ CHECK: vqrdmulh.s16 d16, d16, d17 @ encoding: [0xa1,0x0b,0x50,0xf3] 48 @ CHECK: vqrdmulh.s32 d16, d16, d17 @ encoding: [0xa1,0x0b,0x60,0xf3] 49 @ CHECK: vqrdmulh.s16 q8, q8, q9 @ encoding: [0xe2,0x0b,0x50,0xf3] 50 @ CHECK: vqrdmulh.s32 q8, q8, q9 @ encoding: [0xe2,0x0b,0x60,0xf3] 51 52 53 vmull.s8 q8, d16, d17 54 vmull.s16 q8, d16, d17 55 vmull.s32 q8, d16, d17 56 vmull.u8 q8, d16, d17 57 vmull.u16 q8, d16, d17 58 vmull.u32 q8, d16, d17 59 vmull.p8 q8, d16, d17 60 61 @ CHECK: vmull.s8 q8, d16, d17 @ encoding: [0xa1,0x0c,0xc0,0xf2] 62 @ CHECK: vmull.s16 q8, d16, d17 @ encoding: [0xa1,0x0c,0xd0,0xf2] 63 @ CHECK: vmull.s32 q8, d16, d17 @ encoding: [0xa1,0x0c,0xe0,0xf2] 64 @ CHECK: vmull.u8 q8, d16, d17 @ encoding: [0xa1,0x0c,0xc0,0xf3] 65 @ CHECK: vmull.u16 q8, d16, d17 @ encoding: [0xa1,0x0c,0xd0,0xf3] 66 @ CHECK: vmull.u32 q8, d16, d17 @ encoding: [0xa1,0x0c,0xe0,0xf3] 67 @ CHECK: vmull.p8 q8, d16, d17 @ encoding: [0xa1,0x0e,0xc0,0xf2] 68 69 70 vqdmull.s16 q8, d16, d17 71 vqdmull.s32 q8, d16, d17 72 73 @ CHECK: vqdmull.s16 q8, d16, d17 @ encoding: [0xa1,0x0d,0xd0,0xf2] 74 @ CHECK: vqdmull.s32 q8, d16, d17 @ encoding: [0xa1,0x0d,0xe0,0xf2] 75
