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      1 // Copyright 2010 the V8 project authors. All rights reserved.
      2 // Redistribution and use in source and binary forms, with or without
      3 // modification, are permitted provided that the following conditions are
      4 // met:
      5 //
      6 //     * Redistributions of source code must retain the above copyright
      7 //       notice, this list of conditions and the following disclaimer.
      8 //     * Redistributions in binary form must reproduce the above
      9 //       copyright notice, this list of conditions and the following
     10 //       disclaimer in the documentation and/or other materials provided
     11 //       with the distribution.
     12 //     * Neither the name of Google Inc. nor the names of its
     13 //       contributors may be used to endorse or promote products derived
     14 //       from this software without specific prior written permission.
     15 //
     16 // THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
     17 // "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
     18 // LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
     19 // A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
     20 // OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
     21 // SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
     22 // LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
     23 // DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
     24 // THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
     25 // (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
     26 // OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
     27 
     28 // CPU specific code for arm independent of OS goes here.
     29 
     30 #include <sys/syscall.h>
     31 #include <unistd.h>
     32 
     33 #ifdef __mips
     34 #include <asm/cachectl.h>
     35 #endif  // #ifdef __mips
     36 
     37 #include "v8.h"
     38 
     39 #if defined(V8_TARGET_ARCH_MIPS)
     40 
     41 #include "cpu.h"
     42 #include "macro-assembler.h"
     43 
     44 #include "simulator.h"  // For cache flushing.
     45 
     46 namespace v8 {
     47 namespace internal {
     48 
     49 
     50 void CPU::Setup() {
     51   CpuFeatures* cpu_features = Isolate::Current()->cpu_features();
     52   cpu_features->Probe(true);
     53   if (!cpu_features->IsSupported(FPU) || Serializer::enabled()) {
     54     V8::DisableCrankshaft();
     55   }
     56 }
     57 
     58 
     59 void CPU::FlushICache(void* start, size_t size) {
     60 #if !defined (USE_SIMULATOR)
     61   int res;
     62 
     63   // See http://www.linux-mips.org/wiki/Cacheflush_Syscall
     64   res = syscall(__NR_cacheflush, start, size, ICACHE);
     65 
     66   if (res) {
     67     V8_Fatal(__FILE__, __LINE__, "Failed to flush the instruction cache");
     68   }
     69 
     70 #else  // USE_SIMULATOR.
     71   // Not generating mips instructions for C-code. This means that we are
     72   // building a mips emulator based target.  We should notify the simulator
     73   // that the Icache was flushed.
     74   // None of this code ends up in the snapshot so there are no issues
     75   // around whether or not to generate the code when building snapshots.
     76   Simulator::FlushICache(Isolate::Current()->simulator_i_cache(), start, size);
     77 #endif  // USE_SIMULATOR.
     78 }
     79 
     80 
     81 void CPU::DebugBreak() {
     82 #ifdef __mips
     83   asm volatile("break");
     84 #endif  // #ifdef __mips
     85 }
     86 
     87 
     88 } }  // namespace v8::internal
     89 
     90 #endif  // V8_TARGET_ARCH_MIPS
     91