/external/llvm/lib/Target/X86/ |
X86FrameLowering.h | 37 unsigned FramePtr) const;
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X86RegisterInfo.h | 49 /// FramePtr - X86 physical register used as frame ptr. 51 unsigned FramePtr;
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X86FrameLowering.cpp | 288 unsigned FramePtr) const { 341 if (HasFP && FramePtr == Reg) 466 unsigned FramePtr = RegInfo->getFrameRegister(MF); 516 if (DstReg != FramePtr || SrcReg != StackPtr) 613 unsigned FramePtr = RegInfo->getFrameRegister(MF); 698 .addReg(FramePtr, RegState::Kill) 718 // Change the rule for the FramePtr to be an "offset" rule. 720 MachineLocation FPSrc(FramePtr); 726 TII.get(Is64Bit ? X86::MOV64rr : X86::MOV32rr), FramePtr) 737 MachineLocation FPDst(FramePtr); [all...] |
X86RegisterInfo.cpp | 70 FramePtr = X86::RBP; 74 FramePtr = X86::EBP; 484 if (Reg == FramePtr && TFI->hasFP(MF)) { 613 BasePtr = (FrameIndex < 0 ? FramePtr : StackPtr); 617 BasePtr = (TFI->hasFP(MF) ? FramePtr : StackPtr); 648 return TFI->hasFP(MF) ? FramePtr : StackPtr;
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/external/llvm/lib/Target/ARM/ |
Thumb1FrameLowering.cpp | 61 unsigned FramePtr = RegInfo->getFrameRegister(MF); 93 if (Reg == FramePtr) 102 if (Reg == FramePtr) 136 AddDefaultPred(BuildMI(MBB, MBBI, dl, TII.get(ARM::tADDrSPi), FramePtr) 240 unsigned FramePtr = RegInfo->getFrameRegister(MF); 268 emitThumbRegPlusImmediate(MBB, MBBI, dl, ARM::R4, FramePtr, -NumBytes, 276 .addReg(FramePtr));
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ARMFrameLowering.cpp | 135 unsigned FramePtr = RegInfo->getFrameRegister(MF); 163 if (Reg == FramePtr) 172 if (Reg == FramePtr) 200 BuildMI(MBB, MBBI, dl, TII.get(ADDriOpc), FramePtr) 327 unsigned FramePtr = RegInfo->getFrameRegister(MF); 354 emitARMRegPlusImmediate(MBB, MBBI, dl, ARM::SP, FramePtr, -NumBytes, 366 emitT2RegPlusImmediate(MBB, MBBI, dl, ARM::R4, FramePtr, -NumBytes, 376 .addReg(FramePtr).addImm((unsigned)ARMCC::AL).addReg(0).addReg(0); 380 .addReg(FramePtr)); [all...] |
ARMBaseRegisterInfo.h | 80 /// FramePtr - ARM physical register used as frame ptr. 81 unsigned FramePtr;
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ARMBaseRegisterInfo.cpp | 60 FramePtr((STI.isTargetDarwin() || STI.isThumb()) ? ARM::R7 : ARM::R11), 98 Reserved.set(FramePtr); 128 if (FramePtr == Reg && TFI->hasFP(MF)) 499 } else if (FramePtr == ARM::R7) { 504 } else { // FramePtr == ARM::R11 521 } else if (FramePtr == ARM::R7) { 526 } else { // FramePtr == ARM::R11 660 return FramePtr; [all...] |
ARMExpandPseudoInsts.cpp | [all...] |
ARMAsmPrinter.cpp | [all...] |
ARMISelLowering.cpp | [all...] |
/external/llvm/lib/Target/XCore/ |
XCoreFrameLowering.cpp | 184 unsigned FramePtr = XCore::R10; 185 BuildMI(MBB, MBBI, dl, TII.get(XCore::LDAWSP_ru6), FramePtr) 191 MachineLocation SPDst(FramePtr); 225 unsigned FramePtr = XCore::R10; 227 .addReg(FramePtr);
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/external/llvm/lib/CodeGen/ |
SjLjEHPrepare.cpp | 618 Value *FramePtr = 626 new StoreInst(Val, FramePtr, true, EntryBB->getTerminator()); [all...] |