/external/llvm/lib/CodeGen/SelectionDAG/ |
LegalizeTypes.h | 83 DenseMap<SDValue, SDValue> PromotedIntegers; 87 DenseMap<SDValue, std::pair<SDValue, SDValue> > ExpandedIntegers; 91 DenseMap<SDValue, SDValue> SoftenedFloats; 95 DenseMap<SDValue, std::pair<SDValue, SDValue> > ExpandedFloats [all...] |
InstrEmitter.h | 44 DenseMap<SDValue, unsigned> &VRBaseMap); 54 DenseMap<SDValue, unsigned> &VRBaseMap); 58 unsigned getVR(SDValue Op, 59 DenseMap<SDValue, unsigned> &VRBaseMap); 64 void AddRegisterOperand(MachineInstr *MI, SDValue Op, 67 DenseMap<SDValue, unsigned> &VRBaseMap, 74 void AddOperand(MachineInstr *MI, SDValue Op, 77 DenseMap<SDValue, unsigned> &VRBaseMap, 88 void EmitSubregNode(SDNode *Node, DenseMap<SDValue, unsigned> &VRBaseMap, 96 DenseMap<SDValue, unsigned> &VRBaseMap) [all...] |
LegalizeVectorOps.cpp | 43 DenseMap<SDValue, SDValue> LegalizedNodes; 46 void AddLegalizedOperand(SDValue From, SDValue To) { 54 SDValue LegalizeOp(SDValue Op); 56 SDValue TranslateLegalizeResults(SDValue Op, SDValue Result); 58 SDValue UnrollVSETCC(SDValue Op) [all...] |
/external/llvm/include/llvm/Target/ |
TargetSelectionDAGInfo.h | 47 /// SDValue if the target declines to use custom code and a different 56 virtual SDValue 58 SDValue Chain, 59 SDValue Op1, SDValue Op2, 60 SDValue Op3, unsigned Align, bool isVolatile, 64 return SDValue(); 71 /// SDValue if the target declines to use custom code and a different 73 virtual SDValue 75 SDValue Chain [all...] |
/external/llvm/lib/Target/PTX/ |
PTXSelectionDAGInfo.h | 33 SDValue EmitTargetCodeForMemcpy(SelectionDAG &DAG, DebugLoc dl, 34 SDValue Chain, 35 SDValue Dst, SDValue Src, 36 SDValue Size, unsigned Align, 42 SDValue EmitTargetCodeForMemset(SelectionDAG &DAG, DebugLoc dl, 43 SDValue Chain, 44 SDValue Op1, SDValue Op2, 45 SDValue Op3, unsigned Align [all...] |
PTXISelLowering.h | 44 virtual SDValue LowerOperation(SDValue Op, SelectionDAG &DAG) const; 46 virtual SDValue LowerSETCC(SDValue Op, SelectionDAG &DAG) const; 48 virtual SDValue 49 LowerFormalArguments(SDValue Chain, 55 SmallVectorImpl<SDValue> &InVals) const; 57 virtual SDValue 58 LowerReturn(SDValue Chain, 62 const SmallVectorImpl<SDValue> &OutVals [all...] |
PTXISelDAGToDAG.cpp | 39 bool SelectADDRrr(SDValue &Addr, SDValue &R1, SDValue &R2); 40 bool SelectADDRri(SDValue &Addr, SDValue &Base, SDValue &Offset); 41 bool SelectADDRii(SDValue &Addr, SDValue &Base, SDValue &Offset); 42 bool SelectADDRlocal(SDValue &Addr, SDValue &Base, SDValue &Offset) [all...] |
/external/llvm/lib/Target/X86/ |
X86SelectionDAGInfo.h | 37 SDValue EmitTargetCodeForMemset(SelectionDAG &DAG, DebugLoc dl, 38 SDValue Chain, 39 SDValue Dst, SDValue Src, 40 SDValue Size, unsigned Align, 45 SDValue EmitTargetCodeForMemcpy(SelectionDAG &DAG, DebugLoc dl, 46 SDValue Chain, 47 SDValue Dst, SDValue Src, 48 SDValue Size, unsigned Align [all...] |
X86ISelLowering.h | 479 bool isZeroNode(SDValue Elt); 510 virtual SDValue getPICJumpTableRelocBase(SDValue Table, 551 virtual SDValue LowerOperation(SDValue Op, SelectionDAG &DAG) const; 556 virtual void ReplaceNodeResults(SDNode *N, SmallVectorImpl<SDValue>&Results, 560 virtual SDValue PerformDAGCombine(SDNode *N, DAGCombinerInfo &DCI) const; 572 virtual bool IsDesirableToPromoteOp(SDValue Op, EVT &PVT) const; 589 virtual void computeMaskedBitsForTargetNode(const SDValue Op, 598 virtual unsigned ComputeNumSignBitsForTargetNode(SDValue Op [all...] |
/external/llvm/lib/Target/MSP430/ |
MSP430ISelLowering.h | 79 virtual SDValue LowerOperation(SDValue Op, SelectionDAG &DAG) const; 85 SDValue LowerShifts(SDValue Op, SelectionDAG &DAG) const; 86 SDValue LowerGlobalAddress(SDValue Op, SelectionDAG &DAG) const; 87 SDValue LowerBlockAddress(SDValue Op, SelectionDAG &DAG) const; 88 SDValue LowerExternalSymbol(SDValue Op, SelectionDAG &DAG) const [all...] |
/external/llvm/lib/Target/Mips/ |
MipsISelLowering.h | 104 virtual SDValue LowerOperation(SDValue Op, SelectionDAG &DAG) const; 113 virtual SDValue PerformDAGCombine(SDNode *N, DAGCombinerInfo &DCI) const; 121 SDValue LowerCallResult(SDValue Chain, SDValue InFlag, 125 SmallVectorImpl<SDValue> &InVals) const; 128 SDValue LowerBRCOND(SDValue Op, SelectionDAG &DAG) const; 129 SDValue LowerConstantPool(SDValue Op, SelectionDAG &DAG) const [all...] |
MipsISelDAGToDAG.cpp | 87 bool SelectAddr(SDValue N, SDValue &Base, SDValue &Offset); 91 inline SDValue getI32Imm(unsigned Imm) { 95 virtual bool SelectInlineAsmMemoryOperand(const SDValue &Op, 97 std::vector<SDValue> &OutOps); 113 SelectAddr(SDValue Addr, SDValue &Base, SDValue &Offset) { 172 SDValue LoVal = Addr.getOperand(1) [all...] |
/external/llvm/include/llvm/CodeGen/ |
SelectionDAG.h | 146 SDValue Root; 249 const SDValue &getRoot() const { return Root; } 253 SDValue getEntryNode() const { 254 return SDValue(const_cast<SDNode *>(&EntryNode), 0); 259 const SDValue &setRoot(SDValue N) { 325 SDValue getConstant(uint64_t Val, EVT VT, bool isTarget = false); 326 SDValue getConstant(const APInt &Val, EVT VT, bool isTarget = false); 327 SDValue getConstant(const ConstantInt &Val, EVT VT, bool isTarget = false); 328 SDValue getIntPtrConstant(uint64_t Val, bool isTarget = false) [all...] |
/external/llvm/lib/Target/PowerPC/ |
PPCISelLowering.h | 233 SDValue get_VSPLTI_elt(SDNode *N, unsigned ByteSize, SelectionDAG &DAG); 254 virtual bool getPreIndexedAddressParts(SDNode *N, SDValue &Base, 255 SDValue &Offset, 262 bool SelectAddressRegReg(SDValue N, SDValue &Base, SDValue &Index, 268 bool SelectAddressRegImm(SDValue N, SDValue &Disp, SDValue &Base, 273 bool SelectAddressRegRegOnly(SDValue N, SDValue &Base, SDValue &Index [all...] |
/external/llvm/lib/Target/XCore/ |
XCoreISelLowering.h | 87 virtual SDValue LowerOperation(SDValue Op, SelectionDAG &DAG) const; 92 virtual void ReplaceNodeResults(SDNode *N, SmallVectorImpl<SDValue>&Results, 111 SDValue LowerCCCArguments(SDValue Chain, 116 SmallVectorImpl<SDValue> &InVals) const; 117 SDValue LowerCCCCallTo(SDValue Chain, SDValue Callee, 121 const SmallVectorImpl<SDValue> &OutVals [all...] |
XCoreISelDAGToDAG.cpp | 54 inline SDValue getI32Imm(unsigned Imm) { 70 bool SelectADDRspii(SDValue Addr, SDValue &Base, SDValue &Offset); 71 bool SelectADDRdpii(SDValue Addr, SDValue &Base, SDValue &Offset); 72 bool SelectADDRcpii(SDValue Addr, SDValue &Base, SDValue &Offset) [all...] |
/external/llvm/lib/Target/ARM/ |
ARMSelectionDAGInfo.h | 48 SDValue EmitTargetCodeForMemcpy(SelectionDAG &DAG, DebugLoc dl, 49 SDValue Chain, 50 SDValue Dst, SDValue Src, 51 SDValue Size, unsigned Align, 58 SDValue EmitTargetCodeForMemset(SelectionDAG &DAG, DebugLoc dl, 59 SDValue Chain, 60 SDValue Op1, SDValue Op2, 61 SDValue Op3, unsigned Align [all...] |
ARMISelLowering.h | 242 virtual SDValue LowerOperation(SDValue Op, SelectionDAG &DAG) const; 247 virtual void ReplaceNodeResults(SDNode *N, SmallVectorImpl<SDValue>&Results, 262 SDValue PerformCMOVCombine(SDNode *N, SelectionDAG &DAG) const; 263 virtual SDValue PerformDAGCombine(SDNode *N, DAGCombinerInfo &DCI) const; 292 virtual bool getPreIndexedAddressParts(SDNode *N, SDValue &Base, 293 SDValue &Offset, 301 SDValue &Base, SDValue &Offset, 305 virtual void computeMaskedBitsForTargetNode(const SDValue Op [all...] |
ARMISelDAGToDAG.cpp | 88 inline SDValue getI32Imm(unsigned Imm) { 96 bool isShifterOpProfitable(const SDValue &Shift, 98 bool SelectRegShifterOperand(SDValue N, SDValue &A, 99 SDValue &B, SDValue &C, 101 bool SelectImmShifterOperand(SDValue N, SDValue &A, 102 SDValue &B, bool CheckProfitability = true); 103 bool SelectShiftRegShifterOperand(SDValue N, SDValue &A [all...] |
/external/llvm/lib/Target/Blackfin/ |
BlackfinISelLowering.h | 37 virtual SDValue LowerOperation(SDValue Op, SelectionDAG &DAG) const; 39 SmallVectorImpl<SDValue> &Results, 55 SDValue LowerGlobalAddress(SDValue Op, SelectionDAG &DAG) const; 56 SDValue LowerJumpTable(SDValue Op, SelectionDAG &DAG) const; 57 SDValue LowerADDE(SDValue Op, SelectionDAG &DAG) const; 59 virtual SDValue [all...] |
/external/llvm/lib/Target/SystemZ/ |
SystemZISelLowering.h | 63 virtual SDValue LowerOperation(SDValue Op, SelectionDAG &DAG) const; 74 SDValue LowerBR_CC(SDValue Op, SelectionDAG &DAG) const; 75 SDValue LowerSELECT_CC(SDValue Op, SelectionDAG &DAG) const; 76 SDValue LowerGlobalAddress(SDValue Op, SelectionDAG &DAG) const; 77 SDValue LowerJumpTable(SDValue Op, SelectionDAG &DAG) const [all...] |
/external/llvm/lib/Target/Sparc/ |
SparcISelLowering.h | 47 virtual SDValue LowerOperation(SDValue Op, SelectionDAG &DAG) const; 52 virtual void computeMaskedBitsForTargetNode(const SDValue Op, 71 virtual SDValue 72 LowerFormalArguments(SDValue Chain, 77 SmallVectorImpl<SDValue> &InVals) const; 79 virtual SDValue 80 LowerCall(SDValue Chain, SDValue Callee, 84 const SmallVectorImpl<SDValue> &OutVals [all...] |
/external/llvm/lib/Target/CellSPU/ |
SPUISelLowering.h | 64 SDValue get_vec_u18imm(SDNode *N, SelectionDAG &DAG, 66 SDValue get_vec_i16imm(SDNode *N, SelectionDAG &DAG, 68 SDValue get_vec_i10imm(SDNode *N, SelectionDAG &DAG, 70 SDValue get_vec_i8imm(SDNode *N, SelectionDAG &DAG, 72 SDValue get_ILHUvec_imm(SDNode *N, SelectionDAG &DAG, 74 SDValue get_v4i32_imm(SDNode *N, SelectionDAG &DAG); 75 SDValue get_v2i64_imm(SDNode *N, SelectionDAG &DAG); 77 SDValue LowerConstantPool(SDValue Op, SelectionDAG &DAG, 80 SDValue LowerV2I64Splat(EVT OpVT, SelectionDAG &DAG, uint64_t splat [all...] |
/external/llvm/lib/Target/MBlaze/ |
MBlazeISelLowering.h | 98 virtual SDValue LowerOperation(SDValue Op, SelectionDAG &DAG) const; 113 SDValue LowerCallResult(SDValue Chain, SDValue InFlag, 117 SmallVectorImpl<SDValue> &InVals) const; 120 SDValue LowerConstantPool(SDValue Op, SelectionDAG &DAG) const; 121 SDValue LowerGlobalAddress(SDValue Op, SelectionDAG &DAG) const [all...] |
/external/llvm/lib/Target/Alpha/ |
AlphaISelLowering.h | 73 virtual SDValue LowerOperation(SDValue Op, SelectionDAG &DAG) const; 78 virtual void ReplaceNodeResults(SDNode *N, SmallVectorImpl<SDValue>&Results, 84 SDValue LowerCallResult(SDValue Chain, SDValue InFlag, 88 SmallVectorImpl<SDValue> &InVals) const; 114 void LowerVAARG(SDNode *N, SDValue &Chain, SDValue &DataPtr, 117 virtual SDValue [all...] |