| /external/webkit/Source/JavaScriptCore/assembler/ |
| MacroAssemblerMIPS.h | 154 lui addrTemp, (offset + 0x8000) >> 16
161 m_assembler.lui(addrTempRegister, (address.offset + 0x8000) >> 16);
196 lui addrTemp, (offset + 0x8000) >> 16
202 m_assembler.lui(addrTempRegister, (dest.offset + 0x8000) >> 16);
385 lui addrTemp, (offset + 0x8000) >> 16
392 m_assembler.lui(addrTempRegister, (address.offset + 0x8000) >> 16);
474 lui addrTemp, (offset + 0x8000) >> 16
478 m_assembler.lui(addrTempRegister, (address.offset + 0x8000) >> 16);
491 lui addrTemp, (offset + 0x8000) >> 16
495 m_assembler.lui(addrTempRegister, (address.offset + 0x8000) >> 16)
[all...] |
| MIPSAssembler.h | 257 lui(dest, imm >> 16);
263 void lui(RegisterID rt, int imm) function in class:JSC::MIPSAssembler
771 ASSERT((*insn & 0xffe00000) == 0x3c000000); // lui
804 ASSERT((*insn & 0xffe00000) == 0x3c000000); // lui
841 /* lui */
848 } else if ((*insn & 0xffe00000) == 0x3c000000) { // lui
853 /* lui */
893 lui $25, target >> 16
924 /* lui */
949 /* lui $25, (to >> 16) & 0xffff *
[all...] |
| /external/v8/src/mips/ |
| disasm-mips.cc | 838 case LUI:
839 Format(instr, "lui 'rt, 'imm16x");
|
| assembler-mips.h | 482 // Here we are patching the address in the LUI/ORI instruction pair.
493 // address of the instruction that follows LUI/ORI instruction pair.
605 void lui(Register rd, int32_t j);
[all...] |
| macro-assembler-mips.cc | 573 lui(rd, (j.imm32_ & kHiMask) >> kLuiShift);
575 lui(rd, (j.imm32_ & kHiMask) >> kLuiShift);
592 lui(rd, (j.imm32_ & kHiMask) >> kLuiShift);
594 lui(rd, (j.imm32_ & kHiMask) >> kLuiShift);
[all...] |
| assembler-mips.cc | 146 // specially coded on MIPS means that it is a lui/ori instruction, and that is
1438 void Assembler::lui(Register rd, int32_t j) { function in class:v8::internal::Assembler
[all...] |
| /external/v8/test/cctest/ |
| test-assembler-mips.cc | 136 // Test lui, ori, and addiu, used in the li pseudo-instruction.
140 __ lui(t0, 0x1234);
216 __ lui(v1, 0x8123); // 0x81230000
517 __ lui(t5, 0x3333);
[all...] |
