| /external/llvm/lib/Target/CellSPU/ |
| SPUOperands.td | 37 // Get first constant operand...
63 // Get first constant operand...
439 // Operand Definitions.
441 def s7imm: Operand<i8> {
445 def s7imm_i8: Operand<i8> {
449 def u7imm: Operand<i16> {
453 def u7imm_i8: Operand<i8> {
457 def u7imm_i32: Operand<i32> {
462 def s10imm : Operand<i16> {
466 def s10imm_i8: Operand<i8>
[all...] |
| /prebuilt/linux-x86/toolchain/arm-eabi-4.4.0/lib/gcc/arm-eabi/4.4.0/plugin/include/ |
| tree-ssa-operands.h | 1 /* SSA operand management for trees.
26 /* This represents a pointer to a DEF operand. */
29 /* This represents a pointer to a USE operand. */
32 /* NULL operand types. */
110 operand memory manager. Operands are suballocated out of this block. The
122 /* Per-function operand caches. */
126 /* Current size of the operand memory buffer. */
137 /* This represents the operand cache for a stmt. */
229 /* This structure is used in the operand iterator loops. It contains the
230 items required to determine which operand is retrieved next. Durin
[all...] |
| tree.def | 397 Operand 0 is the structure or union (an expression).
398 Operand 1 is the field (a node of type FIELD_DECL).
399 Operand 2, if present, is the value of DECL_FIELD_OFFSET, measured
405 Operand 0 is the structure or union expression;
406 operand 1 is a tree giving the constant number of bits being referenced;
407 operand 2 is a tree giving the constant position of the first referenced bit.
417 /* C unary `*' or Pascal `^'. One operand, an expression for a pointer. */
426 Operand 0 is the referenced address (a pointer);
427 Operand 1 is an INTEGER_CST which represents the alignment of the address,
432 Operand 0 is the array; operand 1 is a (single) array index
[all...] |
| /prebuilt/linux-x86/toolchain/arm-eabi-4.4.3/lib/gcc/arm-eabi/4.4.3/plugin/include/ |
| tree-ssa-operands.h | 1 /* SSA operand management for trees.
26 /* This represents a pointer to a DEF operand. */
29 /* This represents a pointer to a USE operand. */
32 /* NULL operand types. */
110 operand memory manager. Operands are suballocated out of this block. The
122 /* Per-function operand caches. */
126 /* Current size of the operand memory buffer. */
137 /* This represents the operand cache for a stmt. */
229 /* This structure is used in the operand iterator loops. It contains the
230 items required to determine which operand is retrieved next. Durin
[all...] |
| tree.def | 397 Operand 0 is the structure or union (an expression).
398 Operand 1 is the field (a node of type FIELD_DECL).
399 Operand 2, if present, is the value of DECL_FIELD_OFFSET, measured
405 Operand 0 is the structure or union expression;
406 operand 1 is a tree giving the constant number of bits being referenced;
407 operand 2 is a tree giving the constant position of the first referenced bit.
417 /* C unary `*' or Pascal `^'. One operand, an expression for a pointer. */
426 Operand 0 is the referenced address (a pointer);
427 Operand 1 is an INTEGER_CST which represents the alignment of the address,
432 Operand 0 is the array; operand 1 is a (single) array index
[all...] |
| /prebuilt/linux-x86/toolchain/arm-linux-androideabi-4.4.x/lib/gcc/arm-linux-androideabi/4.4.3/plugin/include/ |
| tree-ssa-operands.h | 1 /* SSA operand management for trees.
26 /* This represents a pointer to a DEF operand. */
29 /* This represents a pointer to a USE operand. */
32 /* NULL operand types. */
110 operand memory manager. Operands are suballocated out of this block. The
122 /* Per-function operand caches. */
126 /* Current size of the operand memory buffer. */
137 /* This represents the operand cache for a stmt. */
229 /* This structure is used in the operand iterator loops. It contains the
230 items required to determine which operand is retrieved next. Durin
[all...] |
| tree.def | 397 Operand 0 is the structure or union (an expression).
398 Operand 1 is the field (a node of type FIELD_DECL).
399 Operand 2, if present, is the value of DECL_FIELD_OFFSET, measured
405 Operand 0 is the structure or union expression;
406 operand 1 is a tree giving the constant number of bits being referenced;
407 operand 2 is a tree giving the constant position of the first referenced bit.
417 /* C unary `*' or Pascal `^'. One operand, an expression for a pointer. */
426 Operand 0 is the referenced address (a pointer);
427 Operand 1 is an INTEGER_CST which represents the alignment of the address,
432 Operand 0 is the array; operand 1 is a (single) array index
[all...] |
| /external/llvm/include/llvm/CodeGen/ |
| MachineOperand.h | 35 /// MachineOperand class - Representation of each machine instruction operand.
40 MO_Register, ///< Register operand.
41 MO_Immediate, ///< Immediate operand
42 MO_CImmediate, ///< Immediate >64bit operand
43 MO_FPImmediate, ///< Floating-point immediate operand
56 /// OpKind - Specify what kind of operand this is. This discriminates the
64 /// TargetFlags - This is a set of target-specific operand flags.
86 /// IsUndef - True if this register operand reads an "undef" value, i.e. the
88 /// operands. On a sub-register def operand, it refers to the part of the
89 /// register that isn't written. On a full-register def operand, it is
[all...] |
| /external/v8/test/cctest/ |
| test-assembler-arm.cc | 64 __ add(r0, r0, Operand(r1));
65 __ mov(pc, Operand(lr));
91 __ mov(r1, Operand(r0));
92 __ mov(r0, Operand(0, RelocInfo::NONE));
96 __ add(r0, r0, Operand(r1));
97 __ sub(r1, r1, Operand(1));
100 __ teq(r1, Operand(0, RelocInfo::NONE));
102 __ mov(pc, Operand(lr));
128 __ mov(r1, Operand(r0));
129 __ mov(r0, Operand(1))
[all...] |
| test-assembler-x64.cc | 45 using v8::internal::Operand;
211 __ movq(rax, Operand(rbp, -3 * kStackElementSize));
310 CHECK(Operand(rax, offset).AddressUsesRegister(rax));
311 CHECK(!Operand(rax, offset).AddressUsesRegister(r8));
312 CHECK(!Operand(rax, offset).AddressUsesRegister(rcx));
314 CHECK(Operand(rax, rax, times_1, offset).AddressUsesRegister(rax));
315 CHECK(!Operand(rax, rax, times_1, offset).AddressUsesRegister(r8));
316 CHECK(!Operand(rax, rax, times_1, offset).AddressUsesRegister(rcx));
318 CHECK(Operand(rax, rcx, times_1, offset).AddressUsesRegister(rax));
319 CHECK(Operand(rax, rcx, times_1, offset).AddressUsesRegister(rcx))
[all...] |
| /external/clang/test/SemaCXX/ |
| __null.cpp | 19 (void)(0 ? __null : A()); // expected-error {{non-pointer operand type 'A' incompatible with NULL}}
20 (void)(0 ? A(): __null); // expected-error {{non-pointer operand type 'A' incompatible with NULL}}
|
| /external/collada/include/1.4/dom/ |
| domGles_texcombiner_argumentAlpha_type.h | 39 * Gets the operand attribute.
40 * @return Returns a domGles_texcombiner_operandAlpha_enums of the operand attribute.
44 * Sets the operand attribute.
45 * @param atOperand The new value for the operand attribute.
98 * Gets the operand attribute.
99 * @return Returns a domGles_texcombiner_operandAlpha_enums of the operand attribute.
103 * Sets the operand attribute.
104 * @param atOperand The new value for the operand attribute.
|
| domGles_texcombiner_argumentRGB_type.h | 39 * Gets the operand attribute.
40 * @return Returns a domGles_texcombiner_operandRGB_enums of the operand attribute.
44 * Sets the operand attribute.
45 * @param atOperand The new value for the operand attribute.
98 * Gets the operand attribute.
99 * @return Returns a domGles_texcombiner_operandRGB_enums of the operand attribute.
103 * Sets the operand attribute.
104 * @param atOperand The new value for the operand attribute.
|
| /external/llvm/test/Transforms/InstCombine/ |
| 2008-07-13-DivZero.ll | 5 ; We can simplify the operand of udiv to '8', but not the operand to the
|
| /external/llvm/lib/Target/PTX/ |
| PTXInstrFormats.td | 24 // Rounding Mode Operand
25 def RndMode : Operand<i32> {
31 // PTX Predicate operand, default to (0, 0) = (zero-reg, none).
36 def RndModeOperand : Operand<OtherVT> {
|
| /external/llvm/lib/Target/SystemZ/ |
| SystemZISelLowering.h | 28 /// Return with a flag operand. Operand 0 is the chain operand.
42 /// BRCOND - Conditional branch. Operand 0 is chain operand, operand 1 is
43 /// the block to branch if condition is true, operand 2 is condition code
44 /// and operand 3 is the flag operand produced by a CMP instruction.
47 /// SELECT - Operands 0 and 1 are selection variables, operand 2 i
[all...] |
| /external/v8/src/ia32/ |
| builtins-ia32.cc | 72 __ add(Operand(eax), Immediate(num_extra_args + 1));
95 __ jmp(Operand(ebx));
133 __ cmp(Operand::StaticVariable(debug_step_in_fp), Immediate(0));
187 __ mov(Operand(ebx, JSObject::kMapOffset), eax);
190 __ mov(Operand(ebx, JSObject::kPropertiesOffset), ecx);
191 __ mov(Operand(ebx, JSObject::kElementsOffset), ecx);
203 __ lea(ecx, Operand(ebx, JSObject::kHeaderSize));
206 __ mov(Operand(ecx, 0), edx);
207 __ add(Operand(ecx), Immediate(kPointerSize));
209 __ cmp(ecx, Operand(edi))
[all...] |
| assembler-ia32.cc | 89 __ mov(ebp, Operand(esp));
94 __ mov(edx, Operand(eax));
100 __ xor_(eax, Operand(edx)); // Different if CPUID is supported.
104 __ xor_(eax, Operand(eax));
105 __ xor_(edx, Operand(edx));
121 __ mov(eax, Operand(edx));
123 __ mov(edx, Operand(ecx));
127 __ mov(esp, Operand(ebp));
225 // Implementation of Operand
227 Operand::Operand(Register base, int32_t disp, RelocInfo::Mode rmode)
[all...] |
| /external/llvm/utils/TableGen/ |
| PseudoLoweringEmitter.cpp | 48 "Pseudo operand type '" + DI->getDef()->getName() +
49 "' does not match expansion operand type '" +
51 // Source operand maps to destination operand. The Data element
53 // for each corresponding MachineInstr operand, not just the first.
55 OperandMap[BaseIdx + i + I].Kind = OpData::Operand;
63 // a constant value for a complex operand (> 1 MI operand).
101 "' operand count mismatch");
124 DEBUG(dbgs() << " Operand mapping:\n")
[all...] |
| /external/webkit/Source/JavaScriptCore/interpreter/ |
| Interpreter.cpp | 94 int dst = vPC[1].u.operand;
95 int property = vPC[2].u.operand;
124 int dst = vPC[1].u.operand;
125 int property = vPC[2].u.operand;
126 int skip = vPC[3].u.operand;
162 int dst = vPC[1].u.operand;
166 int property = vPC[2].u.operand;
168 int offset = vPC[4].u.operand;
199 int dst = vPC[1].u.operand;
203 int property = vPC[2].u.operand;
[all...] |
| /external/llvm/include/llvm-c/ |
| EnhancedDisassembly.h | 11 |* implements a disassembler with the ability to extract operand values and *|
83 Encapsulates an operand of an instruction.
220 @result The ID of the branch target operand, suitable for use with
221 EDCopyOperand. -1 if no such operand exists.
228 @result The ID of the move source operand, suitable for use with
229 EDCopyOperand. -1 if no such operand exists.
236 @result The ID of the move source operand, suitable for use with
237 EDCopyOperand. -1 if no such operand exists.
278 Returns the index of the operand to which a token belongs.
280 @result The operand index on success; -1 otherwis
[all...] |
| /external/v8/src/x64/ |
| regexp-macro-assembler-x64.cc | 196 __ cmpb(Operand(rbp, kStartIndex), Immediate(0));
199 __ lea(rax, Operand(rsi, rdi, times_1, 0));
200 __ cmpq(rax, Operand(rbp, kInputStart));
208 __ cmpb(Operand(rbp, kStartIndex), Immediate(0));
211 __ lea(rax, Operand(rsi, rdi, times_1, 0));
212 __ cmpq(rax, Operand(rbp, kInputStart));
253 __ cmpb(Operand(rsi, rdi, times_1, byte_offset),
259 Operand(rsi, rdi, times_1, byte_offset));
264 __ lea(rbx, Operand(rsi, rdi, times_1, 0));
278 __ cmpq(rax, Operand(rbx, byte_offset + i))
[all...] |
| /external/llvm/include/llvm/MC/MCParser/ |
| MCParsedAsmOperand.h | 1 //===-- llvm/MC/MCParsedAsmOperand.h - Asm Parser Operand -------*- C++ -*-===//
18 /// instruction operand. It should be subclassed by target-specific code. This
26 /// getStartLoc - Get the location of the first token of this operand.
28 /// getEndLoc - Get the location of the last token of this operand.
31 /// print - Print a debug representation of the operand to the given stream.
|
| /external/llvm/test/TableGen/ |
| TargetInstrSpec.td | 70 int operand;
84 !foreach(Decls.operand, Decls.pattern,
86 !subst(REGCLASS, VR128, Decls.operand))))>;
91 !foreach(Decls.operand, Decls.pattern,
93 !subst(REGCLASS, VR128, Decls.operand))))>;
|
| /external/webkit/Source/JavaScriptCore/jit/ |
| JITCall32_64.cpp | 60 int dst = instruction[1].u.operand;
66 int callee = instruction[1].u.operand;
67 int argCountRegister = instruction[2].u.operand;
68 int registerOffset = instruction[3].u.operand;
93 int callee = instruction[1].u.operand;
109 unsigned dst = currentInstruction[1].u.operand;
121 unsigned result = currentInstruction[1].u.operand;
122 unsigned thisReg = currentInstruction[2].u.operand;
192 int callee = instruction[1].u.operand;
193 int argCount = instruction[2].u.operand;
[all...] |
