| /external/apache-xml/src/main/java/org/apache/xpath/operations/ |
| UnaryOperation.java | 36 /** The operand for the operation.
71 * Set the expression operand for the operation.
74 * @param r The expression operand to which the unary operation will be
84 * Execute the operand and apply the unary operation to the result.
90 * operation to the evaluated operand.
104 * @param right non-null reference to the evaluated right operand.
113 /** @return the operand of unary operation, as an Expression.
|
| Operation.java | 36 /** The left operand expression.
40 /** The right operand expression.
80 * Set the left and right operand expressions for this operation.
83 * @param l The left expression operand.
84 * @param r The right expression operand.
122 * @param left non-null reference to the evaluated left operand.
123 * @param right non-null reference to the evaluated right operand.
135 /** @return the left operand of binary operation, as an Expression.
141 /** @return the right operand of binary operation, as an Expression.
|
| /external/v8/src/ia32/ |
| lithium-gap-resolver-ia32.cc | 92 // cycles in the move graph. We use operand swaps to resolve cycles,
93 // which means that a call to PerformMove could change any source operand
112 // Though PerformMove can change any source operand in the move graph,
118 // only a single incoming edge to an operand, this move must also be
181 int LGapResolver::CountSourceUses(LOperand* operand) {
184 if (!moves_[i].IsEliminated() && moves_[i].source()->Equals(operand)) {
217 // No operand should be the destination for more than one move.
239 void LGapResolver::EnsureRestored(LOperand* operand) {
240 if (operand->IsRegister() && operand->index() == spilled_register_)
[all...] |
| /external/v8/src/mips/ |
| macro-assembler-mips.cc | 51 #define COND_TYPED_ARGS Condition cond, Register r1, const Operand& r2
57 Name(Operand(target), bd); \
61 Name(Operand(target), COND_ARGS, bd); \
68 Name(Operand(target, rmode), bd); \
74 Name(Operand(target, rmode), COND_ARGS, bd); \
121 Jump(Operand(ra), bd);
125 void MacroAssembler::Ret(Condition cond, Register r1, const Operand& r2,
127 Jump(Operand(ra), cond, r1, r2, bd);
140 Register src1, const Operand& src2) {
155 Register src1, const Operand& src2)
[all...] |
| /external/llvm/lib/MC/MCDisassembler/ |
| EDInst.h | 74 /// The order in which operands from the InstInfo's operand information appear
83 /// The operand corresponding to the target, if the instruction is a branch
85 /// The operand corresponding to the source, if the instruction is a move
87 /// The operand corresponding to the target, if the instruction is a move
136 /// the target operand if the instruction is a branch, or -1 otherwise
138 /// moveSourceID - returns the ID of the source operand if the instruction
141 /// moveTargetID - returns the ID of the target operand if the instruction
148 /// getOperand - retrieves an operand from the instruction's operand list by
151 /// @arg operand - A reference whose target is pointed at the operand o
[all...] |
| /external/v8/src/arm/ |
| stub-cache-arm.cc | 65 __ mov(offsets_base_addr, Operand(key_offset));
72 Operand(value_off_addr - key_off_addr));
77 __ bic(scratch2, scratch2, Operand(Code::kFlagsNotUsedInLookup));
78 __ cmp(scratch2, Operand(flags));
85 __ add(offset, offset, Operand(Code::kHeaderSize - kHeapObjectTag));
118 __ tst(scratch0, Operand(kInterceptorOrAccessCheckNeededMask));
123 __ cmp(scratch0, Operand(FIRST_JS_OBJECT_TYPE));
162 __ sub(index, index, Operand(1));
163 __ and_(index, index, Operand(
168 __ add(index, index, Operand(index, LSL, 1)); // index *= 3
[all...] |
| lithium-codegen-arm.cc | 149 __ add(fp, sp, Operand(2 * kPointerSize)); // Adjust FP to point to saved FP.
155 __ mov(r0, Operand(slots));
156 __ mov(r2, Operand(kSlotsZapValue));
160 __ sub(r0, r0, Operand(1), SetCC);
163 __ sub(sp, sp, Operand(slots * kPointerSize));
193 __ mov(r1, Operand(Context::SlotOffset(slot->index())));
198 __ mov(r2, Operand(cp));
199 __ RecordWrite(r2, Operand(r1), r3, r0);
319 __ mov(ip, Operand(static_cast<int32_t>(literal->Number())));
349 Operand LCodeGen::ToOperand(LOperand* op)
[all...] |
| builtins-arm.cc | 70 __ add(r0, r0, Operand(num_extra_args + 1));
130 __ mov(scratch3, Operand(0, RelocInfo::NONE));
137 __ add(scratch1, result, Operand(JSArray::kSize));
142 __ sub(scratch1, scratch1, Operand(kHeapObjectTag));
152 __ mov(scratch3, Operand(Smi::FromInt(initial_capacity)));
212 Operand((JSArray::kSize + FixedArray::kHeaderSize) / kPointerSize));
215 Operand(array_size, ASR, kSmiTagSize));
241 __ add(elements_array_storage, result, Operand(JSArray::kSize));
249 Operand(kHeapObjectTag));
264 Operand(Smi::FromInt(JSArray::kPreallocatedArrayElements))
[all...] |
| full-codegen-arm.cc | 72 __ cmp(reg, Operand(reg));
84 __ cmp(reg, Operand(reg));
145 __ add(fp, sp, Operand(2 * kPointerSize));
181 __ mov(r1, Operand(Context::SlotOffset(slot->index())));
186 __ mov(r2, Operand(cp));
187 __ RecordWrite(r2, Operand(r1), r3, r0);
205 Operand(StandardFrameConstants::kCallerSPOffset + offset));
206 __ mov(r1, Operand(Smi::FromInt(scope()->num_parameters())));
251 __ cmp(sp, Operand(ip));
279 __ mov(r0, Operand(Smi::FromInt(0)))
2329 MemOperand operand = EmitSlotSearch(slot, r1); local
[all...] |
| /external/llvm/include/llvm/ |
| InlineAsm.h | 11 // used as the callee operand of call instructions. InlineAsm's are uniqued
115 /// isEarlyClobber - "&": output operand writes result before inputs are all
116 /// read. This is only ever set for an output operand.
130 /// with the next operand.
133 /// isIndirect - True if this operand is an indirect operand. This means
208 // The first operand is an immediate describing the asm operand, the low
215 Kind_Mem = 6, // Memory operand, "m".
227 /// getFlagWord with information indicating that this input operand is tied
[all...] |
| /external/llvm/utils/TableGen/ |
| AsmWriterInst.h | 31 // This is the name of a routine to call to print the operand.
39 /// isMachineInstrOperand, this is the PrinterMethodName for the operand..
44 /// CGIOpNo - For isMachineInstrOperand, this is the index of the operand in
48 /// MiOpNo - For isMachineInstrOperand, this is the operand number of the
53 /// an operand, specified with syntax like ${opname:modifier}.
81 /// getCode - Return the code that prints this operand.
96 /// specified instruction except for one differing operand, return the
97 /// differing operand number. Otherwise return ~0.
102 // If the last operand was already a literal text string, append this to
103 // it, otherwise add a new operand
[all...] |
| X86RecognizableInstr.h | 124 /// hasFROperands - Returns true if any operand is a FR operand.
127 /// has256BitOperands - Returns true if any operand is a 256-bit SSE operand.
130 /// typeFromString - Translates an operand type from the string provided in
131 /// the LLVM tables to an OperandType for use in the operand specifier.
141 /// 32-bit regardless of the operand size.
145 /// @return - The operand's type.
153 /// the operand specifier.
159 /// @return - The operand's encoding
[all...] |
| PseudoLoweringEmitter.h | 23 enum MapKind { Operand, Imm, Reg };
26 unsigned Operand; // Operand number mapped to.
|
| /external/v8/src/x64/ |
| codegen-x64.cc | 73 __ movsd(Operand(rsp, kPointerSize * 2), xmm1);
74 __ movsd(Operand(rsp, kPointerSize), xmm0);
75 __ fld_d(Operand(rsp, kPointerSize * 2));
76 __ fld_d(Operand(rsp, kPointerSize));
83 // Clear if Illegal Operand or Zero Division exceptions are set.
105 // If Invalid Operand or Zero Division exceptions are set,
112 __ movq(Operand(rsp, kPointerSize), rcx);
113 __ movsd(xmm0, Operand(rsp, kPointerSize));
118 __ fstp_d(Operand(rsp, kPointerSize));
119 __ movsd(xmm0, Operand(rsp, kPointerSize))
[all...] |
| assembler-x64.cc | 213 // Implementation of Operand
215 Operand::Operand(Register base, int32_t disp) : rex_(0) {
234 Operand::Operand(Register base,
255 Operand::Operand(Register index,
266 Operand::Operand(const Operand& operand, int32_t offset)
[all...] |
| lithium-gap-resolver-x64.cc | 87 // cycles in the move graph. We use operand swaps to resolve cycles,
88 // which means that a call to PerformMove could change any source operand
108 // Though PerformMove can change any source operand in the move graph,
114 // only a single incoming edge to an operand, this move must also be
151 // No operand should be the destination for more than one move.
169 // Dispatch on the source and destination operand kinds. Not all
178 Operand dst = cgen_->ToOperand(destination);
183 Operand src = cgen_->ToOperand(source);
189 Operand dst = cgen_->ToOperand(destination);
205 Operand dst = cgen_->ToOperand(destination)
[all...] |
| /external/llvm/lib/Target/SystemZ/ |
| SystemZOperands.td | 224 // A couple of more descriptive operand definitions.
226 def i32i8imm : Operand<i32>;
228 def i32i16imm : Operand<i32>;
230 def i64i32imm : Operand<i64>;
232 def brtarget : Operand<OtherVT>;
235 def u12imm : Operand<i32> {
238 def u12imm64 : Operand<i64> {
243 def s16imm : Operand<i32> {
246 def s16imm64 : Operand<i64> {
250 def u16imm : Operand<i32>
[all...] |
| /external/clang/test/SemaObjC/ |
| conditional-expr-3.m | 54 barP0(cond ? x0 : x1); // expected-warning {{incompatible operand types ('id<P0,P1>' and 'id<P0,P2>')}}
58 barP1(cond ? x0 : x1); // expected-warning {{incompatible operand types ('id<P0,P1>' and 'id<P0,P2>')}}
62 barP2(cond ? x0 : x1); // expected-warning {{incompatible operand types ('id<P0,P1>' and 'id<P0,P2>')}}
|
| /external/clang/test/SemaObjCXX/ |
| conditional-expr.mm | 54 barP0(cond ? x0 : x1); // expected-warning {{incompatible operand types ('id<P0,P1>' and 'id<P0,P2>')}}
58 barP1(cond ? x0 : x1); // expected-warning {{incompatible operand types ('id<P0,P1>' and 'id<P0,P2>')}}
62 barP2(cond ? x0 : x1); // expected-warning {{incompatible operand types ('id<P0,P1>' and 'id<P0,P2>')}}
|
| /external/llvm/lib/Target/Sparc/ |
| SparcAsmPrinter.cpp | 105 llvm_unreachable("<unknown operand type>");
114 // If this is an ADD operand, emit it like normal operands.
141 std::string operand = ""; local
144 default: assert(0 && "Operand is not a register ");
147 "Operand is not a physical register ");
150 operand = "%" + LowercaseString(getRegisterName(MO.getReg()));
162 << ")), " << operand << '\n' ; local
165 O << "\tor\t" << operand
167 << ")), " << operand << '\n'; local
168 O << "\tadd\t" << operand << ", %o7, " << operand << '\n'; local
[all...] |
| /external/srec/srec/include/ |
| log_tabl.h | 40 int log_lookup(log_table_info *logtab, int operand, int shift);
41 int inv_log_lookup(log_table_info *logtab, int operand);
43 int integer_square_root(int operand);
|
| /dalvik/vm/compiler/template/armv5te-vfp/ |
| TEMPLATE_SQRT_DOUBLE_VFP.S | 19 fmrrd r0, r1, d0 @ reload orig operand
|
| /external/llvm/test/CodeGen/Blackfin/ |
| cmp64.ll | 3 ; This test tries to use a JustCC register as a data operand for MOVEcc. It
|
| /external/llvm/test/CodeGen/X86/ |
| 2011-06-14-PreschedRegalias.ll | 4 ; mul wants an operand in AL, but call clobbers it.
|
| /external/llvm/test/MC/ARM/ |
| thumb-diagnostics.s | 28 @ CHECK-ERRORS: error: invalid operand for instruction
31 @ CHECK-ERRORS: error: invalid operand for instruction
38 error: invalid operand for instruction
41 error: invalid operand for instruction
84 @ CHECK-ERRORS: error: invalid operand for instruction
87 @ CHECK-ERRORS: error: invalid operand for instruction
115 @ CHECK-ERRORS: error: invalid operand for instruction
128 @ CHECK-ERRORS: error: invalid operand for instruction
131 @ CHECK-ERRORS: error: invalid operand for instruction
|
