1 //===--- Targets.cpp - Implement -arch option and targets -----------------===// 2 // 3 // The LLVM Compiler Infrastructure 4 // 5 // This file is distributed under the University of Illinois Open Source 6 // License. See LICENSE.TXT for details. 7 // 8 //===----------------------------------------------------------------------===// 9 // 10 // This file implements construction of a TargetInfo object from a 11 // target triple. 12 // 13 //===----------------------------------------------------------------------===// 14 15 #include "clang/Basic/TargetInfo.h" 16 #include "clang/Basic/Builtins.h" 17 #include "clang/Basic/Diagnostic.h" 18 #include "clang/Basic/LangOptions.h" 19 #include "clang/Basic/MacroBuilder.h" 20 #include "clang/Basic/TargetBuiltins.h" 21 #include "clang/Basic/TargetOptions.h" 22 #include "llvm/ADT/APFloat.h" 23 #include "llvm/ADT/OwningPtr.h" 24 #include "llvm/ADT/STLExtras.h" 25 #include "llvm/ADT/StringRef.h" 26 #include "llvm/ADT/StringSwitch.h" 27 #include "llvm/ADT/Triple.h" 28 #include "llvm/MC/MCSectionMachO.h" 29 #include "llvm/Support/ErrorHandling.h" 30 #include "llvm/Type.h" 31 #include <algorithm> 32 using namespace clang; 33 34 //===----------------------------------------------------------------------===// 35 // Common code shared among targets. 36 //===----------------------------------------------------------------------===// 37 38 /// DefineStd - Define a macro name and standard variants. For example if 39 /// MacroName is "unix", then this will define "__unix", "__unix__", and "unix" 40 /// when in GNU mode. 41 static void DefineStd(MacroBuilder &Builder, StringRef MacroName, 42 const LangOptions &Opts) { 43 assert(MacroName[0] != '_' && "Identifier should be in the user's namespace"); 44 45 // If in GNU mode (e.g. -std=gnu99 but not -std=c99) define the raw identifier 46 // in the user's namespace. 47 if (Opts.GNUMode) 48 Builder.defineMacro(MacroName); 49 50 // Define __unix. 51 Builder.defineMacro("__" + MacroName); 52 53 // Define __unix__. 54 Builder.defineMacro("__" + MacroName + "__"); 55 } 56 57 //===----------------------------------------------------------------------===// 58 // Defines specific to certain operating systems. 59 //===----------------------------------------------------------------------===// 60 61 namespace { 62 template<typename TgtInfo> 63 class OSTargetInfo : public TgtInfo { 64 protected: 65 virtual void getOSDefines(const LangOptions &Opts, const llvm::Triple &Triple, 66 MacroBuilder &Builder) const=0; 67 public: 68 OSTargetInfo(const std::string& triple) : TgtInfo(triple) {} 69 virtual void getTargetDefines(const LangOptions &Opts, 70 MacroBuilder &Builder) const { 71 TgtInfo::getTargetDefines(Opts, Builder); 72 getOSDefines(Opts, TgtInfo::getTriple(), Builder); 73 } 74 75 }; 76 } // end anonymous namespace 77 78 79 static void getDarwinDefines(MacroBuilder &Builder, const LangOptions &Opts, 80 const llvm::Triple &Triple, 81 StringRef &PlatformName, 82 VersionTuple &PlatformMinVersion) { 83 Builder.defineMacro("__APPLE_CC__", "5621"); 84 Builder.defineMacro("__APPLE__"); 85 Builder.defineMacro("__MACH__"); 86 Builder.defineMacro("OBJC_NEW_PROPERTIES"); 87 88 if (!Opts.ObjCAutoRefCount) { 89 // __weak is always defined, for use in blocks and with objc pointers. 90 Builder.defineMacro("__weak", "__attribute__((objc_gc(weak)))"); 91 92 // Darwin defines __strong even in C mode (just to nothing). 93 if (Opts.getGC() != LangOptions::NonGC) 94 Builder.defineMacro("__strong", "__attribute__((objc_gc(strong)))"); 95 else 96 Builder.defineMacro("__strong", ""); 97 98 // __unsafe_unretained is defined to nothing in non-ARC mode. We even 99 // allow this in C, since one might have block pointers in structs that 100 // are used in pure C code and in Objective-C ARC. 101 Builder.defineMacro("__unsafe_unretained", ""); 102 103 // The Objective-C bridged cast keywords are defined to nothing in non-ARC 104 // mode; then they become normal, C-style casts. 105 Builder.defineMacro("__bridge", ""); 106 Builder.defineMacro("__bridge_transfer", ""); 107 Builder.defineMacro("__bridge_retained", ""); 108 Builder.defineMacro("__bridge_retain", ""); 109 } 110 111 if (Opts.Static) 112 Builder.defineMacro("__STATIC__"); 113 else 114 Builder.defineMacro("__DYNAMIC__"); 115 116 if (Opts.POSIXThreads) 117 Builder.defineMacro("_REENTRANT"); 118 119 // Get the platform type and version number from the triple. 120 unsigned Maj, Min, Rev; 121 122 // If no version was given, default to to 10.4.0, for simplifying tests. 123 if (Triple.getOSName() == "darwin" || Triple.getOSName() == "osx") { 124 PlatformName = "macosx"; 125 Min = Rev = 0; 126 Maj = 8; 127 } else { 128 // Otherwise, honor all three triple forms ("-darwinNNN[-iphoneos]", 129 // "-osxNNN", and "-iosNNN"). 130 131 if (Triple.getOS() == llvm::Triple::Darwin) { 132 // For historical reasons that make little sense, the version passed here 133 // is the "darwin" version, which drops the 10 and offsets by 4. 134 Triple.getOSVersion(Maj, Min, Rev); 135 136 if (Triple.getEnvironmentName() == "iphoneos") { 137 PlatformName = "ios"; 138 } else { 139 PlatformName = "macosx"; 140 Rev = Min; 141 Min = Maj - 4; 142 Maj = 10; 143 } 144 } else { 145 Triple.getOSVersion(Maj, Min, Rev); 146 PlatformName = llvm::Triple::getOSTypeName(Triple.getOS()); 147 } 148 } 149 150 // If -ccc-host-triple arch-pc-win32-macho option specified, we're 151 // generating code for Win32 ABI. No need to emit 152 // __ENVIRONMENT_XX_OS_VERSION_MIN_REQUIRED__. 153 if (PlatformName == "win32") { 154 PlatformMinVersion = VersionTuple(Maj, Min, Rev); 155 return; 156 } 157 158 // Set the appropriate OS version define. 159 if (PlatformName == "ios") { 160 assert(Maj < 10 && Min < 100 && Rev < 100 && "Invalid version!"); 161 char Str[6]; 162 Str[0] = '0' + Maj; 163 Str[1] = '0' + (Min / 10); 164 Str[2] = '0' + (Min % 10); 165 Str[3] = '0' + (Rev / 10); 166 Str[4] = '0' + (Rev % 10); 167 Str[5] = '\0'; 168 Builder.defineMacro("__ENVIRONMENT_IPHONE_OS_VERSION_MIN_REQUIRED__", Str); 169 } else { 170 // Note that the Driver allows versions which aren't representable in the 171 // define (because we only get a single digit for the minor and micro 172 // revision numbers). So, we limit them to the maximum representable 173 // version. 174 assert(Triple.getEnvironmentName().empty() && "Invalid environment!"); 175 assert(Maj < 100 && Min < 100 && Rev < 100 && "Invalid version!"); 176 char Str[5]; 177 Str[0] = '0' + (Maj / 10); 178 Str[1] = '0' + (Maj % 10); 179 Str[2] = '0' + std::min(Min, 9U); 180 Str[3] = '0' + std::min(Rev, 9U); 181 Str[4] = '\0'; 182 Builder.defineMacro("__ENVIRONMENT_MAC_OS_X_VERSION_MIN_REQUIRED__", Str); 183 } 184 185 PlatformMinVersion = VersionTuple(Maj, Min, Rev); 186 } 187 188 namespace { 189 template<typename Target> 190 class DarwinTargetInfo : public OSTargetInfo<Target> { 191 protected: 192 virtual void getOSDefines(const LangOptions &Opts, const llvm::Triple &Triple, 193 MacroBuilder &Builder) const { 194 getDarwinDefines(Builder, Opts, Triple, this->PlatformName, 195 this->PlatformMinVersion); 196 } 197 198 public: 199 DarwinTargetInfo(const std::string& triple) : 200 OSTargetInfo<Target>(triple) { 201 llvm::Triple T = llvm::Triple(triple); 202 this->TLSSupported = T.isMacOSX() && !T.isMacOSXVersionLT(10,7); 203 this->MCountName = "\01mcount"; 204 } 205 206 virtual std::string isValidSectionSpecifier(StringRef SR) const { 207 // Let MCSectionMachO validate this. 208 StringRef Segment, Section; 209 unsigned TAA, StubSize; 210 bool HasTAA; 211 return llvm::MCSectionMachO::ParseSectionSpecifier(SR, Segment, Section, 212 TAA, HasTAA, StubSize); 213 } 214 215 virtual const char *getStaticInitSectionSpecifier() const { 216 // FIXME: We should return 0 when building kexts. 217 return "__TEXT,__StaticInit,regular,pure_instructions"; 218 } 219 220 }; 221 222 223 // DragonFlyBSD Target 224 template<typename Target> 225 class DragonFlyBSDTargetInfo : public OSTargetInfo<Target> { 226 protected: 227 virtual void getOSDefines(const LangOptions &Opts, const llvm::Triple &Triple, 228 MacroBuilder &Builder) const { 229 // DragonFly defines; list based off of gcc output 230 Builder.defineMacro("__DragonFly__"); 231 Builder.defineMacro("__DragonFly_cc_version", "100001"); 232 Builder.defineMacro("__ELF__"); 233 Builder.defineMacro("__KPRINTF_ATTRIBUTE__"); 234 Builder.defineMacro("__tune_i386__"); 235 DefineStd(Builder, "unix", Opts); 236 } 237 public: 238 DragonFlyBSDTargetInfo(const std::string &triple) 239 : OSTargetInfo<Target>(triple) {} 240 }; 241 242 // FreeBSD Target 243 template<typename Target> 244 class FreeBSDTargetInfo : public OSTargetInfo<Target> { 245 protected: 246 virtual void getOSDefines(const LangOptions &Opts, const llvm::Triple &Triple, 247 MacroBuilder &Builder) const { 248 // FreeBSD defines; list based off of gcc output 249 250 unsigned Release = Triple.getOSMajorVersion(); 251 if (Release == 0U) 252 Release = 8; 253 254 Builder.defineMacro("__FreeBSD__", Twine(Release)); 255 Builder.defineMacro("__FreeBSD_cc_version", Twine(Release * 100000U + 1U)); 256 Builder.defineMacro("__KPRINTF_ATTRIBUTE__"); 257 DefineStd(Builder, "unix", Opts); 258 Builder.defineMacro("__ELF__"); 259 } 260 public: 261 FreeBSDTargetInfo(const std::string &triple) 262 : OSTargetInfo<Target>(triple) { 263 this->UserLabelPrefix = ""; 264 265 llvm::Triple Triple(triple); 266 switch (Triple.getArch()) { 267 default: 268 case llvm::Triple::x86: 269 case llvm::Triple::x86_64: 270 this->MCountName = ".mcount"; 271 break; 272 case llvm::Triple::mips: 273 case llvm::Triple::mipsel: 274 case llvm::Triple::ppc: 275 case llvm::Triple::ppc64: 276 this->MCountName = "_mcount"; 277 break; 278 case llvm::Triple::arm: 279 this->MCountName = "__mcount"; 280 break; 281 } 282 283 } 284 }; 285 286 // Minix Target 287 template<typename Target> 288 class MinixTargetInfo : public OSTargetInfo<Target> { 289 protected: 290 virtual void getOSDefines(const LangOptions &Opts, const llvm::Triple &Triple, 291 MacroBuilder &Builder) const { 292 // Minix defines 293 294 Builder.defineMacro("__minix", "3"); 295 Builder.defineMacro("_EM_WSIZE", "4"); 296 Builder.defineMacro("_EM_PSIZE", "4"); 297 Builder.defineMacro("_EM_SSIZE", "2"); 298 Builder.defineMacro("_EM_LSIZE", "4"); 299 Builder.defineMacro("_EM_FSIZE", "4"); 300 Builder.defineMacro("_EM_DSIZE", "8"); 301 DefineStd(Builder, "unix", Opts); 302 } 303 public: 304 MinixTargetInfo(const std::string &triple) 305 : OSTargetInfo<Target>(triple) { 306 this->UserLabelPrefix = ""; 307 } 308 }; 309 310 // Linux target 311 template<typename Target> 312 class LinuxTargetInfo : public OSTargetInfo<Target> { 313 protected: 314 virtual void getOSDefines(const LangOptions &Opts, const llvm::Triple &Triple, 315 MacroBuilder &Builder) const { 316 // Linux defines; list based off of gcc output 317 DefineStd(Builder, "unix", Opts); 318 DefineStd(Builder, "linux", Opts); 319 Builder.defineMacro("__gnu_linux__"); 320 Builder.defineMacro("__ELF__"); 321 if (Opts.POSIXThreads) 322 Builder.defineMacro("_REENTRANT"); 323 if (Opts.CPlusPlus) 324 Builder.defineMacro("_GNU_SOURCE"); 325 } 326 public: 327 LinuxTargetInfo(const std::string& triple) 328 : OSTargetInfo<Target>(triple) { 329 this->UserLabelPrefix = ""; 330 this->WIntType = TargetInfo::UnsignedInt; 331 } 332 333 virtual const char *getStaticInitSectionSpecifier() const { 334 return ".text.startup"; 335 } 336 }; 337 338 // NetBSD Target 339 template<typename Target> 340 class NetBSDTargetInfo : public OSTargetInfo<Target> { 341 protected: 342 virtual void getOSDefines(const LangOptions &Opts, const llvm::Triple &Triple, 343 MacroBuilder &Builder) const { 344 // NetBSD defines; list based off of gcc output 345 Builder.defineMacro("__NetBSD__"); 346 Builder.defineMacro("__unix__"); 347 Builder.defineMacro("__ELF__"); 348 if (Opts.POSIXThreads) 349 Builder.defineMacro("_POSIX_THREADS"); 350 } 351 public: 352 NetBSDTargetInfo(const std::string &triple) 353 : OSTargetInfo<Target>(triple) { 354 this->UserLabelPrefix = ""; 355 } 356 }; 357 358 // OpenBSD Target 359 template<typename Target> 360 class OpenBSDTargetInfo : public OSTargetInfo<Target> { 361 protected: 362 virtual void getOSDefines(const LangOptions &Opts, const llvm::Triple &Triple, 363 MacroBuilder &Builder) const { 364 // OpenBSD defines; list based off of gcc output 365 366 Builder.defineMacro("__OpenBSD__"); 367 DefineStd(Builder, "unix", Opts); 368 Builder.defineMacro("__ELF__"); 369 if (Opts.POSIXThreads) 370 Builder.defineMacro("_POSIX_THREADS"); 371 } 372 public: 373 OpenBSDTargetInfo(const std::string &triple) 374 : OSTargetInfo<Target>(triple) {} 375 }; 376 377 // PSP Target 378 template<typename Target> 379 class PSPTargetInfo : public OSTargetInfo<Target> { 380 protected: 381 virtual void getOSDefines(const LangOptions &Opts, const llvm::Triple &Triple, 382 MacroBuilder &Builder) const { 383 // PSP defines; list based on the output of the pspdev gcc toolchain. 384 Builder.defineMacro("PSP"); 385 Builder.defineMacro("_PSP"); 386 Builder.defineMacro("__psp__"); 387 Builder.defineMacro("__ELF__"); 388 } 389 public: 390 PSPTargetInfo(const std::string& triple) 391 : OSTargetInfo<Target>(triple) { 392 this->UserLabelPrefix = ""; 393 } 394 }; 395 396 // PS3 PPU Target 397 template<typename Target> 398 class PS3PPUTargetInfo : public OSTargetInfo<Target> { 399 protected: 400 virtual void getOSDefines(const LangOptions &Opts, const llvm::Triple &Triple, 401 MacroBuilder &Builder) const { 402 // PS3 PPU defines. 403 Builder.defineMacro("__PPC__"); 404 Builder.defineMacro("__PPU__"); 405 Builder.defineMacro("__CELLOS_LV2__"); 406 Builder.defineMacro("__ELF__"); 407 Builder.defineMacro("__LP32__"); 408 Builder.defineMacro("_ARCH_PPC64"); 409 Builder.defineMacro("__powerpc64__"); 410 } 411 public: 412 PS3PPUTargetInfo(const std::string& triple) 413 : OSTargetInfo<Target>(triple) { 414 this->UserLabelPrefix = ""; 415 this->LongWidth = this->LongAlign = this->PointerWidth = this->PointerAlign = 32; 416 this->IntMaxType = TargetInfo::SignedLongLong; 417 this->UIntMaxType = TargetInfo::UnsignedLongLong; 418 this->Int64Type = TargetInfo::SignedLongLong; 419 this->SizeType = TargetInfo::UnsignedInt; 420 this->DescriptionString = "E-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-" 421 "i64:64:64-f32:32:32-f64:64:64-v128:128:128-n32"; 422 } 423 }; 424 425 // FIXME: Need a real SPU target. 426 // PS3 SPU Target 427 template<typename Target> 428 class PS3SPUTargetInfo : public OSTargetInfo<Target> { 429 protected: 430 virtual void getOSDefines(const LangOptions &Opts, const llvm::Triple &Triple, 431 MacroBuilder &Builder) const { 432 // PS3 PPU defines. 433 Builder.defineMacro("__SPU__"); 434 Builder.defineMacro("__ELF__"); 435 } 436 public: 437 PS3SPUTargetInfo(const std::string& triple) 438 : OSTargetInfo<Target>(triple) { 439 this->UserLabelPrefix = ""; 440 } 441 }; 442 443 // AuroraUX target 444 template<typename Target> 445 class AuroraUXTargetInfo : public OSTargetInfo<Target> { 446 protected: 447 virtual void getOSDefines(const LangOptions &Opts, const llvm::Triple &Triple, 448 MacroBuilder &Builder) const { 449 DefineStd(Builder, "sun", Opts); 450 DefineStd(Builder, "unix", Opts); 451 Builder.defineMacro("__ELF__"); 452 Builder.defineMacro("__svr4__"); 453 Builder.defineMacro("__SVR4"); 454 } 455 public: 456 AuroraUXTargetInfo(const std::string& triple) 457 : OSTargetInfo<Target>(triple) { 458 this->UserLabelPrefix = ""; 459 this->WCharType = this->SignedLong; 460 // FIXME: WIntType should be SignedLong 461 } 462 }; 463 464 // Solaris target 465 template<typename Target> 466 class SolarisTargetInfo : public OSTargetInfo<Target> { 467 protected: 468 virtual void getOSDefines(const LangOptions &Opts, const llvm::Triple &Triple, 469 MacroBuilder &Builder) const { 470 DefineStd(Builder, "sun", Opts); 471 DefineStd(Builder, "unix", Opts); 472 Builder.defineMacro("__ELF__"); 473 Builder.defineMacro("__svr4__"); 474 Builder.defineMacro("__SVR4"); 475 } 476 public: 477 SolarisTargetInfo(const std::string& triple) 478 : OSTargetInfo<Target>(triple) { 479 this->UserLabelPrefix = ""; 480 this->WCharType = this->SignedLong; 481 // FIXME: WIntType should be SignedLong 482 } 483 }; 484 485 // Windows target 486 template<typename Target> 487 class WindowsTargetInfo : public OSTargetInfo<Target> { 488 protected: 489 virtual void getOSDefines(const LangOptions &Opts, const llvm::Triple &Triple, 490 MacroBuilder &Builder) const { 491 Builder.defineMacro("_WIN32"); 492 } 493 void getVisualStudioDefines(const LangOptions &Opts, 494 MacroBuilder &Builder) const { 495 if (Opts.CPlusPlus) { 496 if (Opts.RTTI) 497 Builder.defineMacro("_CPPRTTI"); 498 499 if (Opts.Exceptions) 500 Builder.defineMacro("_CPPUNWIND"); 501 } 502 503 if (!Opts.CharIsSigned) 504 Builder.defineMacro("_CHAR_UNSIGNED"); 505 506 // FIXME: POSIXThreads isn't exactly the option this should be defined for, 507 // but it works for now. 508 if (Opts.POSIXThreads) 509 Builder.defineMacro("_MT"); 510 511 if (Opts.MSCVersion != 0) 512 Builder.defineMacro("_MSC_VER", Twine(Opts.MSCVersion)); 513 514 if (Opts.MicrosoftExt) { 515 Builder.defineMacro("_MSC_EXTENSIONS"); 516 517 if (Opts.CPlusPlus0x) { 518 Builder.defineMacro("_RVALUE_REFERENCES_V2_SUPPORTED"); 519 Builder.defineMacro("_RVALUE_REFERENCES_SUPPORTED"); 520 Builder.defineMacro("_NATIVE_NULLPTR_SUPPORTED"); 521 } 522 } 523 524 Builder.defineMacro("_INTEGRAL_MAX_BITS", "64"); 525 } 526 527 public: 528 WindowsTargetInfo(const std::string &triple) 529 : OSTargetInfo<Target>(triple) {} 530 }; 531 532 } // end anonymous namespace. 533 534 //===----------------------------------------------------------------------===// 535 // Specific target implementations. 536 //===----------------------------------------------------------------------===// 537 538 namespace { 539 // PPC abstract base class 540 class PPCTargetInfo : public TargetInfo { 541 static const Builtin::Info BuiltinInfo[]; 542 static const char * const GCCRegNames[]; 543 static const TargetInfo::GCCRegAlias GCCRegAliases[]; 544 public: 545 PPCTargetInfo(const std::string& triple) : TargetInfo(triple) {} 546 547 virtual void getTargetBuiltins(const Builtin::Info *&Records, 548 unsigned &NumRecords) const { 549 Records = BuiltinInfo; 550 NumRecords = clang::PPC::LastTSBuiltin-Builtin::FirstTSBuiltin; 551 } 552 553 virtual void getTargetDefines(const LangOptions &Opts, 554 MacroBuilder &Builder) const; 555 556 virtual void getGCCRegNames(const char * const *&Names, 557 unsigned &NumNames) const; 558 virtual void getGCCRegAliases(const GCCRegAlias *&Aliases, 559 unsigned &NumAliases) const; 560 virtual bool validateAsmConstraint(const char *&Name, 561 TargetInfo::ConstraintInfo &Info) const { 562 switch (*Name) { 563 default: return false; 564 case 'O': // Zero 565 break; 566 case 'b': // Base register 567 case 'f': // Floating point register 568 Info.setAllowsRegister(); 569 break; 570 // FIXME: The following are added to allow parsing. 571 // I just took a guess at what the actions should be. 572 // Also, is more specific checking needed? I.e. specific registers? 573 case 'd': // Floating point register (containing 64-bit value) 574 case 'v': // Altivec vector register 575 Info.setAllowsRegister(); 576 break; 577 case 'w': 578 switch (Name[1]) { 579 case 'd':// VSX vector register to hold vector double data 580 case 'f':// VSX vector register to hold vector float data 581 case 's':// VSX vector register to hold scalar float data 582 case 'a':// Any VSX register 583 break; 584 default: 585 return false; 586 } 587 Info.setAllowsRegister(); 588 Name++; // Skip over 'w'. 589 break; 590 case 'h': // `MQ', `CTR', or `LINK' register 591 case 'q': // `MQ' register 592 case 'c': // `CTR' register 593 case 'l': // `LINK' register 594 case 'x': // `CR' register (condition register) number 0 595 case 'y': // `CR' register (condition register) 596 case 'z': // `XER[CA]' carry bit (part of the XER register) 597 Info.setAllowsRegister(); 598 break; 599 case 'I': // Signed 16-bit constant 600 case 'J': // Unsigned 16-bit constant shifted left 16 bits 601 // (use `L' instead for SImode constants) 602 case 'K': // Unsigned 16-bit constant 603 case 'L': // Signed 16-bit constant shifted left 16 bits 604 case 'M': // Constant larger than 31 605 case 'N': // Exact power of 2 606 case 'P': // Constant whose negation is a signed 16-bit constant 607 case 'G': // Floating point constant that can be loaded into a 608 // register with one instruction per word 609 case 'H': // Integer/Floating point constant that can be loaded 610 // into a register using three instructions 611 break; 612 case 'm': // Memory operand. Note that on PowerPC targets, m can 613 // include addresses that update the base register. It 614 // is therefore only safe to use `m' in an asm statement 615 // if that asm statement accesses the operand exactly once. 616 // The asm statement must also use `%U<opno>' as a 617 // placeholder for the "update" flag in the corresponding 618 // load or store instruction. For example: 619 // asm ("st%U0 %1,%0" : "=m" (mem) : "r" (val)); 620 // is correct but: 621 // asm ("st %1,%0" : "=m" (mem) : "r" (val)); 622 // is not. Use es rather than m if you don't want the base 623 // register to be updated. 624 case 'e': 625 if (Name[1] != 's') 626 return false; 627 // es: A "stable" memory operand; that is, one which does not 628 // include any automodification of the base register. Unlike 629 // `m', this constraint can be used in asm statements that 630 // might access the operand several times, or that might not 631 // access it at all. 632 Info.setAllowsMemory(); 633 Name++; // Skip over 'e'. 634 break; 635 case 'Q': // Memory operand that is an offset from a register (it is 636 // usually better to use `m' or `es' in asm statements) 637 case 'Z': // Memory operand that is an indexed or indirect from a 638 // register (it is usually better to use `m' or `es' in 639 // asm statements) 640 Info.setAllowsMemory(); 641 Info.setAllowsRegister(); 642 break; 643 case 'R': // AIX TOC entry 644 case 'a': // Address operand that is an indexed or indirect from a 645 // register (`p' is preferable for asm statements) 646 case 'S': // Constant suitable as a 64-bit mask operand 647 case 'T': // Constant suitable as a 32-bit mask operand 648 case 'U': // System V Release 4 small data area reference 649 case 't': // AND masks that can be performed by two rldic{l, r} 650 // instructions 651 case 'W': // Vector constant that does not require memory 652 case 'j': // Vector constant that is all zeros. 653 break; 654 // End FIXME. 655 } 656 return true; 657 } 658 virtual const char *getClobbers() const { 659 return ""; 660 } 661 }; 662 663 const Builtin::Info PPCTargetInfo::BuiltinInfo[] = { 664 #define BUILTIN(ID, TYPE, ATTRS) { #ID, TYPE, ATTRS, 0, ALL_LANGUAGES }, 665 #define LIBBUILTIN(ID, TYPE, ATTRS, HEADER) { #ID, TYPE, ATTRS, HEADER,\ 666 ALL_LANGUAGES }, 667 #include "clang/Basic/BuiltinsPPC.def" 668 }; 669 670 671 /// PPCTargetInfo::getTargetDefines - Return a set of the PowerPC-specific 672 /// #defines that are not tied to a specific subtarget. 673 void PPCTargetInfo::getTargetDefines(const LangOptions &Opts, 674 MacroBuilder &Builder) const { 675 // Target identification. 676 Builder.defineMacro("__ppc__"); 677 Builder.defineMacro("_ARCH_PPC"); 678 Builder.defineMacro("__powerpc__"); 679 Builder.defineMacro("__POWERPC__"); 680 if (PointerWidth == 64) { 681 Builder.defineMacro("_ARCH_PPC64"); 682 Builder.defineMacro("_LP64"); 683 Builder.defineMacro("__LP64__"); 684 Builder.defineMacro("__powerpc64__"); 685 Builder.defineMacro("__ppc64__"); 686 } else { 687 Builder.defineMacro("__ppc__"); 688 } 689 690 // Target properties. 691 if (getTriple().getOS() != llvm::Triple::NetBSD) 692 Builder.defineMacro("_BIG_ENDIAN"); 693 Builder.defineMacro("__BIG_ENDIAN__"); 694 695 // Subtarget options. 696 Builder.defineMacro("__NATURAL_ALIGNMENT__"); 697 Builder.defineMacro("__REGISTER_PREFIX__", ""); 698 699 // FIXME: Should be controlled by command line option. 700 Builder.defineMacro("__LONG_DOUBLE_128__"); 701 702 if (Opts.AltiVec) { 703 Builder.defineMacro("__VEC__", "10206"); 704 Builder.defineMacro("__ALTIVEC__"); 705 } 706 } 707 708 709 const char * const PPCTargetInfo::GCCRegNames[] = { 710 "r0", "r1", "r2", "r3", "r4", "r5", "r6", "r7", 711 "r8", "r9", "r10", "r11", "r12", "r13", "r14", "r15", 712 "r16", "r17", "r18", "r19", "r20", "r21", "r22", "r23", 713 "r24", "r25", "r26", "r27", "r28", "r29", "r30", "r31", 714 "f0", "f1", "f2", "f3", "f4", "f5", "f6", "f7", 715 "f8", "f9", "f10", "f11", "f12", "f13", "f14", "f15", 716 "f16", "f17", "f18", "f19", "f20", "f21", "f22", "f23", 717 "f24", "f25", "f26", "f27", "f28", "f29", "f30", "f31", 718 "mq", "lr", "ctr", "ap", 719 "cr0", "cr1", "cr2", "cr3", "cr4", "cr5", "cr6", "cr7", 720 "xer", 721 "v0", "v1", "v2", "v3", "v4", "v5", "v6", "v7", 722 "v8", "v9", "v10", "v11", "v12", "v13", "v14", "v15", 723 "v16", "v17", "v18", "v19", "v20", "v21", "v22", "v23", 724 "v24", "v25", "v26", "v27", "v28", "v29", "v30", "v31", 725 "vrsave", "vscr", 726 "spe_acc", "spefscr", 727 "sfp" 728 }; 729 730 void PPCTargetInfo::getGCCRegNames(const char * const *&Names, 731 unsigned &NumNames) const { 732 Names = GCCRegNames; 733 NumNames = llvm::array_lengthof(GCCRegNames); 734 } 735 736 const TargetInfo::GCCRegAlias PPCTargetInfo::GCCRegAliases[] = { 737 // While some of these aliases do map to different registers 738 // they still share the same register name. 739 { { "0" }, "r0" }, 740 { { "1"}, "r1" }, 741 { { "2" }, "r2" }, 742 { { "3" }, "r3" }, 743 { { "4" }, "r4" }, 744 { { "5" }, "r5" }, 745 { { "6" }, "r6" }, 746 { { "7" }, "r7" }, 747 { { "8" }, "r8" }, 748 { { "9" }, "r9" }, 749 { { "10" }, "r10" }, 750 { { "11" }, "r11" }, 751 { { "12" }, "r12" }, 752 { { "13" }, "r13" }, 753 { { "14" }, "r14" }, 754 { { "15" }, "r15" }, 755 { { "16" }, "r16" }, 756 { { "17" }, "r17" }, 757 { { "18" }, "r18" }, 758 { { "19" }, "r19" }, 759 { { "20" }, "r20" }, 760 { { "21" }, "r21" }, 761 { { "22" }, "r22" }, 762 { { "23" }, "r23" }, 763 { { "24" }, "r24" }, 764 { { "25" }, "r25" }, 765 { { "26" }, "r26" }, 766 { { "27" }, "r27" }, 767 { { "28" }, "r28" }, 768 { { "29" }, "r29" }, 769 { { "30" }, "r30" }, 770 { { "31" }, "r31" }, 771 { { "fr0" }, "f0" }, 772 { { "fr1" }, "f1" }, 773 { { "fr2" }, "f2" }, 774 { { "fr3" }, "f3" }, 775 { { "fr4" }, "f4" }, 776 { { "fr5" }, "f5" }, 777 { { "fr6" }, "f6" }, 778 { { "fr7" }, "f7" }, 779 { { "fr8" }, "f8" }, 780 { { "fr9" }, "f9" }, 781 { { "fr10" }, "f10" }, 782 { { "fr11" }, "f11" }, 783 { { "fr12" }, "f12" }, 784 { { "fr13" }, "f13" }, 785 { { "fr14" }, "f14" }, 786 { { "fr15" }, "f15" }, 787 { { "fr16" }, "f16" }, 788 { { "fr17" }, "f17" }, 789 { { "fr18" }, "f18" }, 790 { { "fr19" }, "f19" }, 791 { { "fr20" }, "f20" }, 792 { { "fr21" }, "f21" }, 793 { { "fr22" }, "f22" }, 794 { { "fr23" }, "f23" }, 795 { { "fr24" }, "f24" }, 796 { { "fr25" }, "f25" }, 797 { { "fr26" }, "f26" }, 798 { { "fr27" }, "f27" }, 799 { { "fr28" }, "f28" }, 800 { { "fr29" }, "f29" }, 801 { { "fr30" }, "f30" }, 802 { { "fr31" }, "f31" }, 803 { { "cc" }, "cr0" }, 804 }; 805 806 void PPCTargetInfo::getGCCRegAliases(const GCCRegAlias *&Aliases, 807 unsigned &NumAliases) const { 808 Aliases = GCCRegAliases; 809 NumAliases = llvm::array_lengthof(GCCRegAliases); 810 } 811 } // end anonymous namespace. 812 813 namespace { 814 class PPC32TargetInfo : public PPCTargetInfo { 815 public: 816 PPC32TargetInfo(const std::string &triple) : PPCTargetInfo(triple) { 817 DescriptionString = "E-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-" 818 "i64:64:64-f32:32:32-f64:64:64-v128:128:128-n32"; 819 820 switch (getTriple().getOS()) { 821 case llvm::Triple::FreeBSD: 822 case llvm::Triple::NetBSD: 823 SizeType = UnsignedInt; 824 break; 825 default: 826 break; 827 } 828 } 829 830 virtual const char *getVAListDeclaration() const { 831 // This is the ELF definition, and is overridden by the Darwin sub-target 832 return "typedef struct __va_list_tag {" 833 " unsigned char gpr;" 834 " unsigned char fpr;" 835 " unsigned short reserved;" 836 " void* overflow_arg_area;" 837 " void* reg_save_area;" 838 "} __builtin_va_list[1];"; 839 } 840 }; 841 } // end anonymous namespace. 842 843 namespace { 844 class PPC64TargetInfo : public PPCTargetInfo { 845 public: 846 PPC64TargetInfo(const std::string& triple) : PPCTargetInfo(triple) { 847 LongWidth = LongAlign = PointerWidth = PointerAlign = 64; 848 IntMaxType = SignedLong; 849 UIntMaxType = UnsignedLong; 850 Int64Type = SignedLong; 851 DescriptionString = "E-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-" 852 "i64:64:64-f32:32:32-f64:64:64-v128:128:128-n32:64"; 853 } 854 virtual const char *getVAListDeclaration() const { 855 return "typedef char* __builtin_va_list;"; 856 } 857 }; 858 } // end anonymous namespace. 859 860 861 namespace { 862 class DarwinPPC32TargetInfo : 863 public DarwinTargetInfo<PPC32TargetInfo> { 864 public: 865 DarwinPPC32TargetInfo(const std::string& triple) 866 : DarwinTargetInfo<PPC32TargetInfo>(triple) { 867 HasAlignMac68kSupport = true; 868 BoolWidth = BoolAlign = 32; //XXX support -mone-byte-bool? 869 } 870 virtual const char *getVAListDeclaration() const { 871 return "typedef char* __builtin_va_list;"; 872 } 873 }; 874 875 class DarwinPPC64TargetInfo : 876 public DarwinTargetInfo<PPC64TargetInfo> { 877 public: 878 DarwinPPC64TargetInfo(const std::string& triple) 879 : DarwinTargetInfo<PPC64TargetInfo>(triple) { 880 HasAlignMac68kSupport = true; 881 } 882 }; 883 } // end anonymous namespace. 884 885 namespace { 886 static const unsigned PTXAddrSpaceMap[] = { 887 0, // opencl_global 888 4, // opencl_local 889 1 // opencl_constant 890 }; 891 class PTXTargetInfo : public TargetInfo { 892 static const char * const GCCRegNames[]; 893 static const Builtin::Info BuiltinInfo[]; 894 std::vector<llvm::StringRef> AvailableFeatures; 895 public: 896 PTXTargetInfo(const std::string& triple) : TargetInfo(triple) { 897 TLSSupported = false; 898 LongWidth = LongAlign = 64; 899 AddrSpaceMap = &PTXAddrSpaceMap; 900 // Define available target features 901 // These must be defined in sorted order! 902 AvailableFeatures.push_back("compute10"); 903 AvailableFeatures.push_back("compute11"); 904 AvailableFeatures.push_back("compute12"); 905 AvailableFeatures.push_back("compute13"); 906 AvailableFeatures.push_back("compute20"); 907 AvailableFeatures.push_back("double"); 908 AvailableFeatures.push_back("no-fma"); 909 AvailableFeatures.push_back("ptx20"); 910 AvailableFeatures.push_back("ptx21"); 911 AvailableFeatures.push_back("ptx22"); 912 AvailableFeatures.push_back("ptx23"); 913 AvailableFeatures.push_back("sm10"); 914 AvailableFeatures.push_back("sm11"); 915 AvailableFeatures.push_back("sm12"); 916 AvailableFeatures.push_back("sm13"); 917 AvailableFeatures.push_back("sm20"); 918 AvailableFeatures.push_back("sm21"); 919 AvailableFeatures.push_back("sm22"); 920 AvailableFeatures.push_back("sm23"); 921 } 922 virtual void getTargetDefines(const LangOptions &Opts, 923 MacroBuilder &Builder) const { 924 Builder.defineMacro("__PTX__"); 925 } 926 virtual void getTargetBuiltins(const Builtin::Info *&Records, 927 unsigned &NumRecords) const { 928 Records = BuiltinInfo; 929 NumRecords = clang::PTX::LastTSBuiltin-Builtin::FirstTSBuiltin; 930 } 931 932 virtual void getGCCRegNames(const char * const *&Names, 933 unsigned &NumNames) const; 934 virtual void getGCCRegAliases(const GCCRegAlias *&Aliases, 935 unsigned &NumAliases) const { 936 // No aliases. 937 Aliases = 0; 938 NumAliases = 0; 939 } 940 virtual bool validateAsmConstraint(const char *&Name, 941 TargetInfo::ConstraintInfo &info) const { 942 // FIXME: implement 943 return true; 944 } 945 virtual const char *getClobbers() const { 946 // FIXME: Is this really right? 947 return ""; 948 } 949 virtual const char *getVAListDeclaration() const { 950 // FIXME: implement 951 return "typedef char* __builtin_va_list;"; 952 } 953 954 virtual bool setFeatureEnabled(llvm::StringMap<bool> &Features, 955 const std::string &Name, 956 bool Enabled) const; 957 }; 958 959 const Builtin::Info PTXTargetInfo::BuiltinInfo[] = { 960 #define BUILTIN(ID, TYPE, ATTRS) { #ID, TYPE, ATTRS, 0, ALL_LANGUAGES }, 961 #define LIBBUILTIN(ID, TYPE, ATTRS, HEADER) { #ID, TYPE, ATTRS, HEADER,\ 962 ALL_LANGUAGES }, 963 #include "clang/Basic/BuiltinsPTX.def" 964 }; 965 966 const char * const PTXTargetInfo::GCCRegNames[] = { 967 "r0" 968 }; 969 970 void PTXTargetInfo::getGCCRegNames(const char * const *&Names, 971 unsigned &NumNames) const { 972 Names = GCCRegNames; 973 NumNames = llvm::array_lengthof(GCCRegNames); 974 } 975 976 bool PTXTargetInfo::setFeatureEnabled(llvm::StringMap<bool> &Features, 977 const std::string &Name, 978 bool Enabled) const { 979 if(std::binary_search(AvailableFeatures.begin(), AvailableFeatures.end(), 980 Name)) { 981 Features[Name] = Enabled; 982 return true; 983 } else { 984 return false; 985 } 986 } 987 988 class PTX32TargetInfo : public PTXTargetInfo { 989 public: 990 PTX32TargetInfo(const std::string& triple) : PTXTargetInfo(triple) { 991 PointerWidth = PointerAlign = 32; 992 SizeType = PtrDiffType = IntPtrType = TargetInfo::UnsignedInt; 993 DescriptionString 994 = "e-p:32:32-i64:64:64-f64:64:64-n1:8:16:32:64"; 995 } 996 }; 997 998 class PTX64TargetInfo : public PTXTargetInfo { 999 public: 1000 PTX64TargetInfo(const std::string& triple) : PTXTargetInfo(triple) { 1001 PointerWidth = PointerAlign = 64; 1002 SizeType = PtrDiffType = IntPtrType = TargetInfo::UnsignedLongLong; 1003 DescriptionString 1004 = "e-p:64:64-i64:64:64-f64:64:64-n1:8:16:32:64"; 1005 } 1006 }; 1007 } 1008 1009 namespace { 1010 // MBlaze abstract base class 1011 class MBlazeTargetInfo : public TargetInfo { 1012 static const char * const GCCRegNames[]; 1013 static const TargetInfo::GCCRegAlias GCCRegAliases[]; 1014 1015 public: 1016 MBlazeTargetInfo(const std::string& triple) : TargetInfo(triple) { 1017 DescriptionString = "E-p:32:32:32-i8:8:8-i16:16:16"; 1018 } 1019 1020 virtual void getTargetBuiltins(const Builtin::Info *&Records, 1021 unsigned &NumRecords) const { 1022 // FIXME: Implement. 1023 Records = 0; 1024 NumRecords = 0; 1025 } 1026 1027 virtual void getTargetDefines(const LangOptions &Opts, 1028 MacroBuilder &Builder) const; 1029 1030 virtual const char *getVAListDeclaration() const { 1031 return "typedef char* __builtin_va_list;"; 1032 } 1033 virtual const char *getTargetPrefix() const { 1034 return "mblaze"; 1035 } 1036 virtual void getGCCRegNames(const char * const *&Names, 1037 unsigned &NumNames) const; 1038 virtual void getGCCRegAliases(const GCCRegAlias *&Aliases, 1039 unsigned &NumAliases) const; 1040 virtual bool validateAsmConstraint(const char *&Name, 1041 TargetInfo::ConstraintInfo &Info) const { 1042 switch (*Name) { 1043 default: return false; 1044 case 'O': // Zero 1045 return true; 1046 case 'b': // Base register 1047 case 'f': // Floating point register 1048 Info.setAllowsRegister(); 1049 return true; 1050 } 1051 } 1052 virtual const char *getClobbers() const { 1053 return ""; 1054 } 1055 }; 1056 1057 /// MBlazeTargetInfo::getTargetDefines - Return a set of the MBlaze-specific 1058 /// #defines that are not tied to a specific subtarget. 1059 void MBlazeTargetInfo::getTargetDefines(const LangOptions &Opts, 1060 MacroBuilder &Builder) const { 1061 // Target identification. 1062 Builder.defineMacro("__microblaze__"); 1063 Builder.defineMacro("_ARCH_MICROBLAZE"); 1064 Builder.defineMacro("__MICROBLAZE__"); 1065 1066 // Target properties. 1067 Builder.defineMacro("_BIG_ENDIAN"); 1068 Builder.defineMacro("__BIG_ENDIAN__"); 1069 1070 // Subtarget options. 1071 Builder.defineMacro("__REGISTER_PREFIX__", ""); 1072 } 1073 1074 1075 const char * const MBlazeTargetInfo::GCCRegNames[] = { 1076 "r0", "r1", "r2", "r3", "r4", "r5", "r6", "r7", 1077 "r8", "r9", "r10", "r11", "r12", "r13", "r14", "r15", 1078 "r16", "r17", "r18", "r19", "r20", "r21", "r22", "r23", 1079 "r24", "r25", "r26", "r27", "r28", "r29", "r30", "r31", 1080 "$f0", "$f1", "$f2", "$f3", "$f4", "$f5", "$f6", "$f7", 1081 "$f8", "$f9", "$f10", "$f11", "$f12", "$f13", "$f14", "$f15", 1082 "$f16", "$f17", "$f18", "$f19", "$f20", "$f21", "$f22", "$f23", 1083 "$f24", "$f25", "$f26", "$f27", "$f28", "$f29", "$f30", "$f31", 1084 "hi", "lo", "accum","rmsr", "$fcc1","$fcc2","$fcc3","$fcc4", 1085 "$fcc5","$fcc6","$fcc7","$ap", "$rap", "$frp" 1086 }; 1087 1088 void MBlazeTargetInfo::getGCCRegNames(const char * const *&Names, 1089 unsigned &NumNames) const { 1090 Names = GCCRegNames; 1091 NumNames = llvm::array_lengthof(GCCRegNames); 1092 } 1093 1094 const TargetInfo::GCCRegAlias MBlazeTargetInfo::GCCRegAliases[] = { 1095 { {"f0"}, "r0" }, 1096 { {"f1"}, "r1" }, 1097 { {"f2"}, "r2" }, 1098 { {"f3"}, "r3" }, 1099 { {"f4"}, "r4" }, 1100 { {"f5"}, "r5" }, 1101 { {"f6"}, "r6" }, 1102 { {"f7"}, "r7" }, 1103 { {"f8"}, "r8" }, 1104 { {"f9"}, "r9" }, 1105 { {"f10"}, "r10" }, 1106 { {"f11"}, "r11" }, 1107 { {"f12"}, "r12" }, 1108 { {"f13"}, "r13" }, 1109 { {"f14"}, "r14" }, 1110 { {"f15"}, "r15" }, 1111 { {"f16"}, "r16" }, 1112 { {"f17"}, "r17" }, 1113 { {"f18"}, "r18" }, 1114 { {"f19"}, "r19" }, 1115 { {"f20"}, "r20" }, 1116 { {"f21"}, "r21" }, 1117 { {"f22"}, "r22" }, 1118 { {"f23"}, "r23" }, 1119 { {"f24"}, "r24" }, 1120 { {"f25"}, "r25" }, 1121 { {"f26"}, "r26" }, 1122 { {"f27"}, "r27" }, 1123 { {"f28"}, "r28" }, 1124 { {"f29"}, "r29" }, 1125 { {"f30"}, "r30" }, 1126 { {"f31"}, "r31" }, 1127 }; 1128 1129 void MBlazeTargetInfo::getGCCRegAliases(const GCCRegAlias *&Aliases, 1130 unsigned &NumAliases) const { 1131 Aliases = GCCRegAliases; 1132 NumAliases = llvm::array_lengthof(GCCRegAliases); 1133 } 1134 } // end anonymous namespace. 1135 1136 namespace { 1137 // Namespace for x86 abstract base class 1138 const Builtin::Info BuiltinInfo[] = { 1139 #define BUILTIN(ID, TYPE, ATTRS) { #ID, TYPE, ATTRS, 0, ALL_LANGUAGES }, 1140 #define LIBBUILTIN(ID, TYPE, ATTRS, HEADER) { #ID, TYPE, ATTRS, HEADER,\ 1141 ALL_LANGUAGES }, 1142 #include "clang/Basic/BuiltinsX86.def" 1143 }; 1144 1145 static const char* const GCCRegNames[] = { 1146 "ax", "dx", "cx", "bx", "si", "di", "bp", "sp", 1147 "st", "st(1)", "st(2)", "st(3)", "st(4)", "st(5)", "st(6)", "st(7)", 1148 "argp", "flags", "fpcr", "fpsr", "dirflag", "frame", 1149 "xmm0", "xmm1", "xmm2", "xmm3", "xmm4", "xmm5", "xmm6", "xmm7", 1150 "mm0", "mm1", "mm2", "mm3", "mm4", "mm5", "mm6", "mm7", 1151 "r8", "r9", "r10", "r11", "r12", "r13", "r14", "r15", 1152 "xmm8", "xmm9", "xmm10", "xmm11", "xmm12", "xmm13", "xmm14", "xmm15", 1153 }; 1154 1155 const TargetInfo::AddlRegName AddlRegNames[] = { 1156 { { "al", "ah", "eax", "rax" }, 0 }, 1157 { { "bl", "bh", "ebx", "rbx" }, 3 }, 1158 { { "cl", "ch", "ecx", "rcx" }, 2 }, 1159 { { "dl", "dh", "edx", "rdx" }, 1 }, 1160 { { "esi", "rsi" }, 4 }, 1161 { { "edi", "rdi" }, 5 }, 1162 { { "esp", "rsp" }, 7 }, 1163 { { "ebp", "rbp" }, 6 }, 1164 }; 1165 1166 // X86 target abstract base class; x86-32 and x86-64 are very close, so 1167 // most of the implementation can be shared. 1168 class X86TargetInfo : public TargetInfo { 1169 enum X86SSEEnum { 1170 NoSSE, SSE1, SSE2, SSE3, SSSE3, SSE41, SSE42 1171 } SSELevel; 1172 enum MMX3DNowEnum { 1173 NoMMX3DNow, MMX, AMD3DNow, AMD3DNowAthlon 1174 } MMX3DNowLevel; 1175 1176 bool HasAES; 1177 bool HasAVX; 1178 1179 /// \brief Enumeration of all of the X86 CPUs supported by Clang. 1180 /// 1181 /// Each enumeration represents a particular CPU supported by Clang. These 1182 /// loosely correspond to the options passed to '-march' or '-mtune' flags. 1183 enum CPUKind { 1184 CK_Generic, 1185 1186 /// \name i386 1187 /// i386-generation processors. 1188 //@{ 1189 CK_i386, 1190 //@} 1191 1192 /// \name i486 1193 /// i486-generation processors. 1194 //@{ 1195 CK_i486, 1196 CK_WinChipC6, 1197 CK_WinChip2, 1198 CK_C3, 1199 //@} 1200 1201 /// \name i586 1202 /// i586-generation processors, P5 microarchitecture based. 1203 //@{ 1204 CK_i586, 1205 CK_Pentium, 1206 CK_PentiumMMX, 1207 //@} 1208 1209 /// \name i686 1210 /// i686-generation processors, P6 / Pentium M microarchitecture based. 1211 //@{ 1212 CK_i686, 1213 CK_PentiumPro, 1214 CK_Pentium2, 1215 CK_Pentium3, 1216 CK_Pentium3M, 1217 CK_PentiumM, 1218 CK_C3_2, 1219 1220 /// This enumerator is a bit odd, as GCC no longer accepts -march=yonah. 1221 /// Clang however has some logic to suport this. 1222 // FIXME: Warn, deprecate, and potentially remove this. 1223 CK_Yonah, 1224 //@} 1225 1226 /// \name Netburst 1227 /// Netburst microarchitecture based processors. 1228 //@{ 1229 CK_Pentium4, 1230 CK_Pentium4M, 1231 CK_Prescott, 1232 CK_Nocona, 1233 //@} 1234 1235 /// \name Core 1236 /// Core microarchitecture based processors. 1237 //@{ 1238 CK_Core2, 1239 1240 /// This enumerator, like \see CK_Yonah, is a bit odd. It is another 1241 /// codename which GCC no longer accepts as an option to -march, but Clang 1242 /// has some logic for recognizing it. 1243 // FIXME: Warn, deprecate, and potentially remove this. 1244 CK_Penryn, 1245 //@} 1246 1247 /// \name Atom 1248 /// Atom processors 1249 //@{ 1250 CK_Atom, 1251 //@} 1252 1253 /// \name Nehalem 1254 /// Nehalem microarchitecture based processors. 1255 //@{ 1256 CK_Corei7, 1257 CK_Corei7AVX, 1258 CK_CoreAVXi, 1259 //@} 1260 1261 /// \name K6 1262 /// K6 architecture processors. 1263 //@{ 1264 CK_K6, 1265 CK_K6_2, 1266 CK_K6_3, 1267 //@} 1268 1269 /// \name K7 1270 /// K7 architecture processors. 1271 //@{ 1272 CK_Athlon, 1273 CK_AthlonThunderbird, 1274 CK_Athlon4, 1275 CK_AthlonXP, 1276 CK_AthlonMP, 1277 //@} 1278 1279 /// \name K8 1280 /// K8 architecture processors. 1281 //@{ 1282 CK_Athlon64, 1283 CK_Athlon64SSE3, 1284 CK_AthlonFX, 1285 CK_K8, 1286 CK_K8SSE3, 1287 CK_Opteron, 1288 CK_OpteronSSE3, 1289 1290 /// This specification is deprecated and will be removed in the future. 1291 /// Users should prefer \see CK_K8. 1292 // FIXME: Warn on this when the CPU is set to it. 1293 CK_x86_64, 1294 //@} 1295 1296 /// \name Geode 1297 /// Geode processors. 1298 //@{ 1299 CK_Geode 1300 //@} 1301 } CPU; 1302 1303 public: 1304 X86TargetInfo(const std::string& triple) 1305 : TargetInfo(triple), SSELevel(NoSSE), MMX3DNowLevel(NoMMX3DNow), 1306 HasAES(false), HasAVX(false), CPU(CK_Generic) { 1307 LongDoubleFormat = &llvm::APFloat::x87DoubleExtended; 1308 } 1309 virtual void getTargetBuiltins(const Builtin::Info *&Records, 1310 unsigned &NumRecords) const { 1311 Records = BuiltinInfo; 1312 NumRecords = clang::X86::LastTSBuiltin-Builtin::FirstTSBuiltin; 1313 } 1314 virtual void getGCCRegNames(const char * const *&Names, 1315 unsigned &NumNames) const { 1316 Names = GCCRegNames; 1317 NumNames = llvm::array_lengthof(GCCRegNames); 1318 } 1319 virtual void getGCCRegAliases(const GCCRegAlias *&Aliases, 1320 unsigned &NumAliases) const { 1321 Aliases = 0; 1322 NumAliases = 0; 1323 } 1324 virtual void getGCCAddlRegNames(const AddlRegName *&Names, 1325 unsigned &NumNames) const { 1326 Names = AddlRegNames; 1327 NumNames = llvm::array_lengthof(AddlRegNames); 1328 } 1329 virtual bool validateAsmConstraint(const char *&Name, 1330 TargetInfo::ConstraintInfo &info) const; 1331 virtual std::string convertConstraint(const char *&Constraint) const; 1332 virtual const char *getClobbers() const { 1333 return "~{dirflag},~{fpsr},~{flags}"; 1334 } 1335 virtual void getTargetDefines(const LangOptions &Opts, 1336 MacroBuilder &Builder) const; 1337 virtual bool setFeatureEnabled(llvm::StringMap<bool> &Features, 1338 const std::string &Name, 1339 bool Enabled) const; 1340 virtual void getDefaultFeatures(llvm::StringMap<bool> &Features) const; 1341 virtual void HandleTargetFeatures(std::vector<std::string> &Features); 1342 virtual const char* getABI() const { 1343 return MMX3DNowLevel == NoMMX3DNow ? "no-mmx" : ""; 1344 } 1345 virtual bool setCPU(const std::string &Name) { 1346 CPU = llvm::StringSwitch<CPUKind>(Name) 1347 .Case("i386", CK_i386) 1348 .Case("i486", CK_i486) 1349 .Case("winchip-c6", CK_WinChipC6) 1350 .Case("winchip2", CK_WinChip2) 1351 .Case("c3", CK_C3) 1352 .Case("i586", CK_i586) 1353 .Case("pentium", CK_Pentium) 1354 .Case("pentium-mmx", CK_PentiumMMX) 1355 .Case("i686", CK_i686) 1356 .Case("pentiumpro", CK_PentiumPro) 1357 .Case("pentium2", CK_Pentium2) 1358 .Case("pentium3", CK_Pentium3) 1359 .Case("pentium3m", CK_Pentium3M) 1360 .Case("pentium-m", CK_PentiumM) 1361 .Case("c3-2", CK_C3_2) 1362 .Case("yonah", CK_Yonah) 1363 .Case("pentium4", CK_Pentium4) 1364 .Case("pentium4m", CK_Pentium4M) 1365 .Case("prescott", CK_Prescott) 1366 .Case("nocona", CK_Nocona) 1367 .Case("core2", CK_Core2) 1368 .Case("penryn", CK_Penryn) 1369 .Case("atom", CK_Atom) 1370 .Case("corei7", CK_Corei7) 1371 .Case("corei7-avx", CK_Corei7AVX) 1372 .Case("core-avx-i", CK_CoreAVXi) 1373 .Case("k6", CK_K6) 1374 .Case("k6-2", CK_K6_2) 1375 .Case("k6-3", CK_K6_3) 1376 .Case("athlon", CK_Athlon) 1377 .Case("athlon-tbird", CK_AthlonThunderbird) 1378 .Case("athlon-4", CK_Athlon4) 1379 .Case("athlon-xp", CK_AthlonXP) 1380 .Case("athlon-mp", CK_AthlonMP) 1381 .Case("athlon64", CK_Athlon64) 1382 .Case("athlon64-sse3", CK_Athlon64SSE3) 1383 .Case("athlon-fx", CK_AthlonFX) 1384 .Case("k8", CK_K8) 1385 .Case("k8-sse3", CK_K8SSE3) 1386 .Case("opteron", CK_Opteron) 1387 .Case("opteron-sse3", CK_OpteronSSE3) 1388 .Case("x86-64", CK_x86_64) 1389 .Case("geode", CK_Geode) 1390 .Default(CK_Generic); 1391 1392 // Perform any per-CPU checks necessary to determine if this CPU is 1393 // acceptable. 1394 // FIXME: This results in terrible diagnostics. Clang just says the CPU is 1395 // invalid without explaining *why*. 1396 switch (CPU) { 1397 case CK_Generic: 1398 // No processor selected! 1399 return false; 1400 1401 case CK_i386: 1402 case CK_i486: 1403 case CK_WinChipC6: 1404 case CK_WinChip2: 1405 case CK_C3: 1406 case CK_i586: 1407 case CK_Pentium: 1408 case CK_PentiumMMX: 1409 case CK_i686: 1410 case CK_PentiumPro: 1411 case CK_Pentium2: 1412 case CK_Pentium3: 1413 case CK_Pentium3M: 1414 case CK_PentiumM: 1415 case CK_Yonah: 1416 case CK_C3_2: 1417 case CK_Pentium4: 1418 case CK_Pentium4M: 1419 case CK_Prescott: 1420 case CK_K6: 1421 case CK_K6_2: 1422 case CK_K6_3: 1423 case CK_Athlon: 1424 case CK_AthlonThunderbird: 1425 case CK_Athlon4: 1426 case CK_AthlonXP: 1427 case CK_AthlonMP: 1428 case CK_Geode: 1429 // Only accept certain architectures when compiling in 32-bit mode. 1430 if (PointerWidth != 32) 1431 return false; 1432 1433 // Fallthrough 1434 case CK_Nocona: 1435 case CK_Core2: 1436 case CK_Penryn: 1437 case CK_Atom: 1438 case CK_Corei7: 1439 case CK_Corei7AVX: 1440 case CK_CoreAVXi: 1441 case CK_Athlon64: 1442 case CK_Athlon64SSE3: 1443 case CK_AthlonFX: 1444 case CK_K8: 1445 case CK_K8SSE3: 1446 case CK_Opteron: 1447 case CK_OpteronSSE3: 1448 case CK_x86_64: 1449 return true; 1450 } 1451 llvm_unreachable("Unhandled CPU kind"); 1452 } 1453 }; 1454 1455 void X86TargetInfo::getDefaultFeatures(llvm::StringMap<bool> &Features) const { 1456 // FIXME: This should not be here. 1457 Features["3dnow"] = false; 1458 Features["3dnowa"] = false; 1459 Features["mmx"] = false; 1460 Features["sse"] = false; 1461 Features["sse2"] = false; 1462 Features["sse3"] = false; 1463 Features["ssse3"] = false; 1464 Features["sse41"] = false; 1465 Features["sse42"] = false; 1466 Features["aes"] = false; 1467 Features["avx"] = false; 1468 1469 // LLVM does not currently recognize this. 1470 // Features["sse4a"] = false; 1471 1472 // FIXME: This *really* should not be here. 1473 1474 // X86_64 always has SSE2. 1475 if (PointerWidth == 64) 1476 Features["sse2"] = Features["sse"] = Features["mmx"] = true; 1477 1478 switch (CPU) { 1479 case CK_Generic: 1480 case CK_i386: 1481 case CK_i486: 1482 case CK_i586: 1483 case CK_Pentium: 1484 case CK_i686: 1485 case CK_PentiumPro: 1486 break; 1487 case CK_PentiumMMX: 1488 case CK_Pentium2: 1489 setFeatureEnabled(Features, "mmx", true); 1490 break; 1491 case CK_Pentium3: 1492 case CK_Pentium3M: 1493 setFeatureEnabled(Features, "mmx", true); 1494 setFeatureEnabled(Features, "sse", true); 1495 break; 1496 case CK_PentiumM: 1497 case CK_Pentium4: 1498 case CK_Pentium4M: 1499 case CK_x86_64: 1500 setFeatureEnabled(Features, "mmx", true); 1501 setFeatureEnabled(Features, "sse2", true); 1502 break; 1503 case CK_Yonah: 1504 case CK_Prescott: 1505 case CK_Nocona: 1506 setFeatureEnabled(Features, "mmx", true); 1507 setFeatureEnabled(Features, "sse3", true); 1508 break; 1509 case CK_Core2: 1510 setFeatureEnabled(Features, "mmx", true); 1511 setFeatureEnabled(Features, "ssse3", true); 1512 break; 1513 case CK_Penryn: 1514 setFeatureEnabled(Features, "mmx", true); 1515 setFeatureEnabled(Features, "sse4", true); 1516 Features["sse42"] = false; 1517 break; 1518 case CK_Atom: 1519 setFeatureEnabled(Features, "mmx", true); 1520 setFeatureEnabled(Features, "ssse3", true); 1521 break; 1522 case CK_Corei7: 1523 setFeatureEnabled(Features, "mmx", true); 1524 setFeatureEnabled(Features, "sse4", true); 1525 setFeatureEnabled(Features, "aes", true); 1526 break; 1527 case CK_Corei7AVX: 1528 case CK_CoreAVXi: 1529 setFeatureEnabled(Features, "mmx", true); 1530 setFeatureEnabled(Features, "sse4", true); 1531 setFeatureEnabled(Features, "aes", true); 1532 //setFeatureEnabled(Features, "avx", true); 1533 break; 1534 case CK_K6: 1535 case CK_WinChipC6: 1536 setFeatureEnabled(Features, "mmx", true); 1537 break; 1538 case CK_K6_2: 1539 case CK_K6_3: 1540 case CK_WinChip2: 1541 case CK_C3: 1542 setFeatureEnabled(Features, "3dnow", true); 1543 break; 1544 case CK_Athlon: 1545 case CK_AthlonThunderbird: 1546 case CK_Geode: 1547 setFeatureEnabled(Features, "3dnowa", true); 1548 break; 1549 case CK_Athlon4: 1550 case CK_AthlonXP: 1551 case CK_AthlonMP: 1552 setFeatureEnabled(Features, "sse", true); 1553 setFeatureEnabled(Features, "3dnowa", true); 1554 break; 1555 case CK_K8: 1556 case CK_Opteron: 1557 case CK_Athlon64: 1558 case CK_AthlonFX: 1559 setFeatureEnabled(Features, "sse2", true); 1560 setFeatureEnabled(Features, "3dnowa", true); 1561 break; 1562 case CK_K8SSE3: 1563 case CK_OpteronSSE3: 1564 case CK_Athlon64SSE3: 1565 setFeatureEnabled(Features, "sse3", true); 1566 setFeatureEnabled(Features, "3dnowa", true); 1567 break; 1568 case CK_C3_2: 1569 setFeatureEnabled(Features, "mmx", true); 1570 setFeatureEnabled(Features, "sse", true); 1571 break; 1572 } 1573 } 1574 1575 bool X86TargetInfo::setFeatureEnabled(llvm::StringMap<bool> &Features, 1576 const std::string &Name, 1577 bool Enabled) const { 1578 // FIXME: This *really* should not be here. We need some way of translating 1579 // options into llvm subtarget features. 1580 if (!Features.count(Name) && 1581 (Name != "sse4" && Name != "sse4.2" && Name != "sse4.1")) 1582 return false; 1583 1584 if (Enabled) { 1585 if (Name == "mmx") 1586 Features["mmx"] = true; 1587 else if (Name == "sse") 1588 Features["sse"] = true; 1589 else if (Name == "sse2") 1590 Features["sse"] = Features["sse2"] = true; 1591 else if (Name == "sse3") 1592 Features["sse"] = Features["sse2"] = Features["sse3"] = true; 1593 else if (Name == "ssse3") 1594 Features["sse"] = Features["sse2"] = Features["sse3"] = 1595 Features["ssse3"] = true; 1596 else if (Name == "sse4" || Name == "sse4.2") 1597 Features["sse"] = Features["sse2"] = Features["sse3"] = 1598 Features["ssse3"] = Features["sse41"] = Features["sse42"] = true; 1599 else if (Name == "sse4.1") 1600 Features["sse"] = Features["sse2"] = Features["sse3"] = 1601 Features["ssse3"] = Features["sse41"] = true; 1602 else if (Name == "3dnow") 1603 Features["mmx"] = Features["3dnow"] = true; 1604 else if (Name == "3dnowa") 1605 Features["mmx"] = Features["3dnow"] = Features["3dnowa"] = true; 1606 else if (Name == "aes") 1607 Features["aes"] = true; 1608 else if (Name == "avx") 1609 Features["avx"] = Features["sse"] = Features["sse2"] = Features["sse3"] = 1610 Features["ssse3"] = Features["sse41"] = Features["sse42"] = true; 1611 } else { 1612 if (Name == "mmx") 1613 Features["mmx"] = Features["3dnow"] = Features["3dnowa"] = false; 1614 else if (Name == "sse") 1615 Features["sse"] = Features["sse2"] = Features["sse3"] = 1616 Features["ssse3"] = Features["sse41"] = Features["sse42"] = false; 1617 else if (Name == "sse2") 1618 Features["sse2"] = Features["sse3"] = Features["ssse3"] = 1619 Features["sse41"] = Features["sse42"] = false; 1620 else if (Name == "sse3") 1621 Features["sse3"] = Features["ssse3"] = Features["sse41"] = 1622 Features["sse42"] = false; 1623 else if (Name == "ssse3") 1624 Features["ssse3"] = Features["sse41"] = Features["sse42"] = false; 1625 else if (Name == "sse4" || Name == "sse4.1") 1626 Features["sse41"] = Features["sse42"] = false; 1627 else if (Name == "sse4.2") 1628 Features["sse42"] = false; 1629 else if (Name == "3dnow") 1630 Features["3dnow"] = Features["3dnowa"] = false; 1631 else if (Name == "3dnowa") 1632 Features["3dnowa"] = false; 1633 else if (Name == "aes") 1634 Features["aes"] = false; 1635 else if (Name == "avx") 1636 Features["avx"] = false; 1637 } 1638 1639 return true; 1640 } 1641 1642 /// HandleTargetOptions - Perform initialization based on the user 1643 /// configured set of features. 1644 void X86TargetInfo::HandleTargetFeatures(std::vector<std::string> &Features) { 1645 // Remember the maximum enabled sselevel. 1646 for (unsigned i = 0, e = Features.size(); i !=e; ++i) { 1647 // Ignore disabled features. 1648 if (Features[i][0] == '-') 1649 continue; 1650 1651 if (Features[i].substr(1) == "aes") { 1652 HasAES = true; 1653 continue; 1654 } 1655 1656 // FIXME: Not sure yet how to treat AVX in regard to SSE levels. 1657 // For now let it be enabled together with other SSE levels. 1658 if (Features[i].substr(1) == "avx") { 1659 HasAVX = true; 1660 continue; 1661 } 1662 1663 assert(Features[i][0] == '+' && "Invalid target feature!"); 1664 X86SSEEnum Level = llvm::StringSwitch<X86SSEEnum>(Features[i].substr(1)) 1665 .Case("sse42", SSE42) 1666 .Case("sse41", SSE41) 1667 .Case("ssse3", SSSE3) 1668 .Case("sse3", SSE3) 1669 .Case("sse2", SSE2) 1670 .Case("sse", SSE1) 1671 .Default(NoSSE); 1672 SSELevel = std::max(SSELevel, Level); 1673 1674 MMX3DNowEnum ThreeDNowLevel = 1675 llvm::StringSwitch<MMX3DNowEnum>(Features[i].substr(1)) 1676 .Case("3dnowa", AMD3DNowAthlon) 1677 .Case("3dnow", AMD3DNow) 1678 .Case("mmx", MMX) 1679 .Default(NoMMX3DNow); 1680 1681 MMX3DNowLevel = std::max(MMX3DNowLevel, ThreeDNowLevel); 1682 } 1683 1684 // Don't tell the backend if we're turning off mmx; it will end up disabling 1685 // SSE, which we don't want. 1686 std::vector<std::string>::iterator it; 1687 it = std::find(Features.begin(), Features.end(), "-mmx"); 1688 if (it != Features.end()) 1689 Features.erase(it); 1690 } 1691 1692 /// X86TargetInfo::getTargetDefines - Return the set of the X86-specific macro 1693 /// definitions for this particular subtarget. 1694 void X86TargetInfo::getTargetDefines(const LangOptions &Opts, 1695 MacroBuilder &Builder) const { 1696 // Target identification. 1697 if (PointerWidth == 64) { 1698 Builder.defineMacro("_LP64"); 1699 Builder.defineMacro("__LP64__"); 1700 Builder.defineMacro("__amd64__"); 1701 Builder.defineMacro("__amd64"); 1702 Builder.defineMacro("__x86_64"); 1703 Builder.defineMacro("__x86_64__"); 1704 } else { 1705 DefineStd(Builder, "i386", Opts); 1706 } 1707 1708 // Subtarget options. 1709 // FIXME: We are hard-coding the tune parameters based on the CPU, but they 1710 // truly should be based on -mtune options. 1711 switch (CPU) { 1712 case CK_Generic: 1713 break; 1714 case CK_i386: 1715 // The rest are coming from the i386 define above. 1716 Builder.defineMacro("__tune_i386__"); 1717 break; 1718 case CK_i486: 1719 case CK_WinChipC6: 1720 case CK_WinChip2: 1721 case CK_C3: 1722 Builder.defineMacro("__i486"); 1723 Builder.defineMacro("__i486__"); 1724 Builder.defineMacro("__tune_i486__"); 1725 break; 1726 case CK_PentiumMMX: 1727 Builder.defineMacro("__pentium_mmx__"); 1728 Builder.defineMacro("__tune_pentium_mmx__"); 1729 // Fallthrough 1730 case CK_i586: 1731 case CK_Pentium: 1732 Builder.defineMacro("__i586"); 1733 Builder.defineMacro("__i586__"); 1734 Builder.defineMacro("__tune_i586__"); 1735 Builder.defineMacro("__pentium"); 1736 Builder.defineMacro("__pentium__"); 1737 Builder.defineMacro("__tune_pentium__"); 1738 break; 1739 case CK_Pentium3: 1740 case CK_Pentium3M: 1741 case CK_PentiumM: 1742 Builder.defineMacro("__tune_pentium3__"); 1743 // Fallthrough 1744 case CK_Pentium2: 1745 case CK_C3_2: 1746 Builder.defineMacro("__tune_pentium2__"); 1747 // Fallthrough 1748 case CK_PentiumPro: 1749 Builder.defineMacro("__tune_i686__"); 1750 Builder.defineMacro("__tune_pentiumpro__"); 1751 // Fallthrough 1752 case CK_i686: 1753 Builder.defineMacro("__i686"); 1754 Builder.defineMacro("__i686__"); 1755 // Strangely, __tune_i686__ isn't defined by GCC when CPU == i686. 1756 Builder.defineMacro("__pentiumpro"); 1757 Builder.defineMacro("__pentiumpro__"); 1758 break; 1759 case CK_Pentium4: 1760 case CK_Pentium4M: 1761 Builder.defineMacro("__pentium4"); 1762 Builder.defineMacro("__pentium4__"); 1763 Builder.defineMacro("__tune_pentium4__"); 1764 break; 1765 case CK_Yonah: 1766 case CK_Prescott: 1767 case CK_Nocona: 1768 Builder.defineMacro("__nocona"); 1769 Builder.defineMacro("__nocona__"); 1770 Builder.defineMacro("__tune_nocona__"); 1771 break; 1772 case CK_Core2: 1773 case CK_Penryn: 1774 Builder.defineMacro("__core2"); 1775 Builder.defineMacro("__core2__"); 1776 Builder.defineMacro("__tune_core2__"); 1777 break; 1778 case CK_Atom: 1779 Builder.defineMacro("__atom"); 1780 Builder.defineMacro("__atom__"); 1781 Builder.defineMacro("__tune_atom__"); 1782 break; 1783 case CK_Corei7: 1784 case CK_Corei7AVX: 1785 case CK_CoreAVXi: 1786 Builder.defineMacro("__corei7"); 1787 Builder.defineMacro("__corei7__"); 1788 Builder.defineMacro("__tune_corei7__"); 1789 break; 1790 case CK_K6_2: 1791 Builder.defineMacro("__k6_2__"); 1792 Builder.defineMacro("__tune_k6_2__"); 1793 // Fallthrough 1794 case CK_K6_3: 1795 if (CPU != CK_K6_2) { // In case of fallthrough 1796 // FIXME: GCC may be enabling these in cases where some other k6 1797 // architecture is specified but -m3dnow is explicitly provided. The 1798 // exact semantics need to be determined and emulated here. 1799 Builder.defineMacro("__k6_3__"); 1800 Builder.defineMacro("__tune_k6_3__"); 1801 } 1802 // Fallthrough 1803 case CK_K6: 1804 Builder.defineMacro("__k6"); 1805 Builder.defineMacro("__k6__"); 1806 Builder.defineMacro("__tune_k6__"); 1807 break; 1808 case CK_Athlon: 1809 case CK_AthlonThunderbird: 1810 case CK_Athlon4: 1811 case CK_AthlonXP: 1812 case CK_AthlonMP: 1813 Builder.defineMacro("__athlon"); 1814 Builder.defineMacro("__athlon__"); 1815 Builder.defineMacro("__tune_athlon__"); 1816 if (SSELevel != NoSSE) { 1817 Builder.defineMacro("__athlon_sse__"); 1818 Builder.defineMacro("__tune_athlon_sse__"); 1819 } 1820 break; 1821 case CK_K8: 1822 case CK_K8SSE3: 1823 case CK_x86_64: 1824 case CK_Opteron: 1825 case CK_OpteronSSE3: 1826 case CK_Athlon64: 1827 case CK_Athlon64SSE3: 1828 case CK_AthlonFX: 1829 Builder.defineMacro("__k8"); 1830 Builder.defineMacro("__k8__"); 1831 Builder.defineMacro("__tune_k8__"); 1832 break; 1833 case CK_Geode: 1834 Builder.defineMacro("__geode"); 1835 Builder.defineMacro("__geode__"); 1836 Builder.defineMacro("__tune_geode__"); 1837 break; 1838 } 1839 1840 // Target properties. 1841 Builder.defineMacro("__LITTLE_ENDIAN__"); 1842 Builder.defineMacro("__REGISTER_PREFIX__", ""); 1843 1844 // Define __NO_MATH_INLINES on linux/x86 so that we don't get inline 1845 // functions in glibc header files that use FP Stack inline asm which the 1846 // backend can't deal with (PR879). 1847 Builder.defineMacro("__NO_MATH_INLINES"); 1848 1849 if (HasAES) 1850 Builder.defineMacro("__AES__"); 1851 1852 if (HasAVX) 1853 Builder.defineMacro("__AVX__"); 1854 1855 // Each case falls through to the previous one here. 1856 switch (SSELevel) { 1857 case SSE42: 1858 Builder.defineMacro("__SSE4_2__"); 1859 case SSE41: 1860 Builder.defineMacro("__SSE4_1__"); 1861 case SSSE3: 1862 Builder.defineMacro("__SSSE3__"); 1863 case SSE3: 1864 Builder.defineMacro("__SSE3__"); 1865 case SSE2: 1866 Builder.defineMacro("__SSE2__"); 1867 Builder.defineMacro("__SSE2_MATH__"); // -mfp-math=sse always implied. 1868 case SSE1: 1869 Builder.defineMacro("__SSE__"); 1870 Builder.defineMacro("__SSE_MATH__"); // -mfp-math=sse always implied. 1871 case NoSSE: 1872 break; 1873 } 1874 1875 if (Opts.MicrosoftExt && PointerWidth == 32) { 1876 switch (SSELevel) { 1877 case SSE42: 1878 case SSE41: 1879 case SSSE3: 1880 case SSE3: 1881 case SSE2: 1882 Builder.defineMacro("_M_IX86_FP", Twine(2)); 1883 break; 1884 case SSE1: 1885 Builder.defineMacro("_M_IX86_FP", Twine(1)); 1886 break; 1887 default: 1888 Builder.defineMacro("_M_IX86_FP", Twine(0)); 1889 } 1890 } 1891 1892 // Each case falls through to the previous one here. 1893 switch (MMX3DNowLevel) { 1894 case AMD3DNowAthlon: 1895 Builder.defineMacro("__3dNOW_A__"); 1896 case AMD3DNow: 1897 Builder.defineMacro("__3dNOW__"); 1898 case MMX: 1899 Builder.defineMacro("__MMX__"); 1900 case NoMMX3DNow: 1901 break; 1902 } 1903 } 1904 1905 1906 bool 1907 X86TargetInfo::validateAsmConstraint(const char *&Name, 1908 TargetInfo::ConstraintInfo &Info) const { 1909 switch (*Name) { 1910 default: return false; 1911 case 'Y': // first letter of a pair: 1912 switch (*(Name+1)) { 1913 default: return false; 1914 case '0': // First SSE register. 1915 case 't': // Any SSE register, when SSE2 is enabled. 1916 case 'i': // Any SSE register, when SSE2 and inter-unit moves enabled. 1917 case 'm': // any MMX register, when inter-unit moves enabled. 1918 break; // falls through to setAllowsRegister. 1919 } 1920 case 'a': // eax. 1921 case 'b': // ebx. 1922 case 'c': // ecx. 1923 case 'd': // edx. 1924 case 'S': // esi. 1925 case 'D': // edi. 1926 case 'A': // edx:eax. 1927 case 'f': // any x87 floating point stack register. 1928 case 't': // top of floating point stack. 1929 case 'u': // second from top of floating point stack. 1930 case 'q': // Any register accessible as [r]l: a, b, c, and d. 1931 case 'y': // Any MMX register. 1932 case 'x': // Any SSE register. 1933 case 'Q': // Any register accessible as [r]h: a, b, c, and d. 1934 case 'R': // "Legacy" registers: ax, bx, cx, dx, di, si, sp, bp. 1935 case 'l': // "Index" registers: any general register that can be used as an 1936 // index in a base+index memory access. 1937 Info.setAllowsRegister(); 1938 return true; 1939 case 'C': // SSE floating point constant. 1940 case 'G': // x87 floating point constant. 1941 case 'e': // 32-bit signed integer constant for use with zero-extending 1942 // x86_64 instructions. 1943 case 'Z': // 32-bit unsigned integer constant for use with zero-extending 1944 // x86_64 instructions. 1945 return true; 1946 } 1947 return false; 1948 } 1949 1950 1951 std::string 1952 X86TargetInfo::convertConstraint(const char *&Constraint) const { 1953 switch (*Constraint) { 1954 case 'a': return std::string("{ax}"); 1955 case 'b': return std::string("{bx}"); 1956 case 'c': return std::string("{cx}"); 1957 case 'd': return std::string("{dx}"); 1958 case 'S': return std::string("{si}"); 1959 case 'D': return std::string("{di}"); 1960 case 'p': // address 1961 return std::string("im"); 1962 case 't': // top of floating point stack. 1963 return std::string("{st}"); 1964 case 'u': // second from top of floating point stack. 1965 return std::string("{st(1)}"); // second from top of floating point stack. 1966 default: 1967 return std::string(1, *Constraint); 1968 } 1969 } 1970 } // end anonymous namespace 1971 1972 namespace { 1973 // X86-32 generic target 1974 class X86_32TargetInfo : public X86TargetInfo { 1975 public: 1976 X86_32TargetInfo(const std::string& triple) : X86TargetInfo(triple) { 1977 DoubleAlign = LongLongAlign = 32; 1978 LongDoubleWidth = 96; 1979 LongDoubleAlign = 32; 1980 DescriptionString = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-" 1981 "i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-" 1982 "a0:0:64-f80:32:32-n8:16:32-S128"; 1983 SizeType = UnsignedInt; 1984 PtrDiffType = SignedInt; 1985 IntPtrType = SignedInt; 1986 RegParmMax = 3; 1987 1988 // Use fpret for all types. 1989 RealTypeUsesObjCFPRet = ((1 << TargetInfo::Float) | 1990 (1 << TargetInfo::Double) | 1991 (1 << TargetInfo::LongDouble)); 1992 1993 // x86-32 has atomics up to 8 bytes 1994 // FIXME: Check that we actually have cmpxchg8b before setting 1995 // MaxAtomicInlineWidth. (cmpxchg8b is an i586 instruction.) 1996 MaxAtomicPromoteWidth = MaxAtomicInlineWidth = 64; 1997 } 1998 virtual const char *getVAListDeclaration() const { 1999 return "typedef char* __builtin_va_list;"; 2000 } 2001 2002 int getEHDataRegisterNumber(unsigned RegNo) const { 2003 if (RegNo == 0) return 0; 2004 if (RegNo == 1) return 2; 2005 return -1; 2006 } 2007 }; 2008 } // end anonymous namespace 2009 2010 namespace { 2011 class OpenBSDI386TargetInfo : public OpenBSDTargetInfo<X86_32TargetInfo> { 2012 public: 2013 OpenBSDI386TargetInfo(const std::string& triple) : 2014 OpenBSDTargetInfo<X86_32TargetInfo>(triple) { 2015 SizeType = UnsignedLong; 2016 IntPtrType = SignedLong; 2017 PtrDiffType = SignedLong; 2018 } 2019 }; 2020 } // end anonymous namespace 2021 2022 namespace { 2023 class DarwinI386TargetInfo : public DarwinTargetInfo<X86_32TargetInfo> { 2024 public: 2025 DarwinI386TargetInfo(const std::string& triple) : 2026 DarwinTargetInfo<X86_32TargetInfo>(triple) { 2027 LongDoubleWidth = 128; 2028 LongDoubleAlign = 128; 2029 SizeType = UnsignedLong; 2030 IntPtrType = SignedLong; 2031 DescriptionString = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-" 2032 "i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-" 2033 "a0:0:64-f80:128:128-n8:16:32-S128"; 2034 HasAlignMac68kSupport = true; 2035 } 2036 2037 }; 2038 } // end anonymous namespace 2039 2040 namespace { 2041 // x86-32 Windows target 2042 class WindowsX86_32TargetInfo : public WindowsTargetInfo<X86_32TargetInfo> { 2043 public: 2044 WindowsX86_32TargetInfo(const std::string& triple) 2045 : WindowsTargetInfo<X86_32TargetInfo>(triple) { 2046 TLSSupported = false; 2047 WCharType = UnsignedShort; 2048 DoubleAlign = LongLongAlign = 64; 2049 DescriptionString = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-" 2050 "i64:64:64-f32:32:32-f64:64:64-f80:128:128-v64:64:64-" 2051 "v128:128:128-a0:0:64-f80:32:32-n8:16:32-S32"; 2052 } 2053 virtual void getTargetDefines(const LangOptions &Opts, 2054 MacroBuilder &Builder) const { 2055 WindowsTargetInfo<X86_32TargetInfo>::getTargetDefines(Opts, Builder); 2056 } 2057 }; 2058 } // end anonymous namespace 2059 2060 namespace { 2061 2062 // x86-32 Windows Visual Studio target 2063 class VisualStudioWindowsX86_32TargetInfo : public WindowsX86_32TargetInfo { 2064 public: 2065 VisualStudioWindowsX86_32TargetInfo(const std::string& triple) 2066 : WindowsX86_32TargetInfo(triple) { 2067 LongDoubleWidth = LongDoubleAlign = 64; 2068 LongDoubleFormat = &llvm::APFloat::IEEEdouble; 2069 } 2070 virtual void getTargetDefines(const LangOptions &Opts, 2071 MacroBuilder &Builder) const { 2072 WindowsX86_32TargetInfo::getTargetDefines(Opts, Builder); 2073 WindowsX86_32TargetInfo::getVisualStudioDefines(Opts, Builder); 2074 // The value of the following reflects processor type. 2075 // 300=386, 400=486, 500=Pentium, 600=Blend (default) 2076 // We lost the original triple, so we use the default. 2077 Builder.defineMacro("_M_IX86", "600"); 2078 } 2079 }; 2080 } // end anonymous namespace 2081 2082 namespace { 2083 // x86-32 MinGW target 2084 class MinGWX86_32TargetInfo : public WindowsX86_32TargetInfo { 2085 public: 2086 MinGWX86_32TargetInfo(const std::string& triple) 2087 : WindowsX86_32TargetInfo(triple) { 2088 } 2089 virtual void getTargetDefines(const LangOptions &Opts, 2090 MacroBuilder &Builder) const { 2091 WindowsX86_32TargetInfo::getTargetDefines(Opts, Builder); 2092 DefineStd(Builder, "WIN32", Opts); 2093 DefineStd(Builder, "WINNT", Opts); 2094 Builder.defineMacro("_X86_"); 2095 Builder.defineMacro("__MSVCRT__"); 2096 Builder.defineMacro("__MINGW32__"); 2097 2098 // mingw32-gcc provides __declspec(a) as alias of __attribute__((a)). 2099 // In contrast, clang-cc1 provides __declspec(a) with -fms-extensions. 2100 if (Opts.MicrosoftExt) 2101 // Provide "as-is" __declspec. 2102 Builder.defineMacro("__declspec", "__declspec"); 2103 else 2104 // Provide alias of __attribute__ like mingw32-gcc. 2105 Builder.defineMacro("__declspec(a)", "__attribute__((a))"); 2106 } 2107 }; 2108 } // end anonymous namespace 2109 2110 namespace { 2111 // x86-32 Cygwin target 2112 class CygwinX86_32TargetInfo : public X86_32TargetInfo { 2113 public: 2114 CygwinX86_32TargetInfo(const std::string& triple) 2115 : X86_32TargetInfo(triple) { 2116 TLSSupported = false; 2117 WCharType = UnsignedShort; 2118 DoubleAlign = LongLongAlign = 64; 2119 DescriptionString = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-" 2120 "i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-" 2121 "a0:0:64-f80:32:32-n8:16:32-S32"; 2122 } 2123 virtual void getTargetDefines(const LangOptions &Opts, 2124 MacroBuilder &Builder) const { 2125 X86_32TargetInfo::getTargetDefines(Opts, Builder); 2126 Builder.defineMacro("__CYGWIN__"); 2127 Builder.defineMacro("__CYGWIN32__"); 2128 DefineStd(Builder, "unix", Opts); 2129 if (Opts.CPlusPlus) 2130 Builder.defineMacro("_GNU_SOURCE"); 2131 } 2132 }; 2133 } // end anonymous namespace 2134 2135 namespace { 2136 // x86-32 Haiku target 2137 class HaikuX86_32TargetInfo : public X86_32TargetInfo { 2138 public: 2139 HaikuX86_32TargetInfo(const std::string& triple) 2140 : X86_32TargetInfo(triple) { 2141 SizeType = UnsignedLong; 2142 IntPtrType = SignedLong; 2143 PtrDiffType = SignedLong; 2144 this->UserLabelPrefix = ""; 2145 } 2146 virtual void getTargetDefines(const LangOptions &Opts, 2147 MacroBuilder &Builder) const { 2148 X86_32TargetInfo::getTargetDefines(Opts, Builder); 2149 Builder.defineMacro("__INTEL__"); 2150 Builder.defineMacro("__HAIKU__"); 2151 } 2152 }; 2153 } // end anonymous namespace 2154 2155 // RTEMS Target 2156 template<typename Target> 2157 class RTEMSTargetInfo : public OSTargetInfo<Target> { 2158 protected: 2159 virtual void getOSDefines(const LangOptions &Opts, const llvm::Triple &Triple, 2160 MacroBuilder &Builder) const { 2161 // RTEMS defines; list based off of gcc output 2162 2163 Builder.defineMacro("__rtems__"); 2164 Builder.defineMacro("__ELF__"); 2165 } 2166 public: 2167 RTEMSTargetInfo(const std::string &triple) 2168 : OSTargetInfo<Target>(triple) { 2169 this->UserLabelPrefix = ""; 2170 2171 llvm::Triple Triple(triple); 2172 switch (Triple.getArch()) { 2173 default: 2174 case llvm::Triple::x86: 2175 // this->MCountName = ".mcount"; 2176 break; 2177 case llvm::Triple::mips: 2178 case llvm::Triple::mipsel: 2179 case llvm::Triple::ppc: 2180 case llvm::Triple::ppc64: 2181 // this->MCountName = "_mcount"; 2182 break; 2183 case llvm::Triple::arm: 2184 // this->MCountName = "__mcount"; 2185 break; 2186 } 2187 2188 } 2189 }; 2190 2191 namespace { 2192 // x86-32 RTEMS target 2193 class RTEMSX86_32TargetInfo : public X86_32TargetInfo { 2194 public: 2195 RTEMSX86_32TargetInfo(const std::string& triple) 2196 : X86_32TargetInfo(triple) { 2197 SizeType = UnsignedLong; 2198 IntPtrType = SignedLong; 2199 PtrDiffType = SignedLong; 2200 this->UserLabelPrefix = ""; 2201 } 2202 virtual void getTargetDefines(const LangOptions &Opts, 2203 MacroBuilder &Builder) const { 2204 X86_32TargetInfo::getTargetDefines(Opts, Builder); 2205 Builder.defineMacro("__INTEL__"); 2206 Builder.defineMacro("__rtems__"); 2207 } 2208 }; 2209 } // end anonymous namespace 2210 2211 namespace { 2212 // x86-64 generic target 2213 class X86_64TargetInfo : public X86TargetInfo { 2214 public: 2215 X86_64TargetInfo(const std::string &triple) : X86TargetInfo(triple) { 2216 LongWidth = LongAlign = PointerWidth = PointerAlign = 64; 2217 LongDoubleWidth = 128; 2218 LongDoubleAlign = 128; 2219 LargeArrayMinWidth = 128; 2220 LargeArrayAlign = 128; 2221 IntMaxType = SignedLong; 2222 UIntMaxType = UnsignedLong; 2223 Int64Type = SignedLong; 2224 RegParmMax = 6; 2225 2226 DescriptionString = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-" 2227 "i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-" 2228 "a0:0:64-s0:64:64-f80:128:128-n8:16:32:64-S128"; 2229 2230 // Use fpret only for long double. 2231 RealTypeUsesObjCFPRet = (1 << TargetInfo::LongDouble); 2232 2233 // x86-64 has atomics up to 16 bytes. 2234 // FIXME: Once the backend is fixed, increase MaxAtomicInlineWidth to 128 2235 // on CPUs with cmpxchg16b 2236 MaxAtomicPromoteWidth = 128; 2237 MaxAtomicInlineWidth = 64; 2238 } 2239 virtual const char *getVAListDeclaration() const { 2240 return "typedef struct __va_list_tag {" 2241 " unsigned gp_offset;" 2242 " unsigned fp_offset;" 2243 " void* overflow_arg_area;" 2244 " void* reg_save_area;" 2245 "} __va_list_tag;" 2246 "typedef __va_list_tag __builtin_va_list[1];"; 2247 } 2248 2249 int getEHDataRegisterNumber(unsigned RegNo) const { 2250 if (RegNo == 0) return 0; 2251 if (RegNo == 1) return 1; 2252 return -1; 2253 } 2254 }; 2255 } // end anonymous namespace 2256 2257 namespace { 2258 // x86-64 Windows target 2259 class WindowsX86_64TargetInfo : public WindowsTargetInfo<X86_64TargetInfo> { 2260 public: 2261 WindowsX86_64TargetInfo(const std::string& triple) 2262 : WindowsTargetInfo<X86_64TargetInfo>(triple) { 2263 TLSSupported = false; 2264 WCharType = UnsignedShort; 2265 LongWidth = LongAlign = 32; 2266 DoubleAlign = LongLongAlign = 64; 2267 IntMaxType = SignedLongLong; 2268 UIntMaxType = UnsignedLongLong; 2269 Int64Type = SignedLongLong; 2270 SizeType = UnsignedLongLong; 2271 PtrDiffType = SignedLongLong; 2272 IntPtrType = SignedLongLong; 2273 this->UserLabelPrefix = ""; 2274 } 2275 virtual void getTargetDefines(const LangOptions &Opts, 2276 MacroBuilder &Builder) const { 2277 WindowsTargetInfo<X86_64TargetInfo>::getTargetDefines(Opts, Builder); 2278 Builder.defineMacro("_WIN64"); 2279 } 2280 virtual const char *getVAListDeclaration() const { 2281 return "typedef char* __builtin_va_list;"; 2282 } 2283 }; 2284 } // end anonymous namespace 2285 2286 namespace { 2287 // x86-64 Windows Visual Studio target 2288 class VisualStudioWindowsX86_64TargetInfo : public WindowsX86_64TargetInfo { 2289 public: 2290 VisualStudioWindowsX86_64TargetInfo(const std::string& triple) 2291 : WindowsX86_64TargetInfo(triple) { 2292 LongDoubleWidth = LongDoubleAlign = 64; 2293 LongDoubleFormat = &llvm::APFloat::IEEEdouble; 2294 } 2295 virtual void getTargetDefines(const LangOptions &Opts, 2296 MacroBuilder &Builder) const { 2297 WindowsX86_64TargetInfo::getTargetDefines(Opts, Builder); 2298 WindowsX86_64TargetInfo::getVisualStudioDefines(Opts, Builder); 2299 Builder.defineMacro("_M_X64"); 2300 Builder.defineMacro("_M_AMD64"); 2301 } 2302 }; 2303 } // end anonymous namespace 2304 2305 namespace { 2306 // x86-64 MinGW target 2307 class MinGWX86_64TargetInfo : public WindowsX86_64TargetInfo { 2308 public: 2309 MinGWX86_64TargetInfo(const std::string& triple) 2310 : WindowsX86_64TargetInfo(triple) { 2311 } 2312 virtual void getTargetDefines(const LangOptions &Opts, 2313 MacroBuilder &Builder) const { 2314 WindowsX86_64TargetInfo::getTargetDefines(Opts, Builder); 2315 DefineStd(Builder, "WIN64", Opts); 2316 Builder.defineMacro("__MSVCRT__"); 2317 Builder.defineMacro("__MINGW32__"); 2318 Builder.defineMacro("__MINGW64__"); 2319 2320 // mingw32-gcc provides __declspec(a) as alias of __attribute__((a)). 2321 // In contrast, clang-cc1 provides __declspec(a) with -fms-extensions. 2322 if (Opts.MicrosoftExt) 2323 // Provide "as-is" __declspec. 2324 Builder.defineMacro("__declspec", "__declspec"); 2325 else 2326 // Provide alias of __attribute__ like mingw32-gcc. 2327 Builder.defineMacro("__declspec(a)", "__attribute__((a))"); 2328 } 2329 }; 2330 } // end anonymous namespace 2331 2332 namespace { 2333 class DarwinX86_64TargetInfo : public DarwinTargetInfo<X86_64TargetInfo> { 2334 public: 2335 DarwinX86_64TargetInfo(const std::string& triple) 2336 : DarwinTargetInfo<X86_64TargetInfo>(triple) { 2337 Int64Type = SignedLongLong; 2338 } 2339 }; 2340 } // end anonymous namespace 2341 2342 namespace { 2343 class OpenBSDX86_64TargetInfo : public OpenBSDTargetInfo<X86_64TargetInfo> { 2344 public: 2345 OpenBSDX86_64TargetInfo(const std::string& triple) 2346 : OpenBSDTargetInfo<X86_64TargetInfo>(triple) { 2347 IntMaxType = SignedLongLong; 2348 UIntMaxType = UnsignedLongLong; 2349 Int64Type = SignedLongLong; 2350 } 2351 }; 2352 } // end anonymous namespace 2353 2354 namespace { 2355 class ARMTargetInfo : public TargetInfo { 2356 // Possible FPU choices. 2357 enum FPUMode { 2358 NoFPU, 2359 VFP2FPU, 2360 VFP3FPU, 2361 NeonFPU 2362 }; 2363 2364 static bool FPUModeIsVFP(FPUMode Mode) { 2365 return Mode >= VFP2FPU && Mode <= NeonFPU; 2366 } 2367 2368 static const TargetInfo::GCCRegAlias GCCRegAliases[]; 2369 static const char * const GCCRegNames[]; 2370 2371 std::string ABI, CPU; 2372 2373 unsigned FPU : 3; 2374 2375 unsigned IsThumb : 1; 2376 2377 // Initialized via features. 2378 unsigned SoftFloat : 1; 2379 unsigned SoftFloatABI : 1; 2380 2381 static const Builtin::Info BuiltinInfo[]; 2382 2383 public: 2384 ARMTargetInfo(const std::string &TripleStr) 2385 : TargetInfo(TripleStr), ABI("aapcs-linux"), CPU("arm1136j-s") 2386 { 2387 SizeType = UnsignedInt; 2388 PtrDiffType = SignedInt; 2389 2390 // {} in inline assembly are neon specifiers, not assembly variant 2391 // specifiers. 2392 NoAsmVariants = true; 2393 2394 // FIXME: Should we just treat this as a feature? 2395 IsThumb = getTriple().getArchName().startswith("thumb"); 2396 if (IsThumb) { 2397 // Thumb1 add sp, #imm requires the immediate value be multiple of 4, 2398 // so set preferred for small types to 32. 2399 DescriptionString = ("e-p:32:32:32-i1:8:32-i8:8:32-i16:16:32-i32:32:32-" 2400 "i64:64:64-f32:32:32-f64:64:64-" 2401 "v64:64:64-v128:64:128-a0:0:32-n32-S64"); 2402 } else { 2403 DescriptionString = ("e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-" 2404 "i64:64:64-f32:32:32-f64:64:64-" 2405 "v64:64:64-v128:64:128-a0:0:64-n32-S64"); 2406 } 2407 2408 // ARM targets default to using the ARM C++ ABI. 2409 CXXABI = CXXABI_ARM; 2410 2411 // ARM has atomics up to 8 bytes 2412 // FIXME: Set MaxAtomicInlineWidth if we have the feature v6e 2413 MaxAtomicPromoteWidth = 64; 2414 } 2415 virtual const char *getABI() const { return ABI.c_str(); } 2416 virtual bool setABI(const std::string &Name) { 2417 ABI = Name; 2418 2419 // The defaults (above) are for AAPCS, check if we need to change them. 2420 // 2421 // FIXME: We need support for -meabi... we could just mangle it into the 2422 // name. 2423 if (Name == "apcs-gnu") { 2424 DoubleAlign = LongLongAlign = LongDoubleAlign = 32; 2425 SizeType = UnsignedLong; 2426 2427 // Do not respect the alignment of bit-field types when laying out 2428 // structures. This corresponds to PCC_BITFIELD_TYPE_MATTERS in gcc. 2429 UseBitFieldTypeAlignment = false; 2430 2431 /// Do force alignment of members that follow zero length bitfields. If 2432 /// the alignment of the zero-length bitfield is greater than the member 2433 /// that follows it, `bar', `bar' will be aligned as the type of the 2434 /// zero length bitfield. 2435 UseZeroLengthBitfieldAlignment = true; 2436 2437 /// gcc forces the alignment to 4 bytes, regardless of the type of the 2438 /// zero length bitfield. This corresponds to EMPTY_FIELD_BOUNDARY in 2439 /// gcc. 2440 ZeroLengthBitfieldBoundary = 32; 2441 2442 if (IsThumb) { 2443 // Thumb1 add sp, #imm requires the immediate value be multiple of 4, 2444 // so set preferred for small types to 32. 2445 DescriptionString = ("e-p:32:32:32-i1:8:32-i8:8:32-i16:16:32-i32:32:32-" 2446 "i64:32:64-f32:32:32-f64:32:64-" 2447 "v64:32:64-v128:32:128-a0:0:32-n32-S32"); 2448 } else { 2449 DescriptionString = ("e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-" 2450 "i64:32:64-f32:32:32-f64:32:64-" 2451 "v64:32:64-v128:32:128-a0:0:32-n32-S32"); 2452 } 2453 2454 // FIXME: Override "preferred align" for double and long long. 2455 } else if (Name == "aapcs") { 2456 // FIXME: Enumerated types are variable width in straight AAPCS. 2457 } else if (Name == "aapcs-linux") { 2458 ; 2459 } else 2460 return false; 2461 2462 return true; 2463 } 2464 2465 void getDefaultFeatures(llvm::StringMap<bool> &Features) const { 2466 if (CPU == "arm1136jf-s" || CPU == "arm1176jzf-s" || CPU == "mpcore") 2467 Features["vfp2"] = true; 2468 else if (CPU == "cortex-a8" || CPU == "cortex-a9") 2469 Features["neon"] = true; 2470 } 2471 2472 virtual bool setFeatureEnabled(llvm::StringMap<bool> &Features, 2473 const std::string &Name, 2474 bool Enabled) const { 2475 if (Name == "soft-float" || Name == "soft-float-abi" || 2476 Name == "vfp2" || Name == "vfp3" || Name == "neon" || 2477 Name == "long64") { 2478 Features[Name] = Enabled; 2479 } else 2480 return false; 2481 2482 return true; 2483 } 2484 2485 virtual void HandleTargetFeatures(std::vector<std::string> &Features) { 2486 FPU = NoFPU; 2487 SoftFloat = SoftFloatABI = false; 2488 for (unsigned i = 0, e = Features.size(); i != e; ++i) { 2489 if (Features[i] == "+soft-float") 2490 SoftFloat = true; 2491 else if (Features[i] == "+soft-float-abi") 2492 SoftFloatABI = true; 2493 else if (Features[i] == "+vfp2") 2494 FPU = VFP2FPU; 2495 else if (Features[i] == "+vfp3") 2496 FPU = VFP3FPU; 2497 else if (Features[i] == "+neon") 2498 FPU = NeonFPU; 2499 else if (Features[i] == "+long64") 2500 LongWidth = LongAlign = 64; // RenderScript uses a 64-bit long type 2501 } 2502 2503 // Remove front-end specific options which the backend handles differently. 2504 std::vector<std::string>::iterator it; 2505 it = std::find(Features.begin(), Features.end(), "+soft-float"); 2506 if (it != Features.end()) 2507 Features.erase(it); 2508 it = std::find(Features.begin(), Features.end(), "+soft-float-abi"); 2509 if (it != Features.end()) 2510 Features.erase(it); 2511 } 2512 2513 static const char *getCPUDefineSuffix(StringRef Name) { 2514 return llvm::StringSwitch<const char*>(Name) 2515 .Cases("arm8", "arm810", "4") 2516 .Cases("strongarm", "strongarm110", "strongarm1100", "strongarm1110", "4") 2517 .Cases("arm7tdmi", "arm7tdmi-s", "arm710t", "arm720t", "arm9", "4T") 2518 .Cases("arm9tdmi", "arm920", "arm920t", "arm922t", "arm940t", "4T") 2519 .Case("ep9312", "4T") 2520 .Cases("arm10tdmi", "arm1020t", "5T") 2521 .Cases("arm9e", "arm946e-s", "arm966e-s", "arm968e-s", "5TE") 2522 .Case("arm926ej-s", "5TEJ") 2523 .Cases("arm10e", "arm1020e", "arm1022e", "5TE") 2524 .Cases("xscale", "iwmmxt", "5TE") 2525 .Case("arm1136j-s", "6J") 2526 .Cases("arm1176jz-s", "arm1176jzf-s", "6ZK") 2527 .Cases("arm1136jf-s", "mpcorenovfp", "mpcore", "6K") 2528 .Cases("arm1156t2-s", "arm1156t2f-s", "6T2") 2529 .Cases("cortex-a8", "cortex-a9", "7A") 2530 .Case("cortex-m3", "7M") 2531 .Case("cortex-m0", "6M") 2532 .Default(0); 2533 } 2534 virtual bool setCPU(const std::string &Name) { 2535 if (!getCPUDefineSuffix(Name)) 2536 return false; 2537 2538 CPU = Name; 2539 return true; 2540 } 2541 virtual void getTargetDefines(const LangOptions &Opts, 2542 MacroBuilder &Builder) const { 2543 // Target identification. 2544 Builder.defineMacro("__arm"); 2545 Builder.defineMacro("__arm__"); 2546 2547 // Target properties. 2548 Builder.defineMacro("__ARMEL__"); 2549 Builder.defineMacro("__LITTLE_ENDIAN__"); 2550 Builder.defineMacro("__REGISTER_PREFIX__", ""); 2551 2552 StringRef CPUArch = getCPUDefineSuffix(CPU); 2553 Builder.defineMacro("__ARM_ARCH_" + CPUArch + "__"); 2554 2555 // Subtarget options. 2556 2557 // FIXME: It's more complicated than this and we don't really support 2558 // interworking. 2559 if ('5' <= CPUArch[0] && CPUArch[0] <= '7') 2560 Builder.defineMacro("__THUMB_INTERWORK__"); 2561 2562 if (ABI == "aapcs" || ABI == "aapcs-linux") 2563 Builder.defineMacro("__ARM_EABI__"); 2564 2565 if (SoftFloat) 2566 Builder.defineMacro("__SOFTFP__"); 2567 2568 if (CPU == "xscale") 2569 Builder.defineMacro("__XSCALE__"); 2570 2571 bool IsARMv7 = CPUArch.startswith("7"); 2572 if (IsThumb) { 2573 Builder.defineMacro("__THUMBEL__"); 2574 Builder.defineMacro("__thumb__"); 2575 if (CPUArch == "6T2" || IsARMv7) 2576 Builder.defineMacro("__thumb2__"); 2577 } 2578 2579 // Note, this is always on in gcc, even though it doesn't make sense. 2580 Builder.defineMacro("__APCS_32__"); 2581 2582 if (FPUModeIsVFP((FPUMode) FPU)) 2583 Builder.defineMacro("__VFP_FP__"); 2584 2585 // This only gets set when Neon instructions are actually available, unlike 2586 // the VFP define, hence the soft float and arch check. This is subtly 2587 // different from gcc, we follow the intent which was that it should be set 2588 // when Neon instructions are actually available. 2589 if (FPU == NeonFPU && !SoftFloat && IsARMv7) 2590 Builder.defineMacro("__ARM_NEON__"); 2591 } 2592 virtual void getTargetBuiltins(const Builtin::Info *&Records, 2593 unsigned &NumRecords) const { 2594 Records = BuiltinInfo; 2595 NumRecords = clang::ARM::LastTSBuiltin-Builtin::FirstTSBuiltin; 2596 } 2597 virtual const char *getVAListDeclaration() const { 2598 return "typedef void* __builtin_va_list;"; 2599 } 2600 virtual void getGCCRegNames(const char * const *&Names, 2601 unsigned &NumNames) const; 2602 virtual void getGCCRegAliases(const GCCRegAlias *&Aliases, 2603 unsigned &NumAliases) const; 2604 virtual bool validateAsmConstraint(const char *&Name, 2605 TargetInfo::ConstraintInfo &Info) const { 2606 // FIXME: Check if this is complete 2607 switch (*Name) { 2608 default: 2609 case 'l': // r0-r7 2610 case 'h': // r8-r15 2611 case 'w': // VFP Floating point register single precision 2612 case 'P': // VFP Floating point register double precision 2613 Info.setAllowsRegister(); 2614 return true; 2615 case 'Q': // A memory address that is a single base register. 2616 Info.setAllowsMemory(); 2617 return true; 2618 case 'U': // a memory reference... 2619 switch (Name[1]) { 2620 case 'q': // ...ARMV4 ldrsb 2621 case 'v': // ...VFP load/store (reg+constant offset) 2622 case 'y': // ...iWMMXt load/store 2623 case 't': // address valid for load/store opaque types wider 2624 // than 128-bits 2625 case 'n': // valid address for Neon doubleword vector load/store 2626 case 'm': // valid address for Neon element and structure load/store 2627 case 's': // valid address for non-offset loads/stores of quad-word 2628 // values in four ARM registers 2629 Info.setAllowsMemory(); 2630 Name++; 2631 return true; 2632 } 2633 } 2634 return false; 2635 } 2636 virtual std::string convertConstraint(const char *&Constraint) const { 2637 std::string R; 2638 switch (*Constraint) { 2639 case 'U': // Two-character constraint; add "^" hint for later parsing. 2640 R = std::string("^") + std::string(Constraint, 2); 2641 Constraint++; 2642 break; 2643 case 'p': // 'p' should be translated to 'r' by default. 2644 R = std::string("r"); 2645 break; 2646 default: 2647 return std::string(1, *Constraint); 2648 } 2649 return R; 2650 } 2651 virtual const char *getClobbers() const { 2652 // FIXME: Is this really right? 2653 return ""; 2654 } 2655 }; 2656 2657 const char * const ARMTargetInfo::GCCRegNames[] = { 2658 // Integer registers 2659 "r0", "r1", "r2", "r3", "r4", "r5", "r6", "r7", 2660 "r8", "r9", "r10", "r11", "r12", "sp", "lr", "pc", 2661 2662 // Float registers 2663 "s0", "s1", "s2", "s3", "s4", "s5", "s6", "s7", 2664 "s8", "s9", "s10", "s11", "s12", "s13", "s14", "s15", 2665 "s16", "s17", "s18", "s19", "s20", "s21", "s22", "s23", 2666 "s24", "s25", "s26", "s27", "s28", "s29", "s30", "s31", 2667 2668 // Double registers 2669 "d0", "d1", "d2", "d3", "d4", "d5", "d6", "d7", 2670 "d8", "d9", "d10", "d11", "d12", "d13", "d14", "d15", 2671 "d16", "d17", "d18", "d19", "d20", "d21", "d22", "d23", 2672 "d24", "d25", "d26", "d27", "d28", "d29", "d30", "d31", 2673 2674 // Quad registers 2675 "q0", "q1", "q2", "q3", "q4", "q5", "q6", "q7", 2676 "q8", "q9", "q10", "q11", "q12", "q13", "q14", "q15" 2677 }; 2678 2679 void ARMTargetInfo::getGCCRegNames(const char * const *&Names, 2680 unsigned &NumNames) const { 2681 Names = GCCRegNames; 2682 NumNames = llvm::array_lengthof(GCCRegNames); 2683 } 2684 2685 const TargetInfo::GCCRegAlias ARMTargetInfo::GCCRegAliases[] = { 2686 { { "a1" }, "r0" }, 2687 { { "a2" }, "r1" }, 2688 { { "a3" }, "r2" }, 2689 { { "a4" }, "r3" }, 2690 { { "v1" }, "r4" }, 2691 { { "v2" }, "r5" }, 2692 { { "v3" }, "r6" }, 2693 { { "v4" }, "r7" }, 2694 { { "v5" }, "r8" }, 2695 { { "v6", "rfp" }, "r9" }, 2696 { { "sl" }, "r10" }, 2697 { { "fp" }, "r11" }, 2698 { { "ip" }, "r12" }, 2699 { { "r13" }, "sp" }, 2700 { { "r14" }, "lr" }, 2701 { { "r15" }, "pc" }, 2702 // The S, D and Q registers overlap, but aren't really aliases; we 2703 // don't want to substitute one of these for a different-sized one. 2704 }; 2705 2706 void ARMTargetInfo::getGCCRegAliases(const GCCRegAlias *&Aliases, 2707 unsigned &NumAliases) const { 2708 Aliases = GCCRegAliases; 2709 NumAliases = llvm::array_lengthof(GCCRegAliases); 2710 } 2711 2712 const Builtin::Info ARMTargetInfo::BuiltinInfo[] = { 2713 #define BUILTIN(ID, TYPE, ATTRS) { #ID, TYPE, ATTRS, 0, ALL_LANGUAGES }, 2714 #define LIBBUILTIN(ID, TYPE, ATTRS, HEADER) { #ID, TYPE, ATTRS, HEADER,\ 2715 ALL_LANGUAGES }, 2716 #include "clang/Basic/BuiltinsARM.def" 2717 }; 2718 } // end anonymous namespace. 2719 2720 2721 namespace { 2722 class DarwinARMTargetInfo : 2723 public DarwinTargetInfo<ARMTargetInfo> { 2724 protected: 2725 virtual void getOSDefines(const LangOptions &Opts, const llvm::Triple &Triple, 2726 MacroBuilder &Builder) const { 2727 getDarwinDefines(Builder, Opts, Triple, PlatformName, PlatformMinVersion); 2728 } 2729 2730 public: 2731 DarwinARMTargetInfo(const std::string& triple) 2732 : DarwinTargetInfo<ARMTargetInfo>(triple) { 2733 HasAlignMac68kSupport = true; 2734 // iOS always has 64-bit atomic instructions. 2735 // FIXME: This should be based off of the target features in ARMTargetInfo. 2736 MaxAtomicInlineWidth = 64; 2737 } 2738 }; 2739 } // end anonymous namespace. 2740 2741 namespace { 2742 class SparcV8TargetInfo : public TargetInfo { 2743 static const TargetInfo::GCCRegAlias GCCRegAliases[]; 2744 static const char * const GCCRegNames[]; 2745 bool SoftFloat; 2746 public: 2747 SparcV8TargetInfo(const std::string& triple) : TargetInfo(triple) { 2748 // FIXME: Support Sparc quad-precision long double? 2749 DescriptionString = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-" 2750 "i64:64:64-f32:32:32-f64:64:64-v64:64:64-n32"; 2751 } 2752 virtual bool setFeatureEnabled(llvm::StringMap<bool> &Features, 2753 const std::string &Name, 2754 bool Enabled) const { 2755 if (Name == "soft-float") 2756 Features[Name] = Enabled; 2757 else 2758 return false; 2759 2760 return true; 2761 } 2762 virtual void HandleTargetFeatures(std::vector<std::string> &Features) { 2763 SoftFloat = false; 2764 for (unsigned i = 0, e = Features.size(); i != e; ++i) 2765 if (Features[i] == "+soft-float") 2766 SoftFloat = true; 2767 } 2768 virtual void getTargetDefines(const LangOptions &Opts, 2769 MacroBuilder &Builder) const { 2770 DefineStd(Builder, "sparc", Opts); 2771 Builder.defineMacro("__sparcv8"); 2772 Builder.defineMacro("__REGISTER_PREFIX__", ""); 2773 2774 if (SoftFloat) 2775 Builder.defineMacro("SOFT_FLOAT", "1"); 2776 } 2777 virtual void getTargetBuiltins(const Builtin::Info *&Records, 2778 unsigned &NumRecords) const { 2779 // FIXME: Implement! 2780 } 2781 virtual const char *getVAListDeclaration() const { 2782 return "typedef void* __builtin_va_list;"; 2783 } 2784 virtual void getGCCRegNames(const char * const *&Names, 2785 unsigned &NumNames) const; 2786 virtual void getGCCRegAliases(const GCCRegAlias *&Aliases, 2787 unsigned &NumAliases) const; 2788 virtual bool validateAsmConstraint(const char *&Name, 2789 TargetInfo::ConstraintInfo &info) const { 2790 // FIXME: Implement! 2791 return false; 2792 } 2793 virtual const char *getClobbers() const { 2794 // FIXME: Implement! 2795 return ""; 2796 } 2797 }; 2798 2799 const char * const SparcV8TargetInfo::GCCRegNames[] = { 2800 "r0", "r1", "r2", "r3", "r4", "r5", "r6", "r7", 2801 "r8", "r9", "r10", "r11", "r12", "r13", "r14", "r15", 2802 "r16", "r17", "r18", "r19", "r20", "r21", "r22", "r23", 2803 "r24", "r25", "r26", "r27", "r28", "r29", "r30", "r31" 2804 }; 2805 2806 void SparcV8TargetInfo::getGCCRegNames(const char * const *&Names, 2807 unsigned &NumNames) const { 2808 Names = GCCRegNames; 2809 NumNames = llvm::array_lengthof(GCCRegNames); 2810 } 2811 2812 const TargetInfo::GCCRegAlias SparcV8TargetInfo::GCCRegAliases[] = { 2813 { { "g0" }, "r0" }, 2814 { { "g1" }, "r1" }, 2815 { { "g2" }, "r2" }, 2816 { { "g3" }, "r3" }, 2817 { { "g4" }, "r4" }, 2818 { { "g5" }, "r5" }, 2819 { { "g6" }, "r6" }, 2820 { { "g7" }, "r7" }, 2821 { { "o0" }, "r8" }, 2822 { { "o1" }, "r9" }, 2823 { { "o2" }, "r10" }, 2824 { { "o3" }, "r11" }, 2825 { { "o4" }, "r12" }, 2826 { { "o5" }, "r13" }, 2827 { { "o6", "sp" }, "r14" }, 2828 { { "o7" }, "r15" }, 2829 { { "l0" }, "r16" }, 2830 { { "l1" }, "r17" }, 2831 { { "l2" }, "r18" }, 2832 { { "l3" }, "r19" }, 2833 { { "l4" }, "r20" }, 2834 { { "l5" }, "r21" }, 2835 { { "l6" }, "r22" }, 2836 { { "l7" }, "r23" }, 2837 { { "i0" }, "r24" }, 2838 { { "i1" }, "r25" }, 2839 { { "i2" }, "r26" }, 2840 { { "i3" }, "r27" }, 2841 { { "i4" }, "r28" }, 2842 { { "i5" }, "r29" }, 2843 { { "i6", "fp" }, "r30" }, 2844 { { "i7" }, "r31" }, 2845 }; 2846 2847 void SparcV8TargetInfo::getGCCRegAliases(const GCCRegAlias *&Aliases, 2848 unsigned &NumAliases) const { 2849 Aliases = GCCRegAliases; 2850 NumAliases = llvm::array_lengthof(GCCRegAliases); 2851 } 2852 } // end anonymous namespace. 2853 2854 namespace { 2855 class AuroraUXSparcV8TargetInfo : public AuroraUXTargetInfo<SparcV8TargetInfo> { 2856 public: 2857 AuroraUXSparcV8TargetInfo(const std::string& triple) : 2858 AuroraUXTargetInfo<SparcV8TargetInfo>(triple) { 2859 SizeType = UnsignedInt; 2860 PtrDiffType = SignedInt; 2861 } 2862 }; 2863 class SolarisSparcV8TargetInfo : public SolarisTargetInfo<SparcV8TargetInfo> { 2864 public: 2865 SolarisSparcV8TargetInfo(const std::string& triple) : 2866 SolarisTargetInfo<SparcV8TargetInfo>(triple) { 2867 SizeType = UnsignedInt; 2868 PtrDiffType = SignedInt; 2869 } 2870 }; 2871 } // end anonymous namespace. 2872 2873 namespace { 2874 class MSP430TargetInfo : public TargetInfo { 2875 static const char * const GCCRegNames[]; 2876 public: 2877 MSP430TargetInfo(const std::string& triple) : TargetInfo(triple) { 2878 TLSSupported = false; 2879 IntWidth = 16; IntAlign = 16; 2880 LongWidth = 32; LongLongWidth = 64; 2881 LongAlign = LongLongAlign = 16; 2882 PointerWidth = 16; PointerAlign = 16; 2883 SizeType = UnsignedInt; 2884 IntMaxType = SignedLong; 2885 UIntMaxType = UnsignedLong; 2886 IntPtrType = SignedShort; 2887 PtrDiffType = SignedInt; 2888 SigAtomicType = SignedLong; 2889 DescriptionString = "e-p:16:16:16-i8:8:8-i16:16:16-i32:16:32-n8:16"; 2890 } 2891 virtual void getTargetDefines(const LangOptions &Opts, 2892 MacroBuilder &Builder) const { 2893 Builder.defineMacro("MSP430"); 2894 Builder.defineMacro("__MSP430__"); 2895 // FIXME: defines for different 'flavours' of MCU 2896 } 2897 virtual void getTargetBuiltins(const Builtin::Info *&Records, 2898 unsigned &NumRecords) const { 2899 // FIXME: Implement. 2900 Records = 0; 2901 NumRecords = 0; 2902 } 2903 virtual void getGCCRegNames(const char * const *&Names, 2904 unsigned &NumNames) const; 2905 virtual void getGCCRegAliases(const GCCRegAlias *&Aliases, 2906 unsigned &NumAliases) const { 2907 // No aliases. 2908 Aliases = 0; 2909 NumAliases = 0; 2910 } 2911 virtual bool validateAsmConstraint(const char *&Name, 2912 TargetInfo::ConstraintInfo &info) const { 2913 // No target constraints for now. 2914 return false; 2915 } 2916 virtual const char *getClobbers() const { 2917 // FIXME: Is this really right? 2918 return ""; 2919 } 2920 virtual const char *getVAListDeclaration() const { 2921 // FIXME: implement 2922 return "typedef char* __builtin_va_list;"; 2923 } 2924 }; 2925 2926 const char * const MSP430TargetInfo::GCCRegNames[] = { 2927 "r0", "r1", "r2", "r3", "r4", "r5", "r6", "r7", 2928 "r8", "r9", "r10", "r11", "r12", "r13", "r14", "r15" 2929 }; 2930 2931 void MSP430TargetInfo::getGCCRegNames(const char * const *&Names, 2932 unsigned &NumNames) const { 2933 Names = GCCRegNames; 2934 NumNames = llvm::array_lengthof(GCCRegNames); 2935 } 2936 } 2937 2938 2939 namespace { 2940 class SystemZTargetInfo : public TargetInfo { 2941 static const char * const GCCRegNames[]; 2942 public: 2943 SystemZTargetInfo(const std::string& triple) : TargetInfo(triple) { 2944 TLSSupported = false; 2945 IntWidth = IntAlign = 32; 2946 LongWidth = LongLongWidth = LongAlign = LongLongAlign = 64; 2947 PointerWidth = PointerAlign = 64; 2948 DescriptionString = "E-p:64:64:64-i8:8:16-i16:16:16-i32:32:32-" 2949 "i64:64:64-f32:32:32-f64:64:64-f128:128:128-a0:16:16-n32:64"; 2950 } 2951 virtual void getTargetDefines(const LangOptions &Opts, 2952 MacroBuilder &Builder) const { 2953 Builder.defineMacro("__s390__"); 2954 Builder.defineMacro("__s390x__"); 2955 } 2956 virtual void getTargetBuiltins(const Builtin::Info *&Records, 2957 unsigned &NumRecords) const { 2958 // FIXME: Implement. 2959 Records = 0; 2960 NumRecords = 0; 2961 } 2962 2963 virtual void getGCCRegNames(const char * const *&Names, 2964 unsigned &NumNames) const; 2965 virtual void getGCCRegAliases(const GCCRegAlias *&Aliases, 2966 unsigned &NumAliases) const { 2967 // No aliases. 2968 Aliases = 0; 2969 NumAliases = 0; 2970 } 2971 virtual bool validateAsmConstraint(const char *&Name, 2972 TargetInfo::ConstraintInfo &info) const { 2973 // FIXME: implement 2974 return true; 2975 } 2976 virtual const char *getClobbers() const { 2977 // FIXME: Is this really right? 2978 return ""; 2979 } 2980 virtual const char *getVAListDeclaration() const { 2981 // FIXME: implement 2982 return "typedef char* __builtin_va_list;"; 2983 } 2984 }; 2985 2986 const char * const SystemZTargetInfo::GCCRegNames[] = { 2987 "r0", "r1", "r2", "r3", "r4", "r5", "r6", "r7", 2988 "r8", "r9", "r10", "r11", "r12", "r13", "r14", "r15" 2989 }; 2990 2991 void SystemZTargetInfo::getGCCRegNames(const char * const *&Names, 2992 unsigned &NumNames) const { 2993 Names = GCCRegNames; 2994 NumNames = llvm::array_lengthof(GCCRegNames); 2995 } 2996 } 2997 2998 namespace { 2999 class BlackfinTargetInfo : public TargetInfo { 3000 static const char * const GCCRegNames[]; 3001 public: 3002 BlackfinTargetInfo(const std::string& triple) : TargetInfo(triple) { 3003 TLSSupported = false; 3004 DoubleAlign = 32; 3005 LongLongAlign = 32; 3006 LongDoubleAlign = 32; 3007 DescriptionString = "e-p:32:32-i64:32-f64:32-n32"; 3008 } 3009 3010 virtual void getTargetDefines(const LangOptions &Opts, 3011 MacroBuilder &Builder) const { 3012 DefineStd(Builder, "bfin", Opts); 3013 DefineStd(Builder, "BFIN", Opts); 3014 Builder.defineMacro("__ADSPBLACKFIN__"); 3015 // FIXME: This one is really dependent on -mcpu 3016 Builder.defineMacro("__ADSPLPBLACKFIN__"); 3017 // FIXME: Add cpu-dependent defines and __SILICON_REVISION__ 3018 } 3019 3020 virtual void getTargetBuiltins(const Builtin::Info *&Records, 3021 unsigned &NumRecords) const { 3022 // FIXME: Implement. 3023 Records = 0; 3024 NumRecords = 0; 3025 } 3026 3027 virtual void getGCCRegNames(const char * const *&Names, 3028 unsigned &NumNames) const; 3029 3030 virtual void getGCCRegAliases(const GCCRegAlias *&Aliases, 3031 unsigned &NumAliases) const { 3032 // No aliases. 3033 Aliases = 0; 3034 NumAliases = 0; 3035 } 3036 3037 virtual bool validateAsmConstraint(const char *&Name, 3038 TargetInfo::ConstraintInfo &Info) const { 3039 if (strchr("adzDWeABbvfcCtukxywZY", Name[0])) { 3040 Info.setAllowsRegister(); 3041 return true; 3042 } 3043 return false; 3044 } 3045 3046 virtual const char *getClobbers() const { 3047 return ""; 3048 } 3049 3050 virtual const char *getVAListDeclaration() const { 3051 return "typedef char* __builtin_va_list;"; 3052 } 3053 }; 3054 3055 const char * const BlackfinTargetInfo::GCCRegNames[] = { 3056 "r0", "r1", "r2", "r3", "r4", "r5", "r6", "r7", 3057 "p0", "p1", "p2", "p3", "p4", "p5", "sp", "fp", 3058 "i0", "i1", "i2", "i3", "b0", "b1", "b2", "b3", 3059 "l0", "l1", "l2", "l3", "m0", "m1", "m2", "m3", 3060 "a0", "a1", "cc", 3061 "rets", "reti", "retx", "retn", "rete", "astat", "seqstat", "usp", 3062 "argp", "lt0", "lt1", "lc0", "lc1", "lb0", "lb1" 3063 }; 3064 3065 void BlackfinTargetInfo::getGCCRegNames(const char * const *&Names, 3066 unsigned &NumNames) const { 3067 Names = GCCRegNames; 3068 NumNames = llvm::array_lengthof(GCCRegNames); 3069 } 3070 } 3071 3072 namespace { 3073 3074 // LLVM and Clang cannot be used directly to output native binaries for 3075 // target, but is used to compile C code to llvm bitcode with correct 3076 // type and alignment information. 3077 // 3078 // TCE uses the llvm bitcode as input and uses it for generating customized 3079 // target processor and program binary. TCE co-design environment is 3080 // publicly available in http://tce.cs.tut.fi 3081 3082 static const unsigned TCEOpenCLAddrSpaceMap[] = { 3083 3, // opencl_global 3084 4, // opencl_local 3085 5 // opencl_constant 3086 }; 3087 3088 class TCETargetInfo : public TargetInfo{ 3089 public: 3090 TCETargetInfo(const std::string& triple) : TargetInfo(triple) { 3091 TLSSupported = false; 3092 IntWidth = 32; 3093 LongWidth = LongLongWidth = 32; 3094 PointerWidth = 32; 3095 IntAlign = 32; 3096 LongAlign = LongLongAlign = 32; 3097 PointerAlign = 32; 3098 SizeType = UnsignedInt; 3099 IntMaxType = SignedLong; 3100 UIntMaxType = UnsignedLong; 3101 IntPtrType = SignedInt; 3102 PtrDiffType = SignedInt; 3103 FloatWidth = 32; 3104 FloatAlign = 32; 3105 DoubleWidth = 32; 3106 DoubleAlign = 32; 3107 LongDoubleWidth = 32; 3108 LongDoubleAlign = 32; 3109 FloatFormat = &llvm::APFloat::IEEEsingle; 3110 DoubleFormat = &llvm::APFloat::IEEEsingle; 3111 LongDoubleFormat = &llvm::APFloat::IEEEsingle; 3112 DescriptionString = "E-p:32:32:32-i1:8:8-i8:8:32-" 3113 "i16:16:32-i32:32:32-i64:32:32-" 3114 "f32:32:32-f64:32:32-v64:32:32-" 3115 "v128:32:32-a0:0:32-n32"; 3116 AddrSpaceMap = &TCEOpenCLAddrSpaceMap; 3117 } 3118 3119 virtual void getTargetDefines(const LangOptions &Opts, 3120 MacroBuilder &Builder) const { 3121 DefineStd(Builder, "tce", Opts); 3122 Builder.defineMacro("__TCE__"); 3123 Builder.defineMacro("__TCE_V1__"); 3124 } 3125 virtual void getTargetBuiltins(const Builtin::Info *&Records, 3126 unsigned &NumRecords) const {} 3127 virtual const char *getClobbers() const { 3128 return ""; 3129 } 3130 virtual const char *getVAListDeclaration() const { 3131 return "typedef void* __builtin_va_list;"; 3132 } 3133 virtual void getGCCRegNames(const char * const *&Names, 3134 unsigned &NumNames) const {} 3135 virtual bool validateAsmConstraint(const char *&Name, 3136 TargetInfo::ConstraintInfo &info) const { 3137 return true; 3138 } 3139 virtual void getGCCRegAliases(const GCCRegAlias *&Aliases, 3140 unsigned &NumAliases) const {} 3141 }; 3142 } 3143 3144 namespace { 3145 class MipsTargetInfoBase : public TargetInfo { 3146 std::string CPU; 3147 protected: 3148 std::string ABI; 3149 public: 3150 MipsTargetInfoBase(const std::string& triple, const std::string& ABIStr) 3151 : TargetInfo(triple), ABI(ABIStr) { 3152 SizeType = UnsignedInt; 3153 PtrDiffType = SignedInt; 3154 } 3155 virtual const char *getABI() const { return ABI.c_str(); } 3156 virtual bool setABI(const std::string &Name) = 0; 3157 virtual bool setCPU(const std::string &Name) { 3158 CPU = Name; 3159 return true; 3160 } 3161 void getDefaultFeatures(llvm::StringMap<bool> &Features) const { 3162 Features[ABI] = true; 3163 Features[CPU] = true; 3164 } 3165 virtual void getArchDefines(const LangOptions &Opts, 3166 MacroBuilder &Builder) const = 0; 3167 virtual void getTargetDefines(const LangOptions &Opts, 3168 MacroBuilder &Builder) const = 0; 3169 virtual void getTargetBuiltins(const Builtin::Info *&Records, 3170 unsigned &NumRecords) const { 3171 // FIXME: Implement! 3172 } 3173 virtual const char *getVAListDeclaration() const { 3174 return "typedef void* __builtin_va_list;"; 3175 } 3176 virtual void getGCCRegNames(const char * const *&Names, 3177 unsigned &NumNames) const { 3178 static const char * const GCCRegNames[] = { 3179 "$0", "$1", "$2", "$3", "$4", "$5", "$6", "$7", 3180 "$8", "$9", "$10", "$11", "$12", "$13", "$14", "$15", 3181 "$16", "$17", "$18", "$19", "$20", "$21", "$22", "$23", 3182 "$24", "$25", "$26", "$27", "$28", "$sp", "$fp", "$31", 3183 "$f0", "$f1", "$f2", "$f3", "$f4", "$f5", "$f6", "$f7", 3184 "$f8", "$f9", "$f10", "$f11", "$f12", "$f13", "$f14", "$f15", 3185 "$f16", "$f17", "$f18", "$f19", "$f20", "$f21", "$f22", "$f23", 3186 "$f24", "$f25", "$f26", "$f27", "$f28", "$f29", "$f30", "$f31", 3187 "hi", "lo", "", "$fcc0","$fcc1","$fcc2","$fcc3","$fcc4", 3188 "$fcc5","$fcc6","$fcc7" 3189 }; 3190 Names = GCCRegNames; 3191 NumNames = llvm::array_lengthof(GCCRegNames); 3192 } 3193 virtual void getGCCRegAliases(const GCCRegAlias *&Aliases, 3194 unsigned &NumAliases) const = 0; 3195 virtual bool validateAsmConstraint(const char *&Name, 3196 TargetInfo::ConstraintInfo &Info) const { 3197 switch (*Name) { 3198 default: 3199 case 'r': // CPU registers. 3200 case 'd': // Equivalent to "r" unless generating MIPS16 code. 3201 case 'y': // Equivalent to "r", backwards compatibility only. 3202 case 'f': // floating-point registers. 3203 Info.setAllowsRegister(); 3204 return true; 3205 } 3206 return false; 3207 } 3208 3209 virtual const char *getClobbers() const { 3210 // FIXME: Implement! 3211 return ""; 3212 } 3213 }; 3214 3215 class Mips32TargetInfoBase : public MipsTargetInfoBase { 3216 public: 3217 Mips32TargetInfoBase(const std::string& triple) : 3218 MipsTargetInfoBase(triple, "o32") {} 3219 virtual bool setABI(const std::string &Name) { 3220 if ((Name == "o32") || (Name == "eabi")) { 3221 ABI = Name; 3222 return true; 3223 } else 3224 return false; 3225 } 3226 virtual void getArchDefines(const LangOptions &Opts, 3227 MacroBuilder &Builder) const { 3228 if (ABI == "o32") { 3229 Builder.defineMacro("__mips_o32"); 3230 Builder.defineMacro("_ABIO32", "1"); 3231 Builder.defineMacro("_MIPS_SIM", "_ABIO32"); 3232 } 3233 else if (ABI == "eabi") 3234 Builder.defineMacro("__mips_eabi"); 3235 else 3236 llvm_unreachable("Invalid ABI for Mips32."); 3237 } 3238 virtual void getGCCRegAliases(const GCCRegAlias *&Aliases, 3239 unsigned &NumAliases) const { 3240 static const TargetInfo::GCCRegAlias GCCRegAliases[] = { 3241 { { "at" }, "$1" }, 3242 { { "v0" }, "$2" }, 3243 { { "v1" }, "$3" }, 3244 { { "a0" }, "$4" }, 3245 { { "a1" }, "$5" }, 3246 { { "a2" }, "$6" }, 3247 { { "a3" }, "$7" }, 3248 { { "t0" }, "$8" }, 3249 { { "t1" }, "$9" }, 3250 { { "t2" }, "$10" }, 3251 { { "t3" }, "$11" }, 3252 { { "t4" }, "$12" }, 3253 { { "t5" }, "$13" }, 3254 { { "t6" }, "$14" }, 3255 { { "t7" }, "$15" }, 3256 { { "s0" }, "$16" }, 3257 { { "s1" }, "$17" }, 3258 { { "s2" }, "$18" }, 3259 { { "s3" }, "$19" }, 3260 { { "s4" }, "$20" }, 3261 { { "s5" }, "$21" }, 3262 { { "s6" }, "$22" }, 3263 { { "s7" }, "$23" }, 3264 { { "t8" }, "$24" }, 3265 { { "t9" }, "$25" }, 3266 { { "k0" }, "$26" }, 3267 { { "k1" }, "$27" }, 3268 { { "gp" }, "$28" }, 3269 { { "sp" }, "$29" }, 3270 { { "fp" }, "$30" }, 3271 { { "ra" }, "$31" } 3272 }; 3273 Aliases = GCCRegAliases; 3274 NumAliases = llvm::array_lengthof(GCCRegAliases); 3275 } 3276 }; 3277 3278 class Mips32EBTargetInfo : public Mips32TargetInfoBase { 3279 public: 3280 Mips32EBTargetInfo(const std::string& triple) : Mips32TargetInfoBase(triple) { 3281 DescriptionString = "E-p:32:32:32-i1:8:8-i8:8:32-i16:16:32-i32:32:32-" 3282 "i64:64:64-f32:32:32-f64:64:64-v64:64:64-n32"; 3283 } 3284 virtual void getTargetDefines(const LangOptions &Opts, 3285 MacroBuilder &Builder) const { 3286 DefineStd(Builder, "mips", Opts); 3287 Builder.defineMacro("_mips"); 3288 DefineStd(Builder, "MIPSEB", Opts); 3289 Builder.defineMacro("_MIPSEB"); 3290 Builder.defineMacro("__REGISTER_PREFIX__", ""); 3291 getArchDefines(Opts, Builder); 3292 } 3293 }; 3294 3295 class Mips32ELTargetInfo : public Mips32TargetInfoBase { 3296 public: 3297 Mips32ELTargetInfo(const std::string& triple) : Mips32TargetInfoBase(triple) { 3298 DescriptionString = "e-p:32:32:32-i1:8:8-i8:8:32-i16:16:32-i32:32:32-" 3299 "i64:64:64-f32:32:32-f64:64:64-v64:64:64-n32"; 3300 } 3301 virtual void getTargetDefines(const LangOptions &Opts, 3302 MacroBuilder &Builder) const { 3303 DefineStd(Builder, "mips", Opts); 3304 Builder.defineMacro("_mips"); 3305 DefineStd(Builder, "MIPSEL", Opts); 3306 Builder.defineMacro("_MIPSEL"); 3307 Builder.defineMacro("__REGISTER_PREFIX__", ""); 3308 getArchDefines(Opts, Builder); 3309 } 3310 }; 3311 3312 class Mips64TargetInfoBase : public MipsTargetInfoBase { 3313 virtual void SetDescriptionString(const std::string &Name) = 0; 3314 public: 3315 Mips64TargetInfoBase(const std::string& triple) : 3316 MipsTargetInfoBase(triple, "n64") {} 3317 virtual bool setABI(const std::string &Name) { 3318 SetDescriptionString(Name); 3319 if ((Name == "n32") || (Name == "n64")) { 3320 ABI = Name; 3321 return true; 3322 } else 3323 return false; 3324 } 3325 virtual void getArchDefines(const LangOptions &Opts, 3326 MacroBuilder &Builder) const { 3327 if (ABI == "n32") { 3328 Builder.defineMacro("__mips_n32"); 3329 Builder.defineMacro("_ABIN32", "2"); 3330 Builder.defineMacro("_MIPS_SIM", "_ABIN32"); 3331 } 3332 else if (ABI == "n64") { 3333 Builder.defineMacro("__mips_n64"); 3334 Builder.defineMacro("_ABI64", "3"); 3335 Builder.defineMacro("_MIPS_SIM", "_ABI64"); 3336 } 3337 else 3338 llvm_unreachable("Invalid ABI for Mips64."); 3339 } 3340 virtual void getGCCRegAliases(const GCCRegAlias *&Aliases, 3341 unsigned &NumAliases) const { 3342 static const TargetInfo::GCCRegAlias GCCRegAliases[] = { 3343 { { "at" }, "$1" }, 3344 { { "v0" }, "$2" }, 3345 { { "v1" }, "$3" }, 3346 { { "a0" }, "$4" }, 3347 { { "a1" }, "$5" }, 3348 { { "a2" }, "$6" }, 3349 { { "a3" }, "$7" }, 3350 { { "a4" }, "$8" }, 3351 { { "a5" }, "$9" }, 3352 { { "a6" }, "$10" }, 3353 { { "a7" }, "$11" }, 3354 { { "t0" }, "$12" }, 3355 { { "t1" }, "$13" }, 3356 { { "t2" }, "$14" }, 3357 { { "t3" }, "$15" }, 3358 { { "s0" }, "$16" }, 3359 { { "s1" }, "$17" }, 3360 { { "s2" }, "$18" }, 3361 { { "s3" }, "$19" }, 3362 { { "s4" }, "$20" }, 3363 { { "s5" }, "$21" }, 3364 { { "s6" }, "$22" }, 3365 { { "s7" }, "$23" }, 3366 { { "t8" }, "$24" }, 3367 { { "t9" }, "$25" }, 3368 { { "k0" }, "$26" }, 3369 { { "k1" }, "$27" }, 3370 { { "gp" }, "$28" }, 3371 { { "sp" }, "$29" }, 3372 { { "fp" }, "$30" }, 3373 { { "ra" }, "$31" } 3374 }; 3375 Aliases = GCCRegAliases; 3376 NumAliases = llvm::array_lengthof(GCCRegAliases); 3377 } 3378 }; 3379 3380 class Mips64EBTargetInfo : public Mips64TargetInfoBase { 3381 virtual void SetDescriptionString(const std::string &Name) { 3382 // Change DescriptionString only if ABI is n32. 3383 if (Name == "n32") 3384 DescriptionString = "E-p:32:32:32-i1:8:8-i8:8:32-i16:16:32-i32:32:32-" 3385 "i64:64:64-f32:32:32-f64:64:64-v64:64:64-n32"; 3386 } 3387 public: 3388 Mips64EBTargetInfo(const std::string& triple) : Mips64TargetInfoBase(triple) { 3389 // Default ABI is n64. 3390 DescriptionString = "E-p:64:64:64-i1:8:8-i8:8:32-i16:16:32-i32:32:32-" 3391 "i64:64:64-f32:32:32-f64:64:64-v64:64:64-n32"; 3392 } 3393 virtual void getTargetDefines(const LangOptions &Opts, 3394 MacroBuilder &Builder) const { 3395 DefineStd(Builder, "mips", Opts); 3396 Builder.defineMacro("_mips"); 3397 DefineStd(Builder, "MIPSEB", Opts); 3398 Builder.defineMacro("_MIPSEB"); 3399 Builder.defineMacro("__REGISTER_PREFIX__", ""); 3400 getArchDefines(Opts, Builder); 3401 } 3402 }; 3403 3404 class Mips64ELTargetInfo : public Mips64TargetInfoBase { 3405 virtual void SetDescriptionString(const std::string &Name) { 3406 // Change DescriptionString only if ABI is n32. 3407 if (Name == "n32") 3408 DescriptionString = "e-p:32:32:32-i1:8:8-i8:8:32-i16:16:32-i32:32:32-" 3409 "i64:64:64-f32:32:32-f64:64:64-v64:64:64-n32"; 3410 } 3411 public: 3412 Mips64ELTargetInfo(const std::string& triple) : Mips64TargetInfoBase(triple) { 3413 // Default ABI is n64. 3414 DescriptionString = "e-p:64:64:64-i1:8:8-i8:8:32-i16:16:32-i32:32:32-" 3415 "i64:64:64-f32:32:32-f64:64:64-v64:64:64-n32"; 3416 } 3417 virtual void getTargetDefines(const LangOptions &Opts, 3418 MacroBuilder &Builder) const { 3419 DefineStd(Builder, "mips", Opts); 3420 Builder.defineMacro("_mips"); 3421 DefineStd(Builder, "MIPSEL", Opts); 3422 Builder.defineMacro("_MIPSEL"); 3423 Builder.defineMacro("__REGISTER_PREFIX__", ""); 3424 getArchDefines(Opts, Builder); 3425 } 3426 }; 3427 } // end anonymous namespace. 3428 3429 namespace { 3430 class PNaClTargetInfo : public TargetInfo { 3431 public: 3432 PNaClTargetInfo(const std::string& triple) : TargetInfo(triple) { 3433 this->UserLabelPrefix = ""; 3434 this->LongAlign = 32; 3435 this->LongWidth = 32; 3436 this->PointerAlign = 32; 3437 this->PointerWidth = 32; 3438 this->IntMaxType = TargetInfo::SignedLongLong; 3439 this->UIntMaxType = TargetInfo::UnsignedLongLong; 3440 this->Int64Type = TargetInfo::SignedLongLong; 3441 this->DoubleAlign = 64; 3442 this->LongDoubleWidth = 64; 3443 this->LongDoubleAlign = 64; 3444 this->SizeType = TargetInfo::UnsignedInt; 3445 this->PtrDiffType = TargetInfo::SignedInt; 3446 this->IntPtrType = TargetInfo::SignedInt; 3447 this->RegParmMax = 2; 3448 DescriptionString = "e-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-" 3449 "f32:32:32-f64:64:64-p:32:32:32-v128:32:32"; 3450 } 3451 3452 void getDefaultFeatures(llvm::StringMap<bool> &Features) const { 3453 } 3454 virtual void getArchDefines(const LangOptions &Opts, 3455 MacroBuilder &Builder) const { 3456 Builder.defineMacro("__le32__"); 3457 Builder.defineMacro("__pnacl__"); 3458 } 3459 virtual void getTargetDefines(const LangOptions &Opts, 3460 MacroBuilder &Builder) const { 3461 DefineStd(Builder, "unix", Opts); 3462 Builder.defineMacro("__ELF__"); 3463 if (Opts.POSIXThreads) 3464 Builder.defineMacro("_REENTRANT"); 3465 if (Opts.CPlusPlus) 3466 Builder.defineMacro("_GNU_SOURCE"); 3467 3468 Builder.defineMacro("__native_client__"); 3469 getArchDefines(Opts, Builder); 3470 } 3471 virtual void getTargetBuiltins(const Builtin::Info *&Records, 3472 unsigned &NumRecords) const { 3473 } 3474 virtual const char *getVAListDeclaration() const { 3475 return "typedef int __builtin_va_list[4];"; 3476 } 3477 virtual void getGCCRegNames(const char * const *&Names, 3478 unsigned &NumNames) const; 3479 virtual void getGCCRegAliases(const GCCRegAlias *&Aliases, 3480 unsigned &NumAliases) const; 3481 virtual bool validateAsmConstraint(const char *&Name, 3482 TargetInfo::ConstraintInfo &Info) const { 3483 return false; 3484 } 3485 3486 virtual const char *getClobbers() const { 3487 return ""; 3488 } 3489 }; 3490 3491 void PNaClTargetInfo::getGCCRegNames(const char * const *&Names, 3492 unsigned &NumNames) const { 3493 Names = NULL; 3494 NumNames = 0; 3495 } 3496 3497 void PNaClTargetInfo::getGCCRegAliases(const GCCRegAlias *&Aliases, 3498 unsigned &NumAliases) const { 3499 Aliases = NULL; 3500 NumAliases = 0; 3501 } 3502 } // end anonymous namespace. 3503 3504 3505 //===----------------------------------------------------------------------===// 3506 // Driver code 3507 //===----------------------------------------------------------------------===// 3508 3509 static TargetInfo *AllocateTarget(const std::string &T) { 3510 llvm::Triple Triple(T); 3511 llvm::Triple::OSType os = Triple.getOS(); 3512 3513 switch (Triple.getArch()) { 3514 default: 3515 return NULL; 3516 3517 case llvm::Triple::arm: 3518 case llvm::Triple::thumb: 3519 if (Triple.isOSDarwin()) 3520 return new DarwinARMTargetInfo(T); 3521 3522 switch (os) { 3523 case llvm::Triple::Linux: 3524 return new LinuxTargetInfo<ARMTargetInfo>(T); 3525 case llvm::Triple::FreeBSD: 3526 return new FreeBSDTargetInfo<ARMTargetInfo>(T); 3527 case llvm::Triple::NetBSD: 3528 return new NetBSDTargetInfo<ARMTargetInfo>(T); 3529 case llvm::Triple::RTEMS: 3530 return new RTEMSTargetInfo<ARMTargetInfo>(T); 3531 default: 3532 return new ARMTargetInfo(T); 3533 } 3534 3535 case llvm::Triple::bfin: 3536 if ( os == llvm::Triple::RTEMS ) 3537 return new RTEMSTargetInfo<BlackfinTargetInfo>(T); 3538 return new BlackfinTargetInfo(T); 3539 3540 case llvm::Triple::msp430: 3541 return new MSP430TargetInfo(T); 3542 3543 case llvm::Triple::mips: 3544 switch (os) { 3545 case llvm::Triple::Linux: 3546 return new LinuxTargetInfo<Mips32EBTargetInfo>(T); 3547 case llvm::Triple::RTEMS: 3548 return new RTEMSTargetInfo<Mips32EBTargetInfo>(T); 3549 case llvm::Triple::FreeBSD: 3550 return new FreeBSDTargetInfo<Mips32EBTargetInfo>(T); 3551 case llvm::Triple::NetBSD: 3552 return new NetBSDTargetInfo<Mips32EBTargetInfo>(T); 3553 default: 3554 return new Mips32EBTargetInfo(T); 3555 } 3556 3557 case llvm::Triple::mipsel: 3558 switch (os) { 3559 case llvm::Triple::Linux: 3560 return new LinuxTargetInfo<Mips32ELTargetInfo>(T); 3561 case llvm::Triple::RTEMS: 3562 return new RTEMSTargetInfo<Mips32ELTargetInfo>(T); 3563 case llvm::Triple::FreeBSD: 3564 return new FreeBSDTargetInfo<Mips32ELTargetInfo>(T); 3565 case llvm::Triple::NetBSD: 3566 return new NetBSDTargetInfo<Mips32ELTargetInfo>(T); 3567 default: 3568 return new Mips32ELTargetInfo(T); 3569 } 3570 3571 case llvm::Triple::mips64: 3572 switch (os) { 3573 case llvm::Triple::Linux: 3574 return new LinuxTargetInfo<Mips64EBTargetInfo>(T); 3575 case llvm::Triple::RTEMS: 3576 return new RTEMSTargetInfo<Mips64EBTargetInfo>(T); 3577 case llvm::Triple::FreeBSD: 3578 return new FreeBSDTargetInfo<Mips64EBTargetInfo>(T); 3579 case llvm::Triple::NetBSD: 3580 return new NetBSDTargetInfo<Mips64EBTargetInfo>(T); 3581 default: 3582 return new Mips64EBTargetInfo(T); 3583 } 3584 3585 case llvm::Triple::mips64el: 3586 switch (os) { 3587 case llvm::Triple::Linux: 3588 return new LinuxTargetInfo<Mips64ELTargetInfo>(T); 3589 case llvm::Triple::RTEMS: 3590 return new RTEMSTargetInfo<Mips64ELTargetInfo>(T); 3591 case llvm::Triple::FreeBSD: 3592 return new FreeBSDTargetInfo<Mips64ELTargetInfo>(T); 3593 case llvm::Triple::NetBSD: 3594 return new NetBSDTargetInfo<Mips64ELTargetInfo>(T); 3595 default: 3596 return new Mips64ELTargetInfo(T); 3597 } 3598 3599 case llvm::Triple::le32: 3600 switch (os) { 3601 case llvm::Triple::NativeClient: 3602 return new PNaClTargetInfo(T); 3603 default: 3604 return NULL; 3605 } 3606 3607 case llvm::Triple::ppc: 3608 if (Triple.isOSDarwin()) 3609 return new DarwinPPC32TargetInfo(T); 3610 switch (os) { 3611 case llvm::Triple::Linux: 3612 return new LinuxTargetInfo<PPC32TargetInfo>(T); 3613 case llvm::Triple::FreeBSD: 3614 return new FreeBSDTargetInfo<PPC32TargetInfo>(T); 3615 case llvm::Triple::NetBSD: 3616 return new NetBSDTargetInfo<PPC32TargetInfo>(T); 3617 case llvm::Triple::RTEMS: 3618 return new RTEMSTargetInfo<PPC32TargetInfo>(T); 3619 default: 3620 return new PPC32TargetInfo(T); 3621 } 3622 3623 case llvm::Triple::ppc64: 3624 if (Triple.isOSDarwin()) 3625 return new DarwinPPC64TargetInfo(T); 3626 switch (os) { 3627 case llvm::Triple::Linux: 3628 return new LinuxTargetInfo<PPC64TargetInfo>(T); 3629 case llvm::Triple::Lv2: 3630 return new PS3PPUTargetInfo<PPC64TargetInfo>(T); 3631 case llvm::Triple::FreeBSD: 3632 return new FreeBSDTargetInfo<PPC64TargetInfo>(T); 3633 case llvm::Triple::NetBSD: 3634 return new NetBSDTargetInfo<PPC64TargetInfo>(T); 3635 default: 3636 return new PPC64TargetInfo(T); 3637 } 3638 3639 case llvm::Triple::ptx32: 3640 return new PTX32TargetInfo(T); 3641 case llvm::Triple::ptx64: 3642 return new PTX64TargetInfo(T); 3643 3644 case llvm::Triple::mblaze: 3645 return new MBlazeTargetInfo(T); 3646 3647 case llvm::Triple::sparc: 3648 switch (os) { 3649 case llvm::Triple::Linux: 3650 return new LinuxTargetInfo<SparcV8TargetInfo>(T); 3651 case llvm::Triple::AuroraUX: 3652 return new AuroraUXSparcV8TargetInfo(T); 3653 case llvm::Triple::Solaris: 3654 return new SolarisSparcV8TargetInfo(T); 3655 case llvm::Triple::NetBSD: 3656 return new NetBSDTargetInfo<SparcV8TargetInfo>(T); 3657 case llvm::Triple::RTEMS: 3658 return new RTEMSTargetInfo<SparcV8TargetInfo>(T); 3659 default: 3660 return new SparcV8TargetInfo(T); 3661 } 3662 3663 // FIXME: Need a real SPU target. 3664 case llvm::Triple::cellspu: 3665 return new PS3SPUTargetInfo<PPC64TargetInfo>(T); 3666 3667 case llvm::Triple::systemz: 3668 return new SystemZTargetInfo(T); 3669 3670 case llvm::Triple::tce: 3671 return new TCETargetInfo(T); 3672 3673 case llvm::Triple::x86: 3674 if (Triple.isOSDarwin()) 3675 return new DarwinI386TargetInfo(T); 3676 3677 switch (os) { 3678 case llvm::Triple::AuroraUX: 3679 return new AuroraUXTargetInfo<X86_32TargetInfo>(T); 3680 case llvm::Triple::Linux: 3681 return new LinuxTargetInfo<X86_32TargetInfo>(T); 3682 case llvm::Triple::DragonFly: 3683 return new DragonFlyBSDTargetInfo<X86_32TargetInfo>(T); 3684 case llvm::Triple::NetBSD: 3685 return new NetBSDTargetInfo<X86_32TargetInfo>(T); 3686 case llvm::Triple::OpenBSD: 3687 return new OpenBSDI386TargetInfo(T); 3688 case llvm::Triple::FreeBSD: 3689 return new FreeBSDTargetInfo<X86_32TargetInfo>(T); 3690 case llvm::Triple::Minix: 3691 return new MinixTargetInfo<X86_32TargetInfo>(T); 3692 case llvm::Triple::Solaris: 3693 return new SolarisTargetInfo<X86_32TargetInfo>(T); 3694 case llvm::Triple::Cygwin: 3695 return new CygwinX86_32TargetInfo(T); 3696 case llvm::Triple::MinGW32: 3697 return new MinGWX86_32TargetInfo(T); 3698 case llvm::Triple::Win32: 3699 return new VisualStudioWindowsX86_32TargetInfo(T); 3700 case llvm::Triple::Haiku: 3701 return new HaikuX86_32TargetInfo(T); 3702 case llvm::Triple::RTEMS: 3703 return new RTEMSX86_32TargetInfo(T); 3704 default: 3705 return new X86_32TargetInfo(T); 3706 } 3707 3708 case llvm::Triple::x86_64: 3709 if (Triple.isOSDarwin() || Triple.getEnvironment() == llvm::Triple::MachO) 3710 return new DarwinX86_64TargetInfo(T); 3711 3712 switch (os) { 3713 case llvm::Triple::AuroraUX: 3714 return new AuroraUXTargetInfo<X86_64TargetInfo>(T); 3715 case llvm::Triple::Linux: 3716 return new LinuxTargetInfo<X86_64TargetInfo>(T); 3717 case llvm::Triple::DragonFly: 3718 return new DragonFlyBSDTargetInfo<X86_64TargetInfo>(T); 3719 case llvm::Triple::NetBSD: 3720 return new NetBSDTargetInfo<X86_64TargetInfo>(T); 3721 case llvm::Triple::OpenBSD: 3722 return new OpenBSDX86_64TargetInfo(T); 3723 case llvm::Triple::FreeBSD: 3724 return new FreeBSDTargetInfo<X86_64TargetInfo>(T); 3725 case llvm::Triple::Solaris: 3726 return new SolarisTargetInfo<X86_64TargetInfo>(T); 3727 case llvm::Triple::MinGW32: 3728 return new MinGWX86_64TargetInfo(T); 3729 case llvm::Triple::Win32: // This is what Triple.h supports now. 3730 return new VisualStudioWindowsX86_64TargetInfo(T); 3731 default: 3732 return new X86_64TargetInfo(T); 3733 } 3734 } 3735 } 3736 3737 /// CreateTargetInfo - Return the target info object for the specified target 3738 /// triple. 3739 TargetInfo *TargetInfo::CreateTargetInfo(DiagnosticsEngine &Diags, 3740 TargetOptions &Opts) { 3741 llvm::Triple Triple(Opts.Triple); 3742 3743 // Construct the target 3744 llvm::OwningPtr<TargetInfo> Target(AllocateTarget(Triple.str())); 3745 if (!Target) { 3746 Diags.Report(diag::err_target_unknown_triple) << Triple.str(); 3747 return 0; 3748 } 3749 3750 // Set the target CPU if specified. 3751 if (!Opts.CPU.empty() && !Target->setCPU(Opts.CPU)) { 3752 Diags.Report(diag::err_target_unknown_cpu) << Opts.CPU; 3753 return 0; 3754 } 3755 3756 // Set the target ABI if specified. 3757 if (!Opts.ABI.empty() && !Target->setABI(Opts.ABI)) { 3758 Diags.Report(diag::err_target_unknown_abi) << Opts.ABI; 3759 return 0; 3760 } 3761 3762 // Set the target C++ ABI. 3763 if (!Opts.CXXABI.empty() && !Target->setCXXABI(Opts.CXXABI)) { 3764 Diags.Report(diag::err_target_unknown_cxxabi) << Opts.CXXABI; 3765 return 0; 3766 } 3767 3768 // Compute the default target features, we need the target to handle this 3769 // because features may have dependencies on one another. 3770 llvm::StringMap<bool> Features; 3771 Target->getDefaultFeatures(Features); 3772 3773 // Apply the user specified deltas. 3774 for (std::vector<std::string>::const_iterator it = Opts.Features.begin(), 3775 ie = Opts.Features.end(); it != ie; ++it) { 3776 const char *Name = it->c_str(); 3777 3778 // Apply the feature via the target. 3779 if ((Name[0] != '-' && Name[0] != '+') || 3780 !Target->setFeatureEnabled(Features, Name + 1, (Name[0] == '+'))) { 3781 Diags.Report(diag::err_target_invalid_feature) << Name; 3782 return 0; 3783 } 3784 } 3785 3786 // Add the features to the compile options. 3787 // 3788 // FIXME: If we are completely confident that we have the right set, we only 3789 // need to pass the minuses. 3790 Opts.Features.clear(); 3791 for (llvm::StringMap<bool>::const_iterator it = Features.begin(), 3792 ie = Features.end(); it != ie; ++it) 3793 Opts.Features.push_back(std::string(it->second ? "+" : "-") + 3794 it->first().str()); 3795 Target->HandleTargetFeatures(Opts.Features); 3796 3797 return Target.take(); 3798 } 3799
