1 //===---- ScheduleDAGList.cpp - Implement a list scheduler for isel DAG ---===// 2 // 3 // The LLVM Compiler Infrastructure 4 // 5 // This file is distributed under the University of Illinois Open Source 6 // License. See LICENSE.TXT for details. 7 // 8 //===----------------------------------------------------------------------===// 9 // 10 // This implements a top-down list scheduler, using standard algorithms. 11 // The basic approach uses a priority queue of available nodes to schedule. 12 // One at a time, nodes are taken from the priority queue (thus in priority 13 // order), checked for legality to schedule, and emitted if legal. 14 // 15 // Nodes may not be legal to schedule either due to structural hazards (e.g. 16 // pipeline or resource constraints) or because an input to the instruction has 17 // not completed execution. 18 // 19 //===----------------------------------------------------------------------===// 20 21 #define DEBUG_TYPE "pre-RA-sched" 22 #include "ScheduleDAGSDNodes.h" 23 #include "llvm/CodeGen/LatencyPriorityQueue.h" 24 #include "llvm/CodeGen/ScheduleHazardRecognizer.h" 25 #include "llvm/CodeGen/SchedulerRegistry.h" 26 #include "llvm/CodeGen/SelectionDAGISel.h" 27 #include "llvm/Target/TargetRegisterInfo.h" 28 #include "llvm/Target/TargetData.h" 29 #include "llvm/Target/TargetInstrInfo.h" 30 #include "llvm/Support/Debug.h" 31 #include "llvm/Support/ErrorHandling.h" 32 #include "llvm/Support/raw_ostream.h" 33 #include "llvm/ADT/Statistic.h" 34 #include <climits> 35 using namespace llvm; 36 37 STATISTIC(NumNoops , "Number of noops inserted"); 38 STATISTIC(NumStalls, "Number of pipeline stalls"); 39 40 static RegisterScheduler 41 tdListDAGScheduler("list-td", "Top-down list scheduler", 42 createTDListDAGScheduler); 43 44 namespace { 45 //===----------------------------------------------------------------------===// 46 /// ScheduleDAGList - The actual list scheduler implementation. This supports 47 /// top-down scheduling. 48 /// 49 class ScheduleDAGList : public ScheduleDAGSDNodes { 50 private: 51 /// AvailableQueue - The priority queue to use for the available SUnits. 52 /// 53 SchedulingPriorityQueue *AvailableQueue; 54 55 /// PendingQueue - This contains all of the instructions whose operands have 56 /// been issued, but their results are not ready yet (due to the latency of 57 /// the operation). Once the operands become available, the instruction is 58 /// added to the AvailableQueue. 59 std::vector<SUnit*> PendingQueue; 60 61 /// HazardRec - The hazard recognizer to use. 62 ScheduleHazardRecognizer *HazardRec; 63 64 public: 65 ScheduleDAGList(MachineFunction &mf, 66 SchedulingPriorityQueue *availqueue) 67 : ScheduleDAGSDNodes(mf), AvailableQueue(availqueue) { 68 69 const TargetMachine &tm = mf.getTarget(); 70 HazardRec = tm.getInstrInfo()->CreateTargetHazardRecognizer(&tm, this); 71 } 72 73 ~ScheduleDAGList() { 74 delete HazardRec; 75 delete AvailableQueue; 76 } 77 78 void Schedule(); 79 80 private: 81 void ReleaseSucc(SUnit *SU, const SDep &D); 82 void ReleaseSuccessors(SUnit *SU); 83 void ScheduleNodeTopDown(SUnit *SU, unsigned CurCycle); 84 void ListScheduleTopDown(); 85 }; 86 } // end anonymous namespace 87 88 /// Schedule - Schedule the DAG using list scheduling. 89 void ScheduleDAGList::Schedule() { 90 DEBUG(dbgs() << "********** List Scheduling **********\n"); 91 92 // Build the scheduling graph. 93 BuildSchedGraph(NULL); 94 95 AvailableQueue->initNodes(SUnits); 96 97 ListScheduleTopDown(); 98 99 AvailableQueue->releaseState(); 100 } 101 102 //===----------------------------------------------------------------------===// 103 // Top-Down Scheduling 104 //===----------------------------------------------------------------------===// 105 106 /// ReleaseSucc - Decrement the NumPredsLeft count of a successor. Add it to 107 /// the PendingQueue if the count reaches zero. Also update its cycle bound. 108 void ScheduleDAGList::ReleaseSucc(SUnit *SU, const SDep &D) { 109 SUnit *SuccSU = D.getSUnit(); 110 111 #ifndef NDEBUG 112 if (SuccSU->NumPredsLeft == 0) { 113 dbgs() << "*** Scheduling failed! ***\n"; 114 SuccSU->dump(this); 115 dbgs() << " has been released too many times!\n"; 116 llvm_unreachable(0); 117 } 118 #endif 119 --SuccSU->NumPredsLeft; 120 121 SuccSU->setDepthToAtLeast(SU->getDepth() + D.getLatency()); 122 123 // If all the node's predecessors are scheduled, this node is ready 124 // to be scheduled. Ignore the special ExitSU node. 125 if (SuccSU->NumPredsLeft == 0 && SuccSU != &ExitSU) 126 PendingQueue.push_back(SuccSU); 127 } 128 129 void ScheduleDAGList::ReleaseSuccessors(SUnit *SU) { 130 // Top down: release successors. 131 for (SUnit::succ_iterator I = SU->Succs.begin(), E = SU->Succs.end(); 132 I != E; ++I) { 133 assert(!I->isAssignedRegDep() && 134 "The list-td scheduler doesn't yet support physreg dependencies!"); 135 136 ReleaseSucc(SU, *I); 137 } 138 } 139 140 /// ScheduleNodeTopDown - Add the node to the schedule. Decrement the pending 141 /// count of its successors. If a successor pending count is zero, add it to 142 /// the Available queue. 143 void ScheduleDAGList::ScheduleNodeTopDown(SUnit *SU, unsigned CurCycle) { 144 DEBUG(dbgs() << "*** Scheduling [" << CurCycle << "]: "); 145 DEBUG(SU->dump(this)); 146 147 Sequence.push_back(SU); 148 assert(CurCycle >= SU->getDepth() && "Node scheduled above its depth!"); 149 SU->setDepthToAtLeast(CurCycle); 150 151 ReleaseSuccessors(SU); 152 SU->isScheduled = true; 153 AvailableQueue->ScheduledNode(SU); 154 } 155 156 /// ListScheduleTopDown - The main loop of list scheduling for top-down 157 /// schedulers. 158 void ScheduleDAGList::ListScheduleTopDown() { 159 unsigned CurCycle = 0; 160 161 // Release any successors of the special Entry node. 162 ReleaseSuccessors(&EntrySU); 163 164 // All leaves to Available queue. 165 for (unsigned i = 0, e = SUnits.size(); i != e; ++i) { 166 // It is available if it has no predecessors. 167 if (SUnits[i].Preds.empty()) { 168 AvailableQueue->push(&SUnits[i]); 169 SUnits[i].isAvailable = true; 170 } 171 } 172 173 // While Available queue is not empty, grab the node with the highest 174 // priority. If it is not ready put it back. Schedule the node. 175 std::vector<SUnit*> NotReady; 176 Sequence.reserve(SUnits.size()); 177 while (!AvailableQueue->empty() || !PendingQueue.empty()) { 178 // Check to see if any of the pending instructions are ready to issue. If 179 // so, add them to the available queue. 180 for (unsigned i = 0, e = PendingQueue.size(); i != e; ++i) { 181 if (PendingQueue[i]->getDepth() == CurCycle) { 182 AvailableQueue->push(PendingQueue[i]); 183 PendingQueue[i]->isAvailable = true; 184 PendingQueue[i] = PendingQueue.back(); 185 PendingQueue.pop_back(); 186 --i; --e; 187 } else { 188 assert(PendingQueue[i]->getDepth() > CurCycle && "Negative latency?"); 189 } 190 } 191 192 // If there are no instructions available, don't try to issue anything, and 193 // don't advance the hazard recognizer. 194 if (AvailableQueue->empty()) { 195 ++CurCycle; 196 continue; 197 } 198 199 SUnit *FoundSUnit = 0; 200 201 bool HasNoopHazards = false; 202 while (!AvailableQueue->empty()) { 203 SUnit *CurSUnit = AvailableQueue->pop(); 204 205 ScheduleHazardRecognizer::HazardType HT = 206 HazardRec->getHazardType(CurSUnit, 0/*no stalls*/); 207 if (HT == ScheduleHazardRecognizer::NoHazard) { 208 FoundSUnit = CurSUnit; 209 break; 210 } 211 212 // Remember if this is a noop hazard. 213 HasNoopHazards |= HT == ScheduleHazardRecognizer::NoopHazard; 214 215 NotReady.push_back(CurSUnit); 216 } 217 218 // Add the nodes that aren't ready back onto the available list. 219 if (!NotReady.empty()) { 220 AvailableQueue->push_all(NotReady); 221 NotReady.clear(); 222 } 223 224 // If we found a node to schedule, do it now. 225 if (FoundSUnit) { 226 ScheduleNodeTopDown(FoundSUnit, CurCycle); 227 HazardRec->EmitInstruction(FoundSUnit); 228 229 // If this is a pseudo-op node, we don't want to increment the current 230 // cycle. 231 if (FoundSUnit->Latency) // Don't increment CurCycle for pseudo-ops! 232 ++CurCycle; 233 } else if (!HasNoopHazards) { 234 // Otherwise, we have a pipeline stall, but no other problem, just advance 235 // the current cycle and try again. 236 DEBUG(dbgs() << "*** Advancing cycle, no work to do\n"); 237 HazardRec->AdvanceCycle(); 238 ++NumStalls; 239 ++CurCycle; 240 } else { 241 // Otherwise, we have no instructions to issue and we have instructions 242 // that will fault if we don't do this right. This is the case for 243 // processors without pipeline interlocks and other cases. 244 DEBUG(dbgs() << "*** Emitting noop\n"); 245 HazardRec->EmitNoop(); 246 Sequence.push_back(0); // NULL here means noop 247 ++NumNoops; 248 ++CurCycle; 249 } 250 } 251 252 #ifndef NDEBUG 253 VerifySchedule(/*isBottomUp=*/false); 254 #endif 255 } 256 257 //===----------------------------------------------------------------------===// 258 // Public Constructor Functions 259 //===----------------------------------------------------------------------===// 260 261 /// createTDListDAGScheduler - This creates a top-down list scheduler. 262 ScheduleDAGSDNodes * 263 llvm::createTDListDAGScheduler(SelectionDAGISel *IS, CodeGenOpt::Level) { 264 return new ScheduleDAGList(*IS->MF, new LatencyPriorityQueue()); 265 } 266