README.txt
1 //===- README.txt - Notes for improving CellSPU-specific code gen ---------===// 2 3 This code was contributed by a team from the Computer Systems Research 4 Department in The Aerospace Corporation: 5 6 - Scott Michel (head bottle washer and much of the non-floating point 7 instructions) 8 - Mark Thomas (floating point instructions) 9 - Michael AuYeung (intrinsics) 10 - Chandler Carruth (LLVM expertise) 11 - Nehal Desai (debugging, i32 operations, RoadRunner SPU expertise) 12 13 Some minor fixes added by Kalle Raiskila. 14 15 THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 16 IMPLIED, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF 17 MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, NONINFRINGEMENT, OR 18 OTHERWISE. IN NO EVENT SHALL THE AEROSPACE CORPORATION BE LIABLE FOR DAMAGES 19 OF ANY KIND OR NATURE WHETHER BASED IN CONTRACT, TORT, OR OTHERWISE ARISING 20 OUT OF OR IN CONNECTION WITH THE USE OF THE SOFTWARE INCLUDING, WITHOUT 21 LIMITATION, DAMAGES RESULTING FROM LOST OR CONTAMINATED DATA, LOST PROFITS OR 22 REVENUE, COMPUTER MALFUNCTION, OR FOR ANY SPECIAL, INCIDENTAL, CONSEQUENTIAL, 23 OR PUNITIVE DAMAGES, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGES OR 24 SUCH DAMAGES ARE FORESEEABLE. 25 26 --------------------------------------------------------------------------- 27 --WARNING--: 28 --WARNING--: The CellSPU work is work-in-progress and "alpha" quality code. 29 --WARNING--: 30 31 If you are brave enough to try this code or help to hack on it, be sure 32 to add 'spu' to configure's --enable-targets option, e.g.: 33 34 ./configure <your_configure_flags_here> \ 35 --enable-targets=x86,x86_64,powerpc,spu 36 37 --------------------------------------------------------------------------- 38 39 TODO: 40 * Create a machine pass for performing dual-pipeline scheduling specifically 41 for CellSPU, and insert branch prediction instructions as needed. 42 43 * i32 instructions: 44 45 * i32 division (work-in-progress) 46 47 * i64 support (see i64operations.c test harness): 48 49 * shifts and comparison operators: done 50 * sign and zero extension: done 51 * addition: done 52 * subtraction: needed 53 * multiplication: done 54 55 * i128 support: 56 57 * zero extension, any extension: done 58 * sign extension: done 59 * arithmetic operators (add, sub, mul, div): needed 60 * logical operations (and, or, shl, srl, sra, xor, nor, nand): needed 61 62 * or: done 63 64 * f64 support 65 66 * Comparison operators: 67 SETOEQ unimplemented 68 SETOGT unimplemented 69 SETOGE unimplemented 70 SETOLT unimplemented 71 SETOLE unimplemented 72 SETONE unimplemented 73 SETO done (lowered) 74 SETUO done (lowered) 75 SETUEQ unimplemented 76 SETUGT unimplemented 77 SETUGE unimplemented 78 SETULT unimplemented 79 SETULE unimplemented 80 SETUNE unimplemented 81 82 * LLVM vector suport 83 84 * VSETCC needs to be implemented. It's pretty straightforward to code, but 85 needs implementation. 86 87 * Intrinsics 88 89 * spu.h instrinsics added but not tested. Need to have an operational 90 llvm-spu-gcc in order to write a unit test harness. 91 92 ===-------------------------------------------------------------------------=== 93
