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      1 ; RUN: llc -march=msp430 -combiner-alias-analysis < %s | FileCheck %s
      2 target datalayout = "e-p:16:8:8-i8:8:8-i16:8:8-i32:8:8"
      3 target triple = "msp430-generic-generic"
      4 @foo = common global i16 0, align 2
      5 @bar = common global i16 0, align 2
      6 
      7 define void @mov() nounwind {
      8 ; CHECK: mov:
      9 ; CHECK: mov.w	&bar, &foo
     10         %1 = load i16* @bar
     11         store i16 %1, i16* @foo
     12         ret void
     13 }
     14 
     15 define void @add() nounwind {
     16 ; CHECK: add:
     17 ; CHECK: add.w	&bar, &foo
     18 	%1 = load i16* @bar
     19 	%2 = load i16* @foo
     20 	%3 = add i16 %2, %1
     21 	store i16 %3, i16* @foo
     22 	ret void
     23 }
     24 
     25 define void @and() nounwind {
     26 ; CHECK: and:
     27 ; CHECK: and.w	&bar, &foo
     28 	%1 = load i16* @bar
     29 	%2 = load i16* @foo
     30 	%3 = and i16 %2, %1
     31 	store i16 %3, i16* @foo
     32 	ret void
     33 }
     34 
     35 define void @bis() nounwind {
     36 ; CHECK: bis:
     37 ; CHECK: bis.w	&bar, &foo
     38 	%1 = load i16* @bar
     39 	%2 = load i16* @foo
     40 	%3 = or i16 %2, %1
     41 	store i16 %3, i16* @foo
     42 	ret void
     43 }
     44 
     45 define void @xor() nounwind {
     46 ; CHECK: xor:
     47 ; CHECK: xor.w	&bar, &foo
     48 	%1 = load i16* @bar
     49 	%2 = load i16* @foo
     50 	%3 = xor i16 %2, %1
     51 	store i16 %3, i16* @foo
     52 	ret void
     53 }
     54 
     55 define i16 @mov2() nounwind {
     56 entry:
     57  %retval = alloca i16                            ; <i16*> [#uses=3]
     58  %x = alloca i32, align 2                        ; <i32*> [#uses=1]
     59  %y = alloca i32, align 2                        ; <i32*> [#uses=1]
     60  store i16 0, i16* %retval
     61  %tmp = load i32* %y                             ; <i32> [#uses=1]
     62  store i32 %tmp, i32* %x
     63  store i16 0, i16* %retval
     64  %0 = load i16* %retval                          ; <i16> [#uses=1]
     65  ret i16 %0
     66 ; CHECK: mov2:
     67 ; CHECK:	mov.w	0(r1), 4(r1)
     68 ; CHECK:	mov.w	2(r1), 6(r1)
     69 }
     70