1 ; RUN: llc < %s -mtriple=x86_64-apple-darwin10 | FileCheck %s 2 ; PR5757 3 4 %0 = type { i64, i32 } 5 6 define i32 @test1(%0* %p, %0* %q, i1 %r) nounwind { 7 %t0 = load %0* %p 8 %t1 = load %0* %q 9 %t4 = select i1 %r, %0 %t0, %0 %t1 10 %t5 = extractvalue %0 %t4, 1 11 ret i32 %t5 12 ; CHECK: test1: 13 ; CHECK: cmovneq %rdi, %rsi 14 ; CHECK: movl (%rsi), %eax 15 } 16 17 18 ; PR2139 19 define i32 @test2() nounwind { 20 entry: 21 %tmp73 = tail call i1 @return_false() ; <i8> [#uses=1] 22 %g.0 = select i1 %tmp73, i16 0, i16 -480 ; <i16> [#uses=2] 23 %tmp7778 = sext i16 %g.0 to i32 ; <i32> [#uses=1] 24 %tmp80 = shl i32 %tmp7778, 3 ; <i32> [#uses=2] 25 %tmp87 = icmp sgt i32 %tmp80, 32767 ; <i1> [#uses=1] 26 br i1 %tmp87, label %bb90, label %bb91 27 bb90: ; preds = %bb84, %bb72 28 unreachable 29 bb91: ; preds = %bb84 30 ret i32 0 31 ; CHECK: test2: 32 ; CHECK: movnew 33 ; CHECK: movswl 34 } 35 36 declare i1 @return_false() 37 38 39 ;; Select between two floating point constants. 40 define float @test3(i32 %x) nounwind readnone { 41 entry: 42 %0 = icmp eq i32 %x, 0 ; <i1> [#uses=1] 43 %iftmp.0.0 = select i1 %0, float 4.200000e+01, float 2.300000e+01 ; <float> [#uses=1] 44 ret float %iftmp.0.0 45 ; CHECK: test3: 46 ; CHECK: movss {{.*}},4), %xmm0 47 } 48 49 define signext i8 @test4(i8* nocapture %P, double %F) nounwind readonly { 50 entry: 51 %0 = fcmp olt double %F, 4.200000e+01 ; <i1> [#uses=1] 52 %iftmp.0.0 = select i1 %0, i32 4, i32 0 ; <i32> [#uses=1] 53 %1 = getelementptr i8* %P, i32 %iftmp.0.0 ; <i8*> [#uses=1] 54 %2 = load i8* %1, align 1 ; <i8> [#uses=1] 55 ret i8 %2 56 ; CHECK: test4: 57 ; CHECK: movsbl ({{.*}},4), %eax 58 } 59 60 define void @test5(i1 %c, <2 x i16> %a, <2 x i16> %b, <2 x i16>* %p) nounwind { 61 %x = select i1 %c, <2 x i16> %a, <2 x i16> %b 62 store <2 x i16> %x, <2 x i16>* %p 63 ret void 64 ; CHECK: test5: 65 } 66 67 define void @test6(i32 %C, <4 x float>* %A, <4 x float>* %B) nounwind { 68 %tmp = load <4 x float>* %A ; <<4 x float>> [#uses=1] 69 %tmp3 = load <4 x float>* %B ; <<4 x float>> [#uses=2] 70 %tmp9 = fmul <4 x float> %tmp3, %tmp3 ; <<4 x float>> [#uses=1] 71 %tmp.upgrd.1 = icmp eq i32 %C, 0 ; <i1> [#uses=1] 72 %iftmp.38.0 = select i1 %tmp.upgrd.1, <4 x float> %tmp9, <4 x float> %tmp ; <<4 x float>> [#uses=1] 73 store <4 x float> %iftmp.38.0, <4 x float>* %A 74 ret void 75 ; Verify that the fmul gets sunk into the one part of the diamond where it is 76 ; needed. 77 ; CHECK: test6: 78 ; CHECK: jne 79 ; CHECK: mulps 80 ; CHECK: ret 81 ; CHECK: ret 82 } 83 84 ; Select with fp80's 85 define x86_fp80 @test7(i32 %tmp8) nounwind { 86 %tmp9 = icmp sgt i32 %tmp8, -1 ; <i1> [#uses=1] 87 %retval = select i1 %tmp9, x86_fp80 0xK4005B400000000000000, x86_fp80 0xK40078700000000000000 88 ret x86_fp80 %retval 89 ; CHECK: test7: 90 ; CHECK: leaq 91 ; CHECK: fldt (%r{{.}}x,%r{{.}}x) 92 } 93 94 ; widening select v6i32 and then a sub 95 define void @test8(i1 %c, <6 x i32>* %dst.addr, <6 x i32> %src1,<6 x i32> %src2) nounwind { 96 %x = select i1 %c, <6 x i32> %src1, <6 x i32> %src2 97 %val = sub <6 x i32> %x, < i32 1, i32 1, i32 1, i32 1, i32 1, i32 1 > 98 store <6 x i32> %val, <6 x i32>* %dst.addr 99 ret void 100 101 ; CHECK: test8: 102 } 103 104 105 ;; Test integer select between values and constants. 106 107 define i64 @test9(i64 %x, i64 %y) nounwind readnone ssp noredzone { 108 %cmp = icmp ne i64 %x, 0 109 %cond = select i1 %cmp, i64 %y, i64 -1 110 ret i64 %cond 111 ; CHECK: test9: 112 ; CHECK: cmpq $1, %rdi 113 ; CHECK: sbbq %rax, %rax 114 ; CHECK: orq %rsi, %rax 115 ; CHECK: ret 116 } 117 118 ;; Same as test9 119 define i64 @test9a(i64 %x, i64 %y) nounwind readnone ssp noredzone { 120 %cmp = icmp eq i64 %x, 0 121 %cond = select i1 %cmp, i64 -1, i64 %y 122 ret i64 %cond 123 ; CHECK: test9a: 124 ; CHECK: cmpq $1, %rdi 125 ; CHECK: sbbq %rax, %rax 126 ; CHECK: orq %rsi, %rax 127 ; CHECK: ret 128 } 129 130 define i64 @test9b(i64 %x, i64 %y) nounwind readnone ssp noredzone { 131 %cmp = icmp eq i64 %x, 0 132 %A = sext i1 %cmp to i64 133 %cond = or i64 %y, %A 134 ret i64 %cond 135 ; CHECK: test9b: 136 ; CHECK: cmpq $1, %rdi 137 ; CHECK: sbbq %rax, %rax 138 ; CHECK: orq %rsi, %rax 139 ; CHECK: ret 140 } 141 142 ;; Select between -1 and 1. 143 define i64 @test10(i64 %x, i64 %y) nounwind readnone ssp noredzone { 144 %cmp = icmp eq i64 %x, 0 145 %cond = select i1 %cmp, i64 -1, i64 1 146 ret i64 %cond 147 ; CHECK: test10: 148 ; CHECK: cmpq $1, %rdi 149 ; CHECK: sbbq %rax, %rax 150 ; CHECK: orq $1, %rax 151 ; CHECK: ret 152 } 153 154 155 156 define i64 @test11(i64 %x, i64 %y) nounwind readnone ssp noredzone { 157 %cmp = icmp eq i64 %x, 0 158 %cond = select i1 %cmp, i64 %y, i64 -1 159 ret i64 %cond 160 ; CHECK: test11: 161 ; CHECK: cmpq $1, %rdi 162 ; CHECK: sbbq %rax, %rax 163 ; CHECK: notq %rax 164 ; CHECK: orq %rsi, %rax 165 ; CHECK: ret 166 } 167 168 define i64 @test11a(i64 %x, i64 %y) nounwind readnone ssp noredzone { 169 %cmp = icmp ne i64 %x, 0 170 %cond = select i1 %cmp, i64 -1, i64 %y 171 ret i64 %cond 172 ; CHECK: test11a: 173 ; CHECK: cmpq $1, %rdi 174 ; CHECK: sbbq %rax, %rax 175 ; CHECK: notq %rax 176 ; CHECK: orq %rsi, %rax 177 ; CHECK: ret 178 } 179 180 181 declare noalias i8* @_Znam(i64) noredzone 182 183 define noalias i8* @test12(i64 %count) nounwind ssp noredzone { 184 entry: 185 %A = tail call { i64, i1 } @llvm.umul.with.overflow.i64(i64 %count, i64 4) 186 %B = extractvalue { i64, i1 } %A, 1 187 %C = extractvalue { i64, i1 } %A, 0 188 %D = select i1 %B, i64 -1, i64 %C 189 %call = tail call noalias i8* @_Znam(i64 %D) nounwind noredzone 190 ret i8* %call 191 ; CHECK: test12: 192 ; CHECK: mulq 193 ; CHECK: movq $-1, %rdi 194 ; CHECK: cmovnoq %rax, %rdi 195 ; CHECK: jmp __Znam 196 } 197 198 declare { i64, i1 } @llvm.umul.with.overflow.i64(i64, i64) nounwind readnone 199 200 define i32 @test13(i32 %a, i32 %b) nounwind { 201 %c = icmp ult i32 %a, %b 202 %d = sext i1 %c to i32 203 ret i32 %d 204 ; CHECK: test13: 205 ; CHECK: cmpl 206 ; CHECK-NEXT: sbbl 207 ; CHECK-NEXT: ret 208 } 209 210 define i32 @test14(i32 %a, i32 %b) nounwind { 211 %c = icmp uge i32 %a, %b 212 %d = sext i1 %c to i32 213 ret i32 %d 214 ; CHECK: test14: 215 ; CHECK: cmpl 216 ; CHECK-NEXT: sbbl 217 ; CHECK-NEXT: notl 218 ; CHECK-NEXT: ret 219 } 220 221