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      1 ; RUN: opt %s -instcombine -S | FileCheck %s
      2 ; PR5438
      3 
      4 ; TODO: This should also optimize down.
      5 ;define i32 @test1(i32 %a, i32 %b) nounwind readnone {
      6 ;entry:
      7 ;        %0 = icmp sgt i32 %a, -1        ; <i1> [#uses=1]
      8 ;        %1 = icmp slt i32 %b, 0         ; <i1> [#uses=1]
      9 ;        %2 = xor i1 %1, %0              ; <i1> [#uses=1]
     10 ;        %3 = zext i1 %2 to i32          ; <i32> [#uses=1]
     11 ;        ret i32 %3
     12 ;}
     13 
     14 ; TODO: This optimizes partially but not all the way.
     15 ;define i32 @test2(i32 %a, i32 %b) nounwind readnone {
     16 ;entry:
     17 ;        %0 = and i32 %a, 8            ;<i32>  [#uses=1]
     18 ;        %1 = and i32 %b, 8            ;<i32>  [#uses=1]
     19 ;        %2 = icmp eq i32 %0, %1         ;<i1>  [#uses=1]
     20 ;        %3 = zext i1 %2 to i32          ;<i32>  [#uses=1]
     21 ;        ret i32 %3
     22 ;}
     23 
     24 define i32 @test3(i32 %a, i32 %b) nounwind readnone {
     25 ; CHECK: @test3
     26 entry:
     27 ; CHECK: xor i32 %a, %b
     28 ; CHECK: lshr i32 %0, 31
     29 ; CHECK: xor i32 %1, 1
     30         %0 = lshr i32 %a, 31            ; <i32> [#uses=1]
     31         %1 = lshr i32 %b, 31            ; <i32> [#uses=1]
     32         %2 = icmp eq i32 %0, %1         ; <i1> [#uses=1]
     33         %3 = zext i1 %2 to i32          ; <i32> [#uses=1]
     34         ret i32 %3
     35 ; CHECK-NOT: icmp
     36 ; CHECK-NOT: zext
     37 ; CHECK: ret i32 %2
     38 }
     39 
     40 ; Variation on @test3: checking the 2nd bit in a situation where the 5th bit
     41 ; is one, not zero.
     42 define i32 @test3i(i32 %a, i32 %b) nounwind readnone {
     43 ; CHECK: @test3i
     44 entry:
     45 ; CHECK: xor i32 %a, %b
     46 ; CHECK: lshr i32 %0, 31
     47 ; CHECK: xor i32 %1, 1
     48         %0 = lshr i32 %a, 29            ; <i32> [#uses=1]
     49         %1 = lshr i32 %b, 29            ; <i32> [#uses=1]
     50         %2 = or i32 %0, 35
     51         %3 = or i32 %1, 35
     52         %4 = icmp eq i32 %2, %3         ; <i1> [#uses=1]
     53         %5 = zext i1 %4 to i32          ; <i32> [#uses=1]
     54         ret i32 %5
     55 ; CHECK-NOT: icmp
     56 ; CHECK-NOT: zext
     57 ; CHECK: ret i32 %2
     58 }
     59