1 This is as.info, produced by makeinfo version 4.8 from 2 /Volumes/project-jingyu/android_toolchain/build/../binutils/binutils-2.19/gas/doc/as.texinfo. 3 4 START-INFO-DIR-ENTRY 5 * As: (as). The GNU assembler. 6 * Gas: (as). The GNU assembler. 7 END-INFO-DIR-ENTRY 8 9 This file documents the GNU Assembler "as". 10 11 Copyright (C) 1991, 92, 93, 94, 95, 96, 97, 98, 99, 2000, 2001, 2002, 12 2006, 2007 Free Software Foundation, Inc. 13 14 Permission is granted to copy, distribute and/or modify this document 15 under the terms of the GNU Free Documentation License, Version 1.1 or 16 any later version published by the Free Software Foundation; with no 17 Invariant Sections, with no Front-Cover Texts, and with no Back-Cover 18 Texts. A copy of the license is included in the section entitled "GNU 19 Free Documentation License". 20 21 22 File: as.info, Node: Top, Next: Overview, Up: (dir) 23 24 Using as 25 ******** 26 27 This file is a user guide to the GNU assembler `as' (GNU Binutils) 28 version 2.19. 29 30 This document is distributed under the terms of the GNU Free 31 Documentation License. A copy of the license is included in the 32 section entitled "GNU Free Documentation License". 33 34 * Menu: 35 36 * Overview:: Overview 37 * Invoking:: Command-Line Options 38 * Syntax:: Syntax 39 * Sections:: Sections and Relocation 40 * Symbols:: Symbols 41 * Expressions:: Expressions 42 * Pseudo Ops:: Assembler Directives 43 44 * Object Attributes:: Object Attributes 45 * Machine Dependencies:: Machine Dependent Features 46 * Reporting Bugs:: Reporting Bugs 47 * Acknowledgements:: Who Did What 48 * GNU Free Documentation License:: GNU Free Documentation License 49 * AS Index:: AS Index 50 51 52 File: as.info, Node: Overview, Next: Invoking, Prev: Top, Up: Top 53 54 1 Overview 55 ********** 56 57 Here is a brief summary of how to invoke `as'. For details, see *Note 58 Command-Line Options: Invoking. 59 60 as [-a[cdghlns][=FILE]] [-alternate] [-D] 61 [-debug-prefix-map OLD=NEW] 62 [-defsym SYM=VAL] [-f] [-g] [-gstabs] 63 [-gstabs+] [-gdwarf-2] [-help] [-I DIR] [-J] 64 [-K] [-L] [-listing-lhs-width=NUM] 65 [-listing-lhs-width2=NUM] [-listing-rhs-width=NUM] 66 [-listing-cont-lines=NUM] [-keep-locals] [-o 67 OBJFILE] [-R] [-reduce-memory-overheads] [-statistics] 68 [-v] [-version] [-version] [-W] [-warn] 69 [-fatal-warnings] [-w] [-x] [-Z] [@FILE] 70 [-target-help] [TARGET-OPTIONS] 71 [-|FILES ...] 72 73 _Target Alpha options:_ 74 [-mCPU] 75 [-mdebug | -no-mdebug] 76 [-relax] [-g] [-GSIZE] 77 [-F] [-32addr] 78 79 _Target ARC options:_ 80 [-marc[5|6|7|8]] 81 [-EB|-EL] 82 83 _Target ARM options:_ 84 [-mcpu=PROCESSOR[+EXTENSION...]] 85 [-march=ARCHITECTURE[+EXTENSION...]] 86 [-mfpu=FLOATING-POINT-FORMAT] 87 [-mfloat-abi=ABI] 88 [-meabi=VER] 89 [-mthumb] 90 [-EB|-EL] 91 [-mapcs-32|-mapcs-26|-mapcs-float| 92 -mapcs-reentrant] 93 [-mthumb-interwork] [-k] 94 95 _Target CRIS options:_ 96 [-underscore | -no-underscore] 97 [-pic] [-N] 98 [-emulation=criself | -emulation=crisaout] 99 [-march=v0_v10 | -march=v10 | -march=v32 | -march=common_v10_v32] 100 101 _Target D10V options:_ 102 [-O] 103 104 _Target D30V options:_ 105 [-O|-n|-N] 106 107 _Target H8/300 options:_ 108 [-h-tick-hex] 109 110 _Target i386 options:_ 111 [-32|-64] [-n] 112 [-march=CPU[+EXTENSION...]] [-mtune=CPU] 113 114 _Target i960 options:_ 115 [-ACA|-ACA_A|-ACB|-ACC|-AKA|-AKB| 116 -AKC|-AMC] 117 [-b] [-no-relax] 118 119 _Target IA-64 options:_ 120 [-mconstant-gp|-mauto-pic] 121 [-milp32|-milp64|-mlp64|-mp64] 122 [-mle|mbe] 123 [-mtune=itanium1|-mtune=itanium2] 124 [-munwind-check=warning|-munwind-check=error] 125 [-mhint.b=ok|-mhint.b=warning|-mhint.b=error] 126 [-x|-xexplicit] [-xauto] [-xdebug] 127 128 _Target IP2K options:_ 129 [-mip2022|-mip2022ext] 130 131 _Target M32C options:_ 132 [-m32c|-m16c] [-relax] [-h-tick-hex] 133 134 _Target M32R options:_ 135 [-m32rx|-[no-]warn-explicit-parallel-conflicts| 136 -W[n]p] 137 138 _Target M680X0 options:_ 139 [-l] [-m68000|-m68010|-m68020|...] 140 141 _Target M68HC11 options:_ 142 [-m68hc11|-m68hc12|-m68hcs12] 143 [-mshort|-mlong] 144 [-mshort-double|-mlong-double] 145 [-force-long-branches] [-short-branches] 146 [-strict-direct-mode] [-print-insn-syntax] 147 [-print-opcodes] [-generate-example] 148 149 _Target MCORE options:_ 150 [-jsri2bsr] [-sifilter] [-relax] 151 [-mcpu=[210|340]] 152 153 _Target MIPS options:_ 154 [-nocpp] [-EL] [-EB] [-O[OPTIMIZATION LEVEL]] 155 [-g[DEBUG LEVEL]] [-G NUM] [-KPIC] [-call_shared] 156 [-non_shared] [-xgot [-mvxworks-pic] 157 [-mabi=ABI] [-32] [-n32] [-64] [-mfp32] [-mgp32] 158 [-march=CPU] [-mtune=CPU] [-mips1] [-mips2] 159 [-mips3] [-mips4] [-mips5] [-mips32] [-mips32r2] 160 [-mips64] [-mips64r2] 161 [-construct-floats] [-no-construct-floats] 162 [-trap] [-no-break] [-break] [-no-trap] 163 [-mfix7000] [-mno-fix7000] 164 [-mips16] [-no-mips16] 165 [-msmartmips] [-mno-smartmips] 166 [-mips3d] [-no-mips3d] 167 [-mdmx] [-no-mdmx] 168 [-mdsp] [-mno-dsp] 169 [-mdspr2] [-mno-dspr2] 170 [-mmt] [-mno-mt] 171 [-mdebug] [-no-mdebug] 172 [-mpdr] [-mno-pdr] 173 174 _Target MMIX options:_ 175 [-fixed-special-register-names] [-globalize-symbols] 176 [-gnu-syntax] [-relax] [-no-predefined-symbols] 177 [-no-expand] [-no-merge-gregs] [-x] 178 [-linker-allocated-gregs] 179 180 _Target PDP11 options:_ 181 [-mpic|-mno-pic] [-mall] [-mno-extensions] 182 [-mEXTENSION|-mno-EXTENSION] 183 [-mCPU] [-mMACHINE] 184 185 _Target picoJava options:_ 186 [-mb|-me] 187 188 _Target PowerPC options:_ 189 [-mpwrx|-mpwr2|-mpwr|-m601|-mppc|-mppc32|-m603|-m604| 190 -m403|-m405|-mppc64|-m620|-mppc64bridge|-mbooke| 191 -mbooke32|-mbooke64] 192 [-mcom|-many|-maltivec|-mvsx] [-memb] 193 [-mregnames|-mno-regnames] 194 [-mrelocatable|-mrelocatable-lib] 195 [-mlittle|-mlittle-endian|-mbig|-mbig-endian] 196 [-msolaris|-mno-solaris] 197 198 _Target SPARC options:_ 199 [-Av6|-Av7|-Av8|-Asparclet|-Asparclite 200 -Av8plus|-Av8plusa|-Av9|-Av9a] 201 [-xarch=v8plus|-xarch=v8plusa] [-bump] 202 [-32|-64] 203 204 _Target TIC54X options:_ 205 [-mcpu=54[123589]|-mcpu=54[56]lp] [-mfar-mode|-mf] 206 [-merrors-to-file <FILENAME>|-me <FILENAME>] 207 208 209 _Target Z80 options:_ 210 [-z80] [-r800] 211 [ -ignore-undocumented-instructions] [-Wnud] 212 [ -ignore-unportable-instructions] [-Wnup] 213 [ -warn-undocumented-instructions] [-Wud] 214 [ -warn-unportable-instructions] [-Wup] 215 [ -forbid-undocumented-instructions] [-Fud] 216 [ -forbid-unportable-instructions] [-Fup] 217 218 219 _Target Xtensa options:_ 220 [-[no-]text-section-literals] [-[no-]absolute-literals] 221 [-[no-]target-align] [-[no-]longcalls] 222 [-[no-]transform] 223 [-rename-section OLDNAME=NEWNAME] 224 225 `@FILE' 226 Read command-line options from FILE. The options read are 227 inserted in place of the original @FILE option. If FILE does not 228 exist, or cannot be read, then the option will be treated 229 literally, and not removed. 230 231 Options in FILE are separated by whitespace. A whitespace 232 character may be included in an option by surrounding the entire 233 option in either single or double quotes. Any character 234 (including a backslash) may be included by prefixing the character 235 to be included with a backslash. The FILE may itself contain 236 additional @FILE options; any such options will be processed 237 recursively. 238 239 `-a[cdghlmns]' 240 Turn on listings, in any of a variety of ways: 241 242 `-ac' 243 omit false conditionals 244 245 `-ad' 246 omit debugging directives 247 248 `-ag' 249 include general information, like as version and options 250 passed 251 252 `-ah' 253 include high-level source 254 255 `-al' 256 include assembly 257 258 `-am' 259 include macro expansions 260 261 `-an' 262 omit forms processing 263 264 `-as' 265 include symbols 266 267 `=file' 268 set the name of the listing file 269 270 You may combine these options; for example, use `-aln' for assembly 271 listing without forms processing. The `=file' option, if used, 272 must be the last one. By itself, `-a' defaults to `-ahls'. 273 274 `--alternate' 275 Begin in alternate macro mode. *Note `.altmacro': Altmacro. 276 277 `-D' 278 Ignored. This option is accepted for script compatibility with 279 calls to other assemblers. 280 281 `--debug-prefix-map OLD=NEW' 282 When assembling files in directory `OLD', record debugging 283 information describing them as in `NEW' instead. 284 285 `--defsym SYM=VALUE' 286 Define the symbol SYM to be VALUE before assembling the input file. 287 VALUE must be an integer constant. As in C, a leading `0x' 288 indicates a hexadecimal value, and a leading `0' indicates an octal 289 value. The value of the symbol can be overridden inside a source 290 file via the use of a `.set' pseudo-op. 291 292 `-f' 293 "fast"--skip whitespace and comment preprocessing (assume source is 294 compiler output). 295 296 `-g' 297 `--gen-debug' 298 Generate debugging information for each assembler source line 299 using whichever debug format is preferred by the target. This 300 currently means either STABS, ECOFF or DWARF2. 301 302 `--gstabs' 303 Generate stabs debugging information for each assembler line. This 304 may help debugging assembler code, if the debugger can handle it. 305 306 `--gstabs+' 307 Generate stabs debugging information for each assembler line, with 308 GNU extensions that probably only gdb can handle, and that could 309 make other debuggers crash or refuse to read your program. This 310 may help debugging assembler code. Currently the only GNU 311 extension is the location of the current working directory at 312 assembling time. 313 314 `--gdwarf-2' 315 Generate DWARF2 debugging information for each assembler line. 316 This may help debugging assembler code, if the debugger can handle 317 it. Note--this option is only supported by some targets, not all 318 of them. 319 320 `--help' 321 Print a summary of the command line options and exit. 322 323 `--target-help' 324 Print a summary of all target specific options and exit. 325 326 `-I DIR' 327 Add directory DIR to the search list for `.include' directives. 328 329 `-J' 330 Don't warn about signed overflow. 331 332 `-K' 333 Issue warnings when difference tables altered for long 334 displacements. 335 336 `-L' 337 `--keep-locals' 338 Keep (in the symbol table) local symbols. These symbols start with 339 system-specific local label prefixes, typically `.L' for ELF 340 systems or `L' for traditional a.out systems. *Note Symbol 341 Names::. 342 343 `--listing-lhs-width=NUMBER' 344 Set the maximum width, in words, of the output data column for an 345 assembler listing to NUMBER. 346 347 `--listing-lhs-width2=NUMBER' 348 Set the maximum width, in words, of the output data column for 349 continuation lines in an assembler listing to NUMBER. 350 351 `--listing-rhs-width=NUMBER' 352 Set the maximum width of an input source line, as displayed in a 353 listing, to NUMBER bytes. 354 355 `--listing-cont-lines=NUMBER' 356 Set the maximum number of lines printed in a listing for a single 357 line of input to NUMBER + 1. 358 359 `-o OBJFILE' 360 Name the object-file output from `as' OBJFILE. 361 362 `-R' 363 Fold the data section into the text section. 364 365 Set the default size of GAS's hash tables to a prime number close 366 to NUMBER. Increasing this value can reduce the length of time it 367 takes the assembler to perform its tasks, at the expense of 368 increasing the assembler's memory requirements. Similarly 369 reducing this value can reduce the memory requirements at the 370 expense of speed. 371 372 `--reduce-memory-overheads' 373 This option reduces GAS's memory requirements, at the expense of 374 making the assembly processes slower. Currently this switch is a 375 synonym for `--hash-size=4051', but in the future it may have 376 other effects as well. 377 378 `--statistics' 379 Print the maximum space (in bytes) and total time (in seconds) 380 used by assembly. 381 382 `--strip-local-absolute' 383 Remove local absolute symbols from the outgoing symbol table. 384 385 `-v' 386 `-version' 387 Print the `as' version. 388 389 `--version' 390 Print the `as' version and exit. 391 392 `-W' 393 `--no-warn' 394 Suppress warning messages. 395 396 `--fatal-warnings' 397 Treat warnings as errors. 398 399 `--warn' 400 Don't suppress warning messages or treat them as errors. 401 402 `-w' 403 Ignored. 404 405 `-x' 406 Ignored. 407 408 `-Z' 409 Generate an object file even after errors. 410 411 `-- | FILES ...' 412 Standard input, or source files to assemble. 413 414 415 The following options are available when as is configured for an ARC 416 processor. 417 418 `-marc[5|6|7|8]' 419 This option selects the core processor variant. 420 421 `-EB | -EL' 422 Select either big-endian (-EB) or little-endian (-EL) output. 423 424 The following options are available when as is configured for the ARM 425 processor family. 426 427 `-mcpu=PROCESSOR[+EXTENSION...]' 428 Specify which ARM processor variant is the target. 429 430 `-march=ARCHITECTURE[+EXTENSION...]' 431 Specify which ARM architecture variant is used by the target. 432 433 `-mfpu=FLOATING-POINT-FORMAT' 434 Select which Floating Point architecture is the target. 435 436 `-mfloat-abi=ABI' 437 Select which floating point ABI is in use. 438 439 `-mthumb' 440 Enable Thumb only instruction decoding. 441 442 `-mapcs-32 | -mapcs-26 | -mapcs-float | -mapcs-reentrant' 443 Select which procedure calling convention is in use. 444 445 `-EB | -EL' 446 Select either big-endian (-EB) or little-endian (-EL) output. 447 448 `-mthumb-interwork' 449 Specify that the code has been generated with interworking between 450 Thumb and ARM code in mind. 451 452 `-k' 453 Specify that PIC code has been generated. 454 455 See the info pages for documentation of the CRIS-specific options. 456 457 The following options are available when as is configured for a D10V 458 processor. 459 `-O' 460 Optimize output by parallelizing instructions. 461 462 The following options are available when as is configured for a D30V 463 processor. 464 `-O' 465 Optimize output by parallelizing instructions. 466 467 `-n' 468 Warn when nops are generated. 469 470 `-N' 471 Warn when a nop after a 32-bit multiply instruction is generated. 472 473 The following options are available when as is configured for the 474 Intel 80960 processor. 475 476 `-ACA | -ACA_A | -ACB | -ACC | -AKA | -AKB | -AKC | -AMC' 477 Specify which variant of the 960 architecture is the target. 478 479 `-b' 480 Add code to collect statistics about branches taken. 481 482 `-no-relax' 483 Do not alter compare-and-branch instructions for long 484 displacements; error if necessary. 485 486 487 The following options are available when as is configured for the 488 Ubicom IP2K series. 489 490 `-mip2022ext' 491 Specifies that the extended IP2022 instructions are allowed. 492 493 `-mip2022' 494 Restores the default behaviour, which restricts the permitted 495 instructions to just the basic IP2022 ones. 496 497 498 The following options are available when as is configured for the 499 Renesas M32C and M16C processors. 500 501 `-m32c' 502 Assemble M32C instructions. 503 504 `-m16c' 505 Assemble M16C instructions (the default). 506 507 `-relax' 508 Enable support for link-time relaxations. 509 510 `-h-tick-hex' 511 Support H'00 style hex constants in addition to 0x00 style. 512 513 514 The following options are available when as is configured for the 515 Renesas M32R (formerly Mitsubishi M32R) series. 516 517 `--m32rx' 518 Specify which processor in the M32R family is the target. The 519 default is normally the M32R, but this option changes it to the 520 M32RX. 521 522 `--warn-explicit-parallel-conflicts or --Wp' 523 Produce warning messages when questionable parallel constructs are 524 encountered. 525 526 `--no-warn-explicit-parallel-conflicts or --Wnp' 527 Do not produce warning messages when questionable parallel 528 constructs are encountered. 529 530 531 The following options are available when as is configured for the 532 Motorola 68000 series. 533 534 `-l' 535 Shorten references to undefined symbols, to one word instead of 536 two. 537 538 `-m68000 | -m68008 | -m68010 | -m68020 | -m68030' 539 `| -m68040 | -m68060 | -m68302 | -m68331 | -m68332' 540 `| -m68333 | -m68340 | -mcpu32 | -m5200' 541 Specify what processor in the 68000 family is the target. The 542 default is normally the 68020, but this can be changed at 543 configuration time. 544 545 `-m68881 | -m68882 | -mno-68881 | -mno-68882' 546 The target machine does (or does not) have a floating-point 547 coprocessor. The default is to assume a coprocessor for 68020, 548 68030, and cpu32. Although the basic 68000 is not compatible with 549 the 68881, a combination of the two can be specified, since it's 550 possible to do emulation of the coprocessor instructions with the 551 main processor. 552 553 `-m68851 | -mno-68851' 554 The target machine does (or does not) have a memory-management 555 unit coprocessor. The default is to assume an MMU for 68020 and 556 up. 557 558 559 For details about the PDP-11 machine dependent features options, see 560 *Note PDP-11-Options::. 561 562 `-mpic | -mno-pic' 563 Generate position-independent (or position-dependent) code. The 564 default is `-mpic'. 565 566 `-mall' 567 `-mall-extensions' 568 Enable all instruction set extensions. This is the default. 569 570 `-mno-extensions' 571 Disable all instruction set extensions. 572 573 `-mEXTENSION | -mno-EXTENSION' 574 Enable (or disable) a particular instruction set extension. 575 576 `-mCPU' 577 Enable the instruction set extensions supported by a particular 578 CPU, and disable all other extensions. 579 580 `-mMACHINE' 581 Enable the instruction set extensions supported by a particular 582 machine model, and disable all other extensions. 583 584 The following options are available when as is configured for a 585 picoJava processor. 586 587 `-mb' 588 Generate "big endian" format output. 589 590 `-ml' 591 Generate "little endian" format output. 592 593 594 The following options are available when as is configured for the 595 Motorola 68HC11 or 68HC12 series. 596 597 `-m68hc11 | -m68hc12 | -m68hcs12' 598 Specify what processor is the target. The default is defined by 599 the configuration option when building the assembler. 600 601 `-mshort' 602 Specify to use the 16-bit integer ABI. 603 604 `-mlong' 605 Specify to use the 32-bit integer ABI. 606 607 `-mshort-double' 608 Specify to use the 32-bit double ABI. 609 610 `-mlong-double' 611 Specify to use the 64-bit double ABI. 612 613 `--force-long-branches' 614 Relative branches are turned into absolute ones. This concerns 615 conditional branches, unconditional branches and branches to a sub 616 routine. 617 618 `-S | --short-branches' 619 Do not turn relative branches into absolute ones when the offset 620 is out of range. 621 622 `--strict-direct-mode' 623 Do not turn the direct addressing mode into extended addressing 624 mode when the instruction does not support direct addressing mode. 625 626 `--print-insn-syntax' 627 Print the syntax of instruction in case of error. 628 629 `--print-opcodes' 630 print the list of instructions with syntax and then exit. 631 632 `--generate-example' 633 print an example of instruction for each possible instruction and 634 then exit. This option is only useful for testing `as'. 635 636 637 The following options are available when `as' is configured for the 638 SPARC architecture: 639 640 `-Av6 | -Av7 | -Av8 | -Asparclet | -Asparclite' 641 `-Av8plus | -Av8plusa | -Av9 | -Av9a' 642 Explicitly select a variant of the SPARC architecture. 643 644 `-Av8plus' and `-Av8plusa' select a 32 bit environment. `-Av9' 645 and `-Av9a' select a 64 bit environment. 646 647 `-Av8plusa' and `-Av9a' enable the SPARC V9 instruction set with 648 UltraSPARC extensions. 649 650 `-xarch=v8plus | -xarch=v8plusa' 651 For compatibility with the Solaris v9 assembler. These options are 652 equivalent to -Av8plus and -Av8plusa, respectively. 653 654 `-bump' 655 Warn when the assembler switches to another architecture. 656 657 The following options are available when as is configured for the 658 'c54x architecture. 659 660 `-mfar-mode' 661 Enable extended addressing mode. All addresses and relocations 662 will assume extended addressing (usually 23 bits). 663 664 `-mcpu=CPU_VERSION' 665 Sets the CPU version being compiled for. 666 667 `-merrors-to-file FILENAME' 668 Redirect error output to a file, for broken systems which don't 669 support such behaviour in the shell. 670 671 The following options are available when as is configured for a MIPS 672 processor. 673 674 `-G NUM' 675 This option sets the largest size of an object that can be 676 referenced implicitly with the `gp' register. It is only accepted 677 for targets that use ECOFF format, such as a DECstation running 678 Ultrix. The default value is 8. 679 680 `-EB' 681 Generate "big endian" format output. 682 683 `-EL' 684 Generate "little endian" format output. 685 686 `-mips1' 687 `-mips2' 688 `-mips3' 689 `-mips4' 690 `-mips5' 691 `-mips32' 692 `-mips32r2' 693 `-mips64' 694 `-mips64r2' 695 Generate code for a particular MIPS Instruction Set Architecture 696 level. `-mips1' is an alias for `-march=r3000', `-mips2' is an 697 alias for `-march=r6000', `-mips3' is an alias for `-march=r4000' 698 and `-mips4' is an alias for `-march=r8000'. `-mips5', `-mips32', 699 `-mips32r2', `-mips64', and `-mips64r2' correspond to generic 700 `MIPS V', `MIPS32', `MIPS32 Release 2', `MIPS64', and `MIPS64 701 Release 2' ISA processors, respectively. 702 703 `-march=CPU' 704 Generate code for a particular MIPS cpu. 705 706 `-mtune=CPU' 707 Schedule and tune for a particular MIPS cpu. 708 709 `-mfix7000' 710 `-mno-fix7000' 711 Cause nops to be inserted if the read of the destination register 712 of an mfhi or mflo instruction occurs in the following two 713 instructions. 714 715 `-mdebug' 716 `-no-mdebug' 717 Cause stabs-style debugging output to go into an ECOFF-style 718 .mdebug section instead of the standard ELF .stabs sections. 719 720 `-mpdr' 721 `-mno-pdr' 722 Control generation of `.pdr' sections. 723 724 `-mgp32' 725 `-mfp32' 726 The register sizes are normally inferred from the ISA and ABI, but 727 these flags force a certain group of registers to be treated as 32 728 bits wide at all times. `-mgp32' controls the size of 729 general-purpose registers and `-mfp32' controls the size of 730 floating-point registers. 731 732 `-mips16' 733 `-no-mips16' 734 Generate code for the MIPS 16 processor. This is equivalent to 735 putting `.set mips16' at the start of the assembly file. 736 `-no-mips16' turns off this option. 737 738 `-msmartmips' 739 `-mno-smartmips' 740 Enables the SmartMIPS extension to the MIPS32 instruction set. 741 This is equivalent to putting `.set smartmips' at the start of the 742 assembly file. `-mno-smartmips' turns off this option. 743 744 `-mips3d' 745 `-no-mips3d' 746 Generate code for the MIPS-3D Application Specific Extension. 747 This tells the assembler to accept MIPS-3D instructions. 748 `-no-mips3d' turns off this option. 749 750 `-mdmx' 751 `-no-mdmx' 752 Generate code for the MDMX Application Specific Extension. This 753 tells the assembler to accept MDMX instructions. `-no-mdmx' turns 754 off this option. 755 756 `-mdsp' 757 `-mno-dsp' 758 Generate code for the DSP Release 1 Application Specific Extension. 759 This tells the assembler to accept DSP Release 1 instructions. 760 `-mno-dsp' turns off this option. 761 762 `-mdspr2' 763 `-mno-dspr2' 764 Generate code for the DSP Release 2 Application Specific Extension. 765 This option implies -mdsp. This tells the assembler to accept DSP 766 Release 2 instructions. `-mno-dspr2' turns off this option. 767 768 `-mmt' 769 `-mno-mt' 770 Generate code for the MT Application Specific Extension. This 771 tells the assembler to accept MT instructions. `-mno-mt' turns 772 off this option. 773 774 `--construct-floats' 775 `--no-construct-floats' 776 The `--no-construct-floats' option disables the construction of 777 double width floating point constants by loading the two halves of 778 the value into the two single width floating point registers that 779 make up the double width register. By default 780 `--construct-floats' is selected, allowing construction of these 781 floating point constants. 782 783 `--emulation=NAME' 784 This option causes `as' to emulate `as' configured for some other 785 target, in all respects, including output format (choosing between 786 ELF and ECOFF only), handling of pseudo-opcodes which may generate 787 debugging information or store symbol table information, and 788 default endianness. The available configuration names are: 789 `mipsecoff', `mipself', `mipslecoff', `mipsbecoff', `mipslelf', 790 `mipsbelf'. The first two do not alter the default endianness 791 from that of the primary target for which the assembler was 792 configured; the others change the default to little- or big-endian 793 as indicated by the `b' or `l' in the name. Using `-EB' or `-EL' 794 will override the endianness selection in any case. 795 796 This option is currently supported only when the primary target 797 `as' is configured for is a MIPS ELF or ECOFF target. 798 Furthermore, the primary target or others specified with 799 `--enable-targets=...' at configuration time must include support 800 for the other format, if both are to be available. For example, 801 the Irix 5 configuration includes support for both. 802 803 Eventually, this option will support more configurations, with more 804 fine-grained control over the assembler's behavior, and will be 805 supported for more processors. 806 807 `-nocpp' 808 `as' ignores this option. It is accepted for compatibility with 809 the native tools. 810 811 `--trap' 812 `--no-trap' 813 `--break' 814 `--no-break' 815 Control how to deal with multiplication overflow and division by 816 zero. `--trap' or `--no-break' (which are synonyms) take a trap 817 exception (and only work for Instruction Set Architecture level 2 818 and higher); `--break' or `--no-trap' (also synonyms, and the 819 default) take a break exception. 820 821 `-n' 822 When this option is used, `as' will issue a warning every time it 823 generates a nop instruction from a macro. 824 825 The following options are available when as is configured for an 826 MCore processor. 827 828 `-jsri2bsr' 829 `-nojsri2bsr' 830 Enable or disable the JSRI to BSR transformation. By default this 831 is enabled. The command line option `-nojsri2bsr' can be used to 832 disable it. 833 834 `-sifilter' 835 `-nosifilter' 836 Enable or disable the silicon filter behaviour. By default this 837 is disabled. The default can be overridden by the `-sifilter' 838 command line option. 839 840 `-relax' 841 Alter jump instructions for long displacements. 842 843 `-mcpu=[210|340]' 844 Select the cpu type on the target hardware. This controls which 845 instructions can be assembled. 846 847 `-EB' 848 Assemble for a big endian target. 849 850 `-EL' 851 Assemble for a little endian target. 852 853 854 See the info pages for documentation of the MMIX-specific options. 855 856 The following options are available when as is configured for an 857 Xtensa processor. 858 859 `--text-section-literals | --no-text-section-literals' 860 With `--text-section-literals', literal pools are interspersed in 861 the text section. The default is `--no-text-section-literals', 862 which places literals in a separate section in the output file. 863 These options only affect literals referenced via PC-relative 864 `L32R' instructions; literals for absolute mode `L32R' 865 instructions are handled separately. 866 867 `--absolute-literals | --no-absolute-literals' 868 Indicate to the assembler whether `L32R' instructions use absolute 869 or PC-relative addressing. The default is to assume absolute 870 addressing if the Xtensa processor includes the absolute `L32R' 871 addressing option. Otherwise, only the PC-relative `L32R' mode 872 can be used. 873 874 `--target-align | --no-target-align' 875 Enable or disable automatic alignment to reduce branch penalties 876 at the expense of some code density. The default is 877 `--target-align'. 878 879 `--longcalls | --no-longcalls' 880 Enable or disable transformation of call instructions to allow 881 calls across a greater range of addresses. The default is 882 `--no-longcalls'. 883 884 `--transform | --no-transform' 885 Enable or disable all assembler transformations of Xtensa 886 instructions. The default is `--transform'; `--no-transform' 887 should be used only in the rare cases when the instructions must 888 be exactly as specified in the assembly source. 889 890 `--rename-section OLDNAME=NEWNAME' 891 When generating output sections, rename the OLDNAME section to 892 NEWNAME. 893 894 The following options are available when as is configured for a Z80 895 family processor. 896 `-z80' 897 Assemble for Z80 processor. 898 899 `-r800' 900 Assemble for R800 processor. 901 902 `-ignore-undocumented-instructions' 903 `-Wnud' 904 Assemble undocumented Z80 instructions that also work on R800 905 without warning. 906 907 `-ignore-unportable-instructions' 908 `-Wnup' 909 Assemble all undocumented Z80 instructions without warning. 910 911 `-warn-undocumented-instructions' 912 `-Wud' 913 Issue a warning for undocumented Z80 instructions that also work 914 on R800. 915 916 `-warn-unportable-instructions' 917 `-Wup' 918 Issue a warning for undocumented Z80 instructions that do not work 919 on R800. 920 921 `-forbid-undocumented-instructions' 922 `-Fud' 923 Treat all undocumented instructions as errors. 924 925 `-forbid-unportable-instructions' 926 `-Fup' 927 Treat undocumented Z80 instructions that do not work on R800 as 928 errors. 929 930 * Menu: 931 932 * Manual:: Structure of this Manual 933 * GNU Assembler:: The GNU Assembler 934 * Object Formats:: Object File Formats 935 * Command Line:: Command Line 936 * Input Files:: Input Files 937 * Object:: Output (Object) File 938 * Errors:: Error and Warning Messages 939 940 941 File: as.info, Node: Manual, Next: GNU Assembler, Up: Overview 942 943 1.1 Structure of this Manual 944 ============================ 945 946 This manual is intended to describe what you need to know to use GNU 947 `as'. We cover the syntax expected in source files, including notation 948 for symbols, constants, and expressions; the directives that `as' 949 understands; and of course how to invoke `as'. 950 951 This manual also describes some of the machine-dependent features of 952 various flavors of the assembler. 953 954 On the other hand, this manual is _not_ intended as an introduction 955 to programming in assembly language--let alone programming in general! 956 In a similar vein, we make no attempt to introduce the machine 957 architecture; we do _not_ describe the instruction set, standard 958 mnemonics, registers or addressing modes that are standard to a 959 particular architecture. You may want to consult the manufacturer's 960 machine architecture manual for this information. 961 962 963 File: as.info, Node: GNU Assembler, Next: Object Formats, Prev: Manual, Up: Overview 964 965 1.2 The GNU Assembler 966 ===================== 967 968 GNU `as' is really a family of assemblers. If you use (or have used) 969 the GNU assembler on one architecture, you should find a fairly similar 970 environment when you use it on another architecture. Each version has 971 much in common with the others, including object file formats, most 972 assembler directives (often called "pseudo-ops") and assembler syntax. 973 974 `as' is primarily intended to assemble the output of the GNU C 975 compiler `gcc' for use by the linker `ld'. Nevertheless, we've tried 976 to make `as' assemble correctly everything that other assemblers for 977 the same machine would assemble. Any exceptions are documented 978 explicitly (*note Machine Dependencies::). This doesn't mean `as' 979 always uses the same syntax as another assembler for the same 980 architecture; for example, we know of several incompatible versions of 981 680x0 assembly language syntax. 982 983 Unlike older assemblers, `as' is designed to assemble a source 984 program in one pass of the source file. This has a subtle impact on the 985 `.org' directive (*note `.org': Org.). 986 987 988 File: as.info, Node: Object Formats, Next: Command Line, Prev: GNU Assembler, Up: Overview 989 990 1.3 Object File Formats 991 ======================= 992 993 The GNU assembler can be configured to produce several alternative 994 object file formats. For the most part, this does not affect how you 995 write assembly language programs; but directives for debugging symbols 996 are typically different in different file formats. *Note Symbol 997 Attributes: Symbol Attributes. 998 999 1000 File: as.info, Node: Command Line, Next: Input Files, Prev: Object Formats, Up: Overview 1001 1002 1.4 Command Line 1003 ================ 1004 1005 After the program name `as', the command line may contain options and 1006 file names. Options may appear in any order, and may be before, after, 1007 or between file names. The order of file names is significant. 1008 1009 `--' (two hyphens) by itself names the standard input file 1010 explicitly, as one of the files for `as' to assemble. 1011 1012 Except for `--' any command line argument that begins with a hyphen 1013 (`-') is an option. Each option changes the behavior of `as'. No 1014 option changes the way another option works. An option is a `-' 1015 followed by one or more letters; the case of the letter is important. 1016 All options are optional. 1017 1018 Some options expect exactly one file name to follow them. The file 1019 name may either immediately follow the option's letter (compatible with 1020 older assemblers) or it may be the next command argument (GNU 1021 standard). These two command lines are equivalent: 1022 1023 as -o my-object-file.o mumble.s 1024 as -omy-object-file.o mumble.s 1025 1026 1027 File: as.info, Node: Input Files, Next: Object, Prev: Command Line, Up: Overview 1028 1029 1.5 Input Files 1030 =============== 1031 1032 We use the phrase "source program", abbreviated "source", to describe 1033 the program input to one run of `as'. The program may be in one or 1034 more files; how the source is partitioned into files doesn't change the 1035 meaning of the source. 1036 1037 The source program is a concatenation of the text in all the files, 1038 in the order specified. 1039 1040 Each time you run `as' it assembles exactly one source program. The 1041 source program is made up of one or more files. (The standard input is 1042 also a file.) 1043 1044 You give `as' a command line that has zero or more input file names. 1045 The input files are read (from left file name to right). A command 1046 line argument (in any position) that has no special meaning is taken to 1047 be an input file name. 1048 1049 If you give `as' no file names it attempts to read one input file 1050 from the `as' standard input, which is normally your terminal. You may 1051 have to type <ctl-D> to tell `as' there is no more program to assemble. 1052 1053 Use `--' if you need to explicitly name the standard input file in 1054 your command line. 1055 1056 If the source is empty, `as' produces a small, empty object file. 1057 1058 Filenames and Line-numbers 1059 -------------------------- 1060 1061 There are two ways of locating a line in the input file (or files) and 1062 either may be used in reporting error messages. One way refers to a 1063 line number in a physical file; the other refers to a line number in a 1064 "logical" file. *Note Error and Warning Messages: Errors. 1065 1066 "Physical files" are those files named in the command line given to 1067 `as'. 1068 1069 "Logical files" are simply names declared explicitly by assembler 1070 directives; they bear no relation to physical files. Logical file 1071 names help error messages reflect the original source file, when `as' 1072 source is itself synthesized from other files. `as' understands the 1073 `#' directives emitted by the `gcc' preprocessor. See also *Note 1074 `.file': File. 1075 1076 1077 File: as.info, Node: Object, Next: Errors, Prev: Input Files, Up: Overview 1078 1079 1.6 Output (Object) File 1080 ======================== 1081 1082 Every time you run `as' it produces an output file, which is your 1083 assembly language program translated into numbers. This file is the 1084 object file. Its default name is `a.out'. You can give it another 1085 name by using the `-o' option. Conventionally, object file names end 1086 with `.o'. The default name is used for historical reasons: older 1087 assemblers were capable of assembling self-contained programs directly 1088 into a runnable program. (For some formats, this isn't currently 1089 possible, but it can be done for the `a.out' format.) 1090 1091 The object file is meant for input to the linker `ld'. It contains 1092 assembled program code, information to help `ld' integrate the 1093 assembled program into a runnable file, and (optionally) symbolic 1094 information for the debugger. 1095 1096 1097 File: as.info, Node: Errors, Prev: Object, Up: Overview 1098 1099 1.7 Error and Warning Messages 1100 ============================== 1101 1102 `as' may write warnings and error messages to the standard error file 1103 (usually your terminal). This should not happen when a compiler runs 1104 `as' automatically. Warnings report an assumption made so that `as' 1105 could keep assembling a flawed program; errors report a grave problem 1106 that stops the assembly. 1107 1108 Warning messages have the format 1109 1110 file_name:NNN:Warning Message Text 1111 1112 (where NNN is a line number). If a logical file name has been given 1113 (*note `.file': File.) it is used for the filename, otherwise the name 1114 of the current input file is used. If a logical line number was given 1115 (*note `.line': Line.) then it is used to calculate the number printed, 1116 otherwise the actual line in the current source file is printed. The 1117 message text is intended to be self explanatory (in the grand Unix 1118 tradition). 1119 1120 Error messages have the format 1121 file_name:NNN:FATAL:Error Message Text 1122 The file name and line number are derived as for warning messages. 1123 The actual message text may be rather less explanatory because many of 1124 them aren't supposed to happen. 1125 1126 1127 File: as.info, Node: Invoking, Next: Syntax, Prev: Overview, Up: Top 1128 1129 2 Command-Line Options 1130 ********************** 1131 1132 This chapter describes command-line options available in _all_ versions 1133 of the GNU assembler; see *Note Machine Dependencies::, for options 1134 specific to particular machine architectures. 1135 1136 If you are invoking `as' via the GNU C compiler, you can use the 1137 `-Wa' option to pass arguments through to the assembler. The assembler 1138 arguments must be separated from each other (and the `-Wa') by commas. 1139 For example: 1140 1141 gcc -c -g -O -Wa,-alh,-L file.c 1142 1143 This passes two options to the assembler: `-alh' (emit a listing to 1144 standard output with high-level and assembly source) and `-L' (retain 1145 local symbols in the symbol table). 1146 1147 Usually you do not need to use this `-Wa' mechanism, since many 1148 compiler command-line options are automatically passed to the assembler 1149 by the compiler. (You can call the GNU compiler driver with the `-v' 1150 option to see precisely what options it passes to each compilation 1151 pass, including the assembler.) 1152 1153 * Menu: 1154 1155 * a:: -a[cdghlns] enable listings 1156 * alternate:: --alternate enable alternate macro syntax 1157 * D:: -D for compatibility 1158 * f:: -f to work faster 1159 * I:: -I for .include search path 1160 1161 * K:: -K for difference tables 1162 1163 * L:: -L to retain local symbols 1164 * listing:: --listing-XXX to configure listing output 1165 * M:: -M or --mri to assemble in MRI compatibility mode 1166 * MD:: --MD for dependency tracking 1167 * o:: -o to name the object file 1168 * R:: -R to join data and text sections 1169 * statistics:: --statistics to see statistics about assembly 1170 * traditional-format:: --traditional-format for compatible output 1171 * v:: -v to announce version 1172 * W:: -W, --no-warn, --warn, --fatal-warnings to control warnings 1173 * Z:: -Z to make object file even after errors 1174 1175 1176 File: as.info, Node: a, Next: alternate, Up: Invoking 1177 1178 2.1 Enable Listings: `-a[cdghlns]' 1179 ================================== 1180 1181 These options enable listing output from the assembler. By itself, 1182 `-a' requests high-level, assembly, and symbols listing. You can use 1183 other letters to select specific options for the list: `-ah' requests a 1184 high-level language listing, `-al' requests an output-program assembly 1185 listing, and `-as' requests a symbol table listing. High-level 1186 listings require that a compiler debugging option like `-g' be used, 1187 and that assembly listings (`-al') be requested also. 1188 1189 Use the `-ag' option to print a first section with general assembly 1190 information, like as version, switches passed, or time stamp. 1191 1192 Use the `-ac' option to omit false conditionals from a listing. Any 1193 lines which are not assembled because of a false `.if' (or `.ifdef', or 1194 any other conditional), or a true `.if' followed by an `.else', will be 1195 omitted from the listing. 1196 1197 Use the `-ad' option to omit debugging directives from the listing. 1198 1199 Once you have specified one of these options, you can further control 1200 listing output and its appearance using the directives `.list', 1201 `.nolist', `.psize', `.eject', `.title', and `.sbttl'. The `-an' 1202 option turns off all forms processing. If you do not request listing 1203 output with one of the `-a' options, the listing-control directives 1204 have no effect. 1205 1206 The letters after `-a' may be combined into one option, _e.g._, 1207 `-aln'. 1208 1209 Note if the assembler source is coming from the standard input (e.g., 1210 because it is being created by `gcc' and the `-pipe' command line switch 1211 is being used) then the listing will not contain any comments or 1212 preprocessor directives. This is because the listing code buffers 1213 input source lines from stdin only after they have been preprocessed by 1214 the assembler. This reduces memory usage and makes the code more 1215 efficient. 1216 1217 1218 File: as.info, Node: alternate, Next: D, Prev: a, Up: Invoking 1219 1220 2.2 `--alternate' 1221 ================= 1222 1223 Begin in alternate macro mode, see *Note `.altmacro': Altmacro. 1224 1225 1226 File: as.info, Node: D, Next: f, Prev: alternate, Up: Invoking 1227 1228 2.3 `-D' 1229 ======== 1230 1231 This option has no effect whatsoever, but it is accepted to make it more 1232 likely that scripts written for other assemblers also work with `as'. 1233 1234 1235 File: as.info, Node: f, Next: I, Prev: D, Up: Invoking 1236 1237 2.4 Work Faster: `-f' 1238 ===================== 1239 1240 `-f' should only be used when assembling programs written by a 1241 (trusted) compiler. `-f' stops the assembler from doing whitespace and 1242 comment preprocessing on the input file(s) before assembling them. 1243 *Note Preprocessing: Preprocessing. 1244 1245 _Warning:_ if you use `-f' when the files actually need to be 1246 preprocessed (if they contain comments, for example), `as' does 1247 not work correctly. 1248 1249 1250 File: as.info, Node: I, Next: K, Prev: f, Up: Invoking 1251 1252 2.5 `.include' Search Path: `-I' PATH 1253 ===================================== 1254 1255 Use this option to add a PATH to the list of directories `as' searches 1256 for files specified in `.include' directives (*note `.include': 1257 Include.). You may use `-I' as many times as necessary to include a 1258 variety of paths. The current working directory is always searched 1259 first; after that, `as' searches any `-I' directories in the same order 1260 as they were specified (left to right) on the command line. 1261 1262 1263 File: as.info, Node: K, Next: L, Prev: I, Up: Invoking 1264 1265 2.6 Difference Tables: `-K' 1266 =========================== 1267 1268 `as' sometimes alters the code emitted for directives of the form 1269 `.word SYM1-SYM2'. *Note `.word': Word. You can use the `-K' option 1270 if you want a warning issued when this is done. 1271 1272 1273 File: as.info, Node: L, Next: listing, Prev: K, Up: Invoking 1274 1275 2.7 Include Local Symbols: `-L' 1276 =============================== 1277 1278 Symbols beginning with system-specific local label prefixes, typically 1279 `.L' for ELF systems or `L' for traditional a.out systems, are called 1280 "local symbols". *Note Symbol Names::. Normally you do not see such 1281 symbols when debugging, because they are intended for the use of 1282 programs (like compilers) that compose assembler programs, not for your 1283 notice. Normally both `as' and `ld' discard such symbols, so you do 1284 not normally debug with them. 1285 1286 This option tells `as' to retain those local symbols in the object 1287 file. Usually if you do this you also tell the linker `ld' to preserve 1288 those symbols. 1289 1290 1291 File: as.info, Node: listing, Next: M, Prev: L, Up: Invoking 1292 1293 2.8 Configuring listing output: `--listing' 1294 =========================================== 1295 1296 The listing feature of the assembler can be enabled via the command 1297 line switch `-a' (*note a::). This feature combines the input source 1298 file(s) with a hex dump of the corresponding locations in the output 1299 object file, and displays them as a listing file. The format of this 1300 listing can be controlled by directives inside the assembler source 1301 (i.e., `.list' (*note List::), `.title' (*note Title::), `.sbttl' 1302 (*note Sbttl::), `.psize' (*note Psize::), and `.eject' (*note Eject::) 1303 and also by the following switches: 1304 1305 `--listing-lhs-width=`number'' 1306 Sets the maximum width, in words, of the first line of the hex 1307 byte dump. This dump appears on the left hand side of the listing 1308 output. 1309 1310 `--listing-lhs-width2=`number'' 1311 Sets the maximum width, in words, of any further lines of the hex 1312 byte dump for a given input source line. If this value is not 1313 specified, it defaults to being the same as the value specified 1314 for `--listing-lhs-width'. If neither switch is used the default 1315 is to one. 1316 1317 `--listing-rhs-width=`number'' 1318 Sets the maximum width, in characters, of the source line that is 1319 displayed alongside the hex dump. The default value for this 1320 parameter is 100. The source line is displayed on the right hand 1321 side of the listing output. 1322 1323 `--listing-cont-lines=`number'' 1324 Sets the maximum number of continuation lines of hex dump that 1325 will be displayed for a given single line of source input. The 1326 default value is 4. 1327 1328 1329 File: as.info, Node: M, Next: MD, Prev: listing, Up: Invoking 1330 1331 2.9 Assemble in MRI Compatibility Mode: `-M' 1332 ============================================ 1333 1334 The `-M' or `--mri' option selects MRI compatibility mode. This 1335 changes the syntax and pseudo-op handling of `as' to make it compatible 1336 with the `ASM68K' or the `ASM960' (depending upon the configured 1337 target) assembler from Microtec Research. The exact nature of the MRI 1338 syntax will not be documented here; see the MRI manuals for more 1339 information. Note in particular that the handling of macros and macro 1340 arguments is somewhat different. The purpose of this option is to 1341 permit assembling existing MRI assembler code using `as'. 1342 1343 The MRI compatibility is not complete. Certain operations of the 1344 MRI assembler depend upon its object file format, and can not be 1345 supported using other object file formats. Supporting these would 1346 require enhancing each object file format individually. These are: 1347 1348 * global symbols in common section 1349 1350 The m68k MRI assembler supports common sections which are merged 1351 by the linker. Other object file formats do not support this. 1352 `as' handles common sections by treating them as a single common 1353 symbol. It permits local symbols to be defined within a common 1354 section, but it can not support global symbols, since it has no 1355 way to describe them. 1356 1357 * complex relocations 1358 1359 The MRI assemblers support relocations against a negated section 1360 address, and relocations which combine the start addresses of two 1361 or more sections. These are not support by other object file 1362 formats. 1363 1364 * `END' pseudo-op specifying start address 1365 1366 The MRI `END' pseudo-op permits the specification of a start 1367 address. This is not supported by other object file formats. The 1368 start address may instead be specified using the `-e' option to 1369 the linker, or in a linker script. 1370 1371 * `IDNT', `.ident' and `NAME' pseudo-ops 1372 1373 The MRI `IDNT', `.ident' and `NAME' pseudo-ops assign a module 1374 name to the output file. This is not supported by other object 1375 file formats. 1376 1377 * `ORG' pseudo-op 1378 1379 The m68k MRI `ORG' pseudo-op begins an absolute section at a given 1380 address. This differs from the usual `as' `.org' pseudo-op, which 1381 changes the location within the current section. Absolute 1382 sections are not supported by other object file formats. The 1383 address of a section may be assigned within a linker script. 1384 1385 There are some other features of the MRI assembler which are not 1386 supported by `as', typically either because they are difficult or 1387 because they seem of little consequence. Some of these may be 1388 supported in future releases. 1389 1390 * EBCDIC strings 1391 1392 EBCDIC strings are not supported. 1393 1394 * packed binary coded decimal 1395 1396 Packed binary coded decimal is not supported. This means that the 1397 `DC.P' and `DCB.P' pseudo-ops are not supported. 1398 1399 * `FEQU' pseudo-op 1400 1401 The m68k `FEQU' pseudo-op is not supported. 1402 1403 * `NOOBJ' pseudo-op 1404 1405 The m68k `NOOBJ' pseudo-op is not supported. 1406 1407 * `OPT' branch control options 1408 1409 The m68k `OPT' branch control options--`B', `BRS', `BRB', `BRL', 1410 and `BRW'--are ignored. `as' automatically relaxes all branches, 1411 whether forward or backward, to an appropriate size, so these 1412 options serve no purpose. 1413 1414 * `OPT' list control options 1415 1416 The following m68k `OPT' list control options are ignored: `C', 1417 `CEX', `CL', `CRE', `E', `G', `I', `M', `MEX', `MC', `MD', `X'. 1418 1419 * other `OPT' options 1420 1421 The following m68k `OPT' options are ignored: `NEST', `O', `OLD', 1422 `OP', `P', `PCO', `PCR', `PCS', `R'. 1423 1424 * `OPT' `D' option is default 1425 1426 The m68k `OPT' `D' option is the default, unlike the MRI assembler. 1427 `OPT NOD' may be used to turn it off. 1428 1429 * `XREF' pseudo-op. 1430 1431 The m68k `XREF' pseudo-op is ignored. 1432 1433 * `.debug' pseudo-op 1434 1435 The i960 `.debug' pseudo-op is not supported. 1436 1437 * `.extended' pseudo-op 1438 1439 The i960 `.extended' pseudo-op is not supported. 1440 1441 * `.list' pseudo-op. 1442 1443 The various options of the i960 `.list' pseudo-op are not 1444 supported. 1445 1446 * `.optimize' pseudo-op 1447 1448 The i960 `.optimize' pseudo-op is not supported. 1449 1450 * `.output' pseudo-op 1451 1452 The i960 `.output' pseudo-op is not supported. 1453 1454 * `.setreal' pseudo-op 1455 1456 The i960 `.setreal' pseudo-op is not supported. 1457 1458 1459 1460 File: as.info, Node: MD, Next: o, Prev: M, Up: Invoking 1461 1462 2.10 Dependency Tracking: `--MD' 1463 ================================ 1464 1465 `as' can generate a dependency file for the file it creates. This file 1466 consists of a single rule suitable for `make' describing the 1467 dependencies of the main source file. 1468 1469 The rule is written to the file named in its argument. 1470 1471 This feature is used in the automatic updating of makefiles. 1472 1473 1474 File: as.info, Node: o, Next: R, Prev: MD, Up: Invoking 1475 1476 2.11 Name the Object File: `-o' 1477 =============================== 1478 1479 There is always one object file output when you run `as'. By default 1480 it has the name `a.out' (or `b.out', for Intel 960 targets only). You 1481 use this option (which takes exactly one filename) to give the object 1482 file a different name. 1483 1484 Whatever the object file is called, `as' overwrites any existing 1485 file of the same name. 1486 1487 1488 File: as.info, Node: R, Next: statistics, Prev: o, Up: Invoking 1489 1490 2.12 Join Data and Text Sections: `-R' 1491 ====================================== 1492 1493 `-R' tells `as' to write the object file as if all data-section data 1494 lives in the text section. This is only done at the very last moment: 1495 your binary data are the same, but data section parts are relocated 1496 differently. The data section part of your object file is zero bytes 1497 long because all its bytes are appended to the text section. (*Note 1498 Sections and Relocation: Sections.) 1499 1500 When you specify `-R' it would be possible to generate shorter 1501 address displacements (because we do not have to cross between text and 1502 data section). We refrain from doing this simply for compatibility with 1503 older versions of `as'. In future, `-R' may work this way. 1504 1505 When `as' is configured for COFF or ELF output, this option is only 1506 useful if you use sections named `.text' and `.data'. 1507 1508 `-R' is not supported for any of the HPPA targets. Using `-R' 1509 generates a warning from `as'. 1510 1511 1512 File: as.info, Node: statistics, Next: traditional-format, Prev: R, Up: Invoking 1513 1514 2.13 Display Assembly Statistics: `--statistics' 1515 ================================================ 1516 1517 Use `--statistics' to display two statistics about the resources used by 1518 `as': the maximum amount of space allocated during the assembly (in 1519 bytes), and the total execution time taken for the assembly (in CPU 1520 seconds). 1521 1522 1523 File: as.info, Node: traditional-format, Next: v, Prev: statistics, Up: Invoking 1524 1525 2.14 Compatible Output: `--traditional-format' 1526 ============================================== 1527 1528 For some targets, the output of `as' is different in some ways from the 1529 output of some existing assembler. This switch requests `as' to use 1530 the traditional format instead. 1531 1532 For example, it disables the exception frame optimizations which 1533 `as' normally does by default on `gcc' output. 1534 1535 1536 File: as.info, Node: v, Next: W, Prev: traditional-format, Up: Invoking 1537 1538 2.15 Announce Version: `-v' 1539 =========================== 1540 1541 You can find out what version of as is running by including the option 1542 `-v' (which you can also spell as `-version') on the command line. 1543 1544 1545 File: as.info, Node: W, Next: Z, Prev: v, Up: Invoking 1546 1547 2.16 Control Warnings: `-W', `--warn', `--no-warn', `--fatal-warnings' 1548 ====================================================================== 1549 1550 `as' should never give a warning or error message when assembling 1551 compiler output. But programs written by people often cause `as' to 1552 give a warning that a particular assumption was made. All such 1553 warnings are directed to the standard error file. 1554 1555 If you use the `-W' and `--no-warn' options, no warnings are issued. 1556 This only affects the warning messages: it does not change any 1557 particular of how `as' assembles your file. Errors, which stop the 1558 assembly, are still reported. 1559 1560 If you use the `--fatal-warnings' option, `as' considers files that 1561 generate warnings to be in error. 1562 1563 You can switch these options off again by specifying `--warn', which 1564 causes warnings to be output as usual. 1565 1566 1567 File: as.info, Node: Z, Prev: W, Up: Invoking 1568 1569 2.17 Generate Object File in Spite of Errors: `-Z' 1570 ================================================== 1571 1572 After an error message, `as' normally produces no output. If for some 1573 reason you are interested in object file output even after `as' gives 1574 an error message on your program, use the `-Z' option. If there are 1575 any errors, `as' continues anyways, and writes an object file after a 1576 final warning message of the form `N errors, M warnings, generating bad 1577 object file.' 1578 1579 1580 File: as.info, Node: Syntax, Next: Sections, Prev: Invoking, Up: Top 1581 1582 3 Syntax 1583 ******** 1584 1585 This chapter describes the machine-independent syntax allowed in a 1586 source file. `as' syntax is similar to what many other assemblers use; 1587 it is inspired by the BSD 4.2 assembler, except that `as' does not 1588 assemble Vax bit-fields. 1589 1590 * Menu: 1591 1592 * Preprocessing:: Preprocessing 1593 * Whitespace:: Whitespace 1594 * Comments:: Comments 1595 * Symbol Intro:: Symbols 1596 * Statements:: Statements 1597 * Constants:: Constants 1598 1599 1600 File: as.info, Node: Preprocessing, Next: Whitespace, Up: Syntax 1601 1602 3.1 Preprocessing 1603 ================= 1604 1605 The `as' internal preprocessor: 1606 * adjusts and removes extra whitespace. It leaves one space or tab 1607 before the keywords on a line, and turns any other whitespace on 1608 the line into a single space. 1609 1610 * removes all comments, replacing them with a single space, or an 1611 appropriate number of newlines. 1612 1613 * converts character constants into the appropriate numeric values. 1614 1615 It does not do macro processing, include file handling, or anything 1616 else you may get from your C compiler's preprocessor. You can do 1617 include file processing with the `.include' directive (*note 1618 `.include': Include.). You can use the GNU C compiler driver to get 1619 other "CPP" style preprocessing by giving the input file a `.S' suffix. 1620 *Note Options Controlling the Kind of Output: (gcc.info)Overall 1621 Options. 1622 1623 Excess whitespace, comments, and character constants cannot be used 1624 in the portions of the input text that are not preprocessed. 1625 1626 If the first line of an input file is `#NO_APP' or if you use the 1627 `-f' option, whitespace and comments are not removed from the input 1628 file. Within an input file, you can ask for whitespace and comment 1629 removal in specific portions of the by putting a line that says `#APP' 1630 before the text that may contain whitespace or comments, and putting a 1631 line that says `#NO_APP' after this text. This feature is mainly 1632 intend to support `asm' statements in compilers whose output is 1633 otherwise free of comments and whitespace. 1634 1635 1636 File: as.info, Node: Whitespace, Next: Comments, Prev: Preprocessing, Up: Syntax 1637 1638 3.2 Whitespace 1639 ============== 1640 1641 "Whitespace" is one or more blanks or tabs, in any order. Whitespace 1642 is used to separate symbols, and to make programs neater for people to 1643 read. Unless within character constants (*note Character Constants: 1644 Characters.), any whitespace means the same as exactly one space. 1645 1646 1647 File: as.info, Node: Comments, Next: Symbol Intro, Prev: Whitespace, Up: Syntax 1648 1649 3.3 Comments 1650 ============ 1651 1652 There are two ways of rendering comments to `as'. In both cases the 1653 comment is equivalent to one space. 1654 1655 Anything from `/*' through the next `*/' is a comment. This means 1656 you may not nest these comments. 1657 1658 /* 1659 The only way to include a newline ('\n') in a comment 1660 is to use this sort of comment. 1661 */ 1662 1663 /* This sort of comment does not nest. */ 1664 1665 Anything from the "line comment" character to the next newline is 1666 considered a comment and is ignored. The line comment character is `;' 1667 on the ARC; `@' on the ARM; `;' for the H8/300 family; `;' for the HPPA; 1668 `#' on the i386 and x86-64; `#' on the i960; `;' for the PDP-11; `;' 1669 for picoJava; `#' for Motorola PowerPC; `!' for the Renesas / SuperH SH; 1670 `!' on the SPARC; `#' on the ip2k; `#' on the m32c; `#' on the m32r; 1671 `|' on the 680x0; `#' on the 68HC11 and 68HC12; `#' on the Vax; `;' for 1672 the Z80; `!' for the Z8000; `#' on the V850; `#' for Xtensa systems; 1673 see *Note Machine Dependencies::. 1674 1675 On some machines there are two different line comment characters. 1676 One character only begins a comment if it is the first non-whitespace 1677 character on a line, while the other always begins a comment. 1678 1679 The V850 assembler also supports a double dash as starting a comment 1680 that extends to the end of the line. 1681 1682 `--'; 1683 1684 To be compatible with past assemblers, lines that begin with `#' 1685 have a special interpretation. Following the `#' should be an absolute 1686 expression (*note Expressions::): the logical line number of the _next_ 1687 line. Then a string (*note Strings: Strings.) is allowed: if present 1688 it is a new logical file name. The rest of the line, if any, should be 1689 whitespace. 1690 1691 If the first non-whitespace characters on the line are not numeric, 1692 the line is ignored. (Just like a comment.) 1693 1694 # This is an ordinary comment. 1695 # 42-6 "new_file_name" # New logical file name 1696 # This is logical line # 36. 1697 This feature is deprecated, and may disappear from future versions 1698 of `as'. 1699 1700 1701 File: as.info, Node: Symbol Intro, Next: Statements, Prev: Comments, Up: Syntax 1702 1703 3.4 Symbols 1704 =========== 1705 1706 A "symbol" is one or more characters chosen from the set of all letters 1707 (both upper and lower case), digits and the three characters `_.$'. On 1708 most machines, you can also use `$' in symbol names; exceptions are 1709 noted in *Note Machine Dependencies::. No symbol may begin with a 1710 digit. Case is significant. There is no length limit: all characters 1711 are significant. Symbols are delimited by characters not in that set, 1712 or by the beginning of a file (since the source program must end with a 1713 newline, the end of a file is not a possible symbol delimiter). *Note 1714 Symbols::. 1715 1716 1717 File: as.info, Node: Statements, Next: Constants, Prev: Symbol Intro, Up: Syntax 1718 1719 3.5 Statements 1720 ============== 1721 1722 A "statement" ends at a newline character (`\n') or line separator 1723 character. (The line separator is usually `;', unless this conflicts 1724 with the comment character; see *Note Machine Dependencies::.) The 1725 newline or separator character is considered part of the preceding 1726 statement. Newlines and separators within character constants are an 1727 exception: they do not end statements. 1728 1729 It is an error to end any statement with end-of-file: the last 1730 character of any input file should be a newline. 1731 1732 An empty statement is allowed, and may include whitespace. It is 1733 ignored. 1734 1735 A statement begins with zero or more labels, optionally followed by a 1736 key symbol which determines what kind of statement it is. The key 1737 symbol determines the syntax of the rest of the statement. If the 1738 symbol begins with a dot `.' then the statement is an assembler 1739 directive: typically valid for any computer. If the symbol begins with 1740 a letter the statement is an assembly language "instruction": it 1741 assembles into a machine language instruction. Different versions of 1742 `as' for different computers recognize different instructions. In 1743 fact, the same symbol may represent a different instruction in a 1744 different computer's assembly language. 1745 1746 A label is a symbol immediately followed by a colon (`:'). 1747 Whitespace before a label or after a colon is permitted, but you may not 1748 have whitespace between a label's symbol and its colon. *Note Labels::. 1749 1750 For HPPA targets, labels need not be immediately followed by a 1751 colon, but the definition of a label must begin in column zero. This 1752 also implies that only one label may be defined on each line. 1753 1754 label: .directive followed by something 1755 another_label: # This is an empty statement. 1756 instruction operand_1, operand_2, ... 1757 1758 1759 File: as.info, Node: Constants, Prev: Statements, Up: Syntax 1760 1761 3.6 Constants 1762 ============= 1763 1764 A constant is a number, written so that its value is known by 1765 inspection, without knowing any context. Like this: 1766 .byte 74, 0112, 092, 0x4A, 0X4a, 'J, '\J # All the same value. 1767 .ascii "Ring the bell\7" # A string constant. 1768 .octa 0x123456789abcdef0123456789ABCDEF0 # A bignum. 1769 .float 0f-314159265358979323846264338327\ 1770 95028841971.693993751E-40 # - pi, a flonum. 1771 1772 * Menu: 1773 1774 * Characters:: Character Constants 1775 * Numbers:: Number Constants 1776 1777 1778 File: as.info, Node: Characters, Next: Numbers, Up: Constants 1779 1780 3.6.1 Character Constants 1781 ------------------------- 1782 1783 There are two kinds of character constants. A "character" stands for 1784 one character in one byte and its value may be used in numeric 1785 expressions. String constants (properly called string _literals_) are 1786 potentially many bytes and their values may not be used in arithmetic 1787 expressions. 1788 1789 * Menu: 1790 1791 * Strings:: Strings 1792 * Chars:: Characters 1793 1794 1795 File: as.info, Node: Strings, Next: Chars, Up: Characters 1796 1797 3.6.1.1 Strings 1798 ............... 1799 1800 A "string" is written between double-quotes. It may contain 1801 double-quotes or null characters. The way to get special characters 1802 into a string is to "escape" these characters: precede them with a 1803 backslash `\' character. For example `\\' represents one backslash: 1804 the first `\' is an escape which tells `as' to interpret the second 1805 character literally as a backslash (which prevents `as' from 1806 recognizing the second `\' as an escape character). The complete list 1807 of escapes follows. 1808 1809 `\b' 1810 Mnemonic for backspace; for ASCII this is octal code 010. 1811 1812 `\f' 1813 Mnemonic for FormFeed; for ASCII this is octal code 014. 1814 1815 `\n' 1816 Mnemonic for newline; for ASCII this is octal code 012. 1817 1818 `\r' 1819 Mnemonic for carriage-Return; for ASCII this is octal code 015. 1820 1821 `\t' 1822 Mnemonic for horizontal Tab; for ASCII this is octal code 011. 1823 1824 `\ DIGIT DIGIT DIGIT' 1825 An octal character code. The numeric code is 3 octal digits. For 1826 compatibility with other Unix systems, 8 and 9 are accepted as 1827 digits: for example, `\008' has the value 010, and `\009' the 1828 value 011. 1829 1830 `\`x' HEX-DIGITS...' 1831 A hex character code. All trailing hex digits are combined. 1832 Either upper or lower case `x' works. 1833 1834 `\\' 1835 Represents one `\' character. 1836 1837 `\"' 1838 Represents one `"' character. Needed in strings to represent this 1839 character, because an unescaped `"' would end the string. 1840 1841 `\ ANYTHING-ELSE' 1842 Any other character when escaped by `\' gives a warning, but 1843 assembles as if the `\' was not present. The idea is that if you 1844 used an escape sequence you clearly didn't want the literal 1845 interpretation of the following character. However `as' has no 1846 other interpretation, so `as' knows it is giving you the wrong 1847 code and warns you of the fact. 1848 1849 Which characters are escapable, and what those escapes represent, 1850 varies widely among assemblers. The current set is what we think the 1851 BSD 4.2 assembler recognizes, and is a subset of what most C compilers 1852 recognize. If you are in doubt, do not use an escape sequence. 1853 1854 1855 File: as.info, Node: Chars, Prev: Strings, Up: Characters 1856 1857 3.6.1.2 Characters 1858 .................. 1859 1860 A single character may be written as a single quote immediately 1861 followed by that character. The same escapes apply to characters as to 1862 strings. So if you want to write the character backslash, you must 1863 write `'\\' where the first `\' escapes the second `\'. As you can 1864 see, the quote is an acute accent, not a grave accent. A newline 1865 immediately following an acute accent is taken as a literal character 1866 and does not count as the end of a statement. The value of a character 1867 constant in a numeric expression is the machine's byte-wide code for 1868 that character. `as' assumes your character code is ASCII: `'A' means 1869 65, `'B' means 66, and so on. 1870 1871 1872 File: as.info, Node: Numbers, Prev: Characters, Up: Constants 1873 1874 3.6.2 Number Constants 1875 ---------------------- 1876 1877 `as' distinguishes three kinds of numbers according to how they are 1878 stored in the target machine. _Integers_ are numbers that would fit 1879 into an `int' in the C language. _Bignums_ are integers, but they are 1880 stored in more than 32 bits. _Flonums_ are floating point numbers, 1881 described below. 1882 1883 * Menu: 1884 1885 * Integers:: Integers 1886 * Bignums:: Bignums 1887 * Flonums:: Flonums 1888 1889 1890 File: as.info, Node: Integers, Next: Bignums, Up: Numbers 1891 1892 3.6.2.1 Integers 1893 ................ 1894 1895 A binary integer is `0b' or `0B' followed by zero or more of the binary 1896 digits `01'. 1897 1898 An octal integer is `0' followed by zero or more of the octal digits 1899 (`01234567'). 1900 1901 A decimal integer starts with a non-zero digit followed by zero or 1902 more digits (`0123456789'). 1903 1904 A hexadecimal integer is `0x' or `0X' followed by one or more 1905 hexadecimal digits chosen from `0123456789abcdefABCDEF'. 1906 1907 Integers have the usual values. To denote a negative integer, use 1908 the prefix operator `-' discussed under expressions (*note Prefix 1909 Operators: Prefix Ops.). 1910 1911 1912 File: as.info, Node: Bignums, Next: Flonums, Prev: Integers, Up: Numbers 1913 1914 3.6.2.2 Bignums 1915 ............... 1916 1917 A "bignum" has the same syntax and semantics as an integer except that 1918 the number (or its negative) takes more than 32 bits to represent in 1919 binary. The distinction is made because in some places integers are 1920 permitted while bignums are not. 1921 1922 1923 File: as.info, Node: Flonums, Prev: Bignums, Up: Numbers 1924 1925 3.6.2.3 Flonums 1926 ............... 1927 1928 A "flonum" represents a floating point number. The translation is 1929 indirect: a decimal floating point number from the text is converted by 1930 `as' to a generic binary floating point number of more than sufficient 1931 precision. This generic floating point number is converted to a 1932 particular computer's floating point format (or formats) by a portion 1933 of `as' specialized to that computer. 1934 1935 A flonum is written by writing (in order) 1936 * The digit `0'. (`0' is optional on the HPPA.) 1937 1938 * A letter, to tell `as' the rest of the number is a flonum. `e' is 1939 recommended. Case is not important. 1940 1941 On the H8/300, Renesas / SuperH SH, and AMD 29K architectures, the 1942 letter must be one of the letters `DFPRSX' (in upper or lower 1943 case). 1944 1945 On the ARC, the letter must be one of the letters `DFRS' (in upper 1946 or lower case). 1947 1948 On the Intel 960 architecture, the letter must be one of the 1949 letters `DFT' (in upper or lower case). 1950 1951 On the HPPA architecture, the letter must be `E' (upper case only). 1952 1953 * An optional sign: either `+' or `-'. 1954 1955 * An optional "integer part": zero or more decimal digits. 1956 1957 * An optional "fractional part": `.' followed by zero or more 1958 decimal digits. 1959 1960 * An optional exponent, consisting of: 1961 1962 * An `E' or `e'. 1963 1964 * Optional sign: either `+' or `-'. 1965 1966 * One or more decimal digits. 1967 1968 1969 At least one of the integer part or the fractional part must be 1970 present. The floating point number has the usual base-10 value. 1971 1972 `as' does all processing using integers. Flonums are computed 1973 independently of any floating point hardware in the computer running 1974 `as'. 1975 1976 1977 File: as.info, Node: Sections, Next: Symbols, Prev: Syntax, Up: Top 1978 1979 4 Sections and Relocation 1980 ************************* 1981 1982 * Menu: 1983 1984 * Secs Background:: Background 1985 * Ld Sections:: Linker Sections 1986 * As Sections:: Assembler Internal Sections 1987 * Sub-Sections:: Sub-Sections 1988 * bss:: bss Section 1989 1990 1991 File: as.info, Node: Secs Background, Next: Ld Sections, Up: Sections 1992 1993 4.1 Background 1994 ============== 1995 1996 Roughly, a section is a range of addresses, with no gaps; all data "in" 1997 those addresses is treated the same for some particular purpose. For 1998 example there may be a "read only" section. 1999 2000 The linker `ld' reads many object files (partial programs) and 2001 combines their contents to form a runnable program. When `as' emits an 2002 object file, the partial program is assumed to start at address 0. 2003 `ld' assigns the final addresses for the partial program, so that 2004 different partial programs do not overlap. This is actually an 2005 oversimplification, but it suffices to explain how `as' uses sections. 2006 2007 `ld' moves blocks of bytes of your program to their run-time 2008 addresses. These blocks slide to their run-time addresses as rigid 2009 units; their length does not change and neither does the order of bytes 2010 within them. Such a rigid unit is called a _section_. Assigning 2011 run-time addresses to sections is called "relocation". It includes the 2012 task of adjusting mentions of object-file addresses so they refer to 2013 the proper run-time addresses. For the H8/300, and for the Renesas / 2014 SuperH SH, `as' pads sections if needed to ensure they end on a word 2015 (sixteen bit) boundary. 2016 2017 An object file written by `as' has at least three sections, any of 2018 which may be empty. These are named "text", "data" and "bss" sections. 2019 2020 When it generates COFF or ELF output, `as' can also generate 2021 whatever other named sections you specify using the `.section' 2022 directive (*note `.section': Section.). If you do not use any 2023 directives that place output in the `.text' or `.data' sections, these 2024 sections still exist, but are empty. 2025 2026 When `as' generates SOM or ELF output for the HPPA, `as' can also 2027 generate whatever other named sections you specify using the `.space' 2028 and `.subspace' directives. See `HP9000 Series 800 Assembly Language 2029 Reference Manual' (HP 92432-90001) for details on the `.space' and 2030 `.subspace' assembler directives. 2031 2032 Additionally, `as' uses different names for the standard text, data, 2033 and bss sections when generating SOM output. Program text is placed 2034 into the `$CODE$' section, data into `$DATA$', and BSS into `$BSS$'. 2035 2036 Within the object file, the text section starts at address `0', the 2037 data section follows, and the bss section follows the data section. 2038 2039 When generating either SOM or ELF output files on the HPPA, the text 2040 section starts at address `0', the data section at address `0x4000000', 2041 and the bss section follows the data section. 2042 2043 To let `ld' know which data changes when the sections are relocated, 2044 and how to change that data, `as' also writes to the object file 2045 details of the relocation needed. To perform relocation `ld' must 2046 know, each time an address in the object file is mentioned: 2047 * Where in the object file is the beginning of this reference to an 2048 address? 2049 2050 * How long (in bytes) is this reference? 2051 2052 * Which section does the address refer to? What is the numeric 2053 value of 2054 (ADDRESS) - (START-ADDRESS OF SECTION)? 2055 2056 * Is the reference to an address "Program-Counter relative"? 2057 2058 In fact, every address `as' ever uses is expressed as 2059 (SECTION) + (OFFSET INTO SECTION) 2060 Further, most expressions `as' computes have this section-relative 2061 nature. (For some object formats, such as SOM for the HPPA, some 2062 expressions are symbol-relative instead.) 2063 2064 In this manual we use the notation {SECNAME N} to mean "offset N 2065 into section SECNAME." 2066 2067 Apart from text, data and bss sections you need to know about the 2068 "absolute" section. When `ld' mixes partial programs, addresses in the 2069 absolute section remain unchanged. For example, address `{absolute 0}' 2070 is "relocated" to run-time address 0 by `ld'. Although the linker 2071 never arranges two partial programs' data sections with overlapping 2072 addresses after linking, _by definition_ their absolute sections must 2073 overlap. Address `{absolute 239}' in one part of a program is always 2074 the same address when the program is running as address `{absolute 2075 239}' in any other part of the program. 2076 2077 The idea of sections is extended to the "undefined" section. Any 2078 address whose section is unknown at assembly time is by definition 2079 rendered {undefined U}--where U is filled in later. Since numbers are 2080 always defined, the only way to generate an undefined address is to 2081 mention an undefined symbol. A reference to a named common block would 2082 be such a symbol: its value is unknown at assembly time so it has 2083 section _undefined_. 2084 2085 By analogy the word _section_ is used to describe groups of sections 2086 in the linked program. `ld' puts all partial programs' text sections 2087 in contiguous addresses in the linked program. It is customary to 2088 refer to the _text section_ of a program, meaning all the addresses of 2089 all partial programs' text sections. Likewise for data and bss 2090 sections. 2091 2092 Some sections are manipulated by `ld'; others are invented for use 2093 of `as' and have no meaning except during assembly. 2094 2095 2096 File: as.info, Node: Ld Sections, Next: As Sections, Prev: Secs Background, Up: Sections 2097 2098 4.2 Linker Sections 2099 =================== 2100 2101 `ld' deals with just four kinds of sections, summarized below. 2102 2103 *named sections* 2104 *text section* 2105 *data section* 2106 These sections hold your program. `as' and `ld' treat them as 2107 separate but equal sections. Anything you can say of one section 2108 is true of another. When the program is running, however, it is 2109 customary for the text section to be unalterable. The text 2110 section is often shared among processes: it contains instructions, 2111 constants and the like. The data section of a running program is 2112 usually alterable: for example, C variables would be stored in the 2113 data section. 2114 2115 *bss section* 2116 This section contains zeroed bytes when your program begins 2117 running. It is used to hold uninitialized variables or common 2118 storage. The length of each partial program's bss section is 2119 important, but because it starts out containing zeroed bytes there 2120 is no need to store explicit zero bytes in the object file. The 2121 bss section was invented to eliminate those explicit zeros from 2122 object files. 2123 2124 *absolute section* 2125 Address 0 of this section is always "relocated" to runtime address 2126 0. This is useful if you want to refer to an address that `ld' 2127 must not change when relocating. In this sense we speak of 2128 absolute addresses being "unrelocatable": they do not change 2129 during relocation. 2130 2131 *undefined section* 2132 This "section" is a catch-all for address references to objects 2133 not in the preceding sections. 2134 2135 An idealized example of three relocatable sections follows. The 2136 example uses the traditional section names `.text' and `.data'. Memory 2137 addresses are on the horizontal axis. 2138 2139 +-----+----+--+ 2140 partial program # 1: |ttttt|dddd|00| 2141 +-----+----+--+ 2142 2143 text data bss 2144 seg. seg. seg. 2145 2146 +---+---+---+ 2147 partial program # 2: |TTT|DDD|000| 2148 +---+---+---+ 2149 2150 +--+---+-----+--+----+---+-----+~~ 2151 linked program: | |TTT|ttttt| |dddd|DDD|00000| 2152 +--+---+-----+--+----+---+-----+~~ 2153 2154 addresses: 0 ... 2155 2156 2157 File: as.info, Node: As Sections, Next: Sub-Sections, Prev: Ld Sections, Up: Sections 2158 2159 4.3 Assembler Internal Sections 2160 =============================== 2161 2162 These sections are meant only for the internal use of `as'. They have 2163 no meaning at run-time. You do not really need to know about these 2164 sections for most purposes; but they can be mentioned in `as' warning 2165 messages, so it might be helpful to have an idea of their meanings to 2166 `as'. These sections are used to permit the value of every expression 2167 in your assembly language program to be a section-relative address. 2168 2169 ASSEMBLER-INTERNAL-LOGIC-ERROR! 2170 An internal assembler logic error has been found. This means 2171 there is a bug in the assembler. 2172 2173 expr section 2174 The assembler stores complex expression internally as combinations 2175 of symbols. When it needs to represent an expression as a symbol, 2176 it puts it in the expr section. 2177 2178 2179 File: as.info, Node: Sub-Sections, Next: bss, Prev: As Sections, Up: Sections 2180 2181 4.4 Sub-Sections 2182 ================ 2183 2184 Assembled bytes conventionally fall into two sections: text and data. 2185 You may have separate groups of data in named sections that you want to 2186 end up near to each other in the object file, even though they are not 2187 contiguous in the assembler source. `as' allows you to use 2188 "subsections" for this purpose. Within each section, there can be 2189 numbered subsections with values from 0 to 8192. Objects assembled 2190 into the same subsection go into the object file together with other 2191 objects in the same subsection. For example, a compiler might want to 2192 store constants in the text section, but might not want to have them 2193 interspersed with the program being assembled. In this case, the 2194 compiler could issue a `.text 0' before each section of code being 2195 output, and a `.text 1' before each group of constants being output. 2196 2197 Subsections are optional. If you do not use subsections, everything 2198 goes in subsection number zero. 2199 2200 Each subsection is zero-padded up to a multiple of four bytes. 2201 (Subsections may be padded a different amount on different flavors of 2202 `as'.) 2203 2204 Subsections appear in your object file in numeric order, lowest 2205 numbered to highest. (All this to be compatible with other people's 2206 assemblers.) The object file contains no representation of 2207 subsections; `ld' and other programs that manipulate object files see 2208 no trace of them. They just see all your text subsections as a text 2209 section, and all your data subsections as a data section. 2210 2211 To specify which subsection you want subsequent statements assembled 2212 into, use a numeric argument to specify it, in a `.text EXPRESSION' or 2213 a `.data EXPRESSION' statement. When generating COFF output, you can 2214 also use an extra subsection argument with arbitrary named sections: 2215 `.section NAME, EXPRESSION'. When generating ELF output, you can also 2216 use the `.subsection' directive (*note SubSection::) to specify a 2217 subsection: `.subsection EXPRESSION'. EXPRESSION should be an absolute 2218 expression (*note Expressions::). If you just say `.text' then `.text 2219 0' is assumed. Likewise `.data' means `.data 0'. Assembly begins in 2220 `text 0'. For instance: 2221 .text 0 # The default subsection is text 0 anyway. 2222 .ascii "This lives in the first text subsection. *" 2223 .text 1 2224 .ascii "But this lives in the second text subsection." 2225 .data 0 2226 .ascii "This lives in the data section," 2227 .ascii "in the first data subsection." 2228 .text 0 2229 .ascii "This lives in the first text section," 2230 .ascii "immediately following the asterisk (*)." 2231 2232 Each section has a "location counter" incremented by one for every 2233 byte assembled into that section. Because subsections are merely a 2234 convenience restricted to `as' there is no concept of a subsection 2235 location counter. There is no way to directly manipulate a location 2236 counter--but the `.align' directive changes it, and any label 2237 definition captures its current value. The location counter of the 2238 section where statements are being assembled is said to be the "active" 2239 location counter. 2240 2241 2242 File: as.info, Node: bss, Prev: Sub-Sections, Up: Sections 2243 2244 4.5 bss Section 2245 =============== 2246 2247 The bss section is used for local common variable storage. You may 2248 allocate address space in the bss section, but you may not dictate data 2249 to load into it before your program executes. When your program starts 2250 running, all the contents of the bss section are zeroed bytes. 2251 2252 The `.lcomm' pseudo-op defines a symbol in the bss section; see 2253 *Note `.lcomm': Lcomm. 2254 2255 The `.comm' pseudo-op may be used to declare a common symbol, which 2256 is another form of uninitialized symbol; see *Note `.comm': Comm. 2257 2258 When assembling for a target which supports multiple sections, such 2259 as ELF or COFF, you may switch into the `.bss' section and define 2260 symbols as usual; see *Note `.section': Section. You may only assemble 2261 zero values into the section. Typically the section will only contain 2262 symbol definitions and `.skip' directives (*note `.skip': Skip.). 2263 2264 2265 File: as.info, Node: Symbols, Next: Expressions, Prev: Sections, Up: Top 2266 2267 5 Symbols 2268 ********* 2269 2270 Symbols are a central concept: the programmer uses symbols to name 2271 things, the linker uses symbols to link, and the debugger uses symbols 2272 to debug. 2273 2274 _Warning:_ `as' does not place symbols in the object file in the 2275 same order they were declared. This may break some debuggers. 2276 2277 * Menu: 2278 2279 * Labels:: Labels 2280 * Setting Symbols:: Giving Symbols Other Values 2281 * Symbol Names:: Symbol Names 2282 * Dot:: The Special Dot Symbol 2283 * Symbol Attributes:: Symbol Attributes 2284 2285 2286 File: as.info, Node: Labels, Next: Setting Symbols, Up: Symbols 2287 2288 5.1 Labels 2289 ========== 2290 2291 A "label" is written as a symbol immediately followed by a colon `:'. 2292 The symbol then represents the current value of the active location 2293 counter, and is, for example, a suitable instruction operand. You are 2294 warned if you use the same symbol to represent two different locations: 2295 the first definition overrides any other definitions. 2296 2297 On the HPPA, the usual form for a label need not be immediately 2298 followed by a colon, but instead must start in column zero. Only one 2299 label may be defined on a single line. To work around this, the HPPA 2300 version of `as' also provides a special directive `.label' for defining 2301 labels more flexibly. 2302 2303 2304 File: as.info, Node: Setting Symbols, Next: Symbol Names, Prev: Labels, Up: Symbols 2305 2306 5.2 Giving Symbols Other Values 2307 =============================== 2308 2309 A symbol can be given an arbitrary value by writing a symbol, followed 2310 by an equals sign `=', followed by an expression (*note Expressions::). 2311 This is equivalent to using the `.set' directive. *Note `.set': Set. 2312 In the same way, using a double equals sign `='`=' here represents an 2313 equivalent of the `.eqv' directive. *Note `.eqv': Eqv. 2314 2315 2316 File: as.info, Node: Symbol Names, Next: Dot, Prev: Setting Symbols, Up: Symbols 2317 2318 5.3 Symbol Names 2319 ================ 2320 2321 Symbol names begin with a letter or with one of `._'. On most 2322 machines, you can also use `$' in symbol names; exceptions are noted in 2323 *Note Machine Dependencies::. That character may be followed by any 2324 string of digits, letters, dollar signs (unless otherwise noted for a 2325 particular target machine), and underscores. 2326 2327 Case of letters is significant: `foo' is a different symbol name than 2328 `Foo'. 2329 2330 Each symbol has exactly one name. Each name in an assembly language 2331 program refers to exactly one symbol. You may use that symbol name any 2332 number of times in a program. 2333 2334 Local Symbol Names 2335 ------------------ 2336 2337 A local symbol is any symbol beginning with certain local label 2338 prefixes. By default, the local label prefix is `.L' for ELF systems or 2339 `L' for traditional a.out systems, but each target may have its own set 2340 of local label prefixes. On the HPPA local symbols begin with `L$'. 2341 2342 Local symbols are defined and used within the assembler, but they are 2343 normally not saved in object files. Thus, they are not visible when 2344 debugging. You may use the `-L' option (*note Include Local Symbols: 2345 `-L': L.) to retain the local symbols in the object files. 2346 2347 Local Labels 2348 ------------ 2349 2350 Local labels help compilers and programmers use names temporarily. 2351 They create symbols which are guaranteed to be unique over the entire 2352 scope of the input source code and which can be referred to by a simple 2353 notation. To define a local label, write a label of the form `N:' 2354 (where N represents any positive integer). To refer to the most recent 2355 previous definition of that label write `Nb', using the same number as 2356 when you defined the label. To refer to the next definition of a local 2357 label, write `Nf'--the `b' stands for "backwards" and the `f' stands 2358 for "forwards". 2359 2360 There is no restriction on how you can use these labels, and you can 2361 reuse them too. So that it is possible to repeatedly define the same 2362 local label (using the same number `N'), although you can only refer to 2363 the most recently defined local label of that number (for a backwards 2364 reference) or the next definition of a specific local label for a 2365 forward reference. It is also worth noting that the first 10 local 2366 labels (`0:'...`9:') are implemented in a slightly more efficient 2367 manner than the others. 2368 2369 Here is an example: 2370 2371 1: branch 1f 2372 2: branch 1b 2373 1: branch 2f 2374 2: branch 1b 2375 2376 Which is the equivalent of: 2377 2378 label_1: branch label_3 2379 label_2: branch label_1 2380 label_3: branch label_4 2381 label_4: branch label_3 2382 2383 Local label names are only a notational device. They are immediately 2384 transformed into more conventional symbol names before the assembler 2385 uses them. The symbol names are stored in the symbol table, appear in 2386 error messages, and are optionally emitted to the object file. The 2387 names are constructed using these parts: 2388 2389 `_local label prefix_' 2390 All local symbols begin with the system-specific local label 2391 prefix. Normally both `as' and `ld' forget symbols that start 2392 with the local label prefix. These labels are used for symbols 2393 you are never intended to see. If you use the `-L' option then 2394 `as' retains these symbols in the object file. If you also 2395 instruct `ld' to retain these symbols, you may use them in 2396 debugging. 2397 2398 `NUMBER' 2399 This is the number that was used in the local label definition. 2400 So if the label is written `55:' then the number is `55'. 2401 2402 `C-B' 2403 This unusual character is included so you do not accidentally 2404 invent a symbol of the same name. The character has ASCII value 2405 of `\002' (control-B). 2406 2407 `_ordinal number_' 2408 This is a serial number to keep the labels distinct. The first 2409 definition of `0:' gets the number `1'. The 15th definition of 2410 `0:' gets the number `15', and so on. Likewise the first 2411 definition of `1:' gets the number `1' and its 15th definition 2412 gets `15' as well. 2413 2414 So for example, the first `1:' may be named `.L1C-B1', and the 44th 2415 `3:' may be named `.L3C-B44'. 2416 2417 Dollar Local Labels 2418 ------------------- 2419 2420 `as' also supports an even more local form of local labels called 2421 dollar labels. These labels go out of scope (i.e., they become 2422 undefined) as soon as a non-local label is defined. Thus they remain 2423 valid for only a small region of the input source code. Normal local 2424 labels, by contrast, remain in scope for the entire file, or until they 2425 are redefined by another occurrence of the same local label. 2426 2427 Dollar labels are defined in exactly the same way as ordinary local 2428 labels, except that instead of being terminated by a colon, they are 2429 terminated by a dollar sign, e.g., `55$'. 2430 2431 They can also be distinguished from ordinary local labels by their 2432 transformed names which use ASCII character `\001' (control-A) as the 2433 magic character to distinguish them from ordinary labels. For example, 2434 the fifth definition of `6$' may be named `.L6C-A5'. 2435 2436 2437 File: as.info, Node: Dot, Next: Symbol Attributes, Prev: Symbol Names, Up: Symbols 2438 2439 5.4 The Special Dot Symbol 2440 ========================== 2441 2442 The special symbol `.' refers to the current address that `as' is 2443 assembling into. Thus, the expression `melvin: .long .' defines 2444 `melvin' to contain its own address. Assigning a value to `.' is 2445 treated the same as a `.org' directive. Thus, the expression `.=.+4' 2446 is the same as saying `.space 4'. 2447 2448 2449 File: as.info, Node: Symbol Attributes, Prev: Dot, Up: Symbols 2450 2451 5.5 Symbol Attributes 2452 ===================== 2453 2454 Every symbol has, as well as its name, the attributes "Value" and 2455 "Type". Depending on output format, symbols can also have auxiliary 2456 attributes. 2457 2458 If you use a symbol without defining it, `as' assumes zero for all 2459 these attributes, and probably won't warn you. This makes the symbol 2460 an externally defined symbol, which is generally what you would want. 2461 2462 * Menu: 2463 2464 * Symbol Value:: Value 2465 * Symbol Type:: Type 2466 2467 2468 * a.out Symbols:: Symbol Attributes: `a.out' 2469 2470 * COFF Symbols:: Symbol Attributes for COFF 2471 2472 * SOM Symbols:: Symbol Attributes for SOM 2473 2474 2475 File: as.info, Node: Symbol Value, Next: Symbol Type, Up: Symbol Attributes 2476 2477 5.5.1 Value 2478 ----------- 2479 2480 The value of a symbol is (usually) 32 bits. For a symbol which labels a 2481 location in the text, data, bss or absolute sections the value is the 2482 number of addresses from the start of that section to the label. 2483 Naturally for text, data and bss sections the value of a symbol changes 2484 as `ld' changes section base addresses during linking. Absolute 2485 symbols' values do not change during linking: that is why they are 2486 called absolute. 2487 2488 The value of an undefined symbol is treated in a special way. If it 2489 is 0 then the symbol is not defined in this assembler source file, and 2490 `ld' tries to determine its value from other files linked into the same 2491 program. You make this kind of symbol simply by mentioning a symbol 2492 name without defining it. A non-zero value represents a `.comm' common 2493 declaration. The value is how much common storage to reserve, in bytes 2494 (addresses). The symbol refers to the first address of the allocated 2495 storage. 2496 2497 2498 File: as.info, Node: Symbol Type, Next: a.out Symbols, Prev: Symbol Value, Up: Symbol Attributes 2499 2500 5.5.2 Type 2501 ---------- 2502 2503 The type attribute of a symbol contains relocation (section) 2504 information, any flag settings indicating that a symbol is external, and 2505 (optionally), other information for linkers and debuggers. The exact 2506 format depends on the object-code output format in use. 2507 2508 2509 File: as.info, Node: a.out Symbols, Next: COFF Symbols, Prev: Symbol Type, Up: Symbol Attributes 2510 2511 5.5.3 Symbol Attributes: `a.out' 2512 -------------------------------- 2513 2514 * Menu: 2515 2516 * Symbol Desc:: Descriptor 2517 * Symbol Other:: Other 2518 2519 2520 File: as.info, Node: Symbol Desc, Next: Symbol Other, Up: a.out Symbols 2521 2522 5.5.3.1 Descriptor 2523 .................. 2524 2525 This is an arbitrary 16-bit value. You may establish a symbol's 2526 descriptor value by using a `.desc' statement (*note `.desc': Desc.). 2527 A descriptor value means nothing to `as'. 2528 2529 2530 File: as.info, Node: Symbol Other, Prev: Symbol Desc, Up: a.out Symbols 2531 2532 5.5.3.2 Other 2533 ............. 2534 2535 This is an arbitrary 8-bit value. It means nothing to `as'. 2536 2537 2538 File: as.info, Node: COFF Symbols, Next: SOM Symbols, Prev: a.out Symbols, Up: Symbol Attributes 2539 2540 5.5.4 Symbol Attributes for COFF 2541 -------------------------------- 2542 2543 The COFF format supports a multitude of auxiliary symbol attributes; 2544 like the primary symbol attributes, they are set between `.def' and 2545 `.endef' directives. 2546 2547 5.5.4.1 Primary Attributes 2548 .......................... 2549 2550 The symbol name is set with `.def'; the value and type, respectively, 2551 with `.val' and `.type'. 2552 2553 5.5.4.2 Auxiliary Attributes 2554 ............................ 2555 2556 The `as' directives `.dim', `.line', `.scl', `.size', `.tag', and 2557 `.weak' can generate auxiliary symbol table information for COFF. 2558 2559 2560 File: as.info, Node: SOM Symbols, Prev: COFF Symbols, Up: Symbol Attributes 2561 2562 5.5.5 Symbol Attributes for SOM 2563 ------------------------------- 2564 2565 The SOM format for the HPPA supports a multitude of symbol attributes 2566 set with the `.EXPORT' and `.IMPORT' directives. 2567 2568 The attributes are described in `HP9000 Series 800 Assembly Language 2569 Reference Manual' (HP 92432-90001) under the `IMPORT' and `EXPORT' 2570 assembler directive documentation. 2571 2572 2573 File: as.info, Node: Expressions, Next: Pseudo Ops, Prev: Symbols, Up: Top 2574 2575 6 Expressions 2576 ************* 2577 2578 An "expression" specifies an address or numeric value. Whitespace may 2579 precede and/or follow an expression. 2580 2581 The result of an expression must be an absolute number, or else an 2582 offset into a particular section. If an expression is not absolute, 2583 and there is not enough information when `as' sees the expression to 2584 know its section, a second pass over the source program might be 2585 necessary to interpret the expression--but the second pass is currently 2586 not implemented. `as' aborts with an error message in this situation. 2587 2588 * Menu: 2589 2590 * Empty Exprs:: Empty Expressions 2591 * Integer Exprs:: Integer Expressions 2592 2593 2594 File: as.info, Node: Empty Exprs, Next: Integer Exprs, Up: Expressions 2595 2596 6.1 Empty Expressions 2597 ===================== 2598 2599 An empty expression has no value: it is just whitespace or null. 2600 Wherever an absolute expression is required, you may omit the 2601 expression, and `as' assumes a value of (absolute) 0. This is 2602 compatible with other assemblers. 2603 2604 2605 File: as.info, Node: Integer Exprs, Prev: Empty Exprs, Up: Expressions 2606 2607 6.2 Integer Expressions 2608 ======================= 2609 2610 An "integer expression" is one or more _arguments_ delimited by 2611 _operators_. 2612 2613 * Menu: 2614 2615 * Arguments:: Arguments 2616 * Operators:: Operators 2617 * Prefix Ops:: Prefix Operators 2618 * Infix Ops:: Infix Operators 2619 2620 2621 File: as.info, Node: Arguments, Next: Operators, Up: Integer Exprs 2622 2623 6.2.1 Arguments 2624 --------------- 2625 2626 "Arguments" are symbols, numbers or subexpressions. In other contexts 2627 arguments are sometimes called "arithmetic operands". In this manual, 2628 to avoid confusing them with the "instruction operands" of the machine 2629 language, we use the term "argument" to refer to parts of expressions 2630 only, reserving the word "operand" to refer only to machine instruction 2631 operands. 2632 2633 Symbols are evaluated to yield {SECTION NNN} where SECTION is one of 2634 text, data, bss, absolute, or undefined. NNN is a signed, 2's 2635 complement 32 bit integer. 2636 2637 Numbers are usually integers. 2638 2639 A number can be a flonum or bignum. In this case, you are warned 2640 that only the low order 32 bits are used, and `as' pretends these 32 2641 bits are an integer. You may write integer-manipulating instructions 2642 that act on exotic constants, compatible with other assemblers. 2643 2644 Subexpressions are a left parenthesis `(' followed by an integer 2645 expression, followed by a right parenthesis `)'; or a prefix operator 2646 followed by an argument. 2647 2648 2649 File: as.info, Node: Operators, Next: Prefix Ops, Prev: Arguments, Up: Integer Exprs 2650 2651 6.2.2 Operators 2652 --------------- 2653 2654 "Operators" are arithmetic functions, like `+' or `%'. Prefix 2655 operators are followed by an argument. Infix operators appear between 2656 their arguments. Operators may be preceded and/or followed by 2657 whitespace. 2658 2659 2660 File: as.info, Node: Prefix Ops, Next: Infix Ops, Prev: Operators, Up: Integer Exprs 2661 2662 6.2.3 Prefix Operator 2663 --------------------- 2664 2665 `as' has the following "prefix operators". They each take one 2666 argument, which must be absolute. 2667 2668 `-' 2669 "Negation". Two's complement negation. 2670 2671 `~' 2672 "Complementation". Bitwise not. 2673 2674 2675 File: as.info, Node: Infix Ops, Prev: Prefix Ops, Up: Integer Exprs 2676 2677 6.2.4 Infix Operators 2678 --------------------- 2679 2680 "Infix operators" take two arguments, one on either side. Operators 2681 have precedence, but operations with equal precedence are performed left 2682 to right. Apart from `+' or `-', both arguments must be absolute, and 2683 the result is absolute. 2684 2685 1. Highest Precedence 2686 2687 `*' 2688 "Multiplication". 2689 2690 `/' 2691 "Division". Truncation is the same as the C operator `/' 2692 2693 `%' 2694 "Remainder". 2695 2696 `<<' 2697 "Shift Left". Same as the C operator `<<'. 2698 2699 `>>' 2700 "Shift Right". Same as the C operator `>>'. 2701 2702 2. Intermediate precedence 2703 2704 `|' 2705 "Bitwise Inclusive Or". 2706 2707 `&' 2708 "Bitwise And". 2709 2710 `^' 2711 "Bitwise Exclusive Or". 2712 2713 `!' 2714 "Bitwise Or Not". 2715 2716 3. Low Precedence 2717 2718 `+' 2719 "Addition". If either argument is absolute, the result has 2720 the section of the other argument. You may not add together 2721 arguments from different sections. 2722 2723 `-' 2724 "Subtraction". If the right argument is absolute, the result 2725 has the section of the left argument. If both arguments are 2726 in the same section, the result is absolute. You may not 2727 subtract arguments from different sections. 2728 2729 `==' 2730 "Is Equal To" 2731 2732 `<>' 2733 `!=' 2734 "Is Not Equal To" 2735 2736 `<' 2737 "Is Less Than" 2738 2739 `>' 2740 "Is Greater Than" 2741 2742 `>=' 2743 "Is Greater Than Or Equal To" 2744 2745 `<=' 2746 "Is Less Than Or Equal To" 2747 2748 The comparison operators can be used as infix operators. A 2749 true results has a value of -1 whereas a false result has a 2750 value of 0. Note, these operators perform signed 2751 comparisons. 2752 2753 4. Lowest Precedence 2754 2755 `&&' 2756 "Logical And". 2757 2758 `||' 2759 "Logical Or". 2760 2761 These two logical operations can be used to combine the 2762 results of sub expressions. Note, unlike the comparison 2763 operators a true result returns a value of 1 but a false 2764 results does still return 0. Also note that the logical or 2765 operator has a slightly lower precedence than logical and. 2766 2767 2768 In short, it's only meaningful to add or subtract the _offsets_ in an 2769 address; you can only have a defined section in one of the two 2770 arguments. 2771 2772 2773 File: as.info, Node: Pseudo Ops, Next: Object Attributes, Prev: Expressions, Up: Top 2774 2775 7 Assembler Directives 2776 ********************** 2777 2778 All assembler directives have names that begin with a period (`.'). 2779 The rest of the name is letters, usually in lower case. 2780 2781 This chapter discusses directives that are available regardless of 2782 the target machine configuration for the GNU assembler. Some machine 2783 configurations provide additional directives. *Note Machine 2784 Dependencies::. 2785 2786 * Menu: 2787 2788 * Abort:: `.abort' 2789 2790 * ABORT (COFF):: `.ABORT' 2791 2792 * Align:: `.align ABS-EXPR , ABS-EXPR' 2793 * Altmacro:: `.altmacro' 2794 * Ascii:: `.ascii "STRING"'... 2795 * Asciz:: `.asciz "STRING"'... 2796 * Balign:: `.balign ABS-EXPR , ABS-EXPR' 2797 * Byte:: `.byte EXPRESSIONS' 2798 * Comm:: `.comm SYMBOL , LENGTH ' 2799 2800 * CFI directives:: `.cfi_startproc [simple]', `.cfi_endproc', etc. 2801 2802 * Data:: `.data SUBSECTION' 2803 2804 * Def:: `.def NAME' 2805 2806 * Desc:: `.desc SYMBOL, ABS-EXPRESSION' 2807 2808 * Dim:: `.dim' 2809 2810 * Double:: `.double FLONUMS' 2811 * Eject:: `.eject' 2812 * Else:: `.else' 2813 * Elseif:: `.elseif' 2814 * End:: `.end' 2815 2816 * Endef:: `.endef' 2817 2818 * Endfunc:: `.endfunc' 2819 * Endif:: `.endif' 2820 * Equ:: `.equ SYMBOL, EXPRESSION' 2821 * Equiv:: `.equiv SYMBOL, EXPRESSION' 2822 * Eqv:: `.eqv SYMBOL, EXPRESSION' 2823 * Err:: `.err' 2824 * Error:: `.error STRING' 2825 * Exitm:: `.exitm' 2826 * Extern:: `.extern' 2827 * Fail:: `.fail' 2828 2829 * File:: `.file STRING' 2830 2831 * Fill:: `.fill REPEAT , SIZE , VALUE' 2832 * Float:: `.float FLONUMS' 2833 * Func:: `.func' 2834 * Global:: `.global SYMBOL', `.globl SYMBOL' 2835 2836 * Gnu_attribute:: `.gnu_attribute TAG,VALUE' 2837 * Hidden:: `.hidden NAMES' 2838 2839 * hword:: `.hword EXPRESSIONS' 2840 * Ident:: `.ident' 2841 * If:: `.if ABSOLUTE EXPRESSION' 2842 * Incbin:: `.incbin "FILE"[,SKIP[,COUNT]]' 2843 * Include:: `.include "FILE"' 2844 * Int:: `.int EXPRESSIONS' 2845 2846 * Internal:: `.internal NAMES' 2847 2848 * Irp:: `.irp SYMBOL,VALUES'... 2849 * Irpc:: `.irpc SYMBOL,VALUES'... 2850 * Lcomm:: `.lcomm SYMBOL , LENGTH' 2851 * Lflags:: `.lflags' 2852 2853 * Line:: `.line LINE-NUMBER' 2854 2855 * Linkonce:: `.linkonce [TYPE]' 2856 * List:: `.list' 2857 * Ln:: `.ln LINE-NUMBER' 2858 2859 * LNS directives:: `.file', `.loc', etc. 2860 2861 * Long:: `.long EXPRESSIONS' 2862 2863 * Macro:: `.macro NAME ARGS'... 2864 * MRI:: `.mri VAL' 2865 * Noaltmacro:: `.noaltmacro' 2866 * Nolist:: `.nolist' 2867 * Octa:: `.octa BIGNUMS' 2868 * Org:: `.org NEW-LC, FILL' 2869 * P2align:: `.p2align ABS-EXPR, ABS-EXPR, ABS-EXPR' 2870 2871 * PopSection:: `.popsection' 2872 * Previous:: `.previous' 2873 2874 * Print:: `.print STRING' 2875 2876 * Protected:: `.protected NAMES' 2877 2878 * Psize:: `.psize LINES, COLUMNS' 2879 * Purgem:: `.purgem NAME' 2880 2881 * PushSection:: `.pushsection NAME' 2882 2883 * Quad:: `.quad BIGNUMS' 2884 * Reloc:: `.reloc OFFSET, RELOC_NAME[, EXPRESSION]' 2885 * Rept:: `.rept COUNT' 2886 * Sbttl:: `.sbttl "SUBHEADING"' 2887 2888 * Scl:: `.scl CLASS' 2889 2890 * Section:: `.section NAME[, FLAGS]' 2891 2892 * Set:: `.set SYMBOL, EXPRESSION' 2893 * Short:: `.short EXPRESSIONS' 2894 * Single:: `.single FLONUMS' 2895 2896 * Size:: `.size [NAME , EXPRESSION]' 2897 2898 * Skip:: `.skip SIZE , FILL' 2899 * Sleb128:: `.sleb128 EXPRESSIONS' 2900 * Space:: `.space SIZE , FILL' 2901 2902 * Stab:: `.stabd, .stabn, .stabs' 2903 2904 * String:: `.string "STR"', `.string8 "STR"', `.string16 "STR"', `.string32 "STR"', `.string64 "STR"' 2905 * Struct:: `.struct EXPRESSION' 2906 2907 * SubSection:: `.subsection' 2908 * Symver:: `.symver NAME,NAME2@NODENAME' 2909 2910 2911 * Tag:: `.tag STRUCTNAME' 2912 2913 * Text:: `.text SUBSECTION' 2914 * Title:: `.title "HEADING"' 2915 2916 * Type:: `.type <INT | NAME , TYPE DESCRIPTION>' 2917 2918 * Uleb128:: `.uleb128 EXPRESSIONS' 2919 2920 * Val:: `.val ADDR' 2921 2922 2923 * Version:: `.version "STRING"' 2924 * VTableEntry:: `.vtable_entry TABLE, OFFSET' 2925 * VTableInherit:: `.vtable_inherit CHILD, PARENT' 2926 2927 * Warning:: `.warning STRING' 2928 * Weak:: `.weak NAMES' 2929 * Weakref:: `.weakref ALIAS, SYMBOL' 2930 * Word:: `.word EXPRESSIONS' 2931 * Deprecated:: Deprecated Directives 2932 2933 2934 File: as.info, Node: Abort, Next: ABORT (COFF), Up: Pseudo Ops 2935 2936 7.1 `.abort' 2937 ============ 2938 2939 This directive stops the assembly immediately. It is for compatibility 2940 with other assemblers. The original idea was that the assembly 2941 language source would be piped into the assembler. If the sender of 2942 the source quit, it could use this directive tells `as' to quit also. 2943 One day `.abort' will not be supported. 2944 2945 2946 File: as.info, Node: ABORT (COFF), Next: Align, Prev: Abort, Up: Pseudo Ops 2947 2948 7.2 `.ABORT' (COFF) 2949 =================== 2950 2951 When producing COFF output, `as' accepts this directive as a synonym 2952 for `.abort'. 2953 2954 2955 File: as.info, Node: Align, Next: Altmacro, Prev: ABORT (COFF), Up: Pseudo Ops 2956 2957 7.3 `.align ABS-EXPR, ABS-EXPR, ABS-EXPR' 2958 ========================================= 2959 2960 Pad the location counter (in the current subsection) to a particular 2961 storage boundary. The first expression (which must be absolute) is the 2962 alignment required, as described below. 2963 2964 The second expression (also absolute) gives the fill value to be 2965 stored in the padding bytes. It (and the comma) may be omitted. If it 2966 is omitted, the padding bytes are normally zero. However, on some 2967 systems, if the section is marked as containing code and the fill value 2968 is omitted, the space is filled with no-op instructions. 2969 2970 The third expression is also absolute, and is also optional. If it 2971 is present, it is the maximum number of bytes that should be skipped by 2972 this alignment directive. If doing the alignment would require 2973 skipping more bytes than the specified maximum, then the alignment is 2974 not done at all. You can omit the fill value (the second argument) 2975 entirely by simply using two commas after the required alignment; this 2976 can be useful if you want the alignment to be filled with no-op 2977 instructions when appropriate. 2978 2979 The way the required alignment is specified varies from system to 2980 system. For the arc, hppa, i386 using ELF, i860, iq2000, m68k, or32, 2981 s390, sparc, tic4x, tic80 and xtensa, the first expression is the 2982 alignment request in bytes. For example `.align 8' advances the 2983 location counter until it is a multiple of 8. If the location counter 2984 is already a multiple of 8, no change is needed. For the tic54x, the 2985 first expression is the alignment request in words. 2986 2987 For other systems, including ppc, i386 using a.out format, arm and 2988 strongarm, it is the number of low-order zero bits the location counter 2989 must have after advancement. For example `.align 3' advances the 2990 location counter until it a multiple of 8. If the location counter is 2991 already a multiple of 8, no change is needed. 2992 2993 This inconsistency is due to the different behaviors of the various 2994 native assemblers for these systems which GAS must emulate. GAS also 2995 provides `.balign' and `.p2align' directives, described later, which 2996 have a consistent behavior across all architectures (but are specific 2997 to GAS). 2998 2999 3000 File: as.info, Node: Ascii, Next: Asciz, Prev: Altmacro, Up: Pseudo Ops 3001 3002 7.4 `.ascii "STRING"'... 3003 ======================== 3004 3005 `.ascii' expects zero or more string literals (*note Strings::) 3006 separated by commas. It assembles each string (with no automatic 3007 trailing zero byte) into consecutive addresses. 3008 3009 3010 File: as.info, Node: Asciz, Next: Balign, Prev: Ascii, Up: Pseudo Ops 3011 3012 7.5 `.asciz "STRING"'... 3013 ======================== 3014 3015 `.asciz' is just like `.ascii', but each string is followed by a zero 3016 byte. The "z" in `.asciz' stands for "zero". 3017 3018 3019 File: as.info, Node: Balign, Next: Byte, Prev: Asciz, Up: Pseudo Ops 3020 3021 7.6 `.balign[wl] ABS-EXPR, ABS-EXPR, ABS-EXPR' 3022 ============================================== 3023 3024 Pad the location counter (in the current subsection) to a particular 3025 storage boundary. The first expression (which must be absolute) is the 3026 alignment request in bytes. For example `.balign 8' advances the 3027 location counter until it is a multiple of 8. If the location counter 3028 is already a multiple of 8, no change is needed. 3029 3030 The second expression (also absolute) gives the fill value to be 3031 stored in the padding bytes. It (and the comma) may be omitted. If it 3032 is omitted, the padding bytes are normally zero. However, on some 3033 systems, if the section is marked as containing code and the fill value 3034 is omitted, the space is filled with no-op instructions. 3035 3036 The third expression is also absolute, and is also optional. If it 3037 is present, it is the maximum number of bytes that should be skipped by 3038 this alignment directive. If doing the alignment would require 3039 skipping more bytes than the specified maximum, then the alignment is 3040 not done at all. You can omit the fill value (the second argument) 3041 entirely by simply using two commas after the required alignment; this 3042 can be useful if you want the alignment to be filled with no-op 3043 instructions when appropriate. 3044 3045 The `.balignw' and `.balignl' directives are variants of the 3046 `.balign' directive. The `.balignw' directive treats the fill pattern 3047 as a two byte word value. The `.balignl' directives treats the fill 3048 pattern as a four byte longword value. For example, `.balignw 3049 4,0x368d' will align to a multiple of 4. If it skips two bytes, they 3050 will be filled in with the value 0x368d (the exact placement of the 3051 bytes depends upon the endianness of the processor). If it skips 1 or 3052 3 bytes, the fill value is undefined. 3053 3054 3055 File: as.info, Node: Byte, Next: Comm, Prev: Balign, Up: Pseudo Ops 3056 3057 7.7 `.byte EXPRESSIONS' 3058 ======================= 3059 3060 `.byte' expects zero or more expressions, separated by commas. Each 3061 expression is assembled into the next byte. 3062 3063 3064 File: as.info, Node: Comm, Next: CFI directives, Prev: Byte, Up: Pseudo Ops 3065 3066 7.8 `.comm SYMBOL , LENGTH ' 3067 ============================ 3068 3069 `.comm' declares a common symbol named SYMBOL. When linking, a common 3070 symbol in one object file may be merged with a defined or common symbol 3071 of the same name in another object file. If `ld' does not see a 3072 definition for the symbol-just one or more common symbols-then it will 3073 allocate LENGTH bytes of uninitialized memory. LENGTH must be an 3074 absolute expression. If `ld' sees multiple common symbols with the 3075 same name, and they do not all have the same size, it will allocate 3076 space using the largest size. 3077 3078 When using ELF, the `.comm' directive takes an optional third 3079 argument. This is the desired alignment of the symbol, specified as a 3080 byte boundary (for example, an alignment of 16 means that the least 3081 significant 4 bits of the address should be zero). The alignment must 3082 be an absolute expression, and it must be a power of two. If `ld' 3083 allocates uninitialized memory for the common symbol, it will use the 3084 alignment when placing the symbol. If no alignment is specified, `as' 3085 will set the alignment to the largest power of two less than or equal 3086 to the size of the symbol, up to a maximum of 16. 3087 3088 The syntax for `.comm' differs slightly on the HPPA. The syntax is 3089 `SYMBOL .comm, LENGTH'; SYMBOL is optional. 3090 3091 3092 File: as.info, Node: CFI directives, Next: Data, Prev: Comm, Up: Pseudo Ops 3093 3094 7.9 `.cfi_startproc [simple]' 3095 ============================= 3096 3097 `.cfi_startproc' is used at the beginning of each function that should 3098 have an entry in `.eh_frame'. It initializes some internal data 3099 structures. Don't forget to close the function by `.cfi_endproc'. 3100 3101 Unless `.cfi_startproc' is used along with parameter `simple' it 3102 also emits some architecture dependent initial CFI instructions. 3103 3104 7.10 `.cfi_endproc' 3105 =================== 3106 3107 `.cfi_endproc' is used at the end of a function where it closes its 3108 unwind entry previously opened by `.cfi_startproc', and emits it to 3109 `.eh_frame'. 3110 3111 7.11 `.cfi_personality ENCODING [, EXP]' 3112 ======================================== 3113 3114 `.cfi_personality' defines personality routine and its encoding. 3115 ENCODING must be a constant determining how the personality should be 3116 encoded. If it is 255 (`DW_EH_PE_omit'), second argument is not 3117 present, otherwise second argument should be a constant or a symbol 3118 name. When using indirect encodings, the symbol provided should be the 3119 location where personality can be loaded from, not the personality 3120 routine itself. The default after `.cfi_startproc' is 3121 `.cfi_personality 0xff', no personality routine. 3122 3123 7.12 `.cfi_lsda ENCODING [, EXP]' 3124 ================================= 3125 3126 `.cfi_lsda' defines LSDA and its encoding. ENCODING must be a constant 3127 determining how the LSDA should be encoded. If it is 255 3128 (`DW_EH_PE_omit'), second argument is not present, otherwise second 3129 argument should be a constant or a symbol name. The default after 3130 `.cfi_startproc' is `.cfi_lsda 0xff', no LSDA. 3131 3132 7.13 `.cfi_def_cfa REGISTER, OFFSET' 3133 ==================================== 3134 3135 `.cfi_def_cfa' defines a rule for computing CFA as: take address from 3136 REGISTER and add OFFSET to it. 3137 3138 7.14 `.cfi_def_cfa_register REGISTER' 3139 ===================================== 3140 3141 `.cfi_def_cfa_register' modifies a rule for computing CFA. From now on 3142 REGISTER will be used instead of the old one. Offset remains the same. 3143 3144 7.15 `.cfi_def_cfa_offset OFFSET' 3145 ================================= 3146 3147 `.cfi_def_cfa_offset' modifies a rule for computing CFA. Register 3148 remains the same, but OFFSET is new. Note that it is the absolute 3149 offset that will be added to a defined register to compute CFA address. 3150 3151 7.16 `.cfi_adjust_cfa_offset OFFSET' 3152 ==================================== 3153 3154 Same as `.cfi_def_cfa_offset' but OFFSET is a relative value that is 3155 added/substracted from the previous offset. 3156 3157 7.17 `.cfi_offset REGISTER, OFFSET' 3158 =================================== 3159 3160 Previous value of REGISTER is saved at offset OFFSET from CFA. 3161 3162 7.18 `.cfi_rel_offset REGISTER, OFFSET' 3163 ======================================= 3164 3165 Previous value of REGISTER is saved at offset OFFSET from the current 3166 CFA register. This is transformed to `.cfi_offset' using the known 3167 displacement of the CFA register from the CFA. This is often easier to 3168 use, because the number will match the code it's annotating. 3169 3170 7.19 `.cfi_register REGISTER1, REGISTER2' 3171 ========================================= 3172 3173 Previous value of REGISTER1 is saved in register REGISTER2. 3174 3175 7.20 `.cfi_restore REGISTER' 3176 ============================ 3177 3178 `.cfi_restore' says that the rule for REGISTER is now the same as it 3179 was at the beginning of the function, after all initial instruction 3180 added by `.cfi_startproc' were executed. 3181 3182 7.21 `.cfi_undefined REGISTER' 3183 ============================== 3184 3185 From now on the previous value of REGISTER can't be restored anymore. 3186 3187 7.22 `.cfi_same_value REGISTER' 3188 =============================== 3189 3190 Current value of REGISTER is the same like in the previous frame, i.e. 3191 no restoration needed. 3192 3193 7.23 `.cfi_remember_state', 3194 =========================== 3195 3196 First save all current rules for all registers by `.cfi_remember_state', 3197 then totally screw them up by subsequent `.cfi_*' directives and when 3198 everything is hopelessly bad, use `.cfi_restore_state' to restore the 3199 previous saved state. 3200 3201 7.24 `.cfi_return_column REGISTER' 3202 ================================== 3203 3204 Change return column REGISTER, i.e. the return address is either 3205 directly in REGISTER or can be accessed by rules for REGISTER. 3206 3207 7.25 `.cfi_signal_frame' 3208 ======================== 3209 3210 Mark current function as signal trampoline. 3211 3212 7.26 `.cfi_window_save' 3213 ======================= 3214 3215 SPARC register window has been saved. 3216 3217 7.27 `.cfi_escape' EXPRESSION[, ...] 3218 ==================================== 3219 3220 Allows the user to add arbitrary bytes to the unwind info. One might 3221 use this to add OS-specific CFI opcodes, or generic CFI opcodes that 3222 GAS does not yet support. 3223 3224 7.28 `.cfi_val_encoded_addr REGISTER, ENCODING, LABEL' 3225 ====================================================== 3226 3227 The current value of REGISTER is LABEL. The value of LABEL will be 3228 encoded in the output file according to ENCODING; see the description 3229 of `.cfi_personality' for details on this encoding. 3230 3231 The usefulness of equating a register to a fixed label is probably 3232 limited to the return address register. Here, it can be useful to mark 3233 a code segment that has only one return address which is reached by a 3234 direct branch and no copy of the return address exists in memory or 3235 another register. 3236 3237 3238 File: as.info, Node: LNS directives, Next: Long, Prev: Ln, Up: Pseudo Ops 3239 3240 7.29 `.file FILENO FILENAME' 3241 ============================ 3242 3243 When emitting dwarf2 line number information `.file' assigns filenames 3244 to the `.debug_line' file name table. The FILENO operand should be a 3245 unique positive integer to use as the index of the entry in the table. 3246 The FILENAME operand is a C string literal. 3247 3248 The detail of filename indices is exposed to the user because the 3249 filename table is shared with the `.debug_info' section of the dwarf2 3250 debugging information, and thus the user must know the exact indices 3251 that table entries will have. 3252 3253 7.30 `.loc FILENO LINENO [COLUMN] [OPTIONS]' 3254 ============================================ 3255 3256 The `.loc' directive will add row to the `.debug_line' line number 3257 matrix corresponding to the immediately following assembly instruction. 3258 The FILENO, LINENO, and optional COLUMN arguments will be applied to 3259 the `.debug_line' state machine before the row is added. 3260 3261 The OPTIONS are a sequence of the following tokens in any order: 3262 3263 `basic_block' 3264 This option will set the `basic_block' register in the 3265 `.debug_line' state machine to `true'. 3266 3267 `prologue_end' 3268 This option will set the `prologue_end' register in the 3269 `.debug_line' state machine to `true'. 3270 3271 `epilogue_begin' 3272 This option will set the `epilogue_begin' register in the 3273 `.debug_line' state machine to `true'. 3274 3275 `is_stmt VALUE' 3276 This option will set the `is_stmt' register in the `.debug_line' 3277 state machine to `value', which must be either 0 or 1. 3278 3279 `isa VALUE' 3280 This directive will set the `isa' register in the `.debug_line' 3281 state machine to VALUE, which must be an unsigned integer. 3282 3283 3284 7.31 `.loc_mark_labels ENABLE' 3285 ============================== 3286 3287 The `.loc_mark_labels' directive makes the assembler emit an entry to 3288 the `.debug_line' line number matrix with the `basic_block' register in 3289 the state machine set whenever a code label is seen. The ENABLE 3290 argument should be either 1 or 0, to enable or disable this function 3291 respectively. 3292 3293 3294 File: as.info, Node: Data, Next: Def, Prev: CFI directives, Up: Pseudo Ops 3295 3296 7.32 `.data SUBSECTION' 3297 ======================= 3298 3299 `.data' tells `as' to assemble the following statements onto the end of 3300 the data subsection numbered SUBSECTION (which is an absolute 3301 expression). If SUBSECTION is omitted, it defaults to zero. 3302 3303 3304 File: as.info, Node: Def, Next: Desc, Prev: Data, Up: Pseudo Ops 3305 3306 7.33 `.def NAME' 3307 ================ 3308 3309 Begin defining debugging information for a symbol NAME; the definition 3310 extends until the `.endef' directive is encountered. 3311 3312 3313 File: as.info, Node: Desc, Next: Dim, Prev: Def, Up: Pseudo Ops 3314 3315 7.34 `.desc SYMBOL, ABS-EXPRESSION' 3316 =================================== 3317 3318 This directive sets the descriptor of the symbol (*note Symbol 3319 Attributes::) to the low 16 bits of an absolute expression. 3320 3321 The `.desc' directive is not available when `as' is configured for 3322 COFF output; it is only for `a.out' or `b.out' object format. For the 3323 sake of compatibility, `as' accepts it, but produces no output, when 3324 configured for COFF. 3325 3326 3327 File: as.info, Node: Dim, Next: Double, Prev: Desc, Up: Pseudo Ops 3328 3329 7.35 `.dim' 3330 =========== 3331 3332 This directive is generated by compilers to include auxiliary debugging 3333 information in the symbol table. It is only permitted inside 3334 `.def'/`.endef' pairs. 3335 3336 3337 File: as.info, Node: Double, Next: Eject, Prev: Dim, Up: Pseudo Ops 3338 3339 7.36 `.double FLONUMS' 3340 ====================== 3341 3342 `.double' expects zero or more flonums, separated by commas. It 3343 assembles floating point numbers. The exact kind of floating point 3344 numbers emitted depends on how `as' is configured. *Note Machine 3345 Dependencies::. 3346 3347 3348 File: as.info, Node: Eject, Next: Else, Prev: Double, Up: Pseudo Ops 3349 3350 7.37 `.eject' 3351 ============= 3352 3353 Force a page break at this point, when generating assembly listings. 3354 3355 3356 File: as.info, Node: Else, Next: Elseif, Prev: Eject, Up: Pseudo Ops 3357 3358 7.38 `.else' 3359 ============ 3360 3361 `.else' is part of the `as' support for conditional assembly; see *Note 3362 `.if': If. It marks the beginning of a section of code to be assembled 3363 if the condition for the preceding `.if' was false. 3364 3365 3366 File: as.info, Node: Elseif, Next: End, Prev: Else, Up: Pseudo Ops 3367 3368 7.39 `.elseif' 3369 ============== 3370 3371 `.elseif' is part of the `as' support for conditional assembly; see 3372 *Note `.if': If. It is shorthand for beginning a new `.if' block that 3373 would otherwise fill the entire `.else' section. 3374 3375 3376 File: as.info, Node: End, Next: Endef, Prev: Elseif, Up: Pseudo Ops 3377 3378 7.40 `.end' 3379 =========== 3380 3381 `.end' marks the end of the assembly file. `as' does not process 3382 anything in the file past the `.end' directive. 3383 3384 3385 File: as.info, Node: Endef, Next: Endfunc, Prev: End, Up: Pseudo Ops 3386 3387 7.41 `.endef' 3388 ============= 3389 3390 This directive flags the end of a symbol definition begun with `.def'. 3391 3392 3393 File: as.info, Node: Endfunc, Next: Endif, Prev: Endef, Up: Pseudo Ops 3394 3395 7.42 `.endfunc' 3396 =============== 3397 3398 `.endfunc' marks the end of a function specified with `.func'. 3399 3400 3401 File: as.info, Node: Endif, Next: Equ, Prev: Endfunc, Up: Pseudo Ops 3402 3403 7.43 `.endif' 3404 ============= 3405 3406 `.endif' is part of the `as' support for conditional assembly; it marks 3407 the end of a block of code that is only assembled conditionally. *Note 3408 `.if': If. 3409 3410 3411 File: as.info, Node: Equ, Next: Equiv, Prev: Endif, Up: Pseudo Ops 3412 3413 7.44 `.equ SYMBOL, EXPRESSION' 3414 ============================== 3415 3416 This directive sets the value of SYMBOL to EXPRESSION. It is 3417 synonymous with `.set'; see *Note `.set': Set. 3418 3419 The syntax for `equ' on the HPPA is `SYMBOL .equ EXPRESSION'. 3420 3421 The syntax for `equ' on the Z80 is `SYMBOL equ EXPRESSION'. On the 3422 Z80 it is an eror if SYMBOL is already defined, but the symbol is not 3423 protected from later redefinition. Compare *Note Equiv::. 3424 3425 3426 File: as.info, Node: Equiv, Next: Eqv, Prev: Equ, Up: Pseudo Ops 3427 3428 7.45 `.equiv SYMBOL, EXPRESSION' 3429 ================================ 3430 3431 The `.equiv' directive is like `.equ' and `.set', except that the 3432 assembler will signal an error if SYMBOL is already defined. Note a 3433 symbol which has been referenced but not actually defined is considered 3434 to be undefined. 3435 3436 Except for the contents of the error message, this is roughly 3437 equivalent to 3438 .ifdef SYM 3439 .err 3440 .endif 3441 .equ SYM,VAL 3442 plus it protects the symbol from later redefinition. 3443 3444 3445 File: as.info, Node: Eqv, Next: Err, Prev: Equiv, Up: Pseudo Ops 3446 3447 7.46 `.eqv SYMBOL, EXPRESSION' 3448 ============================== 3449 3450 The `.eqv' directive is like `.equiv', but no attempt is made to 3451 evaluate the expression or any part of it immediately. Instead each 3452 time the resulting symbol is used in an expression, a snapshot of its 3453 current value is taken. 3454 3455 3456 File: as.info, Node: Err, Next: Error, Prev: Eqv, Up: Pseudo Ops 3457 3458 7.47 `.err' 3459 =========== 3460 3461 If `as' assembles a `.err' directive, it will print an error message 3462 and, unless the `-Z' option was used, it will not generate an object 3463 file. This can be used to signal an error in conditionally compiled 3464 code. 3465 3466 3467 File: as.info, Node: Error, Next: Exitm, Prev: Err, Up: Pseudo Ops 3468 3469 7.48 `.error "STRING"' 3470 ====================== 3471 3472 Similarly to `.err', this directive emits an error, but you can specify 3473 a string that will be emitted as the error message. If you don't 3474 specify the message, it defaults to `".error directive invoked in 3475 source file"'. *Note Error and Warning Messages: Errors. 3476 3477 .error "This code has not been assembled and tested." 3478 3479 3480 File: as.info, Node: Exitm, Next: Extern, Prev: Error, Up: Pseudo Ops 3481 3482 7.49 `.exitm' 3483 ============= 3484 3485 Exit early from the current macro definition. *Note Macro::. 3486 3487 3488 File: as.info, Node: Extern, Next: Fail, Prev: Exitm, Up: Pseudo Ops 3489 3490 7.50 `.extern' 3491 ============== 3492 3493 `.extern' is accepted in the source program--for compatibility with 3494 other assemblers--but it is ignored. `as' treats all undefined symbols 3495 as external. 3496 3497 3498 File: as.info, Node: Fail, Next: File, Prev: Extern, Up: Pseudo Ops 3499 3500 7.51 `.fail EXPRESSION' 3501 ======================= 3502 3503 Generates an error or a warning. If the value of the EXPRESSION is 500 3504 or more, `as' will print a warning message. If the value is less than 3505 500, `as' will print an error message. The message will include the 3506 value of EXPRESSION. This can occasionally be useful inside complex 3507 nested macros or conditional assembly. 3508 3509 3510 File: as.info, Node: File, Next: Fill, Prev: Fail, Up: Pseudo Ops 3511 3512 7.52 `.file STRING' 3513 =================== 3514 3515 `.file' tells `as' that we are about to start a new logical file. 3516 STRING is the new file name. In general, the filename is recognized 3517 whether or not it is surrounded by quotes `"'; but if you wish to 3518 specify an empty file name, you must give the quotes-`""'. This 3519 statement may go away in future: it is only recognized to be compatible 3520 with old `as' programs. 3521 3522 3523 File: as.info, Node: Fill, Next: Float, Prev: File, Up: Pseudo Ops 3524 3525 7.53 `.fill REPEAT , SIZE , VALUE' 3526 ================================== 3527 3528 REPEAT, SIZE and VALUE are absolute expressions. This emits REPEAT 3529 copies of SIZE bytes. REPEAT may be zero or more. SIZE may be zero or 3530 more, but if it is more than 8, then it is deemed to have the value 8, 3531 compatible with other people's assemblers. The contents of each REPEAT 3532 bytes is taken from an 8-byte number. The highest order 4 bytes are 3533 zero. The lowest order 4 bytes are VALUE rendered in the byte-order of 3534 an integer on the computer `as' is assembling for. Each SIZE bytes in 3535 a repetition is taken from the lowest order SIZE bytes of this number. 3536 Again, this bizarre behavior is compatible with other people's 3537 assemblers. 3538 3539 SIZE and VALUE are optional. If the second comma and VALUE are 3540 absent, VALUE is assumed zero. If the first comma and following tokens 3541 are absent, SIZE is assumed to be 1. 3542 3543 3544 File: as.info, Node: Float, Next: Func, Prev: Fill, Up: Pseudo Ops 3545 3546 7.54 `.float FLONUMS' 3547 ===================== 3548 3549 This directive assembles zero or more flonums, separated by commas. It 3550 has the same effect as `.single'. The exact kind of floating point 3551 numbers emitted depends on how `as' is configured. *Note Machine 3552 Dependencies::. 3553 3554 3555 File: as.info, Node: Func, Next: Global, Prev: Float, Up: Pseudo Ops 3556 3557 7.55 `.func NAME[,LABEL]' 3558 ========================= 3559 3560 `.func' emits debugging information to denote function NAME, and is 3561 ignored unless the file is assembled with debugging enabled. Only 3562 `--gstabs[+]' is currently supported. LABEL is the entry point of the 3563 function and if omitted NAME prepended with the `leading char' is used. 3564 `leading char' is usually `_' or nothing, depending on the target. All 3565 functions are currently defined to have `void' return type. The 3566 function must be terminated with `.endfunc'. 3567 3568 3569 File: as.info, Node: Global, Next: Gnu_attribute, Prev: Func, Up: Pseudo Ops 3570 3571 7.56 `.global SYMBOL', `.globl SYMBOL' 3572 ====================================== 3573 3574 `.global' makes the symbol visible to `ld'. If you define SYMBOL in 3575 your partial program, its value is made available to other partial 3576 programs that are linked with it. Otherwise, SYMBOL takes its 3577 attributes from a symbol of the same name from another file linked into 3578 the same program. 3579 3580 Both spellings (`.globl' and `.global') are accepted, for 3581 compatibility with other assemblers. 3582 3583 On the HPPA, `.global' is not always enough to make it accessible to 3584 other partial programs. You may need the HPPA-only `.EXPORT' directive 3585 as well. *Note HPPA Assembler Directives: HPPA Directives. 3586 3587 3588 File: as.info, Node: Gnu_attribute, Next: Hidden, Prev: Global, Up: Pseudo Ops 3589 3590 7.57 `.gnu_attribute TAG,VALUE' 3591 =============================== 3592 3593 Record a GNU object attribute for this file. *Note Object Attributes::. 3594 3595 3596 File: as.info, Node: Hidden, Next: hword, Prev: Gnu_attribute, Up: Pseudo Ops 3597 3598 7.58 `.hidden NAMES' 3599 ==================== 3600 3601 This is one of the ELF visibility directives. The other two are 3602 `.internal' (*note `.internal': Internal.) and `.protected' (*note 3603 `.protected': Protected.). 3604 3605 This directive overrides the named symbols default visibility (which 3606 is set by their binding: local, global or weak). The directive sets 3607 the visibility to `hidden' which means that the symbols are not visible 3608 to other components. Such symbols are always considered to be 3609 `protected' as well. 3610 3611 3612 File: as.info, Node: hword, Next: Ident, Prev: Hidden, Up: Pseudo Ops 3613 3614 7.59 `.hword EXPRESSIONS' 3615 ========================= 3616 3617 This expects zero or more EXPRESSIONS, and emits a 16 bit number for 3618 each. 3619 3620 This directive is a synonym for `.short'; depending on the target 3621 architecture, it may also be a synonym for `.word'. 3622 3623 3624 File: as.info, Node: Ident, Next: If, Prev: hword, Up: Pseudo Ops 3625 3626 7.60 `.ident' 3627 ============= 3628 3629 This directive is used by some assemblers to place tags in object 3630 files. The behavior of this directive varies depending on the target. 3631 When using the a.out object file format, `as' simply accepts the 3632 directive for source-file compatibility with existing assemblers, but 3633 does not emit anything for it. When using COFF, comments are emitted 3634 to the `.comment' or `.rdata' section, depending on the target. When 3635 using ELF, comments are emitted to the `.comment' section. 3636 3637 3638 File: as.info, Node: If, Next: Incbin, Prev: Ident, Up: Pseudo Ops 3639 3640 7.61 `.if ABSOLUTE EXPRESSION' 3641 ============================== 3642 3643 `.if' marks the beginning of a section of code which is only considered 3644 part of the source program being assembled if the argument (which must 3645 be an ABSOLUTE EXPRESSION) is non-zero. The end of the conditional 3646 section of code must be marked by `.endif' (*note `.endif': Endif.); 3647 optionally, you may include code for the alternative condition, flagged 3648 by `.else' (*note `.else': Else.). If you have several conditions to 3649 check, `.elseif' may be used to avoid nesting blocks if/else within 3650 each subsequent `.else' block. 3651 3652 The following variants of `.if' are also supported: 3653 `.ifdef SYMBOL' 3654 Assembles the following section of code if the specified SYMBOL 3655 has been defined. Note a symbol which has been referenced but not 3656 yet defined is considered to be undefined. 3657 3658 `.ifb TEXT' 3659 Assembles the following section of code if the operand is blank 3660 (empty). 3661 3662 `.ifc STRING1,STRING2' 3663 Assembles the following section of code if the two strings are the 3664 same. The strings may be optionally quoted with single quotes. 3665 If they are not quoted, the first string stops at the first comma, 3666 and the second string stops at the end of the line. Strings which 3667 contain whitespace should be quoted. The string comparison is 3668 case sensitive. 3669 3670 `.ifeq ABSOLUTE EXPRESSION' 3671 Assembles the following section of code if the argument is zero. 3672 3673 `.ifeqs STRING1,STRING2' 3674 Another form of `.ifc'. The strings must be quoted using double 3675 quotes. 3676 3677 `.ifge ABSOLUTE EXPRESSION' 3678 Assembles the following section of code if the argument is greater 3679 than or equal to zero. 3680 3681 `.ifgt ABSOLUTE EXPRESSION' 3682 Assembles the following section of code if the argument is greater 3683 than zero. 3684 3685 `.ifle ABSOLUTE EXPRESSION' 3686 Assembles the following section of code if the argument is less 3687 than or equal to zero. 3688 3689 `.iflt ABSOLUTE EXPRESSION' 3690 Assembles the following section of code if the argument is less 3691 than zero. 3692 3693 `.ifnb TEXT' 3694 Like `.ifb', but the sense of the test is reversed: this assembles 3695 the following section of code if the operand is non-blank 3696 (non-empty). 3697 3698 `.ifnc STRING1,STRING2.' 3699 Like `.ifc', but the sense of the test is reversed: this assembles 3700 the following section of code if the two strings are not the same. 3701 3702 `.ifndef SYMBOL' 3703 `.ifnotdef SYMBOL' 3704 Assembles the following section of code if the specified SYMBOL 3705 has not been defined. Both spelling variants are equivalent. 3706 Note a symbol which has been referenced but not yet defined is 3707 considered to be undefined. 3708 3709 `.ifne ABSOLUTE EXPRESSION' 3710 Assembles the following section of code if the argument is not 3711 equal to zero (in other words, this is equivalent to `.if'). 3712 3713 `.ifnes STRING1,STRING2' 3714 Like `.ifeqs', but the sense of the test is reversed: this 3715 assembles the following section of code if the two strings are not 3716 the same. 3717 3718 3719 File: as.info, Node: Incbin, Next: Include, Prev: If, Up: Pseudo Ops 3720 3721 7.62 `.incbin "FILE"[,SKIP[,COUNT]]' 3722 ==================================== 3723 3724 The `incbin' directive includes FILE verbatim at the current location. 3725 You can control the search paths used with the `-I' command-line option 3726 (*note Command-Line Options: Invoking.). Quotation marks are required 3727 around FILE. 3728 3729 The SKIP argument skips a number of bytes from the start of the 3730 FILE. The COUNT argument indicates the maximum number of bytes to 3731 read. Note that the data is not aligned in any way, so it is the user's 3732 responsibility to make sure that proper alignment is provided both 3733 before and after the `incbin' directive. 3734 3735 3736 File: as.info, Node: Include, Next: Int, Prev: Incbin, Up: Pseudo Ops 3737 3738 7.63 `.include "FILE"' 3739 ====================== 3740 3741 This directive provides a way to include supporting files at specified 3742 points in your source program. The code from FILE is assembled as if 3743 it followed the point of the `.include'; when the end of the included 3744 file is reached, assembly of the original file continues. You can 3745 control the search paths used with the `-I' command-line option (*note 3746 Command-Line Options: Invoking.). Quotation marks are required around 3747 FILE. 3748 3749 3750 File: as.info, Node: Int, Next: Internal, Prev: Include, Up: Pseudo Ops 3751 3752 7.64 `.int EXPRESSIONS' 3753 ======================= 3754 3755 Expect zero or more EXPRESSIONS, of any section, separated by commas. 3756 For each expression, emit a number that, at run time, is the value of 3757 that expression. The byte order and bit size of the number depends on 3758 what kind of target the assembly is for. 3759 3760 3761 File: as.info, Node: Internal, Next: Irp, Prev: Int, Up: Pseudo Ops 3762 3763 7.65 `.internal NAMES' 3764 ====================== 3765 3766 This is one of the ELF visibility directives. The other two are 3767 `.hidden' (*note `.hidden': Hidden.) and `.protected' (*note 3768 `.protected': Protected.). 3769 3770 This directive overrides the named symbols default visibility (which 3771 is set by their binding: local, global or weak). The directive sets 3772 the visibility to `internal' which means that the symbols are 3773 considered to be `hidden' (i.e., not visible to other components), and 3774 that some extra, processor specific processing must also be performed 3775 upon the symbols as well. 3776 3777 3778 File: as.info, Node: Irp, Next: Irpc, Prev: Internal, Up: Pseudo Ops 3779 3780 7.66 `.irp SYMBOL,VALUES'... 3781 ============================ 3782 3783 Evaluate a sequence of statements assigning different values to SYMBOL. 3784 The sequence of statements starts at the `.irp' directive, and is 3785 terminated by an `.endr' directive. For each VALUE, SYMBOL is set to 3786 VALUE, and the sequence of statements is assembled. If no VALUE is 3787 listed, the sequence of statements is assembled once, with SYMBOL set 3788 to the null string. To refer to SYMBOL within the sequence of 3789 statements, use \SYMBOL. 3790 3791 For example, assembling 3792 3793 .irp param,1,2,3 3794 move d\param,sp@- 3795 .endr 3796 3797 is equivalent to assembling 3798 3799 move d1,sp@- 3800 move d2,sp@- 3801 move d3,sp@- 3802 3803 For some caveats with the spelling of SYMBOL, see also *Note Macro::. 3804 3805 3806 File: as.info, Node: Irpc, Next: Lcomm, Prev: Irp, Up: Pseudo Ops 3807 3808 7.67 `.irpc SYMBOL,VALUES'... 3809 ============================= 3810 3811 Evaluate a sequence of statements assigning different values to SYMBOL. 3812 The sequence of statements starts at the `.irpc' directive, and is 3813 terminated by an `.endr' directive. For each character in VALUE, 3814 SYMBOL is set to the character, and the sequence of statements is 3815 assembled. If no VALUE is listed, the sequence of statements is 3816 assembled once, with SYMBOL set to the null string. To refer to SYMBOL 3817 within the sequence of statements, use \SYMBOL. 3818 3819 For example, assembling 3820 3821 .irpc param,123 3822 move d\param,sp@- 3823 .endr 3824 3825 is equivalent to assembling 3826 3827 move d1,sp@- 3828 move d2,sp@- 3829 move d3,sp@- 3830 3831 For some caveats with the spelling of SYMBOL, see also the discussion 3832 at *Note Macro::. 3833 3834 3835 File: as.info, Node: Lcomm, Next: Lflags, Prev: Irpc, Up: Pseudo Ops 3836 3837 7.68 `.lcomm SYMBOL , LENGTH' 3838 ============================= 3839 3840 Reserve LENGTH (an absolute expression) bytes for a local common 3841 denoted by SYMBOL. The section and value of SYMBOL are those of the 3842 new local common. The addresses are allocated in the bss section, so 3843 that at run-time the bytes start off zeroed. SYMBOL is not declared 3844 global (*note `.global': Global.), so is normally not visible to `ld'. 3845 3846 Some targets permit a third argument to be used with `.lcomm'. This 3847 argument specifies the desired alignment of the symbol in the bss 3848 section. 3849 3850 The syntax for `.lcomm' differs slightly on the HPPA. The syntax is 3851 `SYMBOL .lcomm, LENGTH'; SYMBOL is optional. 3852 3853 3854 File: as.info, Node: Lflags, Next: Line, Prev: Lcomm, Up: Pseudo Ops 3855 3856 7.69 `.lflags' 3857 ============== 3858 3859 `as' accepts this directive, for compatibility with other assemblers, 3860 but ignores it. 3861 3862 3863 File: as.info, Node: Line, Next: Linkonce, Prev: Lflags, Up: Pseudo Ops 3864 3865 7.70 `.line LINE-NUMBER' 3866 ======================== 3867 3868 Change the logical line number. LINE-NUMBER must be an absolute 3869 expression. The next line has that logical line number. Therefore any 3870 other statements on the current line (after a statement separator 3871 character) are reported as on logical line number LINE-NUMBER - 1. One 3872 day `as' will no longer support this directive: it is recognized only 3873 for compatibility with existing assembler programs. 3874 3875 Even though this is a directive associated with the `a.out' or 3876 `b.out' object-code formats, `as' still recognizes it when producing 3877 COFF output, and treats `.line' as though it were the COFF `.ln' _if_ 3878 it is found outside a `.def'/`.endef' pair. 3879 3880 Inside a `.def', `.line' is, instead, one of the directives used by 3881 compilers to generate auxiliary symbol information for debugging. 3882 3883 3884 File: as.info, Node: Linkonce, Next: List, Prev: Line, Up: Pseudo Ops 3885 3886 7.71 `.linkonce [TYPE]' 3887 ======================= 3888 3889 Mark the current section so that the linker only includes a single copy 3890 of it. This may be used to include the same section in several 3891 different object files, but ensure that the linker will only include it 3892 once in the final output file. The `.linkonce' pseudo-op must be used 3893 for each instance of the section. Duplicate sections are detected 3894 based on the section name, so it should be unique. 3895 3896 This directive is only supported by a few object file formats; as of 3897 this writing, the only object file format which supports it is the 3898 Portable Executable format used on Windows NT. 3899 3900 The TYPE argument is optional. If specified, it must be one of the 3901 following strings. For example: 3902 .linkonce same_size 3903 Not all types may be supported on all object file formats. 3904 3905 `discard' 3906 Silently discard duplicate sections. This is the default. 3907 3908 `one_only' 3909 Warn if there are duplicate sections, but still keep only one copy. 3910 3911 `same_size' 3912 Warn if any of the duplicates have different sizes. 3913 3914 `same_contents' 3915 Warn if any of the duplicates do not have exactly the same 3916 contents. 3917 3918 3919 File: as.info, Node: Ln, Next: LNS directives, Prev: List, Up: Pseudo Ops 3920 3921 7.72 `.ln LINE-NUMBER' 3922 ====================== 3923 3924 `.ln' is a synonym for `.line'. 3925 3926 3927 File: as.info, Node: MRI, Next: Noaltmacro, Prev: Macro, Up: Pseudo Ops 3928 3929 7.73 `.mri VAL' 3930 =============== 3931 3932 If VAL is non-zero, this tells `as' to enter MRI mode. If VAL is zero, 3933 this tells `as' to exit MRI mode. This change affects code assembled 3934 until the next `.mri' directive, or until the end of the file. *Note 3935 MRI mode: M. 3936 3937 3938 File: as.info, Node: List, Next: Ln, Prev: Linkonce, Up: Pseudo Ops 3939 3940 7.74 `.list' 3941 ============ 3942 3943 Control (in conjunction with the `.nolist' directive) whether or not 3944 assembly listings are generated. These two directives maintain an 3945 internal counter (which is zero initially). `.list' increments the 3946 counter, and `.nolist' decrements it. Assembly listings are generated 3947 whenever the counter is greater than zero. 3948 3949 By default, listings are disabled. When you enable them (with the 3950 `-a' command line option; *note Command-Line Options: Invoking.), the 3951 initial value of the listing counter is one. 3952 3953 3954 File: as.info, Node: Long, Next: Macro, Prev: LNS directives, Up: Pseudo Ops 3955 3956 7.75 `.long EXPRESSIONS' 3957 ======================== 3958 3959 `.long' is the same as `.int'. *Note `.int': Int. 3960 3961 3962 File: as.info, Node: Macro, Next: MRI, Prev: Long, Up: Pseudo Ops 3963 3964 7.76 `.macro' 3965 ============= 3966 3967 The commands `.macro' and `.endm' allow you to define macros that 3968 generate assembly output. For example, this definition specifies a 3969 macro `sum' that puts a sequence of numbers into memory: 3970 3971 .macro sum from=0, to=5 3972 .long \from 3973 .if \to-\from 3974 sum "(\from+1)",\to 3975 .endif 3976 .endm 3977 3978 With that definition, `SUM 0,5' is equivalent to this assembly input: 3979 3980 .long 0 3981 .long 1 3982 .long 2 3983 .long 3 3984 .long 4 3985 .long 5 3986 3987 `.macro MACNAME' 3988 `.macro MACNAME MACARGS ...' 3989 Begin the definition of a macro called MACNAME. If your macro 3990 definition requires arguments, specify their names after the macro 3991 name, separated by commas or spaces. You can qualify the macro 3992 argument to indicate whether all invocations must specify a 3993 non-blank value (through `:`req''), or whether it takes all of the 3994 remaining arguments (through `:`vararg''). You can supply a 3995 default value for any macro argument by following the name with 3996 `=DEFLT'. You cannot define two macros with the same MACNAME 3997 unless it has been subject to the `.purgem' directive (*note 3998 Purgem::) between the two definitions. For example, these are all 3999 valid `.macro' statements: 4000 4001 `.macro comm' 4002 Begin the definition of a macro called `comm', which takes no 4003 arguments. 4004 4005 `.macro plus1 p, p1' 4006 `.macro plus1 p p1' 4007 Either statement begins the definition of a macro called 4008 `plus1', which takes two arguments; within the macro 4009 definition, write `\p' or `\p1' to evaluate the arguments. 4010 4011 `.macro reserve_str p1=0 p2' 4012 Begin the definition of a macro called `reserve_str', with two 4013 arguments. The first argument has a default value, but not 4014 the second. After the definition is complete, you can call 4015 the macro either as `reserve_str A,B' (with `\p1' evaluating 4016 to A and `\p2' evaluating to B), or as `reserve_str ,B' (with 4017 `\p1' evaluating as the default, in this case `0', and `\p2' 4018 evaluating to B). 4019 4020 `.macro m p1:req, p2=0, p3:vararg' 4021 Begin the definition of a macro called `m', with at least 4022 three arguments. The first argument must always have a value 4023 specified, but not the second, which instead has a default 4024 value. The third formal will get assigned all remaining 4025 arguments specified at invocation time. 4026 4027 When you call a macro, you can specify the argument values 4028 either by position, or by keyword. For example, `sum 9,17' 4029 is equivalent to `sum to=17, from=9'. 4030 4031 4032 Note that since each of the MACARGS can be an identifier exactly 4033 as any other one permitted by the target architecture, there may be 4034 occasional problems if the target hand-crafts special meanings to 4035 certain characters when they occur in a special position. For 4036 example, if the colon (`:') is generally permitted to be part of a 4037 symbol name, but the architecture specific code special-cases it 4038 when occurring as the final character of a symbol (to denote a 4039 label), then the macro parameter replacement code will have no way 4040 of knowing that and consider the whole construct (including the 4041 colon) an identifier, and check only this identifier for being the 4042 subject to parameter substitution. So for example this macro 4043 definition: 4044 4045 .macro label l 4046 \l: 4047 .endm 4048 4049 might not work as expected. Invoking `label foo' might not create 4050 a label called `foo' but instead just insert the text `\l:' into 4051 the assembler source, probably generating an error about an 4052 unrecognised identifier. 4053 4054 Similarly problems might occur with the period character (`.') 4055 which is often allowed inside opcode names (and hence identifier 4056 names). So for example constructing a macro to build an opcode 4057 from a base name and a length specifier like this: 4058 4059 .macro opcode base length 4060 \base.\length 4061 .endm 4062 4063 and invoking it as `opcode store l' will not create a `store.l' 4064 instruction but instead generate some kind of error as the 4065 assembler tries to interpret the text `\base.\length'. 4066 4067 There are several possible ways around this problem: 4068 4069 `Insert white space' 4070 If it is possible to use white space characters then this is 4071 the simplest solution. eg: 4072 4073 .macro label l 4074 \l : 4075 .endm 4076 4077 `Use `\()'' 4078 The string `\()' can be used to separate the end of a macro 4079 argument from the following text. eg: 4080 4081 .macro opcode base length 4082 \base\().\length 4083 .endm 4084 4085 `Use the alternate macro syntax mode' 4086 In the alternative macro syntax mode the ampersand character 4087 (`&') can be used as a separator. eg: 4088 4089 .altmacro 4090 .macro label l 4091 l&: 4092 .endm 4093 4094 Note: this problem of correctly identifying string parameters to 4095 pseudo ops also applies to the identifiers used in `.irp' (*note 4096 Irp::) and `.irpc' (*note Irpc::) as well. 4097 4098 `.endm' 4099 Mark the end of a macro definition. 4100 4101 `.exitm' 4102 Exit early from the current macro definition. 4103 4104 `\@' 4105 `as' maintains a counter of how many macros it has executed in 4106 this pseudo-variable; you can copy that number to your output with 4107 `\@', but _only within a macro definition_. 4108 4109 `LOCAL NAME [ , ... ]' 4110 _Warning: `LOCAL' is only available if you select "alternate macro 4111 syntax" with `--alternate' or `.altmacro'._ *Note `.altmacro': 4112 Altmacro. 4113 4114 4115 File: as.info, Node: Altmacro, Next: Ascii, Prev: Align, Up: Pseudo Ops 4116 4117 7.77 `.altmacro' 4118 ================ 4119 4120 Enable alternate macro mode, enabling: 4121 4122 `LOCAL NAME [ , ... ]' 4123 One additional directive, `LOCAL', is available. It is used to 4124 generate a string replacement for each of the NAME arguments, and 4125 replace any instances of NAME in each macro expansion. The 4126 replacement string is unique in the assembly, and different for 4127 each separate macro expansion. `LOCAL' allows you to write macros 4128 that define symbols, without fear of conflict between separate 4129 macro expansions. 4130 4131 `String delimiters' 4132 You can write strings delimited in these other ways besides 4133 `"STRING"': 4134 4135 `'STRING'' 4136 You can delimit strings with single-quote characters. 4137 4138 `<STRING>' 4139 You can delimit strings with matching angle brackets. 4140 4141 `single-character string escape' 4142 To include any single character literally in a string (even if the 4143 character would otherwise have some special meaning), you can 4144 prefix the character with `!' (an exclamation mark). For example, 4145 you can write `<4.3 !> 5.4!!>' to get the literal text `4.3 > 4146 5.4!'. 4147 4148 `Expression results as strings' 4149 You can write `%EXPR' to evaluate the expression EXPR and use the 4150 result as a string. 4151 4152 4153 File: as.info, Node: Noaltmacro, Next: Nolist, Prev: MRI, Up: Pseudo Ops 4154 4155 7.78 `.noaltmacro' 4156 ================== 4157 4158 Disable alternate macro mode. *Note Altmacro::. 4159 4160 4161 File: as.info, Node: Nolist, Next: Octa, Prev: Noaltmacro, Up: Pseudo Ops 4162 4163 7.79 `.nolist' 4164 ============== 4165 4166 Control (in conjunction with the `.list' directive) whether or not 4167 assembly listings are generated. These two directives maintain an 4168 internal counter (which is zero initially). `.list' increments the 4169 counter, and `.nolist' decrements it. Assembly listings are generated 4170 whenever the counter is greater than zero. 4171 4172 4173 File: as.info, Node: Octa, Next: Org, Prev: Nolist, Up: Pseudo Ops 4174 4175 7.80 `.octa BIGNUMS' 4176 ==================== 4177 4178 This directive expects zero or more bignums, separated by commas. For 4179 each bignum, it emits a 16-byte integer. 4180 4181 The term "octa" comes from contexts in which a "word" is two bytes; 4182 hence _octa_-word for 16 bytes. 4183 4184 4185 File: as.info, Node: Org, Next: P2align, Prev: Octa, Up: Pseudo Ops 4186 4187 7.81 `.org NEW-LC , FILL' 4188 ========================= 4189 4190 Advance the location counter of the current section to NEW-LC. NEW-LC 4191 is either an absolute expression or an expression with the same section 4192 as the current subsection. That is, you can't use `.org' to cross 4193 sections: if NEW-LC has the wrong section, the `.org' directive is 4194 ignored. To be compatible with former assemblers, if the section of 4195 NEW-LC is absolute, `as' issues a warning, then pretends the section of 4196 NEW-LC is the same as the current subsection. 4197 4198 `.org' may only increase the location counter, or leave it 4199 unchanged; you cannot use `.org' to move the location counter backwards. 4200 4201 Because `as' tries to assemble programs in one pass, NEW-LC may not 4202 be undefined. If you really detest this restriction we eagerly await a 4203 chance to share your improved assembler. 4204 4205 Beware that the origin is relative to the start of the section, not 4206 to the start of the subsection. This is compatible with other people's 4207 assemblers. 4208 4209 When the location counter (of the current subsection) is advanced, 4210 the intervening bytes are filled with FILL which should be an absolute 4211 expression. If the comma and FILL are omitted, FILL defaults to zero. 4212 4213 4214 File: as.info, Node: P2align, Next: PopSection, Prev: Org, Up: Pseudo Ops 4215 4216 7.82 `.p2align[wl] ABS-EXPR, ABS-EXPR, ABS-EXPR' 4217 ================================================ 4218 4219 Pad the location counter (in the current subsection) to a particular 4220 storage boundary. The first expression (which must be absolute) is the 4221 number of low-order zero bits the location counter must have after 4222 advancement. For example `.p2align 3' advances the location counter 4223 until it a multiple of 8. If the location counter is already a 4224 multiple of 8, no change is needed. 4225 4226 The second expression (also absolute) gives the fill value to be 4227 stored in the padding bytes. It (and the comma) may be omitted. If it 4228 is omitted, the padding bytes are normally zero. However, on some 4229 systems, if the section is marked as containing code and the fill value 4230 is omitted, the space is filled with no-op instructions. 4231 4232 The third expression is also absolute, and is also optional. If it 4233 is present, it is the maximum number of bytes that should be skipped by 4234 this alignment directive. If doing the alignment would require 4235 skipping more bytes than the specified maximum, then the alignment is 4236 not done at all. You can omit the fill value (the second argument) 4237 entirely by simply using two commas after the required alignment; this 4238 can be useful if you want the alignment to be filled with no-op 4239 instructions when appropriate. 4240 4241 The `.p2alignw' and `.p2alignl' directives are variants of the 4242 `.p2align' directive. The `.p2alignw' directive treats the fill 4243 pattern as a two byte word value. The `.p2alignl' directives treats the 4244 fill pattern as a four byte longword value. For example, `.p2alignw 4245 2,0x368d' will align to a multiple of 4. If it skips two bytes, they 4246 will be filled in with the value 0x368d (the exact placement of the 4247 bytes depends upon the endianness of the processor). If it skips 1 or 4248 3 bytes, the fill value is undefined. 4249 4250 4251 File: as.info, Node: Previous, Next: Print, Prev: PopSection, Up: Pseudo Ops 4252 4253 7.83 `.previous' 4254 ================ 4255 4256 This is one of the ELF section stack manipulation directives. The 4257 others are `.section' (*note Section::), `.subsection' (*note 4258 SubSection::), `.pushsection' (*note PushSection::), and `.popsection' 4259 (*note PopSection::). 4260 4261 This directive swaps the current section (and subsection) with most 4262 recently referenced section/subsection pair prior to this one. Multiple 4263 `.previous' directives in a row will flip between two sections (and 4264 their subsections). For example: 4265 4266 .section A 4267 .subsection 1 4268 .word 0x1234 4269 .subsection 2 4270 .word 0x5678 4271 .previous 4272 .word 0x9abc 4273 4274 Will place 0x1234 and 0x9abc into subsection 1 and 0x5678 into 4275 subsection 2 of section A. Whilst: 4276 4277 .section A 4278 .subsection 1 4279 # Now in section A subsection 1 4280 .word 0x1234 4281 .section B 4282 .subsection 0 4283 # Now in section B subsection 0 4284 .word 0x5678 4285 .subsection 1 4286 # Now in section B subsection 1 4287 .word 0x9abc 4288 .previous 4289 # Now in section B subsection 0 4290 .word 0xdef0 4291 4292 Will place 0x1234 into section A, 0x5678 and 0xdef0 into subsection 4293 0 of section B and 0x9abc into subsection 1 of section B. 4294 4295 In terms of the section stack, this directive swaps the current 4296 section with the top section on the section stack. 4297 4298 4299 File: as.info, Node: PopSection, Next: Previous, Prev: P2align, Up: Pseudo Ops 4300 4301 7.84 `.popsection' 4302 ================== 4303 4304 This is one of the ELF section stack manipulation directives. The 4305 others are `.section' (*note Section::), `.subsection' (*note 4306 SubSection::), `.pushsection' (*note PushSection::), and `.previous' 4307 (*note Previous::). 4308 4309 This directive replaces the current section (and subsection) with 4310 the top section (and subsection) on the section stack. This section is 4311 popped off the stack. 4312 4313 4314 File: as.info, Node: Print, Next: Protected, Prev: Previous, Up: Pseudo Ops 4315 4316 7.85 `.print STRING' 4317 ==================== 4318 4319 `as' will print STRING on the standard output during assembly. You 4320 must put STRING in double quotes. 4321 4322 4323 File: as.info, Node: Protected, Next: Psize, Prev: Print, Up: Pseudo Ops 4324 4325 7.86 `.protected NAMES' 4326 ======================= 4327 4328 This is one of the ELF visibility directives. The other two are 4329 `.hidden' (*note Hidden::) and `.internal' (*note Internal::). 4330 4331 This directive overrides the named symbols default visibility (which 4332 is set by their binding: local, global or weak). The directive sets 4333 the visibility to `protected' which means that any references to the 4334 symbols from within the components that defines them must be resolved 4335 to the definition in that component, even if a definition in another 4336 component would normally preempt this. 4337 4338 4339 File: as.info, Node: Psize, Next: Purgem, Prev: Protected, Up: Pseudo Ops 4340 4341 7.87 `.psize LINES , COLUMNS' 4342 ============================= 4343 4344 Use this directive to declare the number of lines--and, optionally, the 4345 number of columns--to use for each page, when generating listings. 4346 4347 If you do not use `.psize', listings use a default line-count of 60. 4348 You may omit the comma and COLUMNS specification; the default width is 4349 200 columns. 4350 4351 `as' generates formfeeds whenever the specified number of lines is 4352 exceeded (or whenever you explicitly request one, using `.eject'). 4353 4354 If you specify LINES as `0', no formfeeds are generated save those 4355 explicitly specified with `.eject'. 4356 4357 4358 File: as.info, Node: Purgem, Next: PushSection, Prev: Psize, Up: Pseudo Ops 4359 4360 7.88 `.purgem NAME' 4361 =================== 4362 4363 Undefine the macro NAME, so that later uses of the string will not be 4364 expanded. *Note Macro::. 4365 4366 4367 File: as.info, Node: PushSection, Next: Quad, Prev: Purgem, Up: Pseudo Ops 4368 4369 7.89 `.pushsection NAME [, SUBSECTION] [, "FLAGS"[, @TYPE[,ARGUMENTS]]]' 4370 ======================================================================== 4371 4372 This is one of the ELF section stack manipulation directives. The 4373 others are `.section' (*note Section::), `.subsection' (*note 4374 SubSection::), `.popsection' (*note PopSection::), and `.previous' 4375 (*note Previous::). 4376 4377 This directive pushes the current section (and subsection) onto the 4378 top of the section stack, and then replaces the current section and 4379 subsection with `name' and `subsection'. The optional `flags', `type' 4380 and `arguments' are treated the same as in the `.section' (*note 4381 Section::) directive. 4382 4383 4384 File: as.info, Node: Quad, Next: Reloc, Prev: PushSection, Up: Pseudo Ops 4385 4386 7.90 `.quad BIGNUMS' 4387 ==================== 4388 4389 `.quad' expects zero or more bignums, separated by commas. For each 4390 bignum, it emits an 8-byte integer. If the bignum won't fit in 8 4391 bytes, it prints a warning message; and just takes the lowest order 8 4392 bytes of the bignum. 4393 4394 The term "quad" comes from contexts in which a "word" is two bytes; 4395 hence _quad_-word for 8 bytes. 4396 4397 4398 File: as.info, Node: Reloc, Next: Rept, Prev: Quad, Up: Pseudo Ops 4399 4400 7.91 `.reloc OFFSET, RELOC_NAME[, EXPRESSION]' 4401 ============================================== 4402 4403 Generate a relocation at OFFSET of type RELOC_NAME with value 4404 EXPRESSION. If OFFSET is a number, the relocation is generated in the 4405 current section. If OFFSET is an expression that resolves to a symbol 4406 plus offset, the relocation is generated in the given symbol's section. 4407 EXPRESSION, if present, must resolve to a symbol plus addend or to an 4408 absolute value, but note that not all targets support an addend. e.g. 4409 ELF REL targets such as i386 store an addend in the section contents 4410 rather than in the relocation. This low level interface does not 4411 support addends stored in the section. 4412 4413 4414 File: as.info, Node: Rept, Next: Sbttl, Prev: Reloc, Up: Pseudo Ops 4415 4416 7.92 `.rept COUNT' 4417 ================== 4418 4419 Repeat the sequence of lines between the `.rept' directive and the next 4420 `.endr' directive COUNT times. 4421 4422 For example, assembling 4423 4424 .rept 3 4425 .long 0 4426 .endr 4427 4428 is equivalent to assembling 4429 4430 .long 0 4431 .long 0 4432 .long 0 4433 4434 4435 File: as.info, Node: Sbttl, Next: Scl, Prev: Rept, Up: Pseudo Ops 4436 4437 7.93 `.sbttl "SUBHEADING"' 4438 ========================== 4439 4440 Use SUBHEADING as the title (third line, immediately after the title 4441 line) when generating assembly listings. 4442 4443 This directive affects subsequent pages, as well as the current page 4444 if it appears within ten lines of the top of a page. 4445 4446 4447 File: as.info, Node: Scl, Next: Section, Prev: Sbttl, Up: Pseudo Ops 4448 4449 7.94 `.scl CLASS' 4450 ================= 4451 4452 Set the storage-class value for a symbol. This directive may only be 4453 used inside a `.def'/`.endef' pair. Storage class may flag whether a 4454 symbol is static or external, or it may record further symbolic 4455 debugging information. 4456 4457 4458 File: as.info, Node: Section, Next: Set, Prev: Scl, Up: Pseudo Ops 4459 4460 7.95 `.section NAME' 4461 ==================== 4462 4463 Use the `.section' directive to assemble the following code into a 4464 section named NAME. 4465 4466 This directive is only supported for targets that actually support 4467 arbitrarily named sections; on `a.out' targets, for example, it is not 4468 accepted, even with a standard `a.out' section name. 4469 4470 COFF Version 4471 ------------ 4472 4473 For COFF targets, the `.section' directive is used in one of the 4474 following ways: 4475 4476 .section NAME[, "FLAGS"] 4477 .section NAME[, SUBSECTION] 4478 4479 If the optional argument is quoted, it is taken as flags to use for 4480 the section. Each flag is a single character. The following flags are 4481 recognized: 4482 `b' 4483 bss section (uninitialized data) 4484 4485 `n' 4486 section is not loaded 4487 4488 `w' 4489 writable section 4490 4491 `d' 4492 data section 4493 4494 `r' 4495 read-only section 4496 4497 `x' 4498 executable section 4499 4500 `s' 4501 shared section (meaningful for PE targets) 4502 4503 `a' 4504 ignored. (For compatibility with the ELF version) 4505 4506 If no flags are specified, the default flags depend upon the section 4507 name. If the section name is not recognized, the default will be for 4508 the section to be loaded and writable. Note the `n' and `w' flags 4509 remove attributes from the section, rather than adding them, so if they 4510 are used on their own it will be as if no flags had been specified at 4511 all. 4512 4513 If the optional argument to the `.section' directive is not quoted, 4514 it is taken as a subsection number (*note Sub-Sections::). 4515 4516 ELF Version 4517 ----------- 4518 4519 This is one of the ELF section stack manipulation directives. The 4520 others are `.subsection' (*note SubSection::), `.pushsection' (*note 4521 PushSection::), `.popsection' (*note PopSection::), and `.previous' 4522 (*note Previous::). 4523 4524 For ELF targets, the `.section' directive is used like this: 4525 4526 .section NAME [, "FLAGS"[, @TYPE[,FLAG_SPECIFIC_ARGUMENTS]]] 4527 4528 The optional FLAGS argument is a quoted string which may contain any 4529 combination of the following characters: 4530 `a' 4531 section is allocatable 4532 4533 `w' 4534 section is writable 4535 4536 `x' 4537 section is executable 4538 4539 `M' 4540 section is mergeable 4541 4542 `S' 4543 section contains zero terminated strings 4544 4545 `G' 4546 section is a member of a section group 4547 4548 `T' 4549 section is used for thread-local-storage 4550 4551 The optional TYPE argument may contain one of the following 4552 constants: 4553 `@progbits' 4554 section contains data 4555 4556 `@nobits' 4557 section does not contain data (i.e., section only occupies space) 4558 4559 `@note' 4560 section contains data which is used by things other than the 4561 program 4562 4563 `@init_array' 4564 section contains an array of pointers to init functions 4565 4566 `@fini_array' 4567 section contains an array of pointers to finish functions 4568 4569 `@preinit_array' 4570 section contains an array of pointers to pre-init functions 4571 4572 Many targets only support the first three section types. 4573 4574 Note on targets where the `@' character is the start of a comment (eg 4575 ARM) then another character is used instead. For example the ARM port 4576 uses the `%' character. 4577 4578 If FLAGS contains the `M' symbol then the TYPE argument must be 4579 specified as well as an extra argument--ENTSIZE--like this: 4580 4581 .section NAME , "FLAGS"M, @TYPE, ENTSIZE 4582 4583 Sections with the `M' flag but not `S' flag must contain fixed size 4584 constants, each ENTSIZE octets long. Sections with both `M' and `S' 4585 must contain zero terminated strings where each character is ENTSIZE 4586 bytes long. The linker may remove duplicates within sections with the 4587 same name, same entity size and same flags. ENTSIZE must be an 4588 absolute expression. 4589 4590 If FLAGS contains the `G' symbol then the TYPE argument must be 4591 present along with an additional field like this: 4592 4593 .section NAME , "FLAGS"G, @TYPE, GROUPNAME[, LINKAGE] 4594 4595 The GROUPNAME field specifies the name of the section group to which 4596 this particular section belongs. The optional linkage field can 4597 contain: 4598 `comdat' 4599 indicates that only one copy of this section should be retained 4600 4601 `.gnu.linkonce' 4602 an alias for comdat 4603 4604 Note: if both the M and G flags are present then the fields for the 4605 Merge flag should come first, like this: 4606 4607 .section NAME , "FLAGS"MG, @TYPE, ENTSIZE, GROUPNAME[, LINKAGE] 4608 4609 If no flags are specified, the default flags depend upon the section 4610 name. If the section name is not recognized, the default will be for 4611 the section to have none of the above flags: it will not be allocated 4612 in memory, nor writable, nor executable. The section will contain data. 4613 4614 For ELF targets, the assembler supports another type of `.section' 4615 directive for compatibility with the Solaris assembler: 4616 4617 .section "NAME"[, FLAGS...] 4618 4619 Note that the section name is quoted. There may be a sequence of 4620 comma separated flags: 4621 `#alloc' 4622 section is allocatable 4623 4624 `#write' 4625 section is writable 4626 4627 `#execinstr' 4628 section is executable 4629 4630 `#tls' 4631 section is used for thread local storage 4632 4633 This directive replaces the current section and subsection. See the 4634 contents of the gas testsuite directory `gas/testsuite/gas/elf' for 4635 some examples of how this directive and the other section stack 4636 directives work. 4637 4638 4639 File: as.info, Node: Set, Next: Short, Prev: Section, Up: Pseudo Ops 4640 4641 7.96 `.set SYMBOL, EXPRESSION' 4642 ============================== 4643 4644 Set the value of SYMBOL to EXPRESSION. This changes SYMBOL's value and 4645 type to conform to EXPRESSION. If SYMBOL was flagged as external, it 4646 remains flagged (*note Symbol Attributes::). 4647 4648 You may `.set' a symbol many times in the same assembly. 4649 4650 If you `.set' a global symbol, the value stored in the object file 4651 is the last value stored into it. 4652 4653 The syntax for `set' on the HPPA is `SYMBOL .set EXPRESSION'. 4654 4655 On Z80 `set' is a real instruction, use `SYMBOL defl EXPRESSION' 4656 instead. 4657 4658 4659 File: as.info, Node: Short, Next: Single, Prev: Set, Up: Pseudo Ops 4660 4661 7.97 `.short EXPRESSIONS' 4662 ========================= 4663 4664 `.short' is normally the same as `.word'. *Note `.word': Word. 4665 4666 In some configurations, however, `.short' and `.word' generate 4667 numbers of different lengths. *Note Machine Dependencies::. 4668 4669 4670 File: as.info, Node: Single, Next: Size, Prev: Short, Up: Pseudo Ops 4671 4672 7.98 `.single FLONUMS' 4673 ====================== 4674 4675 This directive assembles zero or more flonums, separated by commas. It 4676 has the same effect as `.float'. The exact kind of floating point 4677 numbers emitted depends on how `as' is configured. *Note Machine 4678 Dependencies::. 4679 4680 4681 File: as.info, Node: Size, Next: Skip, Prev: Single, Up: Pseudo Ops 4682 4683 7.99 `.size' 4684 ============ 4685 4686 This directive is used to set the size associated with a symbol. 4687 4688 COFF Version 4689 ------------ 4690 4691 For COFF targets, the `.size' directive is only permitted inside 4692 `.def'/`.endef' pairs. It is used like this: 4693 4694 .size EXPRESSION 4695 4696 ELF Version 4697 ----------- 4698 4699 For ELF targets, the `.size' directive is used like this: 4700 4701 .size NAME , EXPRESSION 4702 4703 This directive sets the size associated with a symbol NAME. The 4704 size in bytes is computed from EXPRESSION which can make use of label 4705 arithmetic. This directive is typically used to set the size of 4706 function symbols. 4707 4708 4709 File: as.info, Node: Sleb128, Next: Space, Prev: Skip, Up: Pseudo Ops 4710 4711 7.100 `.sleb128 EXPRESSIONS' 4712 ============================ 4713 4714 SLEB128 stands for "signed little endian base 128." This is a compact, 4715 variable length representation of numbers used by the DWARF symbolic 4716 debugging format. *Note `.uleb128': Uleb128. 4717 4718 4719 File: as.info, Node: Skip, Next: Sleb128, Prev: Size, Up: Pseudo Ops 4720 4721 7.101 `.skip SIZE , FILL' 4722 ========================= 4723 4724 This directive emits SIZE bytes, each of value FILL. Both SIZE and 4725 FILL are absolute expressions. If the comma and FILL are omitted, FILL 4726 is assumed to be zero. This is the same as `.space'. 4727 4728 4729 File: as.info, Node: Space, Next: Stab, Prev: Sleb128, Up: Pseudo Ops 4730 4731 7.102 `.space SIZE , FILL' 4732 ========================== 4733 4734 This directive emits SIZE bytes, each of value FILL. Both SIZE and 4735 FILL are absolute expressions. If the comma and FILL are omitted, FILL 4736 is assumed to be zero. This is the same as `.skip'. 4737 4738 _Warning:_ `.space' has a completely different meaning for HPPA 4739 targets; use `.block' as a substitute. See `HP9000 Series 800 4740 Assembly Language Reference Manual' (HP 92432-90001) for the 4741 meaning of the `.space' directive. *Note HPPA Assembler 4742 Directives: HPPA Directives, for a summary. 4743 4744 4745 File: as.info, Node: Stab, Next: String, Prev: Space, Up: Pseudo Ops 4746 4747 7.103 `.stabd, .stabn, .stabs' 4748 ============================== 4749 4750 There are three directives that begin `.stab'. All emit symbols (*note 4751 Symbols::), for use by symbolic debuggers. The symbols are not entered 4752 in the `as' hash table: they cannot be referenced elsewhere in the 4753 source file. Up to five fields are required: 4754 4755 STRING 4756 This is the symbol's name. It may contain any character except 4757 `\000', so is more general than ordinary symbol names. Some 4758 debuggers used to code arbitrarily complex structures into symbol 4759 names using this field. 4760 4761 TYPE 4762 An absolute expression. The symbol's type is set to the low 8 4763 bits of this expression. Any bit pattern is permitted, but `ld' 4764 and debuggers choke on silly bit patterns. 4765 4766 OTHER 4767 An absolute expression. The symbol's "other" attribute is set to 4768 the low 8 bits of this expression. 4769 4770 DESC 4771 An absolute expression. The symbol's descriptor is set to the low 4772 16 bits of this expression. 4773 4774 VALUE 4775 An absolute expression which becomes the symbol's value. 4776 4777 If a warning is detected while reading a `.stabd', `.stabn', or 4778 `.stabs' statement, the symbol has probably already been created; you 4779 get a half-formed symbol in your object file. This is compatible with 4780 earlier assemblers! 4781 4782 `.stabd TYPE , OTHER , DESC' 4783 The "name" of the symbol generated is not even an empty string. 4784 It is a null pointer, for compatibility. Older assemblers used a 4785 null pointer so they didn't waste space in object files with empty 4786 strings. 4787 4788 The symbol's value is set to the location counter, relocatably. 4789 When your program is linked, the value of this symbol is the 4790 address of the location counter when the `.stabd' was assembled. 4791 4792 `.stabn TYPE , OTHER , DESC , VALUE' 4793 The name of the symbol is set to the empty string `""'. 4794 4795 `.stabs STRING , TYPE , OTHER , DESC , VALUE' 4796 All five fields are specified. 4797 4798 4799 File: as.info, Node: String, Next: Struct, Prev: Stab, Up: Pseudo Ops 4800 4801 7.104 `.string' "STR", `.string8' "STR", `.string16' 4802 ==================================================== 4803 4804 "STR", `.string32' "STR", `.string64' "STR" 4805 4806 Copy the characters in STR to the object file. You may specify more 4807 than one string to copy, separated by commas. Unless otherwise 4808 specified for a particular machine, the assembler marks the end of each 4809 string with a 0 byte. You can use any of the escape sequences 4810 described in *Note Strings: Strings. 4811 4812 The variants `string16', `string32' and `string64' differ from the 4813 `string' pseudo opcode in that each 8-bit character from STR is copied 4814 and expanded to 16, 32 or 64 bits respectively. The expanded characters 4815 are stored in target endianness byte order. 4816 4817 Example: 4818 .string32 "BYE" 4819 expands to: 4820 .string "B\0\0\0Y\0\0\0E\0\0\0" /* On little endian targets. */ 4821 .string "\0\0\0B\0\0\0Y\0\0\0E" /* On big endian targets. */ 4822 4823 4824 File: as.info, Node: Struct, Next: SubSection, Prev: String, Up: Pseudo Ops 4825 4826 7.105 `.struct EXPRESSION' 4827 ========================== 4828 4829 Switch to the absolute section, and set the section offset to 4830 EXPRESSION, which must be an absolute expression. You might use this 4831 as follows: 4832 .struct 0 4833 field1: 4834 .struct field1 + 4 4835 field2: 4836 .struct field2 + 4 4837 field3: 4838 This would define the symbol `field1' to have the value 0, the symbol 4839 `field2' to have the value 4, and the symbol `field3' to have the value 4840 8. Assembly would be left in the absolute section, and you would need 4841 to use a `.section' directive of some sort to change to some other 4842 section before further assembly. 4843 4844 4845 File: as.info, Node: SubSection, Next: Symver, Prev: Struct, Up: Pseudo Ops 4846 4847 7.106 `.subsection NAME' 4848 ======================== 4849 4850 This is one of the ELF section stack manipulation directives. The 4851 others are `.section' (*note Section::), `.pushsection' (*note 4852 PushSection::), `.popsection' (*note PopSection::), and `.previous' 4853 (*note Previous::). 4854 4855 This directive replaces the current subsection with `name'. The 4856 current section is not changed. The replaced subsection is put onto 4857 the section stack in place of the then current top of stack subsection. 4858 4859 4860 File: as.info, Node: Symver, Next: Tag, Prev: SubSection, Up: Pseudo Ops 4861 4862 7.107 `.symver' 4863 =============== 4864 4865 Use the `.symver' directive to bind symbols to specific version nodes 4866 within a source file. This is only supported on ELF platforms, and is 4867 typically used when assembling files to be linked into a shared library. 4868 There are cases where it may make sense to use this in objects to be 4869 bound into an application itself so as to override a versioned symbol 4870 from a shared library. 4871 4872 For ELF targets, the `.symver' directive can be used like this: 4873 .symver NAME, NAME2@NODENAME 4874 If the symbol NAME is defined within the file being assembled, the 4875 `.symver' directive effectively creates a symbol alias with the name 4876 NAME2@NODENAME, and in fact the main reason that we just don't try and 4877 create a regular alias is that the @ character isn't permitted in 4878 symbol names. The NAME2 part of the name is the actual name of the 4879 symbol by which it will be externally referenced. The name NAME itself 4880 is merely a name of convenience that is used so that it is possible to 4881 have definitions for multiple versions of a function within a single 4882 source file, and so that the compiler can unambiguously know which 4883 version of a function is being mentioned. The NODENAME portion of the 4884 alias should be the name of a node specified in the version script 4885 supplied to the linker when building a shared library. If you are 4886 attempting to override a versioned symbol from a shared library, then 4887 NODENAME should correspond to the nodename of the symbol you are trying 4888 to override. 4889 4890 If the symbol NAME is not defined within the file being assembled, 4891 all references to NAME will be changed to NAME2@NODENAME. If no 4892 reference to NAME is made, NAME2@NODENAME will be removed from the 4893 symbol table. 4894 4895 Another usage of the `.symver' directive is: 4896 .symver NAME, NAME2@@NODENAME 4897 In this case, the symbol NAME must exist and be defined within the 4898 file being assembled. It is similar to NAME2@NODENAME. The difference 4899 is NAME2@@NODENAME will also be used to resolve references to NAME2 by 4900 the linker. 4901 4902 The third usage of the `.symver' directive is: 4903 .symver NAME, NAME2@@@NODENAME 4904 When NAME is not defined within the file being assembled, it is 4905 treated as NAME2@NODENAME. When NAME is defined within the file being 4906 assembled, the symbol name, NAME, will be changed to NAME2@@NODENAME. 4907 4908 4909 File: as.info, Node: Tag, Next: Text, Prev: Symver, Up: Pseudo Ops 4910 4911 7.108 `.tag STRUCTNAME' 4912 ======================= 4913 4914 This directive is generated by compilers to include auxiliary debugging 4915 information in the symbol table. It is only permitted inside 4916 `.def'/`.endef' pairs. Tags are used to link structure definitions in 4917 the symbol table with instances of those structures. 4918 4919 4920 File: as.info, Node: Text, Next: Title, Prev: Tag, Up: Pseudo Ops 4921 4922 7.109 `.text SUBSECTION' 4923 ======================== 4924 4925 Tells `as' to assemble the following statements onto the end of the 4926 text subsection numbered SUBSECTION, which is an absolute expression. 4927 If SUBSECTION is omitted, subsection number zero is used. 4928 4929 4930 File: as.info, Node: Title, Next: Type, Prev: Text, Up: Pseudo Ops 4931 4932 7.110 `.title "HEADING"' 4933 ======================== 4934 4935 Use HEADING as the title (second line, immediately after the source 4936 file name and pagenumber) when generating assembly listings. 4937 4938 This directive affects subsequent pages, as well as the current page 4939 if it appears within ten lines of the top of a page. 4940 4941 4942 File: as.info, Node: Type, Next: Uleb128, Prev: Title, Up: Pseudo Ops 4943 4944 7.111 `.type' 4945 ============= 4946 4947 This directive is used to set the type of a symbol. 4948 4949 COFF Version 4950 ------------ 4951 4952 For COFF targets, this directive is permitted only within 4953 `.def'/`.endef' pairs. It is used like this: 4954 4955 .type INT 4956 4957 This records the integer INT as the type attribute of a symbol table 4958 entry. 4959 4960 ELF Version 4961 ----------- 4962 4963 For ELF targets, the `.type' directive is used like this: 4964 4965 .type NAME , TYPE DESCRIPTION 4966 4967 This sets the type of symbol NAME to be either a function symbol or 4968 an object symbol. There are five different syntaxes supported for the 4969 TYPE DESCRIPTION field, in order to provide compatibility with various 4970 other assemblers. 4971 4972 Because some of the characters used in these syntaxes (such as `@' 4973 and `#') are comment characters for some architectures, some of the 4974 syntaxes below do not work on all architectures. The first variant 4975 will be accepted by the GNU assembler on all architectures so that 4976 variant should be used for maximum portability, if you do not need to 4977 assemble your code with other assemblers. 4978 4979 The syntaxes supported are: 4980 4981 .type <name> STT_<TYPE_IN_UPPER_CASE> 4982 .type <name>,#<type> 4983 .type <name>,@<type> 4984 .type <name>,%>type> 4985 .type <name>,"<type>" 4986 4987 The types supported are: 4988 4989 `STT_FUNC' 4990 `function' 4991 Mark the symbol as being a function name. 4992 4993 `STT_OBJECT' 4994 `object' 4995 Mark the symbol as being a data object. 4996 4997 `STT_TLS' 4998 `tls_object' 4999 Mark the symbol as being a thead-local data object. 5000 5001 `STT_COMMON' 5002 `common' 5003 Mark the symbol as being a common data object. 5004 5005 Note: Some targets support extra types in addition to those listed 5006 above. 5007 5008 5009 File: as.info, Node: Uleb128, Next: Val, Prev: Type, Up: Pseudo Ops 5010 5011 7.112 `.uleb128 EXPRESSIONS' 5012 ============================ 5013 5014 ULEB128 stands for "unsigned little endian base 128." This is a 5015 compact, variable length representation of numbers used by the DWARF 5016 symbolic debugging format. *Note `.sleb128': Sleb128. 5017 5018 5019 File: as.info, Node: Val, Next: Version, Prev: Uleb128, Up: Pseudo Ops 5020 5021 7.113 `.val ADDR' 5022 ================= 5023 5024 This directive, permitted only within `.def'/`.endef' pairs, records 5025 the address ADDR as the value attribute of a symbol table entry. 5026 5027 5028 File: as.info, Node: Version, Next: VTableEntry, Prev: Val, Up: Pseudo Ops 5029 5030 7.114 `.version "STRING"' 5031 ========================= 5032 5033 This directive creates a `.note' section and places into it an ELF 5034 formatted note of type NT_VERSION. The note's name is set to `string'. 5035 5036 5037 File: as.info, Node: VTableEntry, Next: VTableInherit, Prev: Version, Up: Pseudo Ops 5038 5039 7.115 `.vtable_entry TABLE, OFFSET' 5040 =================================== 5041 5042 This directive finds or creates a symbol `table' and creates a 5043 `VTABLE_ENTRY' relocation for it with an addend of `offset'. 5044 5045 5046 File: as.info, Node: VTableInherit, Next: Warning, Prev: VTableEntry, Up: Pseudo Ops 5047 5048 7.116 `.vtable_inherit CHILD, PARENT' 5049 ===================================== 5050 5051 This directive finds the symbol `child' and finds or creates the symbol 5052 `parent' and then creates a `VTABLE_INHERIT' relocation for the parent 5053 whose addend is the value of the child symbol. As a special case the 5054 parent name of `0' is treated as referring to the `*ABS*' section. 5055 5056 5057 File: as.info, Node: Warning, Next: Weak, Prev: VTableInherit, Up: Pseudo Ops 5058 5059 7.117 `.warning "STRING"' 5060 ========================= 5061 5062 Similar to the directive `.error' (*note `.error "STRING"': Error.), 5063 but just emits a warning. 5064 5065 5066 File: as.info, Node: Weak, Next: Weakref, Prev: Warning, Up: Pseudo Ops 5067 5068 7.118 `.weak NAMES' 5069 =================== 5070 5071 This directive sets the weak attribute on the comma separated list of 5072 symbol `names'. If the symbols do not already exist, they will be 5073 created. 5074 5075 On COFF targets other than PE, weak symbols are a GNU extension. 5076 This directive sets the weak attribute on the comma separated list of 5077 symbol `names'. If the symbols do not already exist, they will be 5078 created. 5079 5080 On the PE target, weak symbols are supported natively as weak 5081 aliases. When a weak symbol is created that is not an alias, GAS 5082 creates an alternate symbol to hold the default value. 5083 5084 5085 File: as.info, Node: Weakref, Next: Word, Prev: Weak, Up: Pseudo Ops 5086 5087 7.119 `.weakref ALIAS, TARGET' 5088 ============================== 5089 5090 This directive creates an alias to the target symbol that enables the 5091 symbol to be referenced with weak-symbol semantics, but without 5092 actually making it weak. If direct references or definitions of the 5093 symbol are present, then the symbol will not be weak, but if all 5094 references to it are through weak references, the symbol will be marked 5095 as weak in the symbol table. 5096 5097 The effect is equivalent to moving all references to the alias to a 5098 separate assembly source file, renaming the alias to the symbol in it, 5099 declaring the symbol as weak there, and running a reloadable link to 5100 merge the object files resulting from the assembly of the new source 5101 file and the old source file that had the references to the alias 5102 removed. 5103 5104 The alias itself never makes to the symbol table, and is entirely 5105 handled within the assembler. 5106 5107 5108 File: as.info, Node: Word, Next: Deprecated, Prev: Weakref, Up: Pseudo Ops 5109 5110 7.120 `.word EXPRESSIONS' 5111 ========================= 5112 5113 This directive expects zero or more EXPRESSIONS, of any section, 5114 separated by commas. 5115 5116 The size of the number emitted, and its byte order, depend on what 5117 target computer the assembly is for. 5118 5119 _Warning: Special Treatment to support Compilers_ 5120 5121 Machines with a 32-bit address space, but that do less than 32-bit 5122 addressing, require the following special treatment. If the machine of 5123 interest to you does 32-bit addressing (or doesn't require it; *note 5124 Machine Dependencies::), you can ignore this issue. 5125 5126 In order to assemble compiler output into something that works, `as' 5127 occasionally does strange things to `.word' directives. Directives of 5128 the form `.word sym1-sym2' are often emitted by compilers as part of 5129 jump tables. Therefore, when `as' assembles a directive of the form 5130 `.word sym1-sym2', and the difference between `sym1' and `sym2' does 5131 not fit in 16 bits, `as' creates a "secondary jump table", immediately 5132 before the next label. This secondary jump table is preceded by a 5133 short-jump to the first byte after the secondary table. This 5134 short-jump prevents the flow of control from accidentally falling into 5135 the new table. Inside the table is a long-jump to `sym2'. The 5136 original `.word' contains `sym1' minus the address of the long-jump to 5137 `sym2'. 5138 5139 If there were several occurrences of `.word sym1-sym2' before the 5140 secondary jump table, all of them are adjusted. If there was a `.word 5141 sym3-sym4', that also did not fit in sixteen bits, a long-jump to 5142 `sym4' is included in the secondary jump table, and the `.word' 5143 directives are adjusted to contain `sym3' minus the address of the 5144 long-jump to `sym4'; and so on, for as many entries in the original 5145 jump table as necessary. 5146 5147 5148 File: as.info, Node: Deprecated, Prev: Word, Up: Pseudo Ops 5149 5150 7.121 Deprecated Directives 5151 =========================== 5152 5153 One day these directives won't work. They are included for 5154 compatibility with older assemblers. 5155 .abort 5156 5157 .line 5158 5159 5160 File: as.info, Node: Object Attributes, Next: Machine Dependencies, Prev: Pseudo Ops, Up: Top 5161 5162 8 Object Attributes 5163 ******************* 5164 5165 `as' assembles source files written for a specific architecture into 5166 object files for that architecture. But not all object files are alike. 5167 Many architectures support incompatible variations. For instance, 5168 floating point arguments might be passed in floating point registers if 5169 the object file requires hardware floating point support--or floating 5170 point arguments might be passed in integer registers if the object file 5171 supports processors with no hardware floating point unit. Or, if two 5172 objects are built for different generations of the same architecture, 5173 the combination may require the newer generation at run-time. 5174 5175 This information is useful during and after linking. At link time, 5176 `ld' can warn about incompatible object files. After link time, tools 5177 like `gdb' can use it to process the linked file correctly. 5178 5179 Compatibility information is recorded as a series of object 5180 attributes. Each attribute has a "vendor", "tag", and "value". The 5181 vendor is a string, and indicates who sets the meaning of the tag. The 5182 tag is an integer, and indicates what property the attribute describes. 5183 The value may be a string or an integer, and indicates how the 5184 property affects this object. Missing attributes are the same as 5185 attributes with a zero value or empty string value. 5186 5187 Object attributes were developed as part of the ABI for the ARM 5188 Architecture. The file format is documented in `ELF for the ARM 5189 Architecture'. 5190 5191 * Menu: 5192 5193 * GNU Object Attributes:: GNU Object Attributes 5194 * Defining New Object Attributes:: Defining New Object Attributes 5195 5196 5197 File: as.info, Node: GNU Object Attributes, Next: Defining New Object Attributes, Up: Object Attributes 5198 5199 8.1 GNU Object Attributes 5200 ========================= 5201 5202 The `.gnu_attribute' directive records an object attribute with vendor 5203 `gnu'. 5204 5205 Except for `Tag_compatibility', which has both an integer and a 5206 string for its value, GNU attributes have a string value if the tag 5207 number is odd and an integer value if the tag number is even. The 5208 second bit (`TAG & 2' is set for architecture-independent attributes 5209 and clear for architecture-dependent ones. 5210 5211 8.1.1 Common GNU attributes 5212 --------------------------- 5213 5214 These attributes are valid on all architectures. 5215 5216 Tag_compatibility (32) 5217 The compatibility attribute takes an integer flag value and a 5218 vendor name. If the flag value is 0, the file is compatible with 5219 other toolchains. If it is 1, then the file is only compatible 5220 with the named toolchain. If it is greater than 1, the file can 5221 only be processed by other toolchains under some private 5222 arrangement indicated by the flag value and the vendor name. 5223 5224 8.1.2 MIPS Attributes 5225 --------------------- 5226 5227 Tag_GNU_MIPS_ABI_FP (4) 5228 The floating-point ABI used by this object file. The value will 5229 be: 5230 5231 * 0 for files not affected by the floating-point ABI. 5232 5233 * 1 for files using the hardware floating-point with a standard 5234 double-precision FPU. 5235 5236 * 2 for files using the hardware floating-point ABI with a 5237 single-precision FPU. 5238 5239 * 3 for files using the software floating-point ABI. 5240 5241 * 4 for files using the hardware floating-point ABI with 64-bit 5242 wide double-precision floating-point registers and 32-bit 5243 wide general purpose registers. 5244 5245 8.1.3 PowerPC Attributes 5246 ------------------------ 5247 5248 Tag_GNU_Power_ABI_FP (4) 5249 The floating-point ABI used by this object file. The value will 5250 be: 5251 5252 * 0 for files not affected by the floating-point ABI. 5253 5254 * 1 for files using double-precision hardware floating-point 5255 ABI. 5256 5257 * 2 for files using the software floating-point ABI. 5258 5259 * 3 for files using single-precision hardware floating-point 5260 ABI. 5261 5262 Tag_GNU_Power_ABI_Vector (8) 5263 The vector ABI used by this object file. The value will be: 5264 5265 * 0 for files not affected by the vector ABI. 5266 5267 * 1 for files using general purpose registers to pass vectors. 5268 5269 * 2 for files using AltiVec registers to pass vectors. 5270 5271 * 3 for files using SPE registers to pass vectors. 5272 5273 5274 File: as.info, Node: Defining New Object Attributes, Prev: GNU Object Attributes, Up: Object Attributes 5275 5276 8.2 Defining New Object Attributes 5277 ================================== 5278 5279 If you want to define a new GNU object attribute, here are the places 5280 you will need to modify. New attributes should be discussed on the 5281 `binutils' mailing list. 5282 5283 * This manual, which is the official register of attributes. 5284 5285 * The header for your architecture `include/elf', to define the tag. 5286 5287 * The `bfd' support file for your architecture, to merge the 5288 attribute and issue any appropriate link warnings. 5289 5290 * Test cases in `ld/testsuite' for merging and link warnings. 5291 5292 * `binutils/readelf.c' to display your attribute. 5293 5294 * GCC, if you want the compiler to mark the attribute automatically. 5295 5296 5297 File: as.info, Node: Machine Dependencies, Next: Reporting Bugs, Prev: Object Attributes, Up: Top 5298 5299 9 Machine Dependent Features 5300 **************************** 5301 5302 The machine instruction sets are (almost by definition) different on 5303 each machine where `as' runs. Floating point representations vary as 5304 well, and `as' often supports a few additional directives or 5305 command-line options for compatibility with other assemblers on a 5306 particular platform. Finally, some versions of `as' support special 5307 pseudo-instructions for branch optimization. 5308 5309 This chapter discusses most of these differences, though it does not 5310 include details on any machine's instruction set. For details on that 5311 subject, see the hardware manufacturer's manual. 5312 5313 * Menu: 5314 5315 5316 * Alpha-Dependent:: Alpha Dependent Features 5317 5318 * ARC-Dependent:: ARC Dependent Features 5319 5320 * ARM-Dependent:: ARM Dependent Features 5321 5322 * AVR-Dependent:: AVR Dependent Features 5323 5324 * BFIN-Dependent:: BFIN Dependent Features 5325 5326 * CR16-Dependent:: CR16 Dependent Features 5327 5328 * CRIS-Dependent:: CRIS Dependent Features 5329 5330 * D10V-Dependent:: D10V Dependent Features 5331 5332 * D30V-Dependent:: D30V Dependent Features 5333 5334 * H8/300-Dependent:: Renesas H8/300 Dependent Features 5335 5336 * HPPA-Dependent:: HPPA Dependent Features 5337 5338 * ESA/390-Dependent:: IBM ESA/390 Dependent Features 5339 5340 * i386-Dependent:: Intel 80386 and AMD x86-64 Dependent Features 5341 5342 * i860-Dependent:: Intel 80860 Dependent Features 5343 5344 * i960-Dependent:: Intel 80960 Dependent Features 5345 5346 * IA-64-Dependent:: Intel IA-64 Dependent Features 5347 5348 * IP2K-Dependent:: IP2K Dependent Features 5349 5350 * M32C-Dependent:: M32C Dependent Features 5351 5352 * M32R-Dependent:: M32R Dependent Features 5353 5354 * M68K-Dependent:: M680x0 Dependent Features 5355 5356 * M68HC11-Dependent:: M68HC11 and 68HC12 Dependent Features 5357 5358 * MIPS-Dependent:: MIPS Dependent Features 5359 5360 * MMIX-Dependent:: MMIX Dependent Features 5361 5362 * MSP430-Dependent:: MSP430 Dependent Features 5363 5364 * SH-Dependent:: Renesas / SuperH SH Dependent Features 5365 * SH64-Dependent:: SuperH SH64 Dependent Features 5366 5367 * PDP-11-Dependent:: PDP-11 Dependent Features 5368 5369 * PJ-Dependent:: picoJava Dependent Features 5370 5371 * PPC-Dependent:: PowerPC Dependent Features 5372 5373 * Sparc-Dependent:: SPARC Dependent Features 5374 5375 * TIC54X-Dependent:: TI TMS320C54x Dependent Features 5376 5377 * V850-Dependent:: V850 Dependent Features 5378 5379 * Xtensa-Dependent:: Xtensa Dependent Features 5380 5381 * Z80-Dependent:: Z80 Dependent Features 5382 5383 * Z8000-Dependent:: Z8000 Dependent Features 5384 5385 * Vax-Dependent:: VAX Dependent Features 5386 5387 5388 File: as.info, Node: Alpha-Dependent, Next: ARC-Dependent, Up: Machine Dependencies 5389 5390 9.1 Alpha Dependent Features 5391 ============================ 5392 5393 * Menu: 5394 5395 * Alpha Notes:: Notes 5396 * Alpha Options:: Options 5397 * Alpha Syntax:: Syntax 5398 * Alpha Floating Point:: Floating Point 5399 * Alpha Directives:: Alpha Machine Directives 5400 * Alpha Opcodes:: Opcodes 5401 5402 5403 File: as.info, Node: Alpha Notes, Next: Alpha Options, Up: Alpha-Dependent 5404 5405 9.1.1 Notes 5406 ----------- 5407 5408 The documentation here is primarily for the ELF object format. `as' 5409 also supports the ECOFF and EVAX formats, but features specific to 5410 these formats are not yet documented. 5411 5412 5413 File: as.info, Node: Alpha Options, Next: Alpha Syntax, Prev: Alpha Notes, Up: Alpha-Dependent 5414 5415 9.1.2 Options 5416 ------------- 5417 5418 `-mCPU' 5419 This option specifies the target processor. If an attempt is made 5420 to assemble an instruction which will not execute on the target 5421 processor, the assembler may either expand the instruction as a 5422 macro or issue an error message. This option is equivalent to the 5423 `.arch' directive. 5424 5425 The following processor names are recognized: `21064', `21064a', 5426 `21066', `21068', `21164', `21164a', `21164pc', `21264', `21264a', 5427 `21264b', `ev4', `ev5', `lca45', `ev5', `ev56', `pca56', `ev6', 5428 `ev67', `ev68'. The special name `all' may be used to allow the 5429 assembler to accept instructions valid for any Alpha processor. 5430 5431 In order to support existing practice in OSF/1 with respect to 5432 `.arch', and existing practice within `MILO' (the Linux ARC 5433 bootloader), the numbered processor names (e.g. 21064) enable the 5434 processor-specific PALcode instructions, while the 5435 "electro-vlasic" names (e.g. `ev4') do not. 5436 5437 `-mdebug' 5438 `-no-mdebug' 5439 Enables or disables the generation of `.mdebug' encapsulation for 5440 stabs directives and procedure descriptors. The default is to 5441 automatically enable `.mdebug' when the first stabs directive is 5442 seen. 5443 5444 `-relax' 5445 This option forces all relocations to be put into the object file, 5446 instead of saving space and resolving some relocations at assembly 5447 time. Note that this option does not propagate all symbol 5448 arithmetic into the object file, because not all symbol arithmetic 5449 can be represented. However, the option can still be useful in 5450 specific applications. 5451 5452 `-g' 5453 This option is used when the compiler generates debug information. 5454 When `gcc' is using `mips-tfile' to generate debug information 5455 for ECOFF, local labels must be passed through to the object file. 5456 Otherwise this option has no effect. 5457 5458 `-GSIZE' 5459 A local common symbol larger than SIZE is placed in `.bss', while 5460 smaller symbols are placed in `.sbss'. 5461 5462 `-F' 5463 `-32addr' 5464 These options are ignored for backward compatibility. 5465 5466 5467 File: as.info, Node: Alpha Syntax, Next: Alpha Floating Point, Prev: Alpha Options, Up: Alpha-Dependent 5468 5469 9.1.3 Syntax 5470 ------------ 5471 5472 The assembler syntax closely follow the Alpha Reference Manual; 5473 assembler directives and general syntax closely follow the OSF/1 and 5474 OpenVMS syntax, with a few differences for ELF. 5475 5476 * Menu: 5477 5478 * Alpha-Chars:: Special Characters 5479 * Alpha-Regs:: Register Names 5480 * Alpha-Relocs:: Relocations 5481 5482 5483 File: as.info, Node: Alpha-Chars, Next: Alpha-Regs, Up: Alpha Syntax 5484 5485 9.1.3.1 Special Characters 5486 .......................... 5487 5488 `#' is the line comment character. 5489 5490 `;' can be used instead of a newline to separate statements. 5491 5492 5493 File: as.info, Node: Alpha-Regs, Next: Alpha-Relocs, Prev: Alpha-Chars, Up: Alpha Syntax 5494 5495 9.1.3.2 Register Names 5496 ...................... 5497 5498 The 32 integer registers are referred to as `$N' or `$rN'. In 5499 addition, registers 15, 28, 29, and 30 may be referred to by the 5500 symbols `$fp', `$at', `$gp', and `$sp' respectively. 5501 5502 The 32 floating-point registers are referred to as `$fN'. 5503 5504 5505 File: as.info, Node: Alpha-Relocs, Prev: Alpha-Regs, Up: Alpha Syntax 5506 5507 9.1.3.3 Relocations 5508 ................... 5509 5510 Some of these relocations are available for ECOFF, but mostly only for 5511 ELF. They are modeled after the relocation format introduced in 5512 Digital Unix 4.0, but there are additions. 5513 5514 The format is `!TAG' or `!TAG!NUMBER' where TAG is the name of the 5515 relocation. In some cases NUMBER is used to relate specific 5516 instructions. 5517 5518 The relocation is placed at the end of the instruction like so: 5519 5520 ldah $0,a($29) !gprelhigh 5521 lda $0,a($0) !gprellow 5522 ldq $1,b($29) !literal!100 5523 ldl $2,0($1) !lituse_base!100 5524 5525 `!literal' 5526 `!literal!N' 5527 Used with an `ldq' instruction to load the address of a symbol 5528 from the GOT. 5529 5530 A sequence number N is optional, and if present is used to pair 5531 `lituse' relocations with this `literal' relocation. The `lituse' 5532 relocations are used by the linker to optimize the code based on 5533 the final location of the symbol. 5534 5535 Note that these optimizations are dependent on the data flow of the 5536 program. Therefore, if _any_ `lituse' is paired with a `literal' 5537 relocation, then _all_ uses of the register set by the `literal' 5538 instruction must also be marked with `lituse' relocations. This 5539 is because the original `literal' instruction may be deleted or 5540 transformed into another instruction. 5541 5542 Also note that there may be a one-to-many relationship between 5543 `literal' and `lituse', but not a many-to-one. That is, if there 5544 are two code paths that load up the same address and feed the 5545 value to a single use, then the use may not use a `lituse' 5546 relocation. 5547 5548 `!lituse_base!N' 5549 Used with any memory format instruction (e.g. `ldl') to indicate 5550 that the literal is used for an address load. The offset field of 5551 the instruction must be zero. During relaxation, the code may be 5552 altered to use a gp-relative load. 5553 5554 `!lituse_jsr!N' 5555 Used with a register branch format instruction (e.g. `jsr') to 5556 indicate that the literal is used for a call. During relaxation, 5557 the code may be altered to use a direct branch (e.g. `bsr'). 5558 5559 `!lituse_jsrdirect!N' 5560 Similar to `lituse_jsr', but also that this call cannot be vectored 5561 through a PLT entry. This is useful for functions with special 5562 calling conventions which do not allow the normal call-clobbered 5563 registers to be clobbered. 5564 5565 `!lituse_bytoff!N' 5566 Used with a byte mask instruction (e.g. `extbl') to indicate that 5567 only the low 3 bits of the address are relevant. During 5568 relaxation, the code may be altered to use an immediate instead of 5569 a register shift. 5570 5571 `!lituse_addr!N' 5572 Used with any other instruction to indicate that the original 5573 address is in fact used, and the original `ldq' instruction may 5574 not be altered or deleted. This is useful in conjunction with 5575 `lituse_jsr' to test whether a weak symbol is defined. 5576 5577 ldq $27,foo($29) !literal!1 5578 beq $27,is_undef !lituse_addr!1 5579 jsr $26,($27),foo !lituse_jsr!1 5580 5581 `!lituse_tlsgd!N' 5582 Used with a register branch format instruction to indicate that the 5583 literal is the call to `__tls_get_addr' used to compute the 5584 address of the thread-local storage variable whose descriptor was 5585 loaded with `!tlsgd!N'. 5586 5587 `!lituse_tlsldm!N' 5588 Used with a register branch format instruction to indicate that the 5589 literal is the call to `__tls_get_addr' used to compute the 5590 address of the base of the thread-local storage block for the 5591 current module. The descriptor for the module must have been 5592 loaded with `!tlsldm!N'. 5593 5594 `!gpdisp!N' 5595 Used with `ldah' and `lda' to load the GP from the current 5596 address, a-la the `ldgp' macro. The source register for the 5597 `ldah' instruction must contain the address of the `ldah' 5598 instruction. There must be exactly one `lda' instruction paired 5599 with the `ldah' instruction, though it may appear anywhere in the 5600 instruction stream. The immediate operands must be zero. 5601 5602 bsr $26,foo 5603 ldah $29,0($26) !gpdisp!1 5604 lda $29,0($29) !gpdisp!1 5605 5606 `!gprelhigh' 5607 Used with an `ldah' instruction to add the high 16 bits of a 5608 32-bit displacement from the GP. 5609 5610 `!gprellow' 5611 Used with any memory format instruction to add the low 16 bits of a 5612 32-bit displacement from the GP. 5613 5614 `!gprel' 5615 Used with any memory format instruction to add a 16-bit 5616 displacement from the GP. 5617 5618 `!samegp' 5619 Used with any branch format instruction to skip the GP load at the 5620 target address. The referenced symbol must have the same GP as the 5621 source object file, and it must be declared to either not use `$27' 5622 or perform a standard GP load in the first two instructions via the 5623 `.prologue' directive. 5624 5625 `!tlsgd' 5626 `!tlsgd!N' 5627 Used with an `lda' instruction to load the address of a TLS 5628 descriptor for a symbol in the GOT. 5629 5630 The sequence number N is optional, and if present it used to pair 5631 the descriptor load with both the `literal' loading the address of 5632 the `__tls_get_addr' function and the `lituse_tlsgd' marking the 5633 call to that function. 5634 5635 For proper relaxation, both the `tlsgd', `literal' and `lituse' 5636 relocations must be in the same extended basic block. That is, 5637 the relocation with the lowest address must be executed first at 5638 runtime. 5639 5640 `!tlsldm' 5641 `!tlsldm!N' 5642 Used with an `lda' instruction to load the address of a TLS 5643 descriptor for the current module in the GOT. 5644 5645 Similar in other respects to `tlsgd'. 5646 5647 `!gotdtprel' 5648 Used with an `ldq' instruction to load the offset of the TLS 5649 symbol within its module's thread-local storage block. Also known 5650 as the dynamic thread pointer offset or dtp-relative offset. 5651 5652 `!dtprelhi' 5653 `!dtprello' 5654 `!dtprel' 5655 Like `gprel' relocations except they compute dtp-relative offsets. 5656 5657 `!gottprel' 5658 Used with an `ldq' instruction to load the offset of the TLS 5659 symbol from the thread pointer. Also known as the tp-relative 5660 offset. 5661 5662 `!tprelhi' 5663 `!tprello' 5664 `!tprel' 5665 Like `gprel' relocations except they compute tp-relative offsets. 5666 5667 5668 File: as.info, Node: Alpha Floating Point, Next: Alpha Directives, Prev: Alpha Syntax, Up: Alpha-Dependent 5669 5670 9.1.4 Floating Point 5671 -------------------- 5672 5673 The Alpha family uses both IEEE and VAX floating-point numbers. 5674 5675 5676 File: as.info, Node: Alpha Directives, Next: Alpha Opcodes, Prev: Alpha Floating Point, Up: Alpha-Dependent 5677 5678 9.1.5 Alpha Assembler Directives 5679 -------------------------------- 5680 5681 `as' for the Alpha supports many additional directives for 5682 compatibility with the native assembler. This section describes them 5683 only briefly. 5684 5685 These are the additional directives in `as' for the Alpha: 5686 5687 `.arch CPU' 5688 Specifies the target processor. This is equivalent to the `-mCPU' 5689 command-line option. *Note Options: Alpha Options, for a list of 5690 values for CPU. 5691 5692 `.ent FUNCTION[, N]' 5693 Mark the beginning of FUNCTION. An optional number may follow for 5694 compatibility with the OSF/1 assembler, but is ignored. When 5695 generating `.mdebug' information, this will create a procedure 5696 descriptor for the function. In ELF, it will mark the symbol as a 5697 function a-la the generic `.type' directive. 5698 5699 `.end FUNCTION' 5700 Mark the end of FUNCTION. In ELF, it will set the size of the 5701 symbol a-la the generic `.size' directive. 5702 5703 `.mask MASK, OFFSET' 5704 Indicate which of the integer registers are saved in the current 5705 function's stack frame. MASK is interpreted a bit mask in which 5706 bit N set indicates that register N is saved. The registers are 5707 saved in a block located OFFSET bytes from the "canonical frame 5708 address" (CFA) which is the value of the stack pointer on entry to 5709 the function. The registers are saved sequentially, except that 5710 the return address register (normally `$26') is saved first. 5711 5712 This and the other directives that describe the stack frame are 5713 currently only used when generating `.mdebug' information. They 5714 may in the future be used to generate DWARF2 `.debug_frame' unwind 5715 information for hand written assembly. 5716 5717 `.fmask MASK, OFFSET' 5718 Indicate which of the floating-point registers are saved in the 5719 current stack frame. The MASK and OFFSET parameters are 5720 interpreted as with `.mask'. 5721 5722 `.frame FRAMEREG, FRAMEOFFSET, RETREG[, ARGOFFSET]' 5723 Describes the shape of the stack frame. The frame pointer in use 5724 is FRAMEREG; normally this is either `$fp' or `$sp'. The frame 5725 pointer is FRAMEOFFSET bytes below the CFA. The return address is 5726 initially located in RETREG until it is saved as indicated in 5727 `.mask'. For compatibility with OSF/1 an optional ARGOFFSET 5728 parameter is accepted and ignored. It is believed to indicate the 5729 offset from the CFA to the saved argument registers. 5730 5731 `.prologue N' 5732 Indicate that the stack frame is set up and all registers have been 5733 spilled. The argument N indicates whether and how the function 5734 uses the incoming "procedure vector" (the address of the called 5735 function) in `$27'. 0 indicates that `$27' is not used; 1 5736 indicates that the first two instructions of the function use `$27' 5737 to perform a load of the GP register; 2 indicates that `$27' is 5738 used in some non-standard way and so the linker cannot elide the 5739 load of the procedure vector during relaxation. 5740 5741 `.usepv FUNCTION, WHICH' 5742 Used to indicate the use of the `$27' register, similar to 5743 `.prologue', but without the other semantics of needing to be 5744 inside an open `.ent'/`.end' block. 5745 5746 The WHICH argument should be either `no', indicating that `$27' is 5747 not used, or `std', indicating that the first two instructions of 5748 the function perform a GP load. 5749 5750 One might use this directive instead of `.prologue' if you are 5751 also using dwarf2 CFI directives. 5752 5753 `.gprel32 EXPRESSION' 5754 Computes the difference between the address in EXPRESSION and the 5755 GP for the current object file, and stores it in 4 bytes. In 5756 addition to being smaller than a full 8 byte address, this also 5757 does not require a dynamic relocation when used in a shared 5758 library. 5759 5760 `.t_floating EXPRESSION' 5761 Stores EXPRESSION as an IEEE double precision value. 5762 5763 `.s_floating EXPRESSION' 5764 Stores EXPRESSION as an IEEE single precision value. 5765 5766 `.f_floating EXPRESSION' 5767 Stores EXPRESSION as a VAX F format value. 5768 5769 `.g_floating EXPRESSION' 5770 Stores EXPRESSION as a VAX G format value. 5771 5772 `.d_floating EXPRESSION' 5773 Stores EXPRESSION as a VAX D format value. 5774 5775 `.set FEATURE' 5776 Enables or disables various assembler features. Using the positive 5777 name of the feature enables while using `noFEATURE' disables. 5778 5779 `at' 5780 Indicates that macro expansions may clobber the "assembler 5781 temporary" (`$at' or `$28') register. Some macros may not be 5782 expanded without this and will generate an error message if 5783 `noat' is in effect. When `at' is in effect, a warning will 5784 be generated if `$at' is used by the programmer. 5785 5786 `macro' 5787 Enables the expansion of macro instructions. Note that 5788 variants of real instructions, such as `br label' vs `br 5789 $31,label' are considered alternate forms and not macros. 5790 5791 `move' 5792 `reorder' 5793 `volatile' 5794 These control whether and how the assembler may re-order 5795 instructions. Accepted for compatibility with the OSF/1 5796 assembler, but `as' does not do instruction scheduling, so 5797 these features are ignored. 5798 5799 The following directives are recognized for compatibility with the 5800 OSF/1 assembler but are ignored. 5801 5802 .proc .aproc 5803 .reguse .livereg 5804 .option .aent 5805 .ugen .eflag 5806 .alias .noalias 5807 5808 5809 File: as.info, Node: Alpha Opcodes, Prev: Alpha Directives, Up: Alpha-Dependent 5810 5811 9.1.6 Opcodes 5812 ------------- 5813 5814 For detailed information on the Alpha machine instruction set, see the 5815 Alpha Architecture Handbook 5816 (ftp://ftp.digital.com/pub/Digital/info/semiconductor/literature/alphaahb.pdf). 5817 5818 5819 File: as.info, Node: ARC-Dependent, Next: ARM-Dependent, Prev: Alpha-Dependent, Up: Machine Dependencies 5820 5821 9.2 ARC Dependent Features 5822 ========================== 5823 5824 * Menu: 5825 5826 * ARC Options:: Options 5827 * ARC Syntax:: Syntax 5828 * ARC Floating Point:: Floating Point 5829 * ARC Directives:: ARC Machine Directives 5830 * ARC Opcodes:: Opcodes 5831 5832 5833 File: as.info, Node: ARC Options, Next: ARC Syntax, Up: ARC-Dependent 5834 5835 9.2.1 Options 5836 ------------- 5837 5838 `-marc[5|6|7|8]' 5839 This option selects the core processor variant. Using `-marc' is 5840 the same as `-marc6', which is also the default. 5841 5842 `arc5' 5843 Base instruction set. 5844 5845 `arc6' 5846 Jump-and-link (jl) instruction. No requirement of an 5847 instruction between setting flags and conditional jump. For 5848 example: 5849 5850 mov.f r0,r1 5851 beq foo 5852 5853 `arc7' 5854 Break (brk) and sleep (sleep) instructions. 5855 5856 `arc8' 5857 Software interrupt (swi) instruction. 5858 5859 5860 Note: the `.option' directive can to be used to select a core 5861 variant from within assembly code. 5862 5863 `-EB' 5864 This option specifies that the output generated by the assembler 5865 should be marked as being encoded for a big-endian processor. 5866 5867 `-EL' 5868 This option specifies that the output generated by the assembler 5869 should be marked as being encoded for a little-endian processor - 5870 this is the default. 5871 5872 5873 5874 File: as.info, Node: ARC Syntax, Next: ARC Floating Point, Prev: ARC Options, Up: ARC-Dependent 5875 5876 9.2.2 Syntax 5877 ------------ 5878 5879 * Menu: 5880 5881 * ARC-Chars:: Special Characters 5882 * ARC-Regs:: Register Names 5883 5884 5885 File: as.info, Node: ARC-Chars, Next: ARC-Regs, Up: ARC Syntax 5886 5887 9.2.2.1 Special Characters 5888 .......................... 5889 5890 *TODO* 5891 5892 5893 File: as.info, Node: ARC-Regs, Prev: ARC-Chars, Up: ARC Syntax 5894 5895 9.2.2.2 Register Names 5896 ...................... 5897 5898 *TODO* 5899 5900 5901 File: as.info, Node: ARC Floating Point, Next: ARC Directives, Prev: ARC Syntax, Up: ARC-Dependent 5902 5903 9.2.3 Floating Point 5904 -------------------- 5905 5906 The ARC core does not currently have hardware floating point support. 5907 Software floating point support is provided by `GCC' and uses IEEE 5908 floating-point numbers. 5909 5910 5911 File: as.info, Node: ARC Directives, Next: ARC Opcodes, Prev: ARC Floating Point, Up: ARC-Dependent 5912 5913 9.2.4 ARC Machine Directives 5914 ---------------------------- 5915 5916 The ARC version of `as' supports the following additional machine 5917 directives: 5918 5919 `.2byte EXPRESSIONS' 5920 *TODO* 5921 5922 `.3byte EXPRESSIONS' 5923 *TODO* 5924 5925 `.4byte EXPRESSIONS' 5926 *TODO* 5927 5928 `.extAuxRegister NAME,ADDRESS,MODE' 5929 The ARCtangent A4 has extensible auxiliary register space. The 5930 auxiliary registers can be defined in the assembler source code by 5931 using this directive. The first parameter is the NAME of the new 5932 auxiallry register. The second parameter is the ADDRESS of the 5933 register in the auxiliary register memory map for the variant of 5934 the ARC. The third parameter specifies the MODE in which the 5935 register can be operated is and it can be one of: 5936 5937 `r (readonly)' 5938 5939 `w (write only)' 5940 5941 `r|w (read or write)' 5942 5943 For example: 5944 5945 .extAuxRegister mulhi,0x12,w 5946 5947 This specifies an extension auxiliary register called _mulhi_ 5948 which is at address 0x12 in the memory space and which is only 5949 writable. 5950 5951 `.extCondCode SUFFIX,VALUE' 5952 The condition codes on the ARCtangent A4 are extensible and can be 5953 specified by means of this assembler directive. They are specified 5954 by the suffix and the value for the condition code. They can be 5955 used to specify extra condition codes with any values. For 5956 example: 5957 5958 .extCondCode is_busy,0x14 5959 5960 add.is_busy r1,r2,r3 5961 bis_busy _main 5962 5963 `.extCoreRegister NAME,REGNUM,MODE,SHORTCUT' 5964 Specifies an extension core register NAME for the application. 5965 This allows a register NAME with a valid REGNUM between 0 and 60, 5966 with the following as valid values for MODE 5967 5968 `_r_ (readonly)' 5969 5970 `_w_ (write only)' 5971 5972 `_r|w_ (read or write)' 5973 5974 The other parameter gives a description of the register having a 5975 SHORTCUT in the pipeline. The valid values are: 5976 5977 `can_shortcut' 5978 5979 `cannot_shortcut' 5980 5981 For example: 5982 5983 .extCoreRegister mlo,57,r,can_shortcut 5984 5985 This defines an extension core register mlo with the value 57 which 5986 can shortcut the pipeline. 5987 5988 `.extInstruction NAME,OPCODE,SUBOPCODE,SUFFIXCLASS,SYNTAXCLASS' 5989 The ARCtangent A4 allows the user to specify extension 5990 instructions. The extension instructions are not macros. The 5991 assembler creates encodings for use of these instructions 5992 according to the specification by the user. The parameters are: 5993 5994 *NAME 5995 Name of the extension instruction 5996 5997 *OPCODE 5998 Opcode to be used. (Bits 27:31 in the encoding). Valid values 5999 0x10-0x1f or 0x03 6000 6001 *SUBOPCODE 6002 Subopcode to be used. Valid values are from 0x09-0x3f. 6003 However the correct value also depends on SYNTAXCLASS 6004 6005 *SUFFIXCLASS 6006 Determines the kinds of suffixes to be allowed. Valid values 6007 are `SUFFIX_NONE', `SUFFIX_COND', `SUFFIX_FLAG' which 6008 indicates the absence or presence of conditional suffixes and 6009 flag setting by the extension instruction. It is also 6010 possible to specify that an instruction sets the flags and is 6011 conditional by using `SUFFIX_CODE' | `SUFFIX_FLAG'. 6012 6013 *SYNTAXCLASS 6014 Determines the syntax class for the instruction. It can have 6015 the following values: 6016 6017 ``SYNTAX_2OP':' 6018 2 Operand Instruction 6019 6020 ``SYNTAX_3OP':' 6021 3 Operand Instruction 6022 6023 In addition there could be modifiers for the syntax class as 6024 described below: 6025 6026 Syntax Class Modifiers are: 6027 6028 - `OP1_MUST_BE_IMM': Modifies syntax class SYNTAX_3OP, 6029 specifying that the first operand of a three-operand 6030 instruction must be an immediate (i.e., the result is 6031 discarded). OP1_MUST_BE_IMM is used by bitwise ORing it 6032 with SYNTAX_3OP as given in the example below. This 6033 could usually be used to set the flags using specific 6034 instructions and not retain results. 6035 6036 - `OP1_IMM_IMPLIED': Modifies syntax class SYNTAX_20P, it 6037 specifies that there is an implied immediate destination 6038 operand which does not appear in the syntax. For 6039 example, if the source code contains an instruction like: 6040 6041 inst r1,r2 6042 6043 it really means that the first argument is an implied 6044 immediate (that is, the result is discarded). This is 6045 the same as though the source code were: inst 0,r1,r2. 6046 You use OP1_IMM_IMPLIED by bitwise ORing it with 6047 SYNTAX_20P. 6048 6049 6050 For example, defining 64-bit multiplier with immediate operands: 6051 6052 .extInstruction mp64,0x14,0x0,SUFFIX_COND | SUFFIX_FLAG , 6053 SYNTAX_3OP|OP1_MUST_BE_IMM 6054 6055 The above specifies an extension instruction called mp64 which has 6056 3 operands, sets the flags, can be used with a condition code, for 6057 which the first operand is an immediate. (Equivalent to 6058 discarding the result of the operation). 6059 6060 .extInstruction mul64,0x14,0x00,SUFFIX_COND, SYNTAX_2OP|OP1_IMM_IMPLIED 6061 6062 This describes a 2 operand instruction with an implicit first 6063 immediate operand. The result of this operation would be 6064 discarded. 6065 6066 `.half EXPRESSIONS' 6067 *TODO* 6068 6069 `.long EXPRESSIONS' 6070 *TODO* 6071 6072 `.option ARC|ARC5|ARC6|ARC7|ARC8' 6073 The `.option' directive must be followed by the desired core 6074 version. Again `arc' is an alias for `arc6'. 6075 6076 Note: the `.option' directive overrides the command line option 6077 `-marc'; a warning is emitted when the version is not consistent 6078 between the two - even for the implicit default core version 6079 (arc6). 6080 6081 `.short EXPRESSIONS' 6082 *TODO* 6083 6084 `.word EXPRESSIONS' 6085 *TODO* 6086 6087 6088 6089 File: as.info, Node: ARC Opcodes, Prev: ARC Directives, Up: ARC-Dependent 6090 6091 9.2.5 Opcodes 6092 ------------- 6093 6094 For information on the ARC instruction set, see `ARC Programmers 6095 Reference Manual', ARC International (www.arc.com) 6096 6097 6098 File: as.info, Node: ARM-Dependent, Next: AVR-Dependent, Prev: ARC-Dependent, Up: Machine Dependencies 6099 6100 9.3 ARM Dependent Features 6101 ========================== 6102 6103 * Menu: 6104 6105 * ARM Options:: Options 6106 * ARM Syntax:: Syntax 6107 * ARM Floating Point:: Floating Point 6108 * ARM Directives:: ARM Machine Directives 6109 * ARM Opcodes:: Opcodes 6110 * ARM Mapping Symbols:: Mapping Symbols 6111 * ARM Unwinding Tutorial:: Unwinding 6112 6113 6114 File: as.info, Node: ARM Options, Next: ARM Syntax, Up: ARM-Dependent 6115 6116 9.3.1 Options 6117 ------------- 6118 6119 `-mcpu=PROCESSOR[+EXTENSION...]' 6120 This option specifies the target processor. The assembler will 6121 issue an error message if an attempt is made to assemble an 6122 instruction which will not execute on the target processor. The 6123 following processor names are recognized: `arm1', `arm2', `arm250', 6124 `arm3', `arm6', `arm60', `arm600', `arm610', `arm620', `arm7', 6125 `arm7m', `arm7d', `arm7dm', `arm7di', `arm7dmi', `arm70', `arm700', 6126 `arm700i', `arm710', `arm710t', `arm720', `arm720t', `arm740t', 6127 `arm710c', `arm7100', `arm7500', `arm7500fe', `arm7t', `arm7tdmi', 6128 `arm7tdmi-s', `arm8', `arm810', `strongarm', `strongarm1', 6129 `strongarm110', `strongarm1100', `strongarm1110', `arm9', `arm920', 6130 `arm920t', `arm922t', `arm940t', `arm9tdmi', `fa526' (Faraday 6131 FA526 processor), `fa626' (Faraday FA626 processor), `arm9e', 6132 `arm926e', `arm926ej-s', `arm946e-r0', `arm946e', `arm946e-s', 6133 `arm966e-r0', `arm966e', `arm966e-s', `arm968e-s', `arm10t', 6134 `arm10tdmi', `arm10e', `arm1020', `arm1020t', `arm1020e', 6135 `arm1022e', `arm1026ej-s', `fa626te' (Faraday FA626TE processor), 6136 `fa726te' (Faraday FA726TE processor), `arm1136j-s', `arm1136jf-s', 6137 `arm1156t2-s', `arm1156t2f-s', `arm1176jz-s', `arm1176jzf-s', 6138 `mpcore', `mpcorenovfp', `cortex-a8', `cortex-a9', `cortex-r4', 6139 `cortex-m3', `ep9312' (ARM920 with Cirrus Maverick coprocessor), 6140 `i80200' (Intel XScale processor) `iwmmxt' (Intel(r) XScale 6141 processor with Wireless MMX(tm) technology coprocessor) and 6142 `xscale'. The special name `all' may be used to allow the 6143 assembler to accept instructions valid for any ARM processor. 6144 6145 In addition to the basic instruction set, the assembler can be 6146 told to accept various extension mnemonics that extend the 6147 processor using the co-processor instruction space. For example, 6148 `-mcpu=arm920+maverick' is equivalent to specifying 6149 `-mcpu=ep9312'. The following extensions are currently supported: 6150 `+maverick' `+iwmmxt' and `+xscale'. 6151 6152 `-march=ARCHITECTURE[+EXTENSION...]' 6153 This option specifies the target architecture. The assembler will 6154 issue an error message if an attempt is made to assemble an 6155 instruction which will not execute on the target architecture. 6156 The following architecture names are recognized: `armv1', `armv2', 6157 `armv2a', `armv2s', `armv3', `armv3m', `armv4', `armv4xm', 6158 `armv4t', `armv4txm', `armv5', `armv5t', `armv5txm', `armv5te', 6159 `armv5texp', `armv6', `armv6j', `armv6k', `armv6z', `armv6zk', 6160 `armv7', `armv7-a', `armv7-r', `armv7-m', `iwmmxt' and `xscale'. 6161 If both `-mcpu' and `-march' are specified, the assembler will use 6162 the setting for `-mcpu'. 6163 6164 The architecture option can be extended with the same instruction 6165 set extension options as the `-mcpu' option. 6166 6167 `-mfpu=FLOATING-POINT-FORMAT' 6168 This option specifies the floating point format to assemble for. 6169 The assembler will issue an error message if an attempt is made to 6170 assemble an instruction which will not execute on the target 6171 floating point unit. The following format options are recognized: 6172 `softfpa', `fpe', `fpe2', `fpe3', `fpa', `fpa10', `fpa11', 6173 `arm7500fe', `softvfp', `softvfp+vfp', `vfp', `vfp10', `vfp10-r0', 6174 `vfp9', `vfpxd', `vfpv2' `vfpv3' `vfpv3-d16' `arm1020t', 6175 `arm1020e', `arm1136jf-s', `maverick' and `neon'. 6176 6177 In addition to determining which instructions are assembled, this 6178 option also affects the way in which the `.double' assembler 6179 directive behaves when assembling little-endian code. 6180 6181 The default is dependent on the processor selected. For 6182 Architecture 5 or later, the default is to assembler for VFP 6183 instructions; for earlier architectures the default is to assemble 6184 for FPA instructions. 6185 6186 `-mthumb' 6187 This option specifies that the assembler should start assembling 6188 Thumb instructions; that is, it should behave as though the file 6189 starts with a `.code 16' directive. 6190 6191 `-mthumb-interwork' 6192 This option specifies that the output generated by the assembler 6193 should be marked as supporting interworking. 6194 6195 `-mapcs `[26|32]'' 6196 This option specifies that the output generated by the assembler 6197 should be marked as supporting the indicated version of the Arm 6198 Procedure. Calling Standard. 6199 6200 `-matpcs' 6201 This option specifies that the output generated by the assembler 6202 should be marked as supporting the Arm/Thumb Procedure Calling 6203 Standard. If enabled this option will cause the assembler to 6204 create an empty debugging section in the object file called 6205 .arm.atpcs. Debuggers can use this to determine the ABI being 6206 used by. 6207 6208 `-mapcs-float' 6209 This indicates the floating point variant of the APCS should be 6210 used. In this variant floating point arguments are passed in FP 6211 registers rather than integer registers. 6212 6213 `-mapcs-reentrant' 6214 This indicates that the reentrant variant of the APCS should be 6215 used. This variant supports position independent code. 6216 6217 `-mfloat-abi=ABI' 6218 This option specifies that the output generated by the assembler 6219 should be marked as using specified floating point ABI. The 6220 following values are recognized: `soft', `softfp' and `hard'. 6221 6222 `-meabi=VER' 6223 This option specifies which EABI version the produced object files 6224 should conform to. The following values are recognized: `gnu', `4' 6225 and `5'. 6226 6227 `-EB' 6228 This option specifies that the output generated by the assembler 6229 should be marked as being encoded for a big-endian processor. 6230 6231 `-EL' 6232 This option specifies that the output generated by the assembler 6233 should be marked as being encoded for a little-endian processor. 6234 6235 `-k' 6236 This option specifies that the output of the assembler should be 6237 marked as position-independent code (PIC). 6238 6239 `--fix-v4bx' 6240 Allow `BX' instructions in ARMv4 code. This is intended for use 6241 with the linker option of the same name. 6242 6243 6244 6245 File: as.info, Node: ARM Syntax, Next: ARM Floating Point, Prev: ARM Options, Up: ARM-Dependent 6246 6247 9.3.2 Syntax 6248 ------------ 6249 6250 * Menu: 6251 6252 * ARM-Chars:: Special Characters 6253 * ARM-Regs:: Register Names 6254 * ARM-Relocations:: Relocations 6255 6256 6257 File: as.info, Node: ARM-Chars, Next: ARM-Regs, Up: ARM Syntax 6258 6259 9.3.2.1 Special Characters 6260 .......................... 6261 6262 The presence of a `@' on a line indicates the start of a comment that 6263 extends to the end of the current line. If a `#' appears as the first 6264 character of a line, the whole line is treated as a comment. 6265 6266 The `;' character can be used instead of a newline to separate 6267 statements. 6268 6269 Either `#' or `$' can be used to indicate immediate operands. 6270 6271 *TODO* Explain about /data modifier on symbols. 6272 6273 6274 File: as.info, Node: ARM-Regs, Next: ARM-Relocations, Prev: ARM-Chars, Up: ARM Syntax 6275 6276 9.3.2.2 Register Names 6277 ...................... 6278 6279 *TODO* Explain about ARM register naming, and the predefined names. 6280 6281 6282 File: as.info, Node: ARM Floating Point, Next: ARM Directives, Prev: ARM Syntax, Up: ARM-Dependent 6283 6284 9.3.3 Floating Point 6285 -------------------- 6286 6287 The ARM family uses IEEE floating-point numbers. 6288 6289 6290 File: as.info, Node: ARM-Relocations, Prev: ARM-Regs, Up: ARM Syntax 6291 6292 9.3.3.1 ARM relocation generation 6293 ................................. 6294 6295 Specific data relocations can be generated by putting the relocation 6296 name in parentheses after the symbol name. For example: 6297 6298 .word foo(TARGET1) 6299 6300 This will generate an `R_ARM_TARGET1' relocation against the symbol 6301 FOO. The following relocations are supported: `GOT', `GOTOFF', 6302 `TARGET1', `TARGET2', `SBREL', `TLSGD', `TLSLDM', `TLSLDO', `GOTTPOFF', 6303 `GOT_PREL' and `TPOFF'. 6304 6305 For compatibility with older toolchains the assembler also accepts 6306 `(PLT)' after branch targets. This will generate the deprecated 6307 `R_ARM_PLT32' relocation. 6308 6309 Relocations for `MOVW' and `MOVT' instructions can be generated by 6310 prefixing the value with `#:lower16:' and `#:upper16' respectively. 6311 For example to load the 32-bit address of foo into r0: 6312 6313 MOVW r0, #:lower16:foo 6314 MOVT r0, #:upper16:foo 6315 6316 6317 File: as.info, Node: ARM Directives, Next: ARM Opcodes, Prev: ARM Floating Point, Up: ARM-Dependent 6318 6319 9.3.4 ARM Machine Directives 6320 ---------------------------- 6321 6322 `.align EXPRESSION [, EXPRESSION]' 6323 This is the generic .ALIGN directive. For the ARM however if the 6324 first argument is zero (ie no alignment is needed) the assembler 6325 will behave as if the argument had been 2 (ie pad to the next four 6326 byte boundary). This is for compatibility with ARM's own 6327 assembler. 6328 6329 `NAME .req REGISTER NAME' 6330 This creates an alias for REGISTER NAME called NAME. For example: 6331 6332 foo .req r0 6333 6334 `.unreq ALIAS-NAME' 6335 This undefines a register alias which was previously defined using 6336 the `req', `dn' or `qn' directives. For example: 6337 6338 foo .req r0 6339 .unreq foo 6340 6341 An error occurs if the name is undefined. Note - this pseudo op 6342 can be used to delete builtin in register name aliases (eg 'r0'). 6343 This should only be done if it is really necessary. 6344 6345 `NAME .dn REGISTER NAME [.TYPE] [[INDEX]]' 6346 6347 `NAME .qn REGISTER NAME [.TYPE] [[INDEX]]' 6348 The `dn' and `qn' directives are used to create typed and/or 6349 indexed register aliases for use in Advanced SIMD Extension (Neon) 6350 instructions. The former should be used to create aliases of 6351 double-precision registers, and the latter to create aliases of 6352 quad-precision registers. 6353 6354 If these directives are used to create typed aliases, those 6355 aliases can be used in Neon instructions instead of writing types 6356 after the mnemonic or after each operand. For example: 6357 6358 x .dn d2.f32 6359 y .dn d3.f32 6360 z .dn d4.f32[1] 6361 vmul x,y,z 6362 6363 This is equivalent to writing the following: 6364 6365 vmul.f32 d2,d3,d4[1] 6366 6367 Aliases created using `dn' or `qn' can be destroyed using `unreq'. 6368 6369 `.code `[16|32]'' 6370 This directive selects the instruction set being generated. The 6371 value 16 selects Thumb, with the value 32 selecting ARM. 6372 6373 `.thumb' 6374 This performs the same action as .CODE 16. 6375 6376 `.arm' 6377 This performs the same action as .CODE 32. 6378 6379 `.force_thumb' 6380 This directive forces the selection of Thumb instructions, even if 6381 the target processor does not support those instructions 6382 6383 `.thumb_func' 6384 This directive specifies that the following symbol is the name of a 6385 Thumb encoded function. This information is necessary in order to 6386 allow the assembler and linker to generate correct code for 6387 interworking between Arm and Thumb instructions and should be used 6388 even if interworking is not going to be performed. The presence 6389 of this directive also implies `.thumb' 6390 6391 This directive is not neccessary when generating EABI objects. On 6392 these targets the encoding is implicit when generating Thumb code. 6393 6394 `.thumb_set' 6395 This performs the equivalent of a `.set' directive in that it 6396 creates a symbol which is an alias for another symbol (possibly 6397 not yet defined). This directive also has the added property in 6398 that it marks the aliased symbol as being a thumb function entry 6399 point, in the same way that the `.thumb_func' directive does. 6400 6401 `.ltorg' 6402 This directive causes the current contents of the literal pool to 6403 be dumped into the current section (which is assumed to be the 6404 .text section) at the current location (aligned to a word 6405 boundary). `GAS' maintains a separate literal pool for each 6406 section and each sub-section. The `.ltorg' directive will only 6407 affect the literal pool of the current section and sub-section. 6408 At the end of assembly all remaining, un-empty literal pools will 6409 automatically be dumped. 6410 6411 Note - older versions of `GAS' would dump the current literal pool 6412 any time a section change occurred. This is no longer done, since 6413 it prevents accurate control of the placement of literal pools. 6414 6415 `.pool' 6416 This is a synonym for .ltorg. 6417 6418 `.fnstart' 6419 Marks the start of a function with an unwind table entry. 6420 6421 `.fnend' 6422 Marks the end of a function with an unwind table entry. The 6423 unwind index table entry is created when this directive is 6424 processed. 6425 6426 If no personality routine has been specified then standard 6427 personality routine 0 or 1 will be used, depending on the number 6428 of unwind opcodes required. 6429 6430 `.cantunwind' 6431 Prevents unwinding through the current function. No personality 6432 routine or exception table data is required or permitted. 6433 6434 `.personality NAME' 6435 Sets the personality routine for the current function to NAME. 6436 6437 `.personalityindex INDEX' 6438 Sets the personality routine for the current function to the EABI 6439 standard routine number INDEX 6440 6441 `.handlerdata' 6442 Marks the end of the current function, and the start of the 6443 exception table entry for that function. Anything between this 6444 directive and the `.fnend' directive will be added to the 6445 exception table entry. 6446 6447 Must be preceded by a `.personality' or `.personalityindex' 6448 directive. 6449 6450 `.save REGLIST' 6451 Generate unwinder annotations to restore the registers in REGLIST. 6452 The format of REGLIST is the same as the corresponding 6453 store-multiple instruction. 6454 6455 _core registers_ 6456 .save {r4, r5, r6, lr} 6457 stmfd sp!, {r4, r5, r6, lr} 6458 _FPA registers_ 6459 .save f4, 2 6460 sfmfd f4, 2, [sp]! 6461 _VFP registers_ 6462 .save {d8, d9, d10} 6463 fstmdx sp!, {d8, d9, d10} 6464 _iWMMXt registers_ 6465 .save {wr10, wr11} 6466 wstrd wr11, [sp, #-8]! 6467 wstrd wr10, [sp, #-8]! 6468 or 6469 .save wr11 6470 wstrd wr11, [sp, #-8]! 6471 .save wr10 6472 wstrd wr10, [sp, #-8]! 6473 6474 `.vsave VFP-REGLIST' 6475 Generate unwinder annotations to restore the VFP registers in 6476 VFP-REGLIST using FLDMD. Also works for VFPv3 registers that are 6477 to be restored using VLDM. The format of VFP-REGLIST is the same 6478 as the corresponding store-multiple instruction. 6479 6480 _VFP registers_ 6481 .vsave {d8, d9, d10} 6482 fstmdd sp!, {d8, d9, d10} 6483 _VFPv3 registers_ 6484 .vsave {d15, d16, d17} 6485 vstm sp!, {d15, d16, d17} 6486 6487 Since FLDMX and FSTMX are now deprecated, this directive should be 6488 used in favour of `.save' for saving VFP registers for ARMv6 and 6489 above. 6490 6491 `.pad #COUNT' 6492 Generate unwinder annotations for a stack adjustment of COUNT 6493 bytes. A positive value indicates the function prologue allocated 6494 stack space by decrementing the stack pointer. 6495 6496 `.movsp REG [, #OFFSET]' 6497 Tell the unwinder that REG contains an offset from the current 6498 stack pointer. If OFFSET is not specified then it is assumed to be 6499 zero. 6500 6501 `.setfp FPREG, SPREG [, #OFFSET]' 6502 Make all unwinder annotations relaive to a frame pointer. Without 6503 this the unwinder will use offsets from the stack pointer. 6504 6505 The syntax of this directive is the same as the `sub' or `mov' 6506 instruction used to set the frame pointer. SPREG must be either 6507 `sp' or mentioned in a previous `.movsp' directive. 6508 6509 .movsp ip 6510 mov ip, sp 6511 ... 6512 .setfp fp, ip, #4 6513 sub fp, ip, #4 6514 6515 `.raw OFFSET, BYTE1, ...' 6516 Insert one of more arbitary unwind opcode bytes, which are known 6517 to adjust the stack pointer by OFFSET bytes. 6518 6519 For example `.unwind_raw 4, 0xb1, 0x01' is equivalent to `.save 6520 {r0}' 6521 6522 `.cpu NAME' 6523 Select the target processor. Valid values for NAME are the same as 6524 for the `-mcpu' commandline option. 6525 6526 `.arch NAME' 6527 Select the target architecture. Valid values for NAME are the 6528 same as for the `-march' commandline option. 6529 6530 `.object_arch NAME' 6531 Override the architecture recorded in the EABI object attribute 6532 section. Valid values for NAME are the same as for the `.arch' 6533 directive. Typically this is useful when code uses runtime 6534 detection of CPU features. 6535 6536 `.fpu NAME' 6537 Select the floating point unit to assemble for. Valid values for 6538 NAME are the same as for the `-mfpu' commandline option. 6539 6540 `.eabi_attribute TAG, VALUE' 6541 Set the EABI object attribute number TAG to VALUE. The value is 6542 either a `number', `"string"', or `number, "string"' depending on 6543 the tag. 6544 6545 6546 6547 File: as.info, Node: ARM Opcodes, Next: ARM Mapping Symbols, Prev: ARM Directives, Up: ARM-Dependent 6548 6549 9.3.5 Opcodes 6550 ------------- 6551 6552 `as' implements all the standard ARM opcodes. It also implements 6553 several pseudo opcodes, including several synthetic load instructions. 6554 6555 `NOP' 6556 nop 6557 6558 This pseudo op will always evaluate to a legal ARM instruction 6559 that does nothing. Currently it will evaluate to MOV r0, r0. 6560 6561 `LDR' 6562 ldr <register> , = <expression> 6563 6564 If expression evaluates to a numeric constant then a MOV or MVN 6565 instruction will be used in place of the LDR instruction, if the 6566 constant can be generated by either of these instructions. 6567 Otherwise the constant will be placed into the nearest literal 6568 pool (if it not already there) and a PC relative LDR instruction 6569 will be generated. 6570 6571 `ADR' 6572 adr <register> <label> 6573 6574 This instruction will load the address of LABEL into the indicated 6575 register. The instruction will evaluate to a PC relative ADD or 6576 SUB instruction depending upon where the label is located. If the 6577 label is out of range, or if it is not defined in the same file 6578 (and section) as the ADR instruction, then an error will be 6579 generated. This instruction will not make use of the literal pool. 6580 6581 `ADRL' 6582 adrl <register> <label> 6583 6584 This instruction will load the address of LABEL into the indicated 6585 register. The instruction will evaluate to one or two PC relative 6586 ADD or SUB instructions depending upon where the label is located. 6587 If a second instruction is not needed a NOP instruction will be 6588 generated in its place, so that this instruction is always 8 bytes 6589 long. 6590 6591 If the label is out of range, or if it is not defined in the same 6592 file (and section) as the ADRL instruction, then an error will be 6593 generated. This instruction will not make use of the literal pool. 6594 6595 6596 For information on the ARM or Thumb instruction sets, see `ARM 6597 Software Development Toolkit Reference Manual', Advanced RISC Machines 6598 Ltd. 6599 6600 6601 File: as.info, Node: ARM Mapping Symbols, Next: ARM Unwinding Tutorial, Prev: ARM Opcodes, Up: ARM-Dependent 6602 6603 9.3.6 Mapping Symbols 6604 --------------------- 6605 6606 The ARM ELF specification requires that special symbols be inserted 6607 into object files to mark certain features: 6608 6609 `$a' 6610 At the start of a region of code containing ARM instructions. 6611 6612 `$t' 6613 At the start of a region of code containing THUMB instructions. 6614 6615 `$d' 6616 At the start of a region of data. 6617 6618 6619 The assembler will automatically insert these symbols for you - there 6620 is no need to code them yourself. Support for tagging symbols ($b, $f, 6621 $p and $m) which is also mentioned in the current ARM ELF specification 6622 is not implemented. This is because they have been dropped from the 6623 new EABI and so tools cannot rely upon their presence. 6624 6625 6626 File: as.info, Node: ARM Unwinding Tutorial, Prev: ARM Mapping Symbols, Up: ARM-Dependent 6627 6628 9.3.7 Unwinding 6629 --------------- 6630 6631 The ABI for the ARM Architecture specifies a standard format for 6632 exception unwind information. This information is used when an 6633 exception is thrown to determine where control should be transferred. 6634 In particular, the unwind information is used to determine which 6635 function called the function that threw the exception, and which 6636 function called that one, and so forth. This information is also used 6637 to restore the values of callee-saved registers in the function 6638 catching the exception. 6639 6640 If you are writing functions in assembly code, and those functions 6641 call other functions that throw exceptions, you must use assembly 6642 pseudo ops to ensure that appropriate exception unwind information is 6643 generated. Otherwise, if one of the functions called by your assembly 6644 code throws an exception, the run-time library will be unable to unwind 6645 the stack through your assembly code and your program will not behave 6646 correctly. 6647 6648 To illustrate the use of these pseudo ops, we will examine the code 6649 that G++ generates for the following C++ input: 6650 6651 6652 void callee (int *); 6653 6654 int 6655 caller () 6656 { 6657 int i; 6658 callee (&i); 6659 return i; 6660 } 6661 6662 This example does not show how to throw or catch an exception from 6663 assembly code. That is a much more complex operation and should always 6664 be done in a high-level language, such as C++, that directly supports 6665 exceptions. 6666 6667 The code generated by one particular version of G++ when compiling 6668 the example above is: 6669 6670 6671 _Z6callerv: 6672 .fnstart 6673 .LFB2: 6674 @ Function supports interworking. 6675 @ args = 0, pretend = 0, frame = 8 6676 @ frame_needed = 1, uses_anonymous_args = 0 6677 stmfd sp!, {fp, lr} 6678 .save {fp, lr} 6679 .LCFI0: 6680 .setfp fp, sp, #4 6681 add fp, sp, #4 6682 .LCFI1: 6683 .pad #8 6684 sub sp, sp, #8 6685 .LCFI2: 6686 sub r3, fp, #8 6687 mov r0, r3 6688 bl _Z6calleePi 6689 ldr r3, [fp, #-8] 6690 mov r0, r3 6691 sub sp, fp, #4 6692 ldmfd sp!, {fp, lr} 6693 bx lr 6694 .LFE2: 6695 .fnend 6696 6697 Of course, the sequence of instructions varies based on the options 6698 you pass to GCC and on the version of GCC in use. The exact 6699 instructions are not important since we are focusing on the pseudo ops 6700 that are used to generate unwind information. 6701 6702 An important assumption made by the unwinder is that the stack frame 6703 does not change during the body of the function. In particular, since 6704 we assume that the assembly code does not itself throw an exception, 6705 the only point where an exception can be thrown is from a call, such as 6706 the `bl' instruction above. At each call site, the same saved 6707 registers (including `lr', which indicates the return address) must be 6708 located in the same locations relative to the frame pointer. 6709 6710 The `.fnstart' (*note .fnstart pseudo op: arm_fnstart.) pseudo op 6711 appears immediately before the first instruction of the function while 6712 the `.fnend' (*note .fnend pseudo op: arm_fnend.) pseudo op appears 6713 immediately after the last instruction of the function. These pseudo 6714 ops specify the range of the function. 6715 6716 Only the order of the other pseudos ops (e.g., `.setfp' or `.pad') 6717 matters; their exact locations are irrelevant. In the example above, 6718 the compiler emits the pseudo ops with particular instructions. That 6719 makes it easier to understand the code, but it is not required for 6720 correctness. It would work just as well to emit all of the pseudo ops 6721 other than `.fnend' in the same order, but immediately after `.fnstart'. 6722 6723 The `.save' (*note .save pseudo op: arm_save.) pseudo op indicates 6724 registers that have been saved to the stack so that they can be 6725 restored before the function returns. The argument to the `.save' 6726 pseudo op is a list of registers to save. If a register is 6727 "callee-saved" (as specified by the ABI) and is modified by the 6728 function you are writing, then your code must save the value before it 6729 is modified and restore the original value before the function returns. 6730 If an exception is thrown, the run-time library restores the values of 6731 these registers from their locations on the stack before returning 6732 control to the exception handler. (Of course, if an exception is not 6733 thrown, the function that contains the `.save' pseudo op restores these 6734 registers in the function epilogue, as is done with the `ldmfd' 6735 instruction above.) 6736 6737 You do not have to save callee-saved registers at the very beginning 6738 of the function and you do not need to use the `.save' pseudo op 6739 immediately following the point at which the registers are saved. 6740 However, if you modify a callee-saved register, you must save it on the 6741 stack before modifying it and before calling any functions which might 6742 throw an exception. And, you must use the `.save' pseudo op to 6743 indicate that you have done so. 6744 6745 The `.pad' (*note .pad: arm_pad.) pseudo op indicates a modification 6746 of the stack pointer that does not save any registers. The argument is 6747 the number of bytes (in decimal) that are subtracted from the stack 6748 pointer. (On ARM CPUs, the stack grows downwards, so subtracting from 6749 the stack pointer increases the size of the stack.) 6750 6751 The `.setfp' (*note .setfp pseudo op: arm_setfp.) pseudo op 6752 indicates the register that contains the frame pointer. The first 6753 argument is the register that is set, which is typically `fp'. The 6754 second argument indicates the register from which the frame pointer 6755 takes its value. The third argument, if present, is the value (in 6756 decimal) added to the register specified by the second argument to 6757 compute the value of the frame pointer. You should not modify the 6758 frame pointer in the body of the function. 6759 6760 If you do not use a frame pointer, then you should not use the 6761 `.setfp' pseudo op. If you do not use a frame pointer, then you should 6762 avoid modifying the stack pointer outside of the function prologue. 6763 Otherwise, the run-time library will be unable to find saved registers 6764 when it is unwinding the stack. 6765 6766 The pseudo ops described above are sufficient for writing assembly 6767 code that calls functions which may throw exceptions. If you need to 6768 know more about the object-file format used to represent unwind 6769 information, you may consult the `Exception Handling ABI for the ARM 6770 Architecture' available from `http://infocenter.arm.com'. 6771 6772 6773 File: as.info, Node: AVR-Dependent, Next: BFIN-Dependent, Prev: ARM-Dependent, Up: Machine Dependencies 6774 6775 9.4 AVR Dependent Features 6776 ========================== 6777 6778 * Menu: 6779 6780 * AVR Options:: Options 6781 * AVR Syntax:: Syntax 6782 * AVR Opcodes:: Opcodes 6783 6784 6785 File: as.info, Node: AVR Options, Next: AVR Syntax, Up: AVR-Dependent 6786 6787 9.4.1 Options 6788 ------------- 6789 6790 `-mmcu=MCU' 6791 Specify ATMEL AVR instruction set or MCU type. 6792 6793 Instruction set avr1 is for the minimal AVR core, not supported by 6794 the C compiler, only for assembler programs (MCU types: at90s1200, 6795 attiny11, attiny12, attiny15, attiny28). 6796 6797 Instruction set avr2 (default) is for the classic AVR core with up 6798 to 8K program memory space (MCU types: at90s2313, at90s2323, 6799 at90s2333, at90s2343, attiny22, attiny26, at90s4414, at90s4433, 6800 at90s4434, at90s8515, at90c8534, at90s8535). 6801 6802 Instruction set avr25 is for the classic AVR core with up to 8K 6803 program memory space plus the MOVW instruction (MCU types: 6804 attiny13, attiny13a, attiny2313, attiny24, attiny44, attiny84, 6805 attiny25, attiny45, attiny85, attiny261, attiny461, attiny861, 6806 attiny43u, attiny48, attiny88, at86rf401). 6807 6808 Instruction set avr3 is for the classic AVR core with up to 128K 6809 program memory space (MCU types: at43usb355, at76c711). 6810 6811 Instruction set avr31 is for the classic AVR core with exactly 6812 128K program memory space (MCU types: atmega103, at43usb320). 6813 6814 Instruction set avr35 is for classic AVR core plus MOVW, CALL, and 6815 JMP instructions (MCU types: attiny167, at90usb82, at90usb162). 6816 6817 Instruction set avr4 is for the enhanced AVR core with up to 8K 6818 program memory space (MCU types: atmega48, atmega48p,atmega8, 6819 atmega88, atmega88p, atmega8515, atmega8535, atmega8hva, at90pwm1, 6820 at90pwm2, at90pwm2b, at90pwm3, at90pwm3b). 6821 6822 Instruction set avr5 is for the enhanced AVR core with up to 128K 6823 program memory space (MCU types: atmega16, atmega161, atmega162, 6824 atmega163, atmega164p, atmega165, atmega165p, atmega168, 6825 atmega168p, atmega169, atmega169p, atmega32, atmega323, 6826 atmega324p, atmega325, atmega325p, atmega3250, atmega3250p, 6827 atmega328p, atmega329, atmega329p, atmega3290, atmega3290p, 6828 atmega406, atmega64, atmega640, atmega644, atmega644p, atmega645, 6829 atmega6450, atmega649, atmega6490, atmega16hva, at90can32, 6830 at90can64, at90pwm216, at90pwm316, atmega16u4, atmega32c1, 6831 atmega32m1, atmega32u4, at90usb646, at90usb647, at94k). 6832 6833 Instruction set avr51 is for the enhanced AVR core with exactly 6834 128K program memory space (MCU types: atmega128, atmega1280, 6835 atmega1281, atmega1284p, at90can128, at90usb1286, at90usb1287). 6836 6837 Instruction set avr6 is for the enhanced AVR core with a 3-byte PC 6838 (MCU types: atmega2560, atmega2561). 6839 6840 `-mall-opcodes' 6841 Accept all AVR opcodes, even if not supported by `-mmcu'. 6842 6843 `-mno-skip-bug' 6844 This option disable warnings for skipping two-word instructions. 6845 6846 `-mno-wrap' 6847 This option reject `rjmp/rcall' instructions with 8K wrap-around. 6848 6849 6850 6851 File: as.info, Node: AVR Syntax, Next: AVR Opcodes, Prev: AVR Options, Up: AVR-Dependent 6852 6853 9.4.2 Syntax 6854 ------------ 6855 6856 * Menu: 6857 6858 * AVR-Chars:: Special Characters 6859 * AVR-Regs:: Register Names 6860 * AVR-Modifiers:: Relocatable Expression Modifiers 6861 6862 6863 File: as.info, Node: AVR-Chars, Next: AVR-Regs, Up: AVR Syntax 6864 6865 9.4.2.1 Special Characters 6866 .......................... 6867 6868 The presence of a `;' on a line indicates the start of a comment that 6869 extends to the end of the current line. If a `#' appears as the first 6870 character of a line, the whole line is treated as a comment. 6871 6872 The `$' character can be used instead of a newline to separate 6873 statements. 6874 6875 6876 File: as.info, Node: AVR-Regs, Next: AVR-Modifiers, Prev: AVR-Chars, Up: AVR Syntax 6877 6878 9.4.2.2 Register Names 6879 ...................... 6880 6881 The AVR has 32 x 8-bit general purpose working registers `r0', `r1', 6882 ... `r31'. Six of the 32 registers can be used as three 16-bit 6883 indirect address register pointers for Data Space addressing. One of 6884 the these address pointers can also be used as an address pointer for 6885 look up tables in Flash program memory. These added function registers 6886 are the 16-bit `X', `Y' and `Z' - registers. 6887 6888 X = r26:r27 6889 Y = r28:r29 6890 Z = r30:r31 6891 6892 6893 File: as.info, Node: AVR-Modifiers, Prev: AVR-Regs, Up: AVR Syntax 6894 6895 9.4.2.3 Relocatable Expression Modifiers 6896 ........................................ 6897 6898 The assembler supports several modifiers when using relocatable 6899 addresses in AVR instruction operands. The general syntax is the 6900 following: 6901 6902 modifier(relocatable-expression) 6903 6904 `lo8' 6905 This modifier allows you to use bits 0 through 7 of an address 6906 expression as 8 bit relocatable expression. 6907 6908 `hi8' 6909 This modifier allows you to use bits 7 through 15 of an address 6910 expression as 8 bit relocatable expression. This is useful with, 6911 for example, the AVR `ldi' instruction and `lo8' modifier. 6912 6913 For example 6914 6915 ldi r26, lo8(sym+10) 6916 ldi r27, hi8(sym+10) 6917 6918 `hh8' 6919 This modifier allows you to use bits 16 through 23 of an address 6920 expression as 8 bit relocatable expression. Also, can be useful 6921 for loading 32 bit constants. 6922 6923 `hlo8' 6924 Synonym of `hh8'. 6925 6926 `hhi8' 6927 This modifier allows you to use bits 24 through 31 of an 6928 expression as 8 bit expression. This is useful with, for example, 6929 the AVR `ldi' instruction and `lo8', `hi8', `hlo8', `hhi8', 6930 modifier. 6931 6932 For example 6933 6934 ldi r26, lo8(285774925) 6935 ldi r27, hi8(285774925) 6936 ldi r28, hlo8(285774925) 6937 ldi r29, hhi8(285774925) 6938 ; r29,r28,r27,r26 = 285774925 6939 6940 `pm_lo8' 6941 This modifier allows you to use bits 0 through 7 of an address 6942 expression as 8 bit relocatable expression. This modifier useful 6943 for addressing data or code from Flash/Program memory. The using 6944 of `pm_lo8' similar to `lo8'. 6945 6946 `pm_hi8' 6947 This modifier allows you to use bits 8 through 15 of an address 6948 expression as 8 bit relocatable expression. This modifier useful 6949 for addressing data or code from Flash/Program memory. 6950 6951 `pm_hh8' 6952 This modifier allows you to use bits 15 through 23 of an address 6953 expression as 8 bit relocatable expression. This modifier useful 6954 for addressing data or code from Flash/Program memory. 6955 6956 6957 6958 File: as.info, Node: AVR Opcodes, Prev: AVR Syntax, Up: AVR-Dependent 6959 6960 9.4.3 Opcodes 6961 ------------- 6962 6963 For detailed information on the AVR machine instruction set, see 6964 `www.atmel.com/products/AVR'. 6965 6966 `as' implements all the standard AVR opcodes. The following table 6967 summarizes the AVR opcodes, and their arguments. 6968 6969 Legend: 6970 r any register 6971 d `ldi' register (r16-r31) 6972 v `movw' even register (r0, r2, ..., r28, r30) 6973 a `fmul' register (r16-r23) 6974 w `adiw' register (r24,r26,r28,r30) 6975 e pointer registers (X,Y,Z) 6976 b base pointer register and displacement ([YZ]+disp) 6977 z Z pointer register (for [e]lpm Rd,Z[+]) 6978 M immediate value from 0 to 255 6979 n immediate value from 0 to 255 ( n = ~M ). Relocation impossible 6980 s immediate value from 0 to 7 6981 P Port address value from 0 to 63. (in, out) 6982 p Port address value from 0 to 31. (cbi, sbi, sbic, sbis) 6983 K immediate value from 0 to 63 (used in `adiw', `sbiw') 6984 i immediate value 6985 l signed pc relative offset from -64 to 63 6986 L signed pc relative offset from -2048 to 2047 6987 h absolute code address (call, jmp) 6988 S immediate value from 0 to 7 (S = s << 4) 6989 ? use this opcode entry if no parameters, else use next opcode entry 6990 6991 1001010010001000 clc 6992 1001010011011000 clh 6993 1001010011111000 cli 6994 1001010010101000 cln 6995 1001010011001000 cls 6996 1001010011101000 clt 6997 1001010010111000 clv 6998 1001010010011000 clz 6999 1001010000001000 sec 7000 1001010001011000 seh 7001 1001010001111000 sei 7002 1001010000101000 sen 7003 1001010001001000 ses 7004 1001010001101000 set 7005 1001010000111000 sev 7006 1001010000011000 sez 7007 100101001SSS1000 bclr S 7008 100101000SSS1000 bset S 7009 1001010100001001 icall 7010 1001010000001001 ijmp 7011 1001010111001000 lpm ? 7012 1001000ddddd010+ lpm r,z 7013 1001010111011000 elpm ? 7014 1001000ddddd011+ elpm r,z 7015 0000000000000000 nop 7016 1001010100001000 ret 7017 1001010100011000 reti 7018 1001010110001000 sleep 7019 1001010110011000 break 7020 1001010110101000 wdr 7021 1001010111101000 spm 7022 000111rdddddrrrr adc r,r 7023 000011rdddddrrrr add r,r 7024 001000rdddddrrrr and r,r 7025 000101rdddddrrrr cp r,r 7026 000001rdddddrrrr cpc r,r 7027 000100rdddddrrrr cpse r,r 7028 001001rdddddrrrr eor r,r 7029 001011rdddddrrrr mov r,r 7030 100111rdddddrrrr mul r,r 7031 001010rdddddrrrr or r,r 7032 000010rdddddrrrr sbc r,r 7033 000110rdddddrrrr sub r,r 7034 001001rdddddrrrr clr r 7035 000011rdddddrrrr lsl r 7036 000111rdddddrrrr rol r 7037 001000rdddddrrrr tst r 7038 0111KKKKddddKKKK andi d,M 7039 0111KKKKddddKKKK cbr d,n 7040 1110KKKKddddKKKK ldi d,M 7041 11101111dddd1111 ser d 7042 0110KKKKddddKKKK ori d,M 7043 0110KKKKddddKKKK sbr d,M 7044 0011KKKKddddKKKK cpi d,M 7045 0100KKKKddddKKKK sbci d,M 7046 0101KKKKddddKKKK subi d,M 7047 1111110rrrrr0sss sbrc r,s 7048 1111111rrrrr0sss sbrs r,s 7049 1111100ddddd0sss bld r,s 7050 1111101ddddd0sss bst r,s 7051 10110PPdddddPPPP in r,P 7052 10111PPrrrrrPPPP out P,r 7053 10010110KKddKKKK adiw w,K 7054 10010111KKddKKKK sbiw w,K 7055 10011000pppppsss cbi p,s 7056 10011010pppppsss sbi p,s 7057 10011001pppppsss sbic p,s 7058 10011011pppppsss sbis p,s 7059 111101lllllll000 brcc l 7060 111100lllllll000 brcs l 7061 111100lllllll001 breq l 7062 111101lllllll100 brge l 7063 111101lllllll101 brhc l 7064 111100lllllll101 brhs l 7065 111101lllllll111 brid l 7066 111100lllllll111 brie l 7067 111100lllllll000 brlo l 7068 111100lllllll100 brlt l 7069 111100lllllll010 brmi l 7070 111101lllllll001 brne l 7071 111101lllllll010 brpl l 7072 111101lllllll000 brsh l 7073 111101lllllll110 brtc l 7074 111100lllllll110 brts l 7075 111101lllllll011 brvc l 7076 111100lllllll011 brvs l 7077 111101lllllllsss brbc s,l 7078 111100lllllllsss brbs s,l 7079 1101LLLLLLLLLLLL rcall L 7080 1100LLLLLLLLLLLL rjmp L 7081 1001010hhhhh111h call h 7082 1001010hhhhh110h jmp h 7083 1001010rrrrr0101 asr r 7084 1001010rrrrr0000 com r 7085 1001010rrrrr1010 dec r 7086 1001010rrrrr0011 inc r 7087 1001010rrrrr0110 lsr r 7088 1001010rrrrr0001 neg r 7089 1001000rrrrr1111 pop r 7090 1001001rrrrr1111 push r 7091 1001010rrrrr0111 ror r 7092 1001010rrrrr0010 swap r 7093 00000001ddddrrrr movw v,v 7094 00000010ddddrrrr muls d,d 7095 000000110ddd0rrr mulsu a,a 7096 000000110ddd1rrr fmul a,a 7097 000000111ddd0rrr fmuls a,a 7098 000000111ddd1rrr fmulsu a,a 7099 1001001ddddd0000 sts i,r 7100 1001000ddddd0000 lds r,i 7101 10o0oo0dddddbooo ldd r,b 7102 100!000dddddee-+ ld r,e 7103 10o0oo1rrrrrbooo std b,r 7104 100!001rrrrree-+ st e,r 7105 1001010100011001 eicall 7106 1001010000011001 eijmp 7107 7108 7109 File: as.info, Node: BFIN-Dependent, Next: CR16-Dependent, Prev: AVR-Dependent, Up: Machine Dependencies 7110 7111 9.5 Blackfin Dependent Features 7112 =============================== 7113 7114 * Menu: 7115 7116 * BFIN Syntax:: BFIN Syntax 7117 * BFIN Directives:: BFIN Directives 7118 7119 7120 File: as.info, Node: BFIN Syntax, Next: BFIN Directives, Up: BFIN-Dependent 7121 7122 9.5.1 Syntax 7123 ------------ 7124 7125 `Special Characters' 7126 Assembler input is free format and may appear anywhere on the line. 7127 One instruction may extend across multiple lines or more than one 7128 instruction may appear on the same line. White space (space, tab, 7129 comments or newline) may appear anywhere between tokens. A token 7130 must not have embedded spaces. Tokens include numbers, register 7131 names, keywords, user identifiers, and also some multicharacter 7132 special symbols like "+=", "/*" or "||". 7133 7134 `Instruction Delimiting' 7135 A semicolon must terminate every instruction. Sometimes a complete 7136 instruction will consist of more than one operation. There are two 7137 cases where this occurs. The first is when two general operations 7138 are combined. Normally a comma separates the different parts, as 7139 in 7140 7141 a0= r3.h * r2.l, a1 = r3.l * r2.h ; 7142 7143 The second case occurs when a general instruction is combined with 7144 one or two memory references for joint issue. The latter portions 7145 are set off by a "||" token. 7146 7147 a0 = r3.h * r2.l || r1 = [p3++] || r4 = [i2++]; 7148 7149 `Register Names' 7150 The assembler treats register names and instruction keywords in a 7151 case insensitive manner. User identifiers are case sensitive. 7152 Thus, R3.l, R3.L, r3.l and r3.L are all equivalent input to the 7153 assembler. 7154 7155 Register names are reserved and may not be used as program 7156 identifiers. 7157 7158 Some operations (such as "Move Register") require a register pair. 7159 Register pairs are always data registers and are denoted using a 7160 colon, eg., R3:2. The larger number must be written firsts. Note 7161 that the hardware only supports odd-even pairs, eg., R7:6, R5:4, 7162 R3:2, and R1:0. 7163 7164 Some instructions (such as -SP (Push Multiple)) require a group of 7165 adjacent registers. Adjacent registers are denoted in the syntax 7166 by the range enclosed in parentheses and separated by a colon, 7167 eg., (R7:3). Again, the larger number appears first. 7168 7169 Portions of a particular register may be individually specified. 7170 This is written with a dot (".") following the register name and 7171 then a letter denoting the desired portion. For 32-bit registers, 7172 ".H" denotes the most significant ("High") portion. ".L" denotes 7173 the least-significant portion. The subdivisions of the 40-bit 7174 registers are described later. 7175 7176 `Accumulators' 7177 The set of 40-bit registers A1 and A0 that normally contain data 7178 that is being manipulated. Each accumulator can be accessed in 7179 four ways. 7180 7181 `one 40-bit register' 7182 The register will be referred to as A1 or A0. 7183 7184 `one 32-bit register' 7185 The registers are designated as A1.W or A0.W. 7186 7187 `two 16-bit registers' 7188 The registers are designated as A1.H, A1.L, A0.H or A0.L. 7189 7190 `one 8-bit register' 7191 The registers are designated as A1.X or A0.X for the bits that 7192 extend beyond bit 31. 7193 7194 `Data Registers' 7195 The set of 32-bit registers (R0, R1, R2, R3, R4, R5, R6 and R7) 7196 that normally contain data for manipulation. These are 7197 abbreviated as D-register or Dreg. Data registers can be accessed 7198 as 32-bit registers or as two independent 16-bit registers. The 7199 least significant 16 bits of each register is called the "low" 7200 half and is designated with ".L" following the register name. The 7201 most significant 16 bits are called the "high" half and is 7202 designated with ".H" following the name. 7203 7204 R7.L, r2.h, r4.L, R0.H 7205 7206 `Pointer Registers' 7207 The set of 32-bit registers (P0, P1, P2, P3, P4, P5, SP and FP) 7208 that normally contain byte addresses of data structures. These are 7209 abbreviated as P-register or Preg. 7210 7211 p2, p5, fp, sp 7212 7213 `Stack Pointer SP' 7214 The stack pointer contains the 32-bit address of the last occupied 7215 byte location in the stack. The stack grows by decrementing the 7216 stack pointer. 7217 7218 `Frame Pointer FP' 7219 The frame pointer contains the 32-bit address of the previous frame 7220 pointer in the stack. It is located at the top of a frame. 7221 7222 `Loop Top' 7223 LT0 and LT1. These registers contain the 32-bit address of the 7224 top of a zero overhead loop. 7225 7226 `Loop Count' 7227 LC0 and LC1. These registers contain the 32-bit counter of the 7228 zero overhead loop executions. 7229 7230 `Loop Bottom' 7231 LB0 and LB1. These registers contain the 32-bit address of the 7232 bottom of a zero overhead loop. 7233 7234 `Index Registers' 7235 The set of 32-bit registers (I0, I1, I2, I3) that normally contain 7236 byte addresses of data structures. Abbreviated I-register or Ireg. 7237 7238 `Modify Registers' 7239 The set of 32-bit registers (M0, M1, M2, M3) that normally contain 7240 offset values that are added and subracted to one of the index 7241 registers. Abbreviated as Mreg. 7242 7243 `Length Registers' 7244 The set of 32-bit registers (L0, L1, L2, L3) that normally contain 7245 the length in bytes of the circular buffer. Abbreviated as Lreg. 7246 Clear the Lreg to disable circular addressing for the 7247 corresponding Ireg. 7248 7249 `Base Registers' 7250 The set of 32-bit registers (B0, B1, B2, B3) that normally contain 7251 the base address in bytes of the circular buffer. Abbreviated as 7252 Breg. 7253 7254 `Floating Point' 7255 The Blackfin family has no hardware floating point but the .float 7256 directive generates ieee floating point numbers for use with 7257 software floating point libraries. 7258 7259 `Blackfin Opcodes' 7260 For detailed information on the Blackfin machine instruction set, 7261 see the Blackfin(r) Processor Instruction Set Reference. 7262 7263 7264 7265 File: as.info, Node: BFIN Directives, Prev: BFIN Syntax, Up: BFIN-Dependent 7266 7267 9.5.2 Directives 7268 ---------------- 7269 7270 The following directives are provided for compatibility with the VDSP 7271 assembler. 7272 7273 `.byte2' 7274 Initializes a four byte data object. 7275 7276 `.byte4' 7277 Initializes a two byte data object. 7278 7279 `.db' 7280 TBD 7281 7282 `.dd' 7283 TBD 7284 7285 `.dw' 7286 TBD 7287 7288 `.var' 7289 Define and initialize a 32 bit data object. 7290 7291 7292 File: as.info, Node: CR16-Dependent, Next: CRIS-Dependent, Prev: BFIN-Dependent, Up: Machine Dependencies 7293 7294 9.6 CR16 Dependent Features 7295 =========================== 7296 7297 * Menu: 7298 7299 * CR16 Operand Qualifiers:: CR16 Machine Operand Qualifiers 7300 7301 7302 File: as.info, Node: CR16 Operand Qualifiers, Up: CR16-Dependent 7303 7304 9.6.1 CR16 Operand Qualifiers 7305 ----------------------------- 7306 7307 The National Semiconductor CR16 target of `as' has a few machine 7308 dependent operand qualifiers. 7309 7310 Operand expression type qualifier is an optional field in the 7311 instruction operand, to determines the type of the expression field of 7312 an operand. The `@' is required. CR16 architecture uses one of the 7313 following expression qualifiers: 7314 7315 `s' 7316 - `Specifies expression operand type as small' 7317 7318 `m' 7319 - `Specifies expression operand type as medium' 7320 7321 `l' 7322 - `Specifies expression operand type as large' 7323 7324 `c' 7325 - `Specifies the CR16 Assembler generates a relocation entry for 7326 the operand, where pc has implied bit, the expression is adjusted 7327 accordingly. The linker uses the relocation entry to update the 7328 operand address at link time.' 7329 7330 CR16 target operand qualifiers and its size (in bits): 7331 7332 `Immediate Operand' 7333 - s --- 4 bits 7334 7335 `' 7336 - m --- 16 bits, for movb and movw instructions. 7337 7338 `' 7339 - m --- 20 bits, movd instructions. 7340 7341 `' 7342 - l --- 32 bits 7343 7344 `Absolute Operand' 7345 - s --- Illegal specifier for this operand. 7346 7347 `' 7348 - m --- 20 bits, movd instructions. 7349 7350 `Displacement Operand' 7351 - s --- 8 bits 7352 7353 `' 7354 - m --- 16 bits 7355 7356 `' 7357 - l --- 24 bits 7358 7359 For example: 7360 1 `movw $_myfun@c,r1' 7361 7362 This loads the address of _myfun, shifted right by 1, into r1. 7363 7364 2 `movd $_myfun@c,(r2,r1)' 7365 7366 This loads the address of _myfun, shifted right by 1, into register-pair r2-r1. 7367 7368 3 `_myfun_ptr:' 7369 `.long _myfun@c' 7370 `loadd _myfun_ptr, (r1,r0)' 7371 `jal (r1,r0)' 7372 7373 This .long directive, the address of _myfunc, shifted right by 1 at link time. 7374 7375 7376 File: as.info, Node: CRIS-Dependent, Next: D10V-Dependent, Prev: CR16-Dependent, Up: Machine Dependencies 7377 7378 9.7 CRIS Dependent Features 7379 =========================== 7380 7381 * Menu: 7382 7383 * CRIS-Opts:: Command-line Options 7384 * CRIS-Expand:: Instruction expansion 7385 * CRIS-Symbols:: Symbols 7386 * CRIS-Syntax:: Syntax 7387 7388 7389 File: as.info, Node: CRIS-Opts, Next: CRIS-Expand, Up: CRIS-Dependent 7390 7391 9.7.1 Command-line Options 7392 -------------------------- 7393 7394 The CRIS version of `as' has these machine-dependent command-line 7395 options. 7396 7397 The format of the generated object files can be either ELF or a.out, 7398 specified by the command-line options `--emulation=crisaout' and 7399 `--emulation=criself'. The default is ELF (criself), unless `as' has 7400 been configured specifically for a.out by using the configuration name 7401 `cris-axis-aout'. 7402 7403 There are two different link-incompatible ELF object file variants 7404 for CRIS, for use in environments where symbols are expected to be 7405 prefixed by a leading `_' character and for environments without such a 7406 symbol prefix. The variant used for GNU/Linux port has no symbol 7407 prefix. Which variant to produce is specified by either of the options 7408 `--underscore' and `--no-underscore'. The default is `--underscore'. 7409 Since symbols in CRIS a.out objects are expected to have a `_' prefix, 7410 specifying `--no-underscore' when generating a.out objects is an error. 7411 Besides the object format difference, the effect of this option is to 7412 parse register names differently (*note crisnous::). The 7413 `--no-underscore' option makes a `$' register prefix mandatory. 7414 7415 The option `--pic' must be passed to `as' in order to recognize the 7416 symbol syntax used for ELF (SVR4 PIC) position-independent-code (*note 7417 crispic::). This will also affect expansion of instructions. The 7418 expansion with `--pic' will use PC-relative rather than (slightly 7419 faster) absolute addresses in those expansions. 7420 7421 The option `--march=ARCHITECTURE' specifies the recognized 7422 instruction set and recognized register names. It also controls the 7423 architecture type of the object file. Valid values for ARCHITECTURE 7424 are: 7425 `v0_v10' 7426 All instructions and register names for any architecture variant 7427 in the set v0...v10 are recognized. This is the default if the 7428 target is configured as cris-*. 7429 7430 `v10' 7431 Only instructions and register names for CRIS v10 (as found in 7432 ETRAX 100 LX) are recognized. This is the default if the target 7433 is configured as crisv10-*. 7434 7435 `v32' 7436 Only instructions and register names for CRIS v32 (code name 7437 Guinness) are recognized. This is the default if the target is 7438 configured as crisv32-*. This value implies `--no-mul-bug-abort'. 7439 (A subsequent `--mul-bug-abort' will turn it back on.) 7440 7441 `common_v10_v32' 7442 Only instructions with register names and addressing modes with 7443 opcodes common to the v10 and v32 are recognized. 7444 7445 When `-N' is specified, `as' will emit a warning when a 16-bit 7446 branch instruction is expanded into a 32-bit multiple-instruction 7447 construct (*note CRIS-Expand::). 7448 7449 Some versions of the CRIS v10, for example in the Etrax 100 LX, 7450 contain a bug that causes destabilizing memory accesses when a multiply 7451 instruction is executed with certain values in the first operand just 7452 before a cache-miss. When the `--mul-bug-abort' command line option is 7453 active (the default value), `as' will refuse to assemble a file 7454 containing a multiply instruction at a dangerous offset, one that could 7455 be the last on a cache-line, or is in a section with insufficient 7456 alignment. This placement checking does not catch any case where the 7457 multiply instruction is dangerously placed because it is located in a 7458 delay-slot. The `--mul-bug-abort' command line option turns off the 7459 checking. 7460 7461 7462 File: as.info, Node: CRIS-Expand, Next: CRIS-Symbols, Prev: CRIS-Opts, Up: CRIS-Dependent 7463 7464 9.7.2 Instruction expansion 7465 --------------------------- 7466 7467 `as' will silently choose an instruction that fits the operand size for 7468 `[register+constant]' operands. For example, the offset `127' in 7469 `move.d [r3+127],r4' fits in an instruction using a signed-byte offset. 7470 Similarly, `move.d [r2+32767],r1' will generate an instruction using a 7471 16-bit offset. For symbolic expressions and constants that do not fit 7472 in 16 bits including the sign bit, a 32-bit offset is generated. 7473 7474 For branches, `as' will expand from a 16-bit branch instruction into 7475 a sequence of instructions that can reach a full 32-bit address. Since 7476 this does not correspond to a single instruction, such expansions can 7477 optionally be warned about. *Note CRIS-Opts::. 7478 7479 If the operand is found to fit the range, a `lapc' mnemonic will 7480 translate to a `lapcq' instruction. Use `lapc.d' to force the 32-bit 7481 `lapc' instruction. 7482 7483 Similarly, the `addo' mnemonic will translate to the shortest 7484 fitting instruction of `addoq', `addo.w' and `addo.d', when used with a 7485 operand that is a constant known at assembly time. 7486 7487 7488 File: as.info, Node: CRIS-Symbols, Next: CRIS-Syntax, Prev: CRIS-Expand, Up: CRIS-Dependent 7489 7490 9.7.3 Symbols 7491 ------------- 7492 7493 Some symbols are defined by the assembler. They're intended to be used 7494 in conditional assembly, for example: 7495 .if ..asm.arch.cris.v32 7496 CODE FOR CRIS V32 7497 .elseif ..asm.arch.cris.common_v10_v32 7498 CODE COMMON TO CRIS V32 AND CRIS V10 7499 .elseif ..asm.arch.cris.v10 | ..asm.arch.cris.any_v0_v10 7500 CODE FOR V10 7501 .else 7502 .error "Code needs to be added here." 7503 .endif 7504 7505 These symbols are defined in the assembler, reflecting command-line 7506 options, either when specified or the default. They are always 7507 defined, to 0 or 1. 7508 `..asm.arch.cris.any_v0_v10' 7509 This symbol is non-zero when `--march=v0_v10' is specified or the 7510 default. 7511 7512 `..asm.arch.cris.common_v10_v32' 7513 Set according to the option `--march=common_v10_v32'. 7514 7515 `..asm.arch.cris.v10' 7516 Reflects the option `--march=v10'. 7517 7518 `..asm.arch.cris.v32' 7519 Corresponds to `--march=v10'. 7520 7521 Speaking of symbols, when a symbol is used in code, it can have a 7522 suffix modifying its value for use in position-independent code. *Note 7523 CRIS-Pic::. 7524 7525 7526 File: as.info, Node: CRIS-Syntax, Prev: CRIS-Symbols, Up: CRIS-Dependent 7527 7528 9.7.4 Syntax 7529 ------------ 7530 7531 There are different aspects of the CRIS assembly syntax. 7532 7533 * Menu: 7534 7535 * CRIS-Chars:: Special Characters 7536 * CRIS-Pic:: Position-Independent Code Symbols 7537 * CRIS-Regs:: Register Names 7538 * CRIS-Pseudos:: Assembler Directives 7539 7540 7541 File: as.info, Node: CRIS-Chars, Next: CRIS-Pic, Up: CRIS-Syntax 7542 7543 9.7.4.1 Special Characters 7544 .......................... 7545 7546 The character `#' is a line comment character. It starts a comment if 7547 and only if it is placed at the beginning of a line. 7548 7549 A `;' character starts a comment anywhere on the line, causing all 7550 characters up to the end of the line to be ignored. 7551 7552 A `@' character is handled as a line separator equivalent to a 7553 logical new-line character (except in a comment), so separate 7554 instructions can be specified on a single line. 7555 7556 7557 File: as.info, Node: CRIS-Pic, Next: CRIS-Regs, Prev: CRIS-Chars, Up: CRIS-Syntax 7558 7559 9.7.4.2 Symbols in position-independent code 7560 ............................................ 7561 7562 When generating position-independent code (SVR4 PIC) for use in 7563 cris-axis-linux-gnu or crisv32-axis-linux-gnu shared libraries, symbol 7564 suffixes are used to specify what kind of run-time symbol lookup will 7565 be used, expressed in the object as different _relocation types_. 7566 Usually, all absolute symbol values must be located in a table, the 7567 _global offset table_, leaving the code position-independent; 7568 independent of values of global symbols and independent of the address 7569 of the code. The suffix modifies the value of the symbol, into for 7570 example an index into the global offset table where the real symbol 7571 value is entered, or a PC-relative value, or a value relative to the 7572 start of the global offset table. All symbol suffixes start with the 7573 character `:' (omitted in the list below). Every symbol use in code or 7574 a read-only section must therefore have a PIC suffix to enable a useful 7575 shared library to be created. Usually, these constructs must not be 7576 used with an additive constant offset as is usually allowed, i.e. no 4 7577 as in `symbol + 4' is allowed. This restriction is checked at 7578 link-time, not at assembly-time. 7579 7580 `GOT' 7581 Attaching this suffix to a symbol in an instruction causes the 7582 symbol to be entered into the global offset table. The value is a 7583 32-bit index for that symbol into the global offset table. The 7584 name of the corresponding relocation is `R_CRIS_32_GOT'. Example: 7585 `move.d [$r0+extsym:GOT],$r9' 7586 7587 `GOT16' 7588 Same as for `GOT', but the value is a 16-bit index into the global 7589 offset table. The corresponding relocation is `R_CRIS_16_GOT'. 7590 Example: `move.d [$r0+asymbol:GOT16],$r10' 7591 7592 `PLT' 7593 This suffix is used for function symbols. It causes a _procedure 7594 linkage table_, an array of code stubs, to be created at the time 7595 the shared object is created or linked against, together with a 7596 global offset table entry. The value is a pc-relative offset to 7597 the corresponding stub code in the procedure linkage table. This 7598 arrangement causes the run-time symbol resolver to be called to 7599 look up and set the value of the symbol the first time the 7600 function is called (at latest; depending environment variables). 7601 It is only safe to leave the symbol unresolved this way if all 7602 references are function calls. The name of the relocation is 7603 `R_CRIS_32_PLT_PCREL'. Example: `add.d fnname:PLT,$pc' 7604 7605 `PLTG' 7606 Like PLT, but the value is relative to the beginning of the global 7607 offset table. The relocation is `R_CRIS_32_PLT_GOTREL'. Example: 7608 `move.d fnname:PLTG,$r3' 7609 7610 `GOTPLT' 7611 Similar to `PLT', but the value of the symbol is a 32-bit index 7612 into the global offset table. This is somewhat of a mix between 7613 the effect of the `GOT' and the `PLT' suffix; the difference to 7614 `GOT' is that there will be a procedure linkage table entry 7615 created, and that the symbol is assumed to be a function entry and 7616 will be resolved by the run-time resolver as with `PLT'. The 7617 relocation is `R_CRIS_32_GOTPLT'. Example: `jsr 7618 [$r0+fnname:GOTPLT]' 7619 7620 `GOTPLT16' 7621 A variant of `GOTPLT' giving a 16-bit value. Its relocation name 7622 is `R_CRIS_16_GOTPLT'. Example: `jsr [$r0+fnname:GOTPLT16]' 7623 7624 `GOTOFF' 7625 This suffix must only be attached to a local symbol, but may be 7626 used in an expression adding an offset. The value is the address 7627 of the symbol relative to the start of the global offset table. 7628 The relocation name is `R_CRIS_32_GOTREL'. Example: `move.d 7629 [$r0+localsym:GOTOFF],r3' 7630 7631 7632 File: as.info, Node: CRIS-Regs, Next: CRIS-Pseudos, Prev: CRIS-Pic, Up: CRIS-Syntax 7633 7634 9.7.4.3 Register names 7635 ...................... 7636 7637 A `$' character may always prefix a general or special register name in 7638 an instruction operand but is mandatory when the option 7639 `--no-underscore' is specified or when the `.syntax register_prefix' 7640 directive is in effect (*note crisnous::). Register names are 7641 case-insensitive. 7642 7643 7644 File: as.info, Node: CRIS-Pseudos, Prev: CRIS-Regs, Up: CRIS-Syntax 7645 7646 9.7.4.4 Assembler Directives 7647 ............................ 7648 7649 There are a few CRIS-specific pseudo-directives in addition to the 7650 generic ones. *Note Pseudo Ops::. Constants emitted by 7651 pseudo-directives are in little-endian order for CRIS. There is no 7652 support for floating-point-specific directives for CRIS. 7653 7654 `.dword EXPRESSIONS' 7655 The `.dword' directive is a synonym for `.int', expecting zero or 7656 more EXPRESSIONS, separated by commas. For each expression, a 7657 32-bit little-endian constant is emitted. 7658 7659 `.syntax ARGUMENT' 7660 The `.syntax' directive takes as ARGUMENT one of the following 7661 case-sensitive choices. 7662 7663 `no_register_prefix' 7664 The `.syntax no_register_prefix' directive makes a `$' 7665 character prefix on all registers optional. It overrides a 7666 previous setting, including the corresponding effect of the 7667 option `--no-underscore'. If this directive is used when 7668 ordinary symbols do not have a `_' character prefix, care 7669 must be taken to avoid ambiguities whether an operand is a 7670 register or a symbol; using symbols with names the same as 7671 general or special registers then invoke undefined behavior. 7672 7673 `register_prefix' 7674 This directive makes a `$' character prefix on all registers 7675 mandatory. It overrides a previous setting, including the 7676 corresponding effect of the option `--underscore'. 7677 7678 `leading_underscore' 7679 This is an assertion directive, emitting an error if the 7680 `--no-underscore' option is in effect. 7681 7682 `no_leading_underscore' 7683 This is the opposite of the `.syntax leading_underscore' 7684 directive and emits an error if the option `--underscore' is 7685 in effect. 7686 7687 `.arch ARGUMENT' 7688 This is an assertion directive, giving an error if the specified 7689 ARGUMENT is not the same as the specified or default value for the 7690 `--march=ARCHITECTURE' option (*note march-option::). 7691 7692 7693 7694 File: as.info, Node: D10V-Dependent, Next: D30V-Dependent, Prev: CRIS-Dependent, Up: Machine Dependencies 7695 7696 9.8 D10V Dependent Features 7697 =========================== 7698 7699 * Menu: 7700 7701 * D10V-Opts:: D10V Options 7702 * D10V-Syntax:: Syntax 7703 * D10V-Float:: Floating Point 7704 * D10V-Opcodes:: Opcodes 7705 7706 7707 File: as.info, Node: D10V-Opts, Next: D10V-Syntax, Up: D10V-Dependent 7708 7709 9.8.1 D10V Options 7710 ------------------ 7711 7712 The Mitsubishi D10V version of `as' has a few machine dependent options. 7713 7714 `-O' 7715 The D10V can often execute two sub-instructions in parallel. When 7716 this option is used, `as' will attempt to optimize its output by 7717 detecting when instructions can be executed in parallel. 7718 7719 `--nowarnswap' 7720 To optimize execution performance, `as' will sometimes swap the 7721 order of instructions. Normally this generates a warning. When 7722 this option is used, no warning will be generated when 7723 instructions are swapped. 7724 7725 `--gstabs-packing' 7726 7727 `--no-gstabs-packing' 7728 `as' packs adjacent short instructions into a single packed 7729 instruction. `--no-gstabs-packing' turns instruction packing off if 7730 `--gstabs' is specified as well; `--gstabs-packing' (the default) 7731 turns instruction packing on even when `--gstabs' is specified. 7732 7733 7734 File: as.info, Node: D10V-Syntax, Next: D10V-Float, Prev: D10V-Opts, Up: D10V-Dependent 7735 7736 9.8.2 Syntax 7737 ------------ 7738 7739 The D10V syntax is based on the syntax in Mitsubishi's D10V 7740 architecture manual. The differences are detailed below. 7741 7742 * Menu: 7743 7744 * D10V-Size:: Size Modifiers 7745 * D10V-Subs:: Sub-Instructions 7746 * D10V-Chars:: Special Characters 7747 * D10V-Regs:: Register Names 7748 * D10V-Addressing:: Addressing Modes 7749 * D10V-Word:: @WORD Modifier 7750 7751 7752 File: as.info, Node: D10V-Size, Next: D10V-Subs, Up: D10V-Syntax 7753 7754 9.8.2.1 Size Modifiers 7755 ...................... 7756 7757 The D10V version of `as' uses the instruction names in the D10V 7758 Architecture Manual. However, the names in the manual are sometimes 7759 ambiguous. There are instruction names that can assemble to a short or 7760 long form opcode. How does the assembler pick the correct form? `as' 7761 will always pick the smallest form if it can. When dealing with a 7762 symbol that is not defined yet when a line is being assembled, it will 7763 always use the long form. If you need to force the assembler to use 7764 either the short or long form of the instruction, you can append either 7765 `.s' (short) or `.l' (long) to it. For example, if you are writing an 7766 assembly program and you want to do a branch to a symbol that is 7767 defined later in your program, you can write `bra.s foo'. Objdump 7768 and GDB will always append `.s' or `.l' to instructions which have both 7769 short and long forms. 7770 7771 7772 File: as.info, Node: D10V-Subs, Next: D10V-Chars, Prev: D10V-Size, Up: D10V-Syntax 7773 7774 9.8.2.2 Sub-Instructions 7775 ........................ 7776 7777 The D10V assembler takes as input a series of instructions, either 7778 one-per-line, or in the special two-per-line format described in the 7779 next section. Some of these instructions will be short-form or 7780 sub-instructions. These sub-instructions can be packed into a single 7781 instruction. The assembler will do this automatically. It will also 7782 detect when it should not pack instructions. For example, when a label 7783 is defined, the next instruction will never be packaged with the 7784 previous one. Whenever a branch and link instruction is called, it 7785 will not be packaged with the next instruction so the return address 7786 will be valid. Nops are automatically inserted when necessary. 7787 7788 If you do not want the assembler automatically making these 7789 decisions, you can control the packaging and execution type (parallel 7790 or sequential) with the special execution symbols described in the next 7791 section. 7792 7793 7794 File: as.info, Node: D10V-Chars, Next: D10V-Regs, Prev: D10V-Subs, Up: D10V-Syntax 7795 7796 9.8.2.3 Special Characters 7797 .......................... 7798 7799 `;' and `#' are the line comment characters. Sub-instructions may be 7800 executed in order, in reverse-order, or in parallel. Instructions 7801 listed in the standard one-per-line format will be executed 7802 sequentially. To specify the executing order, use the following 7803 symbols: 7804 `->' 7805 Sequential with instruction on the left first. 7806 7807 `<-' 7808 Sequential with instruction on the right first. 7809 7810 `||' 7811 Parallel 7812 The D10V syntax allows either one instruction per line, one 7813 instruction per line with the execution symbol, or two instructions per 7814 line. For example 7815 `abs a1 -> abs r0' 7816 Execute these sequentially. The instruction on the right is in 7817 the right container and is executed second. 7818 7819 `abs r0 <- abs a1' 7820 Execute these reverse-sequentially. The instruction on the right 7821 is in the right container, and is executed first. 7822 7823 `ld2w r2,@r8+ || mac a0,r0,r7' 7824 Execute these in parallel. 7825 7826 `ld2w r2,@r8+ ||' 7827 `mac a0,r0,r7' 7828 Two-line format. Execute these in parallel. 7829 7830 `ld2w r2,@r8+' 7831 `mac a0,r0,r7' 7832 Two-line format. Execute these sequentially. Assembler will put 7833 them in the proper containers. 7834 7835 `ld2w r2,@r8+ ->' 7836 `mac a0,r0,r7' 7837 Two-line format. Execute these sequentially. Same as above but 7838 second instruction will always go into right container. 7839 Since `$' has no special meaning, you may use it in symbol names. 7840 7841 7842 File: as.info, Node: D10V-Regs, Next: D10V-Addressing, Prev: D10V-Chars, Up: D10V-Syntax 7843 7844 9.8.2.4 Register Names 7845 ...................... 7846 7847 You can use the predefined symbols `r0' through `r15' to refer to the 7848 D10V registers. You can also use `sp' as an alias for `r15'. The 7849 accumulators are `a0' and `a1'. There are special register-pair names 7850 that may optionally be used in opcodes that require even-numbered 7851 registers. Register names are not case sensitive. 7852 7853 Register Pairs 7854 `r0-r1' 7855 7856 `r2-r3' 7857 7858 `r4-r5' 7859 7860 `r6-r7' 7861 7862 `r8-r9' 7863 7864 `r10-r11' 7865 7866 `r12-r13' 7867 7868 `r14-r15' 7869 7870 The D10V also has predefined symbols for these control registers and 7871 status bits: 7872 `psw' 7873 Processor Status Word 7874 7875 `bpsw' 7876 Backup Processor Status Word 7877 7878 `pc' 7879 Program Counter 7880 7881 `bpc' 7882 Backup Program Counter 7883 7884 `rpt_c' 7885 Repeat Count 7886 7887 `rpt_s' 7888 Repeat Start address 7889 7890 `rpt_e' 7891 Repeat End address 7892 7893 `mod_s' 7894 Modulo Start address 7895 7896 `mod_e' 7897 Modulo End address 7898 7899 `iba' 7900 Instruction Break Address 7901 7902 `f0' 7903 Flag 0 7904 7905 `f1' 7906 Flag 1 7907 7908 `c' 7909 Carry flag 7910 7911 7912 File: as.info, Node: D10V-Addressing, Next: D10V-Word, Prev: D10V-Regs, Up: D10V-Syntax 7913 7914 9.8.2.5 Addressing Modes 7915 ........................ 7916 7917 `as' understands the following addressing modes for the D10V. `RN' in 7918 the following refers to any of the numbered registers, but _not_ the 7919 control registers. 7920 `RN' 7921 Register direct 7922 7923 `@RN' 7924 Register indirect 7925 7926 `@RN+' 7927 Register indirect with post-increment 7928 7929 `@RN-' 7930 Register indirect with post-decrement 7931 7932 `@-SP' 7933 Register indirect with pre-decrement 7934 7935 `@(DISP, RN)' 7936 Register indirect with displacement 7937 7938 `ADDR' 7939 PC relative address (for branch or rep). 7940 7941 `#IMM' 7942 Immediate data (the `#' is optional and ignored) 7943 7944 7945 File: as.info, Node: D10V-Word, Prev: D10V-Addressing, Up: D10V-Syntax 7946 7947 9.8.2.6 @WORD Modifier 7948 ...................... 7949 7950 Any symbol followed by `@word' will be replaced by the symbol's value 7951 shifted right by 2. This is used in situations such as loading a 7952 register with the address of a function (or any other code fragment). 7953 For example, if you want to load a register with the location of the 7954 function `main' then jump to that function, you could do it as follows: 7955 ldi r2, main@word 7956 jmp r2 7957 7958 7959 File: as.info, Node: D10V-Float, Next: D10V-Opcodes, Prev: D10V-Syntax, Up: D10V-Dependent 7960 7961 9.8.3 Floating Point 7962 -------------------- 7963 7964 The D10V has no hardware floating point, but the `.float' and `.double' 7965 directives generates IEEE floating-point numbers for compatibility with 7966 other development tools. 7967 7968 7969 File: as.info, Node: D10V-Opcodes, Prev: D10V-Float, Up: D10V-Dependent 7970 7971 9.8.4 Opcodes 7972 ------------- 7973 7974 For detailed information on the D10V machine instruction set, see `D10V 7975 Architecture: A VLIW Microprocessor for Multimedia Applications' 7976 (Mitsubishi Electric Corp.). `as' implements all the standard D10V 7977 opcodes. The only changes are those described in the section on size 7978 modifiers 7979 7980 7981 File: as.info, Node: D30V-Dependent, Next: H8/300-Dependent, Prev: D10V-Dependent, Up: Machine Dependencies 7982 7983 9.9 D30V Dependent Features 7984 =========================== 7985 7986 * Menu: 7987 7988 * D30V-Opts:: D30V Options 7989 * D30V-Syntax:: Syntax 7990 * D30V-Float:: Floating Point 7991 * D30V-Opcodes:: Opcodes 7992 7993 7994 File: as.info, Node: D30V-Opts, Next: D30V-Syntax, Up: D30V-Dependent 7995 7996 9.9.1 D30V Options 7997 ------------------ 7998 7999 The Mitsubishi D30V version of `as' has a few machine dependent options. 8000 8001 `-O' 8002 The D30V can often execute two sub-instructions in parallel. When 8003 this option is used, `as' will attempt to optimize its output by 8004 detecting when instructions can be executed in parallel. 8005 8006 `-n' 8007 When this option is used, `as' will issue a warning every time it 8008 adds a nop instruction. 8009 8010 `-N' 8011 When this option is used, `as' will issue a warning if it needs to 8012 insert a nop after a 32-bit multiply before a load or 16-bit 8013 multiply instruction. 8014 8015 8016 File: as.info, Node: D30V-Syntax, Next: D30V-Float, Prev: D30V-Opts, Up: D30V-Dependent 8017 8018 9.9.2 Syntax 8019 ------------ 8020 8021 The D30V syntax is based on the syntax in Mitsubishi's D30V 8022 architecture manual. The differences are detailed below. 8023 8024 * Menu: 8025 8026 * D30V-Size:: Size Modifiers 8027 * D30V-Subs:: Sub-Instructions 8028 * D30V-Chars:: Special Characters 8029 * D30V-Guarded:: Guarded Execution 8030 * D30V-Regs:: Register Names 8031 * D30V-Addressing:: Addressing Modes 8032 8033 8034 File: as.info, Node: D30V-Size, Next: D30V-Subs, Up: D30V-Syntax 8035 8036 9.9.2.1 Size Modifiers 8037 ...................... 8038 8039 The D30V version of `as' uses the instruction names in the D30V 8040 Architecture Manual. However, the names in the manual are sometimes 8041 ambiguous. There are instruction names that can assemble to a short or 8042 long form opcode. How does the assembler pick the correct form? `as' 8043 will always pick the smallest form if it can. When dealing with a 8044 symbol that is not defined yet when a line is being assembled, it will 8045 always use the long form. If you need to force the assembler to use 8046 either the short or long form of the instruction, you can append either 8047 `.s' (short) or `.l' (long) to it. For example, if you are writing an 8048 assembly program and you want to do a branch to a symbol that is 8049 defined later in your program, you can write `bra.s foo'. Objdump and 8050 GDB will always append `.s' or `.l' to instructions which have both 8051 short and long forms. 8052 8053 8054 File: as.info, Node: D30V-Subs, Next: D30V-Chars, Prev: D30V-Size, Up: D30V-Syntax 8055 8056 9.9.2.2 Sub-Instructions 8057 ........................ 8058 8059 The D30V assembler takes as input a series of instructions, either 8060 one-per-line, or in the special two-per-line format described in the 8061 next section. Some of these instructions will be short-form or 8062 sub-instructions. These sub-instructions can be packed into a single 8063 instruction. The assembler will do this automatically. It will also 8064 detect when it should not pack instructions. For example, when a label 8065 is defined, the next instruction will never be packaged with the 8066 previous one. Whenever a branch and link instruction is called, it 8067 will not be packaged with the next instruction so the return address 8068 will be valid. Nops are automatically inserted when necessary. 8069 8070 If you do not want the assembler automatically making these 8071 decisions, you can control the packaging and execution type (parallel 8072 or sequential) with the special execution symbols described in the next 8073 section. 8074 8075 8076 File: as.info, Node: D30V-Chars, Next: D30V-Guarded, Prev: D30V-Subs, Up: D30V-Syntax 8077 8078 9.9.2.3 Special Characters 8079 .......................... 8080 8081 `;' and `#' are the line comment characters. Sub-instructions may be 8082 executed in order, in reverse-order, or in parallel. Instructions 8083 listed in the standard one-per-line format will be executed 8084 sequentially unless you use the `-O' option. 8085 8086 To specify the executing order, use the following symbols: 8087 `->' 8088 Sequential with instruction on the left first. 8089 8090 `<-' 8091 Sequential with instruction on the right first. 8092 8093 `||' 8094 Parallel 8095 8096 The D30V syntax allows either one instruction per line, one 8097 instruction per line with the execution symbol, or two instructions per 8098 line. For example 8099 `abs r2,r3 -> abs r4,r5' 8100 Execute these sequentially. The instruction on the right is in 8101 the right container and is executed second. 8102 8103 `abs r2,r3 <- abs r4,r5' 8104 Execute these reverse-sequentially. The instruction on the right 8105 is in the right container, and is executed first. 8106 8107 `abs r2,r3 || abs r4,r5' 8108 Execute these in parallel. 8109 8110 `ldw r2,@(r3,r4) ||' 8111 `mulx r6,r8,r9' 8112 Two-line format. Execute these in parallel. 8113 8114 `mulx a0,r8,r9' 8115 `stw r2,@(r3,r4)' 8116 Two-line format. Execute these sequentially unless `-O' option is 8117 used. If the `-O' option is used, the assembler will determine if 8118 the instructions could be done in parallel (the above two 8119 instructions can be done in parallel), and if so, emit them as 8120 parallel instructions. The assembler will put them in the proper 8121 containers. In the above example, the assembler will put the 8122 `stw' instruction in left container and the `mulx' instruction in 8123 the right container. 8124 8125 `stw r2,@(r3,r4) ->' 8126 `mulx a0,r8,r9' 8127 Two-line format. Execute the `stw' instruction followed by the 8128 `mulx' instruction sequentially. The first instruction goes in the 8129 left container and the second instruction goes into right 8130 container. The assembler will give an error if the machine 8131 ordering constraints are violated. 8132 8133 `stw r2,@(r3,r4) <-' 8134 `mulx a0,r8,r9' 8135 Same as previous example, except that the `mulx' instruction is 8136 executed before the `stw' instruction. 8137 8138 Since `$' has no special meaning, you may use it in symbol names. 8139 8140 8141 File: as.info, Node: D30V-Guarded, Next: D30V-Regs, Prev: D30V-Chars, Up: D30V-Syntax 8142 8143 9.9.2.4 Guarded Execution 8144 ......................... 8145 8146 `as' supports the full range of guarded execution directives for each 8147 instruction. Just append the directive after the instruction proper. 8148 The directives are: 8149 8150 `/tx' 8151 Execute the instruction if flag f0 is true. 8152 8153 `/fx' 8154 Execute the instruction if flag f0 is false. 8155 8156 `/xt' 8157 Execute the instruction if flag f1 is true. 8158 8159 `/xf' 8160 Execute the instruction if flag f1 is false. 8161 8162 `/tt' 8163 Execute the instruction if both flags f0 and f1 are true. 8164 8165 `/tf' 8166 Execute the instruction if flag f0 is true and flag f1 is false. 8167 8168 8169 File: as.info, Node: D30V-Regs, Next: D30V-Addressing, Prev: D30V-Guarded, Up: D30V-Syntax 8170 8171 9.9.2.5 Register Names 8172 ...................... 8173 8174 You can use the predefined symbols `r0' through `r63' to refer to the 8175 D30V registers. You can also use `sp' as an alias for `r63' and `link' 8176 as an alias for `r62'. The accumulators are `a0' and `a1'. 8177 8178 The D30V also has predefined symbols for these control registers and 8179 status bits: 8180 `psw' 8181 Processor Status Word 8182 8183 `bpsw' 8184 Backup Processor Status Word 8185 8186 `pc' 8187 Program Counter 8188 8189 `bpc' 8190 Backup Program Counter 8191 8192 `rpt_c' 8193 Repeat Count 8194 8195 `rpt_s' 8196 Repeat Start address 8197 8198 `rpt_e' 8199 Repeat End address 8200 8201 `mod_s' 8202 Modulo Start address 8203 8204 `mod_e' 8205 Modulo End address 8206 8207 `iba' 8208 Instruction Break Address 8209 8210 `f0' 8211 Flag 0 8212 8213 `f1' 8214 Flag 1 8215 8216 `f2' 8217 Flag 2 8218 8219 `f3' 8220 Flag 3 8221 8222 `f4' 8223 Flag 4 8224 8225 `f5' 8226 Flag 5 8227 8228 `f6' 8229 Flag 6 8230 8231 `f7' 8232 Flag 7 8233 8234 `s' 8235 Same as flag 4 (saturation flag) 8236 8237 `v' 8238 Same as flag 5 (overflow flag) 8239 8240 `va' 8241 Same as flag 6 (sticky overflow flag) 8242 8243 `c' 8244 Same as flag 7 (carry/borrow flag) 8245 8246 `b' 8247 Same as flag 7 (carry/borrow flag) 8248 8249 8250 File: as.info, Node: D30V-Addressing, Prev: D30V-Regs, Up: D30V-Syntax 8251 8252 9.9.2.6 Addressing Modes 8253 ........................ 8254 8255 `as' understands the following addressing modes for the D30V. `RN' in 8256 the following refers to any of the numbered registers, but _not_ the 8257 control registers. 8258 `RN' 8259 Register direct 8260 8261 `@RN' 8262 Register indirect 8263 8264 `@RN+' 8265 Register indirect with post-increment 8266 8267 `@RN-' 8268 Register indirect with post-decrement 8269 8270 `@-SP' 8271 Register indirect with pre-decrement 8272 8273 `@(DISP, RN)' 8274 Register indirect with displacement 8275 8276 `ADDR' 8277 PC relative address (for branch or rep). 8278 8279 `#IMM' 8280 Immediate data (the `#' is optional and ignored) 8281 8282 8283 File: as.info, Node: D30V-Float, Next: D30V-Opcodes, Prev: D30V-Syntax, Up: D30V-Dependent 8284 8285 9.9.3 Floating Point 8286 -------------------- 8287 8288 The D30V has no hardware floating point, but the `.float' and `.double' 8289 directives generates IEEE floating-point numbers for compatibility with 8290 other development tools. 8291 8292 8293 File: as.info, Node: D30V-Opcodes, Prev: D30V-Float, Up: D30V-Dependent 8294 8295 9.9.4 Opcodes 8296 ------------- 8297 8298 For detailed information on the D30V machine instruction set, see `D30V 8299 Architecture: A VLIW Microprocessor for Multimedia Applications' 8300 (Mitsubishi Electric Corp.). `as' implements all the standard D30V 8301 opcodes. The only changes are those described in the section on size 8302 modifiers 8303 8304 8305 File: as.info, Node: H8/300-Dependent, Next: HPPA-Dependent, Prev: D30V-Dependent, Up: Machine Dependencies 8306 8307 9.10 H8/300 Dependent Features 8308 ============================== 8309 8310 * Menu: 8311 8312 * H8/300 Options:: Options 8313 * H8/300 Syntax:: Syntax 8314 * H8/300 Floating Point:: Floating Point 8315 * H8/300 Directives:: H8/300 Machine Directives 8316 * H8/300 Opcodes:: Opcodes 8317 8318 8319 File: as.info, Node: H8/300 Options, Next: H8/300 Syntax, Up: H8/300-Dependent 8320 8321 9.10.1 Options 8322 -------------- 8323 8324 The Renesas H8/300 version of `as' has one machine-dependent option: 8325 8326 `-h-tick-hex' 8327 Support H'00 style hex constants in addition to 0x00 style. 8328 8329 8330 8331 File: as.info, Node: H8/300 Syntax, Next: H8/300 Floating Point, Prev: H8/300 Options, Up: H8/300-Dependent 8332 8333 9.10.2 Syntax 8334 ------------- 8335 8336 * Menu: 8337 8338 * H8/300-Chars:: Special Characters 8339 * H8/300-Regs:: Register Names 8340 * H8/300-Addressing:: Addressing Modes 8341 8342 8343 File: as.info, Node: H8/300-Chars, Next: H8/300-Regs, Up: H8/300 Syntax 8344 8345 9.10.2.1 Special Characters 8346 ........................... 8347 8348 `;' is the line comment character. 8349 8350 `$' can be used instead of a newline to separate statements. 8351 Therefore _you may not use `$' in symbol names_ on the H8/300. 8352 8353 8354 File: as.info, Node: H8/300-Regs, Next: H8/300-Addressing, Prev: H8/300-Chars, Up: H8/300 Syntax 8355 8356 9.10.2.2 Register Names 8357 ....................... 8358 8359 You can use predefined symbols of the form `rNh' and `rNl' to refer to 8360 the H8/300 registers as sixteen 8-bit general-purpose registers. N is 8361 a digit from `0' to `7'); for instance, both `r0h' and `r7l' are valid 8362 register names. 8363 8364 You can also use the eight predefined symbols `rN' to refer to the 8365 H8/300 registers as 16-bit registers (you must use this form for 8366 addressing). 8367 8368 On the H8/300H, you can also use the eight predefined symbols `erN' 8369 (`er0' ... `er7') to refer to the 32-bit general purpose registers. 8370 8371 The two control registers are called `pc' (program counter; a 16-bit 8372 register, except on the H8/300H where it is 24 bits) and `ccr' 8373 (condition code register; an 8-bit register). `r7' is used as the 8374 stack pointer, and can also be called `sp'. 8375 8376 8377 File: as.info, Node: H8/300-Addressing, Prev: H8/300-Regs, Up: H8/300 Syntax 8378 8379 9.10.2.3 Addressing Modes 8380 ......................... 8381 8382 as understands the following addressing modes for the H8/300: 8383 `rN' 8384 Register direct 8385 8386 `@rN' 8387 Register indirect 8388 8389 `@(D, rN)' 8390 `@(D:16, rN)' 8391 `@(D:24, rN)' 8392 Register indirect: 16-bit or 24-bit displacement D from register 8393 N. (24-bit displacements are only meaningful on the H8/300H.) 8394 8395 `@rN+' 8396 Register indirect with post-increment 8397 8398 `@-rN' 8399 Register indirect with pre-decrement 8400 8401 ``@'AA' 8402 ``@'AA:8' 8403 ``@'AA:16' 8404 ``@'AA:24' 8405 Absolute address `aa'. (The address size `:24' only makes sense 8406 on the H8/300H.) 8407 8408 `#XX' 8409 `#XX:8' 8410 `#XX:16' 8411 `#XX:32' 8412 Immediate data XX. You may specify the `:8', `:16', or `:32' for 8413 clarity, if you wish; but `as' neither requires this nor uses 8414 it--the data size required is taken from context. 8415 8416 ``@'`@'AA' 8417 ``@'`@'AA:8' 8418 Memory indirect. You may specify the `:8' for clarity, if you 8419 wish; but `as' neither requires this nor uses it. 8420 8421 8422 File: as.info, Node: H8/300 Floating Point, Next: H8/300 Directives, Prev: H8/300 Syntax, Up: H8/300-Dependent 8423 8424 9.10.3 Floating Point 8425 --------------------- 8426 8427 The H8/300 family has no hardware floating point, but the `.float' 8428 directive generates IEEE floating-point numbers for compatibility with 8429 other development tools. 8430 8431 8432 File: as.info, Node: H8/300 Directives, Next: H8/300 Opcodes, Prev: H8/300 Floating Point, Up: H8/300-Dependent 8433 8434 9.10.4 H8/300 Machine Directives 8435 -------------------------------- 8436 8437 `as' has the following machine-dependent directives for the H8/300: 8438 8439 `.h8300h' 8440 Recognize and emit additional instructions for the H8/300H 8441 variant, and also make `.int' emit 32-bit numbers rather than the 8442 usual (16-bit) for the H8/300 family. 8443 8444 `.h8300s' 8445 Recognize and emit additional instructions for the H8S variant, and 8446 also make `.int' emit 32-bit numbers rather than the usual (16-bit) 8447 for the H8/300 family. 8448 8449 `.h8300hn' 8450 Recognize and emit additional instructions for the H8/300H variant 8451 in normal mode, and also make `.int' emit 32-bit numbers rather 8452 than the usual (16-bit) for the H8/300 family. 8453 8454 `.h8300sn' 8455 Recognize and emit additional instructions for the H8S variant in 8456 normal mode, and also make `.int' emit 32-bit numbers rather than 8457 the usual (16-bit) for the H8/300 family. 8458 8459 On the H8/300 family (including the H8/300H) `.word' directives 8460 generate 16-bit numbers. 8461 8462 8463 File: as.info, Node: H8/300 Opcodes, Prev: H8/300 Directives, Up: H8/300-Dependent 8464 8465 9.10.5 Opcodes 8466 -------------- 8467 8468 For detailed information on the H8/300 machine instruction set, see 8469 `H8/300 Series Programming Manual'. For information specific to the 8470 H8/300H, see `H8/300H Series Programming Manual' (Renesas). 8471 8472 `as' implements all the standard H8/300 opcodes. No additional 8473 pseudo-instructions are needed on this family. 8474 8475 The following table summarizes the H8/300 opcodes, and their 8476 arguments. Entries marked `*' are opcodes used only on the H8/300H. 8477 8478 Legend: 8479 Rs source register 8480 Rd destination register 8481 abs absolute address 8482 imm immediate data 8483 disp:N N-bit displacement from a register 8484 pcrel:N N-bit displacement relative to program counter 8485 8486 add.b #imm,rd * andc #imm,ccr 8487 add.b rs,rd band #imm,rd 8488 add.w rs,rd band #imm,@rd 8489 * add.w #imm,rd band #imm,@abs:8 8490 * add.l rs,rd bra pcrel:8 8491 * add.l #imm,rd * bra pcrel:16 8492 adds #imm,rd bt pcrel:8 8493 addx #imm,rd * bt pcrel:16 8494 addx rs,rd brn pcrel:8 8495 and.b #imm,rd * brn pcrel:16 8496 and.b rs,rd bf pcrel:8 8497 * and.w rs,rd * bf pcrel:16 8498 * and.w #imm,rd bhi pcrel:8 8499 * and.l #imm,rd * bhi pcrel:16 8500 * and.l rs,rd bls pcrel:8 8501 8502 * bls pcrel:16 bld #imm,rd 8503 bcc pcrel:8 bld #imm,@rd 8504 * bcc pcrel:16 bld #imm,@abs:8 8505 bhs pcrel:8 bnot #imm,rd 8506 * bhs pcrel:16 bnot #imm,@rd 8507 bcs pcrel:8 bnot #imm,@abs:8 8508 * bcs pcrel:16 bnot rs,rd 8509 blo pcrel:8 bnot rs,@rd 8510 * blo pcrel:16 bnot rs,@abs:8 8511 bne pcrel:8 bor #imm,rd 8512 * bne pcrel:16 bor #imm,@rd 8513 beq pcrel:8 bor #imm,@abs:8 8514 * beq pcrel:16 bset #imm,rd 8515 bvc pcrel:8 bset #imm,@rd 8516 * bvc pcrel:16 bset #imm,@abs:8 8517 bvs pcrel:8 bset rs,rd 8518 * bvs pcrel:16 bset rs,@rd 8519 bpl pcrel:8 bset rs,@abs:8 8520 * bpl pcrel:16 bsr pcrel:8 8521 bmi pcrel:8 bsr pcrel:16 8522 * bmi pcrel:16 bst #imm,rd 8523 bge pcrel:8 bst #imm,@rd 8524 * bge pcrel:16 bst #imm,@abs:8 8525 blt pcrel:8 btst #imm,rd 8526 * blt pcrel:16 btst #imm,@rd 8527 bgt pcrel:8 btst #imm,@abs:8 8528 * bgt pcrel:16 btst rs,rd 8529 ble pcrel:8 btst rs,@rd 8530 * ble pcrel:16 btst rs,@abs:8 8531 bclr #imm,rd bxor #imm,rd 8532 bclr #imm,@rd bxor #imm,@rd 8533 bclr #imm,@abs:8 bxor #imm,@abs:8 8534 bclr rs,rd cmp.b #imm,rd 8535 bclr rs,@rd cmp.b rs,rd 8536 bclr rs,@abs:8 cmp.w rs,rd 8537 biand #imm,rd cmp.w rs,rd 8538 biand #imm,@rd * cmp.w #imm,rd 8539 biand #imm,@abs:8 * cmp.l #imm,rd 8540 bild #imm,rd * cmp.l rs,rd 8541 bild #imm,@rd daa rs 8542 bild #imm,@abs:8 das rs 8543 bior #imm,rd dec.b rs 8544 bior #imm,@rd * dec.w #imm,rd 8545 bior #imm,@abs:8 * dec.l #imm,rd 8546 bist #imm,rd divxu.b rs,rd 8547 bist #imm,@rd * divxu.w rs,rd 8548 bist #imm,@abs:8 * divxs.b rs,rd 8549 bixor #imm,rd * divxs.w rs,rd 8550 bixor #imm,@rd eepmov 8551 bixor #imm,@abs:8 * eepmovw 8552 8553 * exts.w rd mov.w rs,@abs:16 8554 * exts.l rd * mov.l #imm,rd 8555 * extu.w rd * mov.l rs,rd 8556 * extu.l rd * mov.l @rs,rd 8557 inc rs * mov.l @(disp:16,rs),rd 8558 * inc.w #imm,rd * mov.l @(disp:24,rs),rd 8559 * inc.l #imm,rd * mov.l @rs+,rd 8560 jmp @rs * mov.l @abs:16,rd 8561 jmp abs * mov.l @abs:24,rd 8562 jmp @@abs:8 * mov.l rs,@rd 8563 jsr @rs * mov.l rs,@(disp:16,rd) 8564 jsr abs * mov.l rs,@(disp:24,rd) 8565 jsr @@abs:8 * mov.l rs,@-rd 8566 ldc #imm,ccr * mov.l rs,@abs:16 8567 ldc rs,ccr * mov.l rs,@abs:24 8568 * ldc @abs:16,ccr movfpe @abs:16,rd 8569 * ldc @abs:24,ccr movtpe rs,@abs:16 8570 * ldc @(disp:16,rs),ccr mulxu.b rs,rd 8571 * ldc @(disp:24,rs),ccr * mulxu.w rs,rd 8572 * ldc @rs+,ccr * mulxs.b rs,rd 8573 * ldc @rs,ccr * mulxs.w rs,rd 8574 * mov.b @(disp:24,rs),rd neg.b rs 8575 * mov.b rs,@(disp:24,rd) * neg.w rs 8576 mov.b @abs:16,rd * neg.l rs 8577 mov.b rs,rd nop 8578 mov.b @abs:8,rd not.b rs 8579 mov.b rs,@abs:8 * not.w rs 8580 mov.b rs,rd * not.l rs 8581 mov.b #imm,rd or.b #imm,rd 8582 mov.b @rs,rd or.b rs,rd 8583 mov.b @(disp:16,rs),rd * or.w #imm,rd 8584 mov.b @rs+,rd * or.w rs,rd 8585 mov.b @abs:8,rd * or.l #imm,rd 8586 mov.b rs,@rd * or.l rs,rd 8587 mov.b rs,@(disp:16,rd) orc #imm,ccr 8588 mov.b rs,@-rd pop.w rs 8589 mov.b rs,@abs:8 * pop.l rs 8590 mov.w rs,@rd push.w rs 8591 * mov.w @(disp:24,rs),rd * push.l rs 8592 * mov.w rs,@(disp:24,rd) rotl.b rs 8593 * mov.w @abs:24,rd * rotl.w rs 8594 * mov.w rs,@abs:24 * rotl.l rs 8595 mov.w rs,rd rotr.b rs 8596 mov.w #imm,rd * rotr.w rs 8597 mov.w @rs,rd * rotr.l rs 8598 mov.w @(disp:16,rs),rd rotxl.b rs 8599 mov.w @rs+,rd * rotxl.w rs 8600 mov.w @abs:16,rd * rotxl.l rs 8601 mov.w rs,@(disp:16,rd) rotxr.b rs 8602 mov.w rs,@-rd * rotxr.w rs 8603 8604 * rotxr.l rs * stc ccr,@(disp:24,rd) 8605 bpt * stc ccr,@-rd 8606 rte * stc ccr,@abs:16 8607 rts * stc ccr,@abs:24 8608 shal.b rs sub.b rs,rd 8609 * shal.w rs sub.w rs,rd 8610 * shal.l rs * sub.w #imm,rd 8611 shar.b rs * sub.l rs,rd 8612 * shar.w rs * sub.l #imm,rd 8613 * shar.l rs subs #imm,rd 8614 shll.b rs subx #imm,rd 8615 * shll.w rs subx rs,rd 8616 * shll.l rs * trapa #imm 8617 shlr.b rs xor #imm,rd 8618 * shlr.w rs xor rs,rd 8619 * shlr.l rs * xor.w #imm,rd 8620 sleep * xor.w rs,rd 8621 stc ccr,rd * xor.l #imm,rd 8622 * stc ccr,@rs * xor.l rs,rd 8623 * stc ccr,@(disp:16,rd) xorc #imm,ccr 8624 8625 Four H8/300 instructions (`add', `cmp', `mov', `sub') are defined 8626 with variants using the suffixes `.b', `.w', and `.l' to specify the 8627 size of a memory operand. `as' supports these suffixes, but does not 8628 require them; since one of the operands is always a register, `as' can 8629 deduce the correct size. 8630 8631 For example, since `r0' refers to a 16-bit register, 8632 mov r0,@foo 8633 is equivalent to 8634 mov.w r0,@foo 8635 8636 If you use the size suffixes, `as' issues a warning when the suffix 8637 and the register size do not match. 8638 8639 8640 File: as.info, Node: HPPA-Dependent, Next: ESA/390-Dependent, Prev: H8/300-Dependent, Up: Machine Dependencies 8641 8642 9.11 HPPA Dependent Features 8643 ============================ 8644 8645 * Menu: 8646 8647 * HPPA Notes:: Notes 8648 * HPPA Options:: Options 8649 * HPPA Syntax:: Syntax 8650 * HPPA Floating Point:: Floating Point 8651 * HPPA Directives:: HPPA Machine Directives 8652 * HPPA Opcodes:: Opcodes 8653 8654 8655 File: as.info, Node: HPPA Notes, Next: HPPA Options, Up: HPPA-Dependent 8656 8657 9.11.1 Notes 8658 ------------ 8659 8660 As a back end for GNU CC `as' has been throughly tested and should work 8661 extremely well. We have tested it only minimally on hand written 8662 assembly code and no one has tested it much on the assembly output from 8663 the HP compilers. 8664 8665 The format of the debugging sections has changed since the original 8666 `as' port (version 1.3X) was released; therefore, you must rebuild all 8667 HPPA objects and libraries with the new assembler so that you can debug 8668 the final executable. 8669 8670 The HPPA `as' port generates a small subset of the relocations 8671 available in the SOM and ELF object file formats. Additional relocation 8672 support will be added as it becomes necessary. 8673 8674 8675 File: as.info, Node: HPPA Options, Next: HPPA Syntax, Prev: HPPA Notes, Up: HPPA-Dependent 8676 8677 9.11.2 Options 8678 -------------- 8679 8680 `as' has no machine-dependent command-line options for the HPPA. 8681 8682 8683 File: as.info, Node: HPPA Syntax, Next: HPPA Floating Point, Prev: HPPA Options, Up: HPPA-Dependent 8684 8685 9.11.3 Syntax 8686 ------------- 8687 8688 The assembler syntax closely follows the HPPA instruction set reference 8689 manual; assembler directives and general syntax closely follow the HPPA 8690 assembly language reference manual, with a few noteworthy differences. 8691 8692 First, a colon may immediately follow a label definition. This is 8693 simply for compatibility with how most assembly language programmers 8694 write code. 8695 8696 Some obscure expression parsing problems may affect hand written 8697 code which uses the `spop' instructions, or code which makes significant 8698 use of the `!' line separator. 8699 8700 `as' is much less forgiving about missing arguments and other 8701 similar oversights than the HP assembler. `as' notifies you of missing 8702 arguments as syntax errors; this is regarded as a feature, not a bug. 8703 8704 Finally, `as' allows you to use an external symbol without 8705 explicitly importing the symbol. _Warning:_ in the future this will be 8706 an error for HPPA targets. 8707 8708 Special characters for HPPA targets include: 8709 8710 `;' is the line comment character. 8711 8712 `!' can be used instead of a newline to separate statements. 8713 8714 Since `$' has no special meaning, you may use it in symbol names. 8715 8716 8717 File: as.info, Node: HPPA Floating Point, Next: HPPA Directives, Prev: HPPA Syntax, Up: HPPA-Dependent 8718 8719 9.11.4 Floating Point 8720 --------------------- 8721 8722 The HPPA family uses IEEE floating-point numbers. 8723 8724 8725 File: as.info, Node: HPPA Directives, Next: HPPA Opcodes, Prev: HPPA Floating Point, Up: HPPA-Dependent 8726 8727 9.11.5 HPPA Assembler Directives 8728 -------------------------------- 8729 8730 `as' for the HPPA supports many additional directives for compatibility 8731 with the native assembler. This section describes them only briefly. 8732 For detailed information on HPPA-specific assembler directives, see 8733 `HP9000 Series 800 Assembly Language Reference Manual' (HP 92432-90001). 8734 8735 `as' does _not_ support the following assembler directives described 8736 in the HP manual: 8737 8738 .endm .liston 8739 .enter .locct 8740 .leave .macro 8741 .listoff 8742 8743 Beyond those implemented for compatibility, `as' supports one 8744 additional assembler directive for the HPPA: `.param'. It conveys 8745 register argument locations for static functions. Its syntax closely 8746 follows the `.export' directive. 8747 8748 These are the additional directives in `as' for the HPPA: 8749 8750 `.block N' 8751 `.blockz N' 8752 Reserve N bytes of storage, and initialize them to zero. 8753 8754 `.call' 8755 Mark the beginning of a procedure call. Only the special case 8756 with _no arguments_ is allowed. 8757 8758 `.callinfo [ PARAM=VALUE, ... ] [ FLAG, ... ]' 8759 Specify a number of parameters and flags that define the 8760 environment for a procedure. 8761 8762 PARAM may be any of `frame' (frame size), `entry_gr' (end of 8763 general register range), `entry_fr' (end of float register range), 8764 `entry_sr' (end of space register range). 8765 8766 The values for FLAG are `calls' or `caller' (proc has 8767 subroutines), `no_calls' (proc does not call subroutines), 8768 `save_rp' (preserve return pointer), `save_sp' (proc preserves 8769 stack pointer), `no_unwind' (do not unwind this proc), `hpux_int' 8770 (proc is interrupt routine). 8771 8772 `.code' 8773 Assemble into the standard section called `$TEXT$', subsection 8774 `$CODE$'. 8775 8776 `.copyright "STRING"' 8777 In the SOM object format, insert STRING into the object code, 8778 marked as a copyright string. 8779 8780 `.copyright "STRING"' 8781 In the ELF object format, insert STRING into the object code, 8782 marked as a version string. 8783 8784 `.enter' 8785 Not yet supported; the assembler rejects programs containing this 8786 directive. 8787 8788 `.entry' 8789 Mark the beginning of a procedure. 8790 8791 `.exit' 8792 Mark the end of a procedure. 8793 8794 `.export NAME [ ,TYP ] [ ,PARAM=R ]' 8795 Make a procedure NAME available to callers. TYP, if present, must 8796 be one of `absolute', `code' (ELF only, not SOM), `data', `entry', 8797 `data', `entry', `millicode', `plabel', `pri_prog', or `sec_prog'. 8798 8799 PARAM, if present, provides either relocation information for the 8800 procedure arguments and result, or a privilege level. PARAM may be 8801 `argwN' (where N ranges from `0' to `3', and indicates one of four 8802 one-word arguments); `rtnval' (the procedure's result); or 8803 `priv_lev' (privilege level). For arguments or the result, R 8804 specifies how to relocate, and must be one of `no' (not 8805 relocatable), `gr' (argument is in general register), `fr' (in 8806 floating point register), or `fu' (upper half of float register). 8807 For `priv_lev', R is an integer. 8808 8809 `.half N' 8810 Define a two-byte integer constant N; synonym for the portable 8811 `as' directive `.short'. 8812 8813 `.import NAME [ ,TYP ]' 8814 Converse of `.export'; make a procedure available to call. The 8815 arguments use the same conventions as the first two arguments for 8816 `.export'. 8817 8818 `.label NAME' 8819 Define NAME as a label for the current assembly location. 8820 8821 `.leave' 8822 Not yet supported; the assembler rejects programs containing this 8823 directive. 8824 8825 `.origin LC' 8826 Advance location counter to LC. Synonym for the `as' portable 8827 directive `.org'. 8828 8829 `.param NAME [ ,TYP ] [ ,PARAM=R ]' 8830 Similar to `.export', but used for static procedures. 8831 8832 `.proc' 8833 Use preceding the first statement of a procedure. 8834 8835 `.procend' 8836 Use following the last statement of a procedure. 8837 8838 `LABEL .reg EXPR' 8839 Synonym for `.equ'; define LABEL with the absolute expression EXPR 8840 as its value. 8841 8842 `.space SECNAME [ ,PARAMS ]' 8843 Switch to section SECNAME, creating a new section by that name if 8844 necessary. You may only use PARAMS when creating a new section, 8845 not when switching to an existing one. SECNAME may identify a 8846 section by number rather than by name. 8847 8848 If specified, the list PARAMS declares attributes of the section, 8849 identified by keywords. The keywords recognized are `spnum=EXP' 8850 (identify this section by the number EXP, an absolute expression), 8851 `sort=EXP' (order sections according to this sort key when linking; 8852 EXP is an absolute expression), `unloadable' (section contains no 8853 loadable data), `notdefined' (this section defined elsewhere), and 8854 `private' (data in this section not available to other programs). 8855 8856 `.spnum SECNAM' 8857 Allocate four bytes of storage, and initialize them with the 8858 section number of the section named SECNAM. (You can define the 8859 section number with the HPPA `.space' directive.) 8860 8861 `.string "STR"' 8862 Copy the characters in the string STR to the object file. *Note 8863 Strings: Strings, for information on escape sequences you can use 8864 in `as' strings. 8865 8866 _Warning!_ The HPPA version of `.string' differs from the usual 8867 `as' definition: it does _not_ write a zero byte after copying STR. 8868 8869 `.stringz "STR"' 8870 Like `.string', but appends a zero byte after copying STR to object 8871 file. 8872 8873 `.subspa NAME [ ,PARAMS ]' 8874 `.nsubspa NAME [ ,PARAMS ]' 8875 Similar to `.space', but selects a subsection NAME within the 8876 current section. You may only specify PARAMS when you create a 8877 subsection (in the first instance of `.subspa' for this NAME). 8878 8879 If specified, the list PARAMS declares attributes of the 8880 subsection, identified by keywords. The keywords recognized are 8881 `quad=EXPR' ("quadrant" for this subsection), `align=EXPR' 8882 (alignment for beginning of this subsection; a power of two), 8883 `access=EXPR' (value for "access rights" field), `sort=EXPR' 8884 (sorting order for this subspace in link), `code_only' (subsection 8885 contains only code), `unloadable' (subsection cannot be loaded 8886 into memory), `comdat' (subsection is comdat), `common' 8887 (subsection is common block), `dup_comm' (subsection may have 8888 duplicate names), or `zero' (subsection is all zeros, do not write 8889 in object file). 8890 8891 `.nsubspa' always creates a new subspace with the given name, even 8892 if one with the same name already exists. 8893 8894 `comdat', `common' and `dup_comm' can be used to implement various 8895 flavors of one-only support when using the SOM linker. The SOM 8896 linker only supports specific combinations of these flags. The 8897 details are not documented. A brief description is provided here. 8898 8899 `comdat' provides a form of linkonce support. It is useful for 8900 both code and data subspaces. A `comdat' subspace has a key symbol 8901 marked by the `is_comdat' flag or `ST_COMDAT'. Only the first 8902 subspace for any given key is selected. The key symbol becomes 8903 universal in shared links. This is similar to the behavior of 8904 `secondary_def' symbols. 8905 8906 `common' provides Fortran named common support. It is only useful 8907 for data subspaces. Symbols with the flag `is_common' retain this 8908 flag in shared links. Referencing a `is_common' symbol in a shared 8909 library from outside the library doesn't work. Thus, `is_common' 8910 symbols must be output whenever they are needed. 8911 8912 `common' and `dup_comm' together provide Cobol common support. 8913 The subspaces in this case must all be the same length. 8914 Otherwise, this support is similar to the Fortran common support. 8915 8916 `dup_comm' by itself provides a type of one-only support for code. 8917 Only the first `dup_comm' subspace is selected. There is a rather 8918 complex algorithm to compare subspaces. Code symbols marked with 8919 the `dup_common' flag are hidden. This support was intended for 8920 "C++ duplicate inlines". 8921 8922 A simplified technique is used to mark the flags of symbols based 8923 on the flags of their subspace. A symbol with the scope 8924 SS_UNIVERSAL and type ST_ENTRY, ST_CODE or ST_DATA is marked with 8925 the corresponding settings of `comdat', `common' and `dup_comm' 8926 from the subspace, respectively. This avoids having to introduce 8927 additional directives to mark these symbols. The HP assembler 8928 sets `is_common' from `common'. However, it doesn't set the 8929 `dup_common' from `dup_comm'. It doesn't have `comdat' support. 8930 8931 `.version "STR"' 8932 Write STR as version identifier in object code. 8933 8934 8935 File: as.info, Node: HPPA Opcodes, Prev: HPPA Directives, Up: HPPA-Dependent 8936 8937 9.11.6 Opcodes 8938 -------------- 8939 8940 For detailed information on the HPPA machine instruction set, see 8941 `PA-RISC Architecture and Instruction Set Reference Manual' (HP 8942 09740-90039). 8943 8944 8945 File: as.info, Node: ESA/390-Dependent, Next: i386-Dependent, Prev: HPPA-Dependent, Up: Machine Dependencies 8946 8947 9.12 ESA/390 Dependent Features 8948 =============================== 8949 8950 * Menu: 8951 8952 * ESA/390 Notes:: Notes 8953 * ESA/390 Options:: Options 8954 * ESA/390 Syntax:: Syntax 8955 * ESA/390 Floating Point:: Floating Point 8956 * ESA/390 Directives:: ESA/390 Machine Directives 8957 * ESA/390 Opcodes:: Opcodes 8958 8959 8960 File: as.info, Node: ESA/390 Notes, Next: ESA/390 Options, Up: ESA/390-Dependent 8961 8962 9.12.1 Notes 8963 ------------ 8964 8965 The ESA/390 `as' port is currently intended to be a back-end for the 8966 GNU CC compiler. It is not HLASM compatible, although it does support 8967 a subset of some of the HLASM directives. The only supported binary 8968 file format is ELF; none of the usual MVS/VM/OE/USS object file 8969 formats, such as ESD or XSD, are supported. 8970 8971 When used with the GNU CC compiler, the ESA/390 `as' will produce 8972 correct, fully relocated, functional binaries, and has been used to 8973 compile and execute large projects. However, many aspects should still 8974 be considered experimental; these include shared library support, 8975 dynamically loadable objects, and any relocation other than the 31-bit 8976 relocation. 8977 8978 8979 File: as.info, Node: ESA/390 Options, Next: ESA/390 Syntax, Prev: ESA/390 Notes, Up: ESA/390-Dependent 8980 8981 9.12.2 Options 8982 -------------- 8983 8984 `as' has no machine-dependent command-line options for the ESA/390. 8985 8986 8987 File: as.info, Node: ESA/390 Syntax, Next: ESA/390 Floating Point, Prev: ESA/390 Options, Up: ESA/390-Dependent 8988 8989 9.12.3 Syntax 8990 ------------- 8991 8992 The opcode/operand syntax follows the ESA/390 Principles of Operation 8993 manual; assembler directives and general syntax are loosely based on the 8994 prevailing AT&T/SVR4/ELF/Solaris style notation. HLASM-style directives 8995 are _not_ supported for the most part, with the exception of those 8996 described herein. 8997 8998 A leading dot in front of directives is optional, and the case of 8999 directives is ignored; thus for example, .using and USING have the same 9000 effect. 9001 9002 A colon may immediately follow a label definition. This is simply 9003 for compatibility with how most assembly language programmers write 9004 code. 9005 9006 `#' is the line comment character. 9007 9008 `;' can be used instead of a newline to separate statements. 9009 9010 Since `$' has no special meaning, you may use it in symbol names. 9011 9012 Registers can be given the symbolic names r0..r15, fp0, fp2, fp4, 9013 fp6. By using thesse symbolic names, `as' can detect simple syntax 9014 errors. The name rarg or r.arg is a synonym for r11, rtca or r.tca for 9015 r12, sp, r.sp, dsa r.dsa for r13, lr or r.lr for r14, rbase or r.base 9016 for r3 and rpgt or r.pgt for r4. 9017 9018 `*' is the current location counter. Unlike `.' it is always 9019 relative to the last USING directive. Note that this means that 9020 expressions cannot use multiplication, as any occurrence of `*' will be 9021 interpreted as a location counter. 9022 9023 All labels are relative to the last USING. Thus, branches to a label 9024 always imply the use of base+displacement. 9025 9026 Many of the usual forms of address constants / address literals are 9027 supported. Thus, 9028 .using *,r3 9029 L r15,=A(some_routine) 9030 LM r6,r7,=V(some_longlong_extern) 9031 A r1,=F'12' 9032 AH r0,=H'42' 9033 ME r6,=E'3.1416' 9034 MD r6,=D'3.14159265358979' 9035 O r6,=XL4'cacad0d0' 9036 .ltorg 9037 should all behave as expected: that is, an entry in the literal pool 9038 will be created (or reused if it already exists), and the instruction 9039 operands will be the displacement into the literal pool using the 9040 current base register (as last declared with the `.using' directive). 9041 9042 9043 File: as.info, Node: ESA/390 Floating Point, Next: ESA/390 Directives, Prev: ESA/390 Syntax, Up: ESA/390-Dependent 9044 9045 9.12.4 Floating Point 9046 --------------------- 9047 9048 The assembler generates only IEEE floating-point numbers. The older 9049 floating point formats are not supported. 9050 9051 9052 File: as.info, Node: ESA/390 Directives, Next: ESA/390 Opcodes, Prev: ESA/390 Floating Point, Up: ESA/390-Dependent 9053 9054 9.12.5 ESA/390 Assembler Directives 9055 ----------------------------------- 9056 9057 `as' for the ESA/390 supports all of the standard ELF/SVR4 assembler 9058 directives that are documented in the main part of this documentation. 9059 Several additional directives are supported in order to implement the 9060 ESA/390 addressing model. The most important of these are `.using' and 9061 `.ltorg' 9062 9063 These are the additional directives in `as' for the ESA/390: 9064 9065 `.dc' 9066 A small subset of the usual DC directive is supported. 9067 9068 `.drop REGNO' 9069 Stop using REGNO as the base register. The REGNO must have been 9070 previously declared with a `.using' directive in the same section 9071 as the current section. 9072 9073 `.ebcdic STRING' 9074 Emit the EBCDIC equivalent of the indicated string. The emitted 9075 string will be null terminated. Note that the directives 9076 `.string' etc. emit ascii strings by default. 9077 9078 `EQU' 9079 The standard HLASM-style EQU directive is not supported; however, 9080 the standard `as' directive .equ can be used to the same effect. 9081 9082 `.ltorg' 9083 Dump the literal pool accumulated so far; begin a new literal pool. 9084 The literal pool will be written in the current section; in order 9085 to generate correct assembly, a `.using' must have been previously 9086 specified in the same section. 9087 9088 `.using EXPR,REGNO' 9089 Use REGNO as the base register for all subsequent RX, RS, and SS 9090 form instructions. The EXPR will be evaluated to obtain the base 9091 address; usually, EXPR will merely be `*'. 9092 9093 This assembler allows two `.using' directives to be simultaneously 9094 outstanding, one in the `.text' section, and one in another section 9095 (typically, the `.data' section). This feature allows dynamically 9096 loaded objects to be implemented in a relatively straightforward 9097 way. A `.using' directive must always be specified in the `.text' 9098 section; this will specify the base register that will be used for 9099 branches in the `.text' section. A second `.using' may be 9100 specified in another section; this will specify the base register 9101 that is used for non-label address literals. When a second 9102 `.using' is specified, then the subsequent `.ltorg' must be put in 9103 the same section; otherwise an error will result. 9104 9105 Thus, for example, the following code uses `r3' to address branch 9106 targets and `r4' to address the literal pool, which has been 9107 written to the `.data' section. The is, the constants 9108 `=A(some_routine)', `=H'42'' and `=E'3.1416'' will all appear in 9109 the `.data' section. 9110 9111 .data 9112 .using LITPOOL,r4 9113 .text 9114 BASR r3,0 9115 .using *,r3 9116 B START 9117 .long LITPOOL 9118 START: 9119 L r4,4(,r3) 9120 L r15,=A(some_routine) 9121 LTR r15,r15 9122 BNE LABEL 9123 AH r0,=H'42' 9124 LABEL: 9125 ME r6,=E'3.1416' 9126 .data 9127 LITPOOL: 9128 .ltorg 9129 9130 Note that this dual-`.using' directive semantics extends and is 9131 not compatible with HLASM semantics. Note that this assembler 9132 directive does not support the full range of HLASM semantics. 9133 9134 9135 9136 File: as.info, Node: ESA/390 Opcodes, Prev: ESA/390 Directives, Up: ESA/390-Dependent 9137 9138 9.12.6 Opcodes 9139 -------------- 9140 9141 For detailed information on the ESA/390 machine instruction set, see 9142 `ESA/390 Principles of Operation' (IBM Publication Number DZ9AR004). 9143 9144 9145 File: as.info, Node: i386-Dependent, Next: i860-Dependent, Prev: ESA/390-Dependent, Up: Machine Dependencies 9146 9147 9.13 80386 Dependent Features 9148 ============================= 9149 9150 The i386 version `as' supports both the original Intel 386 9151 architecture in both 16 and 32-bit mode as well as AMD x86-64 9152 architecture extending the Intel architecture to 64-bits. 9153 9154 * Menu: 9155 9156 * i386-Options:: Options 9157 * i386-Directives:: X86 specific directives 9158 * i386-Syntax:: AT&T Syntax versus Intel Syntax 9159 * i386-Mnemonics:: Instruction Naming 9160 * i386-Regs:: Register Naming 9161 * i386-Prefixes:: Instruction Prefixes 9162 * i386-Memory:: Memory References 9163 * i386-Jumps:: Handling of Jump Instructions 9164 * i386-Float:: Floating Point 9165 * i386-SIMD:: Intel's MMX and AMD's 3DNow! SIMD Operations 9166 * i386-16bit:: Writing 16-bit Code 9167 * i386-Arch:: Specifying an x86 CPU architecture 9168 * i386-Bugs:: AT&T Syntax bugs 9169 * i386-Notes:: Notes 9170 9171 9172 File: as.info, Node: i386-Options, Next: i386-Directives, Up: i386-Dependent 9173 9174 9.13.1 Options 9175 -------------- 9176 9177 The i386 version of `as' has a few machine dependent options: 9178 9179 `--32 | --64' 9180 Select the word size, either 32 bits or 64 bits. Selecting 32-bit 9181 implies Intel i386 architecture, while 64-bit implies AMD x86-64 9182 architecture. 9183 9184 These options are only available with the ELF object file format, 9185 and require that the necessary BFD support has been included (on a 9186 32-bit platform you have to add -enable-64-bit-bfd to configure 9187 enable 64-bit usage and use x86-64 as target platform). 9188 9189 `-n' 9190 By default, x86 GAS replaces multiple nop instructions used for 9191 alignment within code sections with multi-byte nop instructions 9192 such as leal 0(%esi,1),%esi. This switch disables the 9193 optimization. 9194 9195 `--divide' 9196 On SVR4-derived platforms, the character `/' is treated as a 9197 comment character, which means that it cannot be used in 9198 expressions. The `--divide' option turns `/' into a normal 9199 character. This does not disable `/' at the beginning of a line 9200 starting a comment, or affect using `#' for starting a comment. 9201 9202 `-march=CPU[+EXTENSION...]' 9203 This option specifies the target processor. The assembler will 9204 issue an error message if an attempt is made to assemble an 9205 instruction which will not execute on the target processor. The 9206 following processor names are recognized: `i8086', `i186', `i286', 9207 `i386', `i486', `i586', `i686', `pentium', `pentiumpro', 9208 `pentiumii', `pentiumiii', `pentium4', `prescott', `nocona', 9209 `core', `core2', `k6', `k6_2', `athlon', `opteron', `k8', 9210 `amdfam10', `generic32' and `generic64'. 9211 9212 In addition to the basic instruction set, the assembler can be 9213 told to accept various extension mnemonics. For example, 9214 `-march=i686+sse4+vmx' extends I686 with SSE4 and VMX. The 9215 following extensions are currently supported: `mmx', `sse', `sse2', 9216 `sse3', `ssse3', `sse4.1', `sse4.2', `sse4', `avx', `vmx', `smx', 9217 `xsave', `aes', `pclmul', `fma', `movbe', `ept', `3dnow', `3dnowa', 9218 `sse4a', `sse5', `svme', `abm' and `padlock'. 9219 9220 When the `.arch' directive is used with `-march', the `.arch' 9221 directive will take precedent. 9222 9223 `-mtune=CPU' 9224 This option specifies a processor to optimize for. When used in 9225 conjunction with the `-march' option, only instructions of the 9226 processor specified by the `-march' option will be generated. 9227 9228 Valid CPU values are identical to the processor list of 9229 `-march=CPU'. 9230 9231 `-msse2avx' 9232 This option specifies that the assembler should encode SSE 9233 instructions with VEX prefix. 9234 9235 `-msse-check=NONE' 9236 9237 `-msse-check=WARNING' 9238 9239 `-msse-check=ERROR' 9240 These options control if the assembler should check SSE 9241 intructions. `-msse-check=NONE' will make the assembler not to 9242 check SSE instructions, which is the default. 9243 `-msse-check=WARNING' will make the assembler issue a warning for 9244 any SSE intruction. `-msse-check=ERROR' will make the assembler 9245 issue an error for any SSE intruction. 9246 9247 `-mmnemonic=ATT' 9248 9249 `-mmnemonic=INTEL' 9250 This option specifies instruction mnemonic for matching 9251 instructions. The `.att_mnemonic' and `.intel_mnemonic' 9252 directives will take precedent. 9253 9254 `-msyntax=ATT' 9255 9256 `-msyntax=INTEL' 9257 This option specifies instruction syntax when processing 9258 instructions. The `.att_syntax' and `.intel_syntax' directives 9259 will take precedent. 9260 9261 `-mnaked-reg' 9262 This opetion specifies that registers don't require a `%' prefix. 9263 The `.att_syntax' and `.intel_syntax' directives will take 9264 precedent. 9265 9266 9267 9268 File: as.info, Node: i386-Directives, Next: i386-Syntax, Prev: i386-Options, Up: i386-Dependent 9269 9270 9.13.2 x86 specific Directives 9271 ------------------------------ 9272 9273 `.lcomm SYMBOL , LENGTH[, ALIGNMENT]' 9274 Reserve LENGTH (an absolute expression) bytes for a local common 9275 denoted by SYMBOL. The section and value of SYMBOL are those of 9276 the new local common. The addresses are allocated in the bss 9277 section, so that at run-time the bytes start off zeroed. Since 9278 SYMBOL is not declared global, it is normally not visible to `ld'. 9279 The optional third parameter, ALIGNMENT, specifies the desired 9280 alignment of the symbol in the bss section. 9281 9282 This directive is only available for COFF based x86 targets. 9283 9284 9285 9286 File: as.info, Node: i386-Syntax, Next: i386-Mnemonics, Prev: i386-Directives, Up: i386-Dependent 9287 9288 9.13.3 AT&T Syntax versus Intel Syntax 9289 -------------------------------------- 9290 9291 `as' now supports assembly using Intel assembler syntax. 9292 `.intel_syntax' selects Intel mode, and `.att_syntax' switches back to 9293 the usual AT&T mode for compatibility with the output of `gcc'. Either 9294 of these directives may have an optional argument, `prefix', or 9295 `noprefix' specifying whether registers require a `%' prefix. AT&T 9296 System V/386 assembler syntax is quite different from Intel syntax. We 9297 mention these differences because almost all 80386 documents use Intel 9298 syntax. Notable differences between the two syntaxes are: 9299 9300 * AT&T immediate operands are preceded by `$'; Intel immediate 9301 operands are undelimited (Intel `push 4' is AT&T `pushl $4'). 9302 AT&T register operands are preceded by `%'; Intel register operands 9303 are undelimited. AT&T absolute (as opposed to PC relative) 9304 jump/call operands are prefixed by `*'; they are undelimited in 9305 Intel syntax. 9306 9307 * AT&T and Intel syntax use the opposite order for source and 9308 destination operands. Intel `add eax, 4' is `addl $4, %eax'. The 9309 `source, dest' convention is maintained for compatibility with 9310 previous Unix assemblers. Note that `bound', `invlpga', and 9311 instructions with 2 immediate operands, such as the `enter' 9312 instruction, do _not_ have reversed order. *Note i386-Bugs::. 9313 9314 * In AT&T syntax the size of memory operands is determined from the 9315 last character of the instruction mnemonic. Mnemonic suffixes of 9316 `b', `w', `l' and `q' specify byte (8-bit), word (16-bit), long 9317 (32-bit) and quadruple word (64-bit) memory references. Intel 9318 syntax accomplishes this by prefixing memory operands (_not_ the 9319 instruction mnemonics) with `byte ptr', `word ptr', `dword ptr' 9320 and `qword ptr'. Thus, Intel `mov al, byte ptr FOO' is `movb FOO, 9321 %al' in AT&T syntax. 9322 9323 * Immediate form long jumps and calls are `lcall/ljmp $SECTION, 9324 $OFFSET' in AT&T syntax; the Intel syntax is `call/jmp far 9325 SECTION:OFFSET'. Also, the far return instruction is `lret 9326 $STACK-ADJUST' in AT&T syntax; Intel syntax is `ret far 9327 STACK-ADJUST'. 9328 9329 * The AT&T assembler does not provide support for multiple section 9330 programs. Unix style systems expect all programs to be single 9331 sections. 9332 9333 9334 File: as.info, Node: i386-Mnemonics, Next: i386-Regs, Prev: i386-Syntax, Up: i386-Dependent 9335 9336 9.13.4 Instruction Naming 9337 ------------------------- 9338 9339 Instruction mnemonics are suffixed with one character modifiers which 9340 specify the size of operands. The letters `b', `w', `l' and `q' 9341 specify byte, word, long and quadruple word operands. If no suffix is 9342 specified by an instruction then `as' tries to fill in the missing 9343 suffix based on the destination register operand (the last one by 9344 convention). Thus, `mov %ax, %bx' is equivalent to `movw %ax, %bx'; 9345 also, `mov $1, %bx' is equivalent to `movw $1, bx'. Note that this is 9346 incompatible with the AT&T Unix assembler which assumes that a missing 9347 mnemonic suffix implies long operand size. (This incompatibility does 9348 not affect compiler output since compilers always explicitly specify 9349 the mnemonic suffix.) 9350 9351 Almost all instructions have the same names in AT&T and Intel format. 9352 There are a few exceptions. The sign extend and zero extend 9353 instructions need two sizes to specify them. They need a size to 9354 sign/zero extend _from_ and a size to zero extend _to_. This is 9355 accomplished by using two instruction mnemonic suffixes in AT&T syntax. 9356 Base names for sign extend and zero extend are `movs...' and `movz...' 9357 in AT&T syntax (`movsx' and `movzx' in Intel syntax). The instruction 9358 mnemonic suffixes are tacked on to this base name, the _from_ suffix 9359 before the _to_ suffix. Thus, `movsbl %al, %edx' is AT&T syntax for 9360 "move sign extend _from_ %al _to_ %edx." Possible suffixes, thus, are 9361 `bl' (from byte to long), `bw' (from byte to word), `wl' (from word to 9362 long), `bq' (from byte to quadruple word), `wq' (from word to quadruple 9363 word), and `lq' (from long to quadruple word). 9364 9365 The Intel-syntax conversion instructions 9366 9367 * `cbw' -- sign-extend byte in `%al' to word in `%ax', 9368 9369 * `cwde' -- sign-extend word in `%ax' to long in `%eax', 9370 9371 * `cwd' -- sign-extend word in `%ax' to long in `%dx:%ax', 9372 9373 * `cdq' -- sign-extend dword in `%eax' to quad in `%edx:%eax', 9374 9375 * `cdqe' -- sign-extend dword in `%eax' to quad in `%rax' (x86-64 9376 only), 9377 9378 * `cqo' -- sign-extend quad in `%rax' to octuple in `%rdx:%rax' 9379 (x86-64 only), 9380 9381 are called `cbtw', `cwtl', `cwtd', `cltd', `cltq', and `cqto' in AT&T 9382 naming. `as' accepts either naming for these instructions. 9383 9384 Far call/jump instructions are `lcall' and `ljmp' in AT&T syntax, 9385 but are `call far' and `jump far' in Intel convention. 9386 9387 9.13.5 AT&T Mnemonic versus Intel Mnemonic 9388 ------------------------------------------ 9389 9390 `as' supports assembly using Intel mnemonic. `.intel_mnemonic' selects 9391 Intel mnemonic with Intel syntax, and `.att_mnemonic' switches back to 9392 the usual AT&T mnemonic with AT&T syntax for compatibility with the 9393 output of `gcc'. Several x87 instructions, `fadd', `fdiv', `fdivp', 9394 `fdivr', `fdivrp', `fmul', `fsub', `fsubp', `fsubr' and `fsubrp', are 9395 implemented in AT&T System V/386 assembler with different mnemonics 9396 from those in Intel IA32 specification. `gcc' generates those 9397 instructions with AT&T mnemonic. 9398 9399 9400 File: as.info, Node: i386-Regs, Next: i386-Prefixes, Prev: i386-Mnemonics, Up: i386-Dependent 9401 9402 9.13.6 Register Naming 9403 ---------------------- 9404 9405 Register operands are always prefixed with `%'. The 80386 registers 9406 consist of 9407 9408 * the 8 32-bit registers `%eax' (the accumulator), `%ebx', `%ecx', 9409 `%edx', `%edi', `%esi', `%ebp' (the frame pointer), and `%esp' 9410 (the stack pointer). 9411 9412 * the 8 16-bit low-ends of these: `%ax', `%bx', `%cx', `%dx', `%di', 9413 `%si', `%bp', and `%sp'. 9414 9415 * the 8 8-bit registers: `%ah', `%al', `%bh', `%bl', `%ch', `%cl', 9416 `%dh', and `%dl' (These are the high-bytes and low-bytes of `%ax', 9417 `%bx', `%cx', and `%dx') 9418 9419 * the 6 section registers `%cs' (code section), `%ds' (data 9420 section), `%ss' (stack section), `%es', `%fs', and `%gs'. 9421 9422 * the 3 processor control registers `%cr0', `%cr2', and `%cr3'. 9423 9424 * the 6 debug registers `%db0', `%db1', `%db2', `%db3', `%db6', and 9425 `%db7'. 9426 9427 * the 2 test registers `%tr6' and `%tr7'. 9428 9429 * the 8 floating point register stack `%st' or equivalently 9430 `%st(0)', `%st(1)', `%st(2)', `%st(3)', `%st(4)', `%st(5)', 9431 `%st(6)', and `%st(7)'. These registers are overloaded by 8 MMX 9432 registers `%mm0', `%mm1', `%mm2', `%mm3', `%mm4', `%mm5', `%mm6' 9433 and `%mm7'. 9434 9435 * the 8 SSE registers registers `%xmm0', `%xmm1', `%xmm2', `%xmm3', 9436 `%xmm4', `%xmm5', `%xmm6' and `%xmm7'. 9437 9438 The AMD x86-64 architecture extends the register set by: 9439 9440 * enhancing the 8 32-bit registers to 64-bit: `%rax' (the 9441 accumulator), `%rbx', `%rcx', `%rdx', `%rdi', `%rsi', `%rbp' (the 9442 frame pointer), `%rsp' (the stack pointer) 9443 9444 * the 8 extended registers `%r8'-`%r15'. 9445 9446 * the 8 32-bit low ends of the extended registers: `%r8d'-`%r15d' 9447 9448 * the 8 16-bit low ends of the extended registers: `%r8w'-`%r15w' 9449 9450 * the 8 8-bit low ends of the extended registers: `%r8b'-`%r15b' 9451 9452 * the 4 8-bit registers: `%sil', `%dil', `%bpl', `%spl'. 9453 9454 * the 8 debug registers: `%db8'-`%db15'. 9455 9456 * the 8 SSE registers: `%xmm8'-`%xmm15'. 9457 9458 9459 File: as.info, Node: i386-Prefixes, Next: i386-Memory, Prev: i386-Regs, Up: i386-Dependent 9460 9461 9.13.7 Instruction Prefixes 9462 --------------------------- 9463 9464 Instruction prefixes are used to modify the following instruction. They 9465 are used to repeat string instructions, to provide section overrides, to 9466 perform bus lock operations, and to change operand and address sizes. 9467 (Most instructions that normally operate on 32-bit operands will use 9468 16-bit operands if the instruction has an "operand size" prefix.) 9469 Instruction prefixes are best written on the same line as the 9470 instruction they act upon. For example, the `scas' (scan string) 9471 instruction is repeated with: 9472 9473 repne scas %es:(%edi),%al 9474 9475 You may also place prefixes on the lines immediately preceding the 9476 instruction, but this circumvents checks that `as' does with prefixes, 9477 and will not work with all prefixes. 9478 9479 Here is a list of instruction prefixes: 9480 9481 * Section override prefixes `cs', `ds', `ss', `es', `fs', `gs'. 9482 These are automatically added by specifying using the 9483 SECTION:MEMORY-OPERAND form for memory references. 9484 9485 * Operand/Address size prefixes `data16' and `addr16' change 32-bit 9486 operands/addresses into 16-bit operands/addresses, while `data32' 9487 and `addr32' change 16-bit ones (in a `.code16' section) into 9488 32-bit operands/addresses. These prefixes _must_ appear on the 9489 same line of code as the instruction they modify. For example, in 9490 a 16-bit `.code16' section, you might write: 9491 9492 addr32 jmpl *(%ebx) 9493 9494 * The bus lock prefix `lock' inhibits interrupts during execution of 9495 the instruction it precedes. (This is only valid with certain 9496 instructions; see a 80386 manual for details). 9497 9498 * The wait for coprocessor prefix `wait' waits for the coprocessor to 9499 complete the current instruction. This should never be needed for 9500 the 80386/80387 combination. 9501 9502 * The `rep', `repe', and `repne' prefixes are added to string 9503 instructions to make them repeat `%ecx' times (`%cx' times if the 9504 current address size is 16-bits). 9505 9506 * The `rex' family of prefixes is used by x86-64 to encode 9507 extensions to i386 instruction set. The `rex' prefix has four 9508 bits -- an operand size overwrite (`64') used to change operand 9509 size from 32-bit to 64-bit and X, Y and Z extensions bits used to 9510 extend the register set. 9511 9512 You may write the `rex' prefixes directly. The `rex64xyz' 9513 instruction emits `rex' prefix with all the bits set. By omitting 9514 the `64', `x', `y' or `z' you may write other prefixes as well. 9515 Normally, there is no need to write the prefixes explicitly, since 9516 gas will automatically generate them based on the instruction 9517 operands. 9518 9519 9520 File: as.info, Node: i386-Memory, Next: i386-Jumps, Prev: i386-Prefixes, Up: i386-Dependent 9521 9522 9.13.8 Memory References 9523 ------------------------ 9524 9525 An Intel syntax indirect memory reference of the form 9526 9527 SECTION:[BASE + INDEX*SCALE + DISP] 9528 9529 is translated into the AT&T syntax 9530 9531 SECTION:DISP(BASE, INDEX, SCALE) 9532 9533 where BASE and INDEX are the optional 32-bit base and index registers, 9534 DISP is the optional displacement, and SCALE, taking the values 1, 2, 9535 4, and 8, multiplies INDEX to calculate the address of the operand. If 9536 no SCALE is specified, SCALE is taken to be 1. SECTION specifies the 9537 optional section register for the memory operand, and may override the 9538 default section register (see a 80386 manual for section register 9539 defaults). Note that section overrides in AT&T syntax _must_ be 9540 preceded by a `%'. If you specify a section override which coincides 9541 with the default section register, `as' does _not_ output any section 9542 register override prefixes to assemble the given instruction. Thus, 9543 section overrides can be specified to emphasize which section register 9544 is used for a given memory operand. 9545 9546 Here are some examples of Intel and AT&T style memory references: 9547 9548 AT&T: `-4(%ebp)', Intel: `[ebp - 4]' 9549 BASE is `%ebp'; DISP is `-4'. SECTION is missing, and the default 9550 section is used (`%ss' for addressing with `%ebp' as the base 9551 register). INDEX, SCALE are both missing. 9552 9553 AT&T: `foo(,%eax,4)', Intel: `[foo + eax*4]' 9554 INDEX is `%eax' (scaled by a SCALE 4); DISP is `foo'. All other 9555 fields are missing. The section register here defaults to `%ds'. 9556 9557 AT&T: `foo(,1)'; Intel `[foo]' 9558 This uses the value pointed to by `foo' as a memory operand. Note 9559 that BASE and INDEX are both missing, but there is only _one_ `,'. 9560 This is a syntactic exception. 9561 9562 AT&T: `%gs:foo'; Intel `gs:foo' 9563 This selects the contents of the variable `foo' with section 9564 register SECTION being `%gs'. 9565 9566 Absolute (as opposed to PC relative) call and jump operands must be 9567 prefixed with `*'. If no `*' is specified, `as' always chooses PC 9568 relative addressing for jump/call labels. 9569 9570 Any instruction that has a memory operand, but no register operand, 9571 _must_ specify its size (byte, word, long, or quadruple) with an 9572 instruction mnemonic suffix (`b', `w', `l' or `q', respectively). 9573 9574 The x86-64 architecture adds an RIP (instruction pointer relative) 9575 addressing. This addressing mode is specified by using `rip' as a base 9576 register. Only constant offsets are valid. For example: 9577 9578 AT&T: `1234(%rip)', Intel: `[rip + 1234]' 9579 Points to the address 1234 bytes past the end of the current 9580 instruction. 9581 9582 AT&T: `symbol(%rip)', Intel: `[rip + symbol]' 9583 Points to the `symbol' in RIP relative way, this is shorter than 9584 the default absolute addressing. 9585 9586 Other addressing modes remain unchanged in x86-64 architecture, 9587 except registers used are 64-bit instead of 32-bit. 9588 9589 9590 File: as.info, Node: i386-Jumps, Next: i386-Float, Prev: i386-Memory, Up: i386-Dependent 9591 9592 9.13.9 Handling of Jump Instructions 9593 ------------------------------------ 9594 9595 Jump instructions are always optimized to use the smallest possible 9596 displacements. This is accomplished by using byte (8-bit) displacement 9597 jumps whenever the target is sufficiently close. If a byte displacement 9598 is insufficient a long displacement is used. We do not support word 9599 (16-bit) displacement jumps in 32-bit mode (i.e. prefixing the jump 9600 instruction with the `data16' instruction prefix), since the 80386 9601 insists upon masking `%eip' to 16 bits after the word displacement is 9602 added. (See also *note i386-Arch::) 9603 9604 Note that the `jcxz', `jecxz', `loop', `loopz', `loope', `loopnz' 9605 and `loopne' instructions only come in byte displacements, so that if 9606 you use these instructions (`gcc' does not use them) you may get an 9607 error message (and incorrect code). The AT&T 80386 assembler tries to 9608 get around this problem by expanding `jcxz foo' to 9609 9610 jcxz cx_zero 9611 jmp cx_nonzero 9612 cx_zero: jmp foo 9613 cx_nonzero: 9614 9615 9616 File: as.info, Node: i386-Float, Next: i386-SIMD, Prev: i386-Jumps, Up: i386-Dependent 9617 9618 9.13.10 Floating Point 9619 ---------------------- 9620 9621 All 80387 floating point types except packed BCD are supported. (BCD 9622 support may be added without much difficulty). These data types are 9623 16-, 32-, and 64- bit integers, and single (32-bit), double (64-bit), 9624 and extended (80-bit) precision floating point. Each supported type 9625 has an instruction mnemonic suffix and a constructor associated with 9626 it. Instruction mnemonic suffixes specify the operand's data type. 9627 Constructors build these data types into memory. 9628 9629 * Floating point constructors are `.float' or `.single', `.double', 9630 and `.tfloat' for 32-, 64-, and 80-bit formats. These correspond 9631 to instruction mnemonic suffixes `s', `l', and `t'. `t' stands for 9632 80-bit (ten byte) real. The 80387 only supports this format via 9633 the `fldt' (load 80-bit real to stack top) and `fstpt' (store 9634 80-bit real and pop stack) instructions. 9635 9636 * Integer constructors are `.word', `.long' or `.int', and `.quad' 9637 for the 16-, 32-, and 64-bit integer formats. The corresponding 9638 instruction mnemonic suffixes are `s' (single), `l' (long), and 9639 `q' (quad). As with the 80-bit real format, the 64-bit `q' format 9640 is only present in the `fildq' (load quad integer to stack top) 9641 and `fistpq' (store quad integer and pop stack) instructions. 9642 9643 Register to register operations should not use instruction mnemonic 9644 suffixes. `fstl %st, %st(1)' will give a warning, and be assembled as 9645 if you wrote `fst %st, %st(1)', since all register to register 9646 operations use 80-bit floating point operands. (Contrast this with 9647 `fstl %st, mem', which converts `%st' from 80-bit to 64-bit floating 9648 point format, then stores the result in the 4 byte location `mem') 9649 9650 9651 File: as.info, Node: i386-SIMD, Next: i386-16bit, Prev: i386-Float, Up: i386-Dependent 9652 9653 9.13.11 Intel's MMX and AMD's 3DNow! SIMD Operations 9654 ---------------------------------------------------- 9655 9656 `as' supports Intel's MMX instruction set (SIMD instructions for 9657 integer data), available on Intel's Pentium MMX processors and Pentium 9658 II processors, AMD's K6 and K6-2 processors, Cyrix' M2 processor, and 9659 probably others. It also supports AMD's 3DNow! instruction set (SIMD 9660 instructions for 32-bit floating point data) available on AMD's K6-2 9661 processor and possibly others in the future. 9662 9663 Currently, `as' does not support Intel's floating point SIMD, Katmai 9664 (KNI). 9665 9666 The eight 64-bit MMX operands, also used by 3DNow!, are called 9667 `%mm0', `%mm1', ... `%mm7'. They contain eight 8-bit integers, four 9668 16-bit integers, two 32-bit integers, one 64-bit integer, or two 32-bit 9669 floating point values. The MMX registers cannot be used at the same 9670 time as the floating point stack. 9671 9672 See Intel and AMD documentation, keeping in mind that the operand 9673 order in instructions is reversed from the Intel syntax. 9674 9675 9676 File: as.info, Node: i386-16bit, Next: i386-Arch, Prev: i386-SIMD, Up: i386-Dependent 9677 9678 9.13.12 Writing 16-bit Code 9679 --------------------------- 9680 9681 While `as' normally writes only "pure" 32-bit i386 code or 64-bit 9682 x86-64 code depending on the default configuration, it also supports 9683 writing code to run in real mode or in 16-bit protected mode code 9684 segments. To do this, put a `.code16' or `.code16gcc' directive before 9685 the assembly language instructions to be run in 16-bit mode. You can 9686 switch `as' back to writing normal 32-bit code with the `.code32' 9687 directive. 9688 9689 `.code16gcc' provides experimental support for generating 16-bit 9690 code from gcc, and differs from `.code16' in that `call', `ret', 9691 `enter', `leave', `push', `pop', `pusha', `popa', `pushf', and `popf' 9692 instructions default to 32-bit size. This is so that the stack pointer 9693 is manipulated in the same way over function calls, allowing access to 9694 function parameters at the same stack offsets as in 32-bit mode. 9695 `.code16gcc' also automatically adds address size prefixes where 9696 necessary to use the 32-bit addressing modes that gcc generates. 9697 9698 The code which `as' generates in 16-bit mode will not necessarily 9699 run on a 16-bit pre-80386 processor. To write code that runs on such a 9700 processor, you must refrain from using _any_ 32-bit constructs which 9701 require `as' to output address or operand size prefixes. 9702 9703 Note that writing 16-bit code instructions by explicitly specifying a 9704 prefix or an instruction mnemonic suffix within a 32-bit code section 9705 generates different machine instructions than those generated for a 9706 16-bit code segment. In a 32-bit code section, the following code 9707 generates the machine opcode bytes `66 6a 04', which pushes the value 9708 `4' onto the stack, decrementing `%esp' by 2. 9709 9710 pushw $4 9711 9712 The same code in a 16-bit code section would generate the machine 9713 opcode bytes `6a 04' (i.e., without the operand size prefix), which is 9714 correct since the processor default operand size is assumed to be 16 9715 bits in a 16-bit code section. 9716 9717 9718 File: as.info, Node: i386-Bugs, Next: i386-Notes, Prev: i386-Arch, Up: i386-Dependent 9719 9720 9.13.13 AT&T Syntax bugs 9721 ------------------------ 9722 9723 The UnixWare assembler, and probably other AT&T derived ix86 Unix 9724 assemblers, generate floating point instructions with reversed source 9725 and destination registers in certain cases. Unfortunately, gcc and 9726 possibly many other programs use this reversed syntax, so we're stuck 9727 with it. 9728 9729 For example 9730 9731 fsub %st,%st(3) 9732 results in `%st(3)' being updated to `%st - %st(3)' rather than the 9733 expected `%st(3) - %st'. This happens with all the non-commutative 9734 arithmetic floating point operations with two register operands where 9735 the source register is `%st' and the destination register is `%st(i)'. 9736 9737 9738 File: as.info, Node: i386-Arch, Next: i386-Bugs, Prev: i386-16bit, Up: i386-Dependent 9739 9740 9.13.14 Specifying CPU Architecture 9741 ----------------------------------- 9742 9743 `as' may be told to assemble for a particular CPU (sub-)architecture 9744 with the `.arch CPU_TYPE' directive. This directive enables a warning 9745 when gas detects an instruction that is not supported on the CPU 9746 specified. The choices for CPU_TYPE are: 9747 9748 `i8086' `i186' `i286' `i386' 9749 `i486' `i586' `i686' `pentium' 9750 `pentiumpro' `pentiumii' `pentiumiii' `pentium4' 9751 `prescott' `nocona' `core' `core2' 9752 `k6' `k6_2' `athlon' `k8' 9753 `amdfam10' 9754 `generic32' `generic64' 9755 `.mmx' `.sse' `.sse2' `.sse3' 9756 `.ssse3' `.sse4.1' `.sse4.2' `.sse4' 9757 `.avx' `.vmx' `.smx' `.xsave' 9758 `.aes' `.pclmul' `.fma' `.movbe' 9759 `.ept' 9760 `.3dnow' `.3dnowa' `.sse4a' `.sse5' 9761 `.svme' `.abm' 9762 `.padlock' 9763 9764 Apart from the warning, there are only two other effects on `as' 9765 operation; Firstly, if you specify a CPU other than `i486', then shift 9766 by one instructions such as `sarl $1, %eax' will automatically use a 9767 two byte opcode sequence. The larger three byte opcode sequence is 9768 used on the 486 (and when no architecture is specified) because it 9769 executes faster on the 486. Note that you can explicitly request the 9770 two byte opcode by writing `sarl %eax'. Secondly, if you specify 9771 `i8086', `i186', or `i286', _and_ `.code16' or `.code16gcc' then byte 9772 offset conditional jumps will be promoted when necessary to a two 9773 instruction sequence consisting of a conditional jump of the opposite 9774 sense around an unconditional jump to the target. 9775 9776 Following the CPU architecture (but not a sub-architecture, which 9777 are those starting with a dot), you may specify `jumps' or `nojumps' to 9778 control automatic promotion of conditional jumps. `jumps' is the 9779 default, and enables jump promotion; All external jumps will be of the 9780 long variety, and file-local jumps will be promoted as necessary. 9781 (*note i386-Jumps::) `nojumps' leaves external conditional jumps as 9782 byte offset jumps, and warns about file-local conditional jumps that 9783 `as' promotes. Unconditional jumps are treated as for `jumps'. 9784 9785 For example 9786 9787 .arch i8086,nojumps 9788 9789 9790 File: as.info, Node: i386-Notes, Prev: i386-Bugs, Up: i386-Dependent 9791 9792 9.13.15 Notes 9793 ------------- 9794 9795 There is some trickery concerning the `mul' and `imul' instructions 9796 that deserves mention. The 16-, 32-, 64- and 128-bit expanding 9797 multiplies (base opcode `0xf6'; extension 4 for `mul' and 5 for `imul') 9798 can be output only in the one operand form. Thus, `imul %ebx, %eax' 9799 does _not_ select the expanding multiply; the expanding multiply would 9800 clobber the `%edx' register, and this would confuse `gcc' output. Use 9801 `imul %ebx' to get the 64-bit product in `%edx:%eax'. 9802 9803 We have added a two operand form of `imul' when the first operand is 9804 an immediate mode expression and the second operand is a register. 9805 This is just a shorthand, so that, multiplying `%eax' by 69, for 9806 example, can be done with `imul $69, %eax' rather than `imul $69, %eax, 9807 %eax'. 9808 9809 9810 File: as.info, Node: i860-Dependent, Next: i960-Dependent, Prev: i386-Dependent, Up: Machine Dependencies 9811 9812 9.14 Intel i860 Dependent Features 9813 ================================== 9814 9815 * Menu: 9816 9817 * Notes-i860:: i860 Notes 9818 * Options-i860:: i860 Command-line Options 9819 * Directives-i860:: i860 Machine Directives 9820 * Opcodes for i860:: i860 Opcodes 9821 9822 9823 File: as.info, Node: Notes-i860, Next: Options-i860, Up: i860-Dependent 9824 9825 9.14.1 i860 Notes 9826 ----------------- 9827 9828 This is a fairly complete i860 assembler which is compatible with the 9829 UNIX System V/860 Release 4 assembler. However, it does not currently 9830 support SVR4 PIC (i.e., `@GOT, @GOTOFF, @PLT'). 9831 9832 Like the SVR4/860 assembler, the output object format is ELF32. 9833 Currently, this is the only supported object format. If there is 9834 sufficient interest, other formats such as COFF may be implemented. 9835 9836 Both the Intel and AT&T/SVR4 syntaxes are supported, with the latter 9837 being the default. One difference is that AT&T syntax requires the '%' 9838 prefix on register names while Intel syntax does not. Another 9839 difference is in the specification of relocatable expressions. The 9840 Intel syntax is `ha%expression' whereas the SVR4 syntax is 9841 `[expression]@ha' (and similarly for the "l" and "h" selectors). 9842 9843 9844 File: as.info, Node: Options-i860, Next: Directives-i860, Prev: Notes-i860, Up: i860-Dependent 9845 9846 9.14.2 i860 Command-line Options 9847 -------------------------------- 9848 9849 9.14.2.1 SVR4 compatibility options 9850 ................................... 9851 9852 `-V' 9853 Print assembler version. 9854 9855 `-Qy' 9856 Ignored. 9857 9858 `-Qn' 9859 Ignored. 9860 9861 9.14.2.2 Other options 9862 ...................... 9863 9864 `-EL' 9865 Select little endian output (this is the default). 9866 9867 `-EB' 9868 Select big endian output. Note that the i860 always reads 9869 instructions as little endian data, so this option only effects 9870 data and not instructions. 9871 9872 `-mwarn-expand' 9873 Emit a warning message if any pseudo-instruction expansions 9874 occurred. For example, a `or' instruction with an immediate 9875 larger than 16-bits will be expanded into two instructions. This 9876 is a very undesirable feature to rely on, so this flag can help 9877 detect any code where it happens. One use of it, for instance, has 9878 been to find and eliminate any place where `gcc' may emit these 9879 pseudo-instructions. 9880 9881 `-mxp' 9882 Enable support for the i860XP instructions and control registers. 9883 By default, this option is disabled so that only the base 9884 instruction set (i.e., i860XR) is supported. 9885 9886 `-mintel-syntax' 9887 The i860 assembler defaults to AT&T/SVR4 syntax. This option 9888 enables the Intel syntax. 9889 9890 9891 File: as.info, Node: Directives-i860, Next: Opcodes for i860, Prev: Options-i860, Up: i860-Dependent 9892 9893 9.14.3 i860 Machine Directives 9894 ------------------------------ 9895 9896 `.dual' 9897 Enter dual instruction mode. While this directive is supported, the 9898 preferred way to use dual instruction mode is to explicitly code 9899 the dual bit with the `d.' prefix. 9900 9901 `.enddual' 9902 Exit dual instruction mode. While this directive is supported, the 9903 preferred way to use dual instruction mode is to explicitly code 9904 the dual bit with the `d.' prefix. 9905 9906 `.atmp' 9907 Change the temporary register used when expanding pseudo 9908 operations. The default register is `r31'. 9909 9910 The `.dual', `.enddual', and `.atmp' directives are available only 9911 in the Intel syntax mode. 9912 9913 Both syntaxes allow for the standard `.align' directive. However, 9914 the Intel syntax additionally allows keywords for the alignment 9915 parameter: "`.align type'", where `type' is one of `.short', `.long', 9916 `.quad', `.single', `.double' representing alignments of 2, 4, 16, 4, 9917 and 8, respectively. 9918 9919 9920 File: as.info, Node: Opcodes for i860, Prev: Directives-i860, Up: i860-Dependent 9921 9922 9.14.4 i860 Opcodes 9923 ------------------- 9924 9925 All of the Intel i860XR and i860XP machine instructions are supported. 9926 Please see either _i860 Microprocessor Programmer's Reference Manual_ 9927 or _i860 Microprocessor Architecture_ for more information. 9928 9929 9.14.4.1 Other instruction support (pseudo-instructions) 9930 ........................................................ 9931 9932 For compatibility with some other i860 assemblers, a number of 9933 pseudo-instructions are supported. While these are supported, they are 9934 a very undesirable feature that should be avoided - in particular, when 9935 they result in an expansion to multiple actual i860 instructions. Below 9936 are the pseudo-instructions that result in expansions. 9937 * Load large immediate into general register: 9938 9939 The pseudo-instruction `mov imm,%rn' (where the immediate does not 9940 fit within a signed 16-bit field) will be expanded into: 9941 orh large_imm@h,%r0,%rn 9942 or large_imm@l,%rn,%rn 9943 9944 * Load/store with relocatable address expression: 9945 9946 For example, the pseudo-instruction `ld.b addr_exp(%rx),%rn' will 9947 be expanded into: 9948 orh addr_exp@ha,%rx,%r31 9949 ld.l addr_exp@l(%r31),%rn 9950 9951 The analogous expansions apply to `ld.x, st.x, fld.x, pfld.x, 9952 fst.x', and `pst.x' as well. 9953 9954 * Signed large immediate with add/subtract: 9955 9956 If any of the arithmetic operations `adds, addu, subs, subu' are 9957 used with an immediate larger than 16-bits (signed), then they 9958 will be expanded. For instance, the pseudo-instruction `adds 9959 large_imm,%rx,%rn' expands to: 9960 orh large_imm@h,%r0,%r31 9961 or large_imm@l,%r31,%r31 9962 adds %r31,%rx,%rn 9963 9964 * Unsigned large immediate with logical operations: 9965 9966 Logical operations (`or, andnot, or, xor') also result in 9967 expansions. The pseudo-instruction `or large_imm,%rx,%rn' results 9968 in: 9969 orh large_imm@h,%rx,%r31 9970 or large_imm@l,%r31,%rn 9971 9972 Similarly for the others, except for `and' which expands to: 9973 andnot (-1 - large_imm)@h,%rx,%r31 9974 andnot (-1 - large_imm)@l,%r31,%rn 9975 9976 9977 File: as.info, Node: i960-Dependent, Next: IA-64-Dependent, Prev: i860-Dependent, Up: Machine Dependencies 9978 9979 9.15 Intel 80960 Dependent Features 9980 =================================== 9981 9982 * Menu: 9983 9984 * Options-i960:: i960 Command-line Options 9985 * Floating Point-i960:: Floating Point 9986 * Directives-i960:: i960 Machine Directives 9987 * Opcodes for i960:: i960 Opcodes 9988 9989 9990 File: as.info, Node: Options-i960, Next: Floating Point-i960, Up: i960-Dependent 9991 9992 9.15.1 i960 Command-line Options 9993 -------------------------------- 9994 9995 `-ACA | -ACA_A | -ACB | -ACC | -AKA | -AKB | -AKC | -AMC' 9996 Select the 80960 architecture. Instructions or features not 9997 supported by the selected architecture cause fatal errors. 9998 9999 `-ACA' is equivalent to `-ACA_A'; `-AKC' is equivalent to `-AMC'. 10000 Synonyms are provided for compatibility with other tools. 10001 10002 If you do not specify any of these options, `as' generates code 10003 for any instruction or feature that is supported by _some_ version 10004 of the 960 (even if this means mixing architectures!). In 10005 principle, `as' attempts to deduce the minimal sufficient 10006 processor type if none is specified; depending on the object code 10007 format, the processor type may be recorded in the object file. If 10008 it is critical that the `as' output match a specific architecture, 10009 specify that architecture explicitly. 10010 10011 `-b' 10012 Add code to collect information about conditional branches taken, 10013 for later optimization using branch prediction bits. (The 10014 conditional branch instructions have branch prediction bits in the 10015 CA, CB, and CC architectures.) If BR represents a conditional 10016 branch instruction, the following represents the code generated by 10017 the assembler when `-b' is specified: 10018 10019 call INCREMENT ROUTINE 10020 .word 0 # pre-counter 10021 Label: BR 10022 call INCREMENT ROUTINE 10023 .word 0 # post-counter 10024 10025 The counter following a branch records the number of times that 10026 branch was _not_ taken; the difference between the two counters is 10027 the number of times the branch _was_ taken. 10028 10029 A table of every such `Label' is also generated, so that the 10030 external postprocessor `gbr960' (supplied by Intel) can locate all 10031 the counters. This table is always labeled `__BRANCH_TABLE__'; 10032 this is a local symbol to permit collecting statistics for many 10033 separate object files. The table is word aligned, and begins with 10034 a two-word header. The first word, initialized to 0, is used in 10035 maintaining linked lists of branch tables. The second word is a 10036 count of the number of entries in the table, which follow 10037 immediately: each is a word, pointing to one of the labels 10038 illustrated above. 10039 10040 +------------+------------+------------+ ... +------------+ 10041 | | | | | | 10042 | *NEXT | COUNT: N | *BRLAB 1 | | *BRLAB N | 10043 | | | | | | 10044 +------------+------------+------------+ ... +------------+ 10045 10046 __BRANCH_TABLE__ layout 10047 10048 The first word of the header is used to locate multiple branch 10049 tables, since each object file may contain one. Normally the links 10050 are maintained with a call to an initialization routine, placed at 10051 the beginning of each function in the file. The GNU C compiler 10052 generates these calls automatically when you give it a `-b' option. 10053 For further details, see the documentation of `gbr960'. 10054 10055 `-no-relax' 10056 Normally, Compare-and-Branch instructions with targets that require 10057 displacements greater than 13 bits (or that have external targets) 10058 are replaced with the corresponding compare (or `chkbit') and 10059 branch instructions. You can use the `-no-relax' option to 10060 specify that `as' should generate errors instead, if the target 10061 displacement is larger than 13 bits. 10062 10063 This option does not affect the Compare-and-Jump instructions; the 10064 code emitted for them is _always_ adjusted when necessary 10065 (depending on displacement size), regardless of whether you use 10066 `-no-relax'. 10067 10068 10069 File: as.info, Node: Floating Point-i960, Next: Directives-i960, Prev: Options-i960, Up: i960-Dependent 10070 10071 9.15.2 Floating Point 10072 --------------------- 10073 10074 `as' generates IEEE floating-point numbers for the directives `.float', 10075 `.double', `.extended', and `.single'. 10076 10077 10078 File: as.info, Node: Directives-i960, Next: Opcodes for i960, Prev: Floating Point-i960, Up: i960-Dependent 10079 10080 9.15.3 i960 Machine Directives 10081 ------------------------------ 10082 10083 `.bss SYMBOL, LENGTH, ALIGN' 10084 Reserve LENGTH bytes in the bss section for a local SYMBOL, 10085 aligned to the power of two specified by ALIGN. LENGTH and ALIGN 10086 must be positive absolute expressions. This directive differs 10087 from `.lcomm' only in that it permits you to specify an alignment. 10088 *Note `.lcomm': Lcomm. 10089 10090 `.extended FLONUMS' 10091 `.extended' expects zero or more flonums, separated by commas; for 10092 each flonum, `.extended' emits an IEEE extended-format (80-bit) 10093 floating-point number. 10094 10095 `.leafproc CALL-LAB, BAL-LAB' 10096 You can use the `.leafproc' directive in conjunction with the 10097 optimized `callj' instruction to enable faster calls of leaf 10098 procedures. If a procedure is known to call no other procedures, 10099 you may define an entry point that skips procedure prolog code 10100 (and that does not depend on system-supplied saved context), and 10101 declare it as the BAL-LAB using `.leafproc'. If the procedure 10102 also has an entry point that goes through the normal prolog, you 10103 can specify that entry point as CALL-LAB. 10104 10105 A `.leafproc' declaration is meant for use in conjunction with the 10106 optimized call instruction `callj'; the directive records the data 10107 needed later to choose between converting the `callj' into a `bal' 10108 or a `call'. 10109 10110 CALL-LAB is optional; if only one argument is present, or if the 10111 two arguments are identical, the single argument is assumed to be 10112 the `bal' entry point. 10113 10114 `.sysproc NAME, INDEX' 10115 The `.sysproc' directive defines a name for a system procedure. 10116 After you define it using `.sysproc', you can use NAME to refer to 10117 the system procedure identified by INDEX when calling procedures 10118 with the optimized call instruction `callj'. 10119 10120 Both arguments are required; INDEX must be between 0 and 31 10121 (inclusive). 10122 10123 10124 File: as.info, Node: Opcodes for i960, Prev: Directives-i960, Up: i960-Dependent 10125 10126 9.15.4 i960 Opcodes 10127 ------------------- 10128 10129 All Intel 960 machine instructions are supported; *note i960 10130 Command-line Options: Options-i960. for a discussion of selecting the 10131 instruction subset for a particular 960 architecture. 10132 10133 Some opcodes are processed beyond simply emitting a single 10134 corresponding instruction: `callj', and Compare-and-Branch or 10135 Compare-and-Jump instructions with target displacements larger than 13 10136 bits. 10137 10138 * Menu: 10139 10140 * callj-i960:: `callj' 10141 * Compare-and-branch-i960:: Compare-and-Branch 10142 10143 10144 File: as.info, Node: callj-i960, Next: Compare-and-branch-i960, Up: Opcodes for i960 10145 10146 9.15.4.1 `callj' 10147 ................ 10148 10149 You can write `callj' to have the assembler or the linker determine the 10150 most appropriate form of subroutine call: `call', `bal', or `calls'. 10151 If the assembly source contains enough information--a `.leafproc' or 10152 `.sysproc' directive defining the operand--then `as' translates the 10153 `callj'; if not, it simply emits the `callj', leaving it for the linker 10154 to resolve. 10155 10156 10157 File: as.info, Node: Compare-and-branch-i960, Prev: callj-i960, Up: Opcodes for i960 10158 10159 9.15.4.2 Compare-and-Branch 10160 ........................... 10161 10162 The 960 architectures provide combined Compare-and-Branch instructions 10163 that permit you to store the branch target in the lower 13 bits of the 10164 instruction word itself. However, if you specify a branch target far 10165 enough away that its address won't fit in 13 bits, the assembler can 10166 either issue an error, or convert your Compare-and-Branch instruction 10167 into separate instructions to do the compare and the branch. 10168 10169 Whether `as' gives an error or expands the instruction depends on 10170 two choices you can make: whether you use the `-no-relax' option, and 10171 whether you use a "Compare and Branch" instruction or a "Compare and 10172 Jump" instruction. The "Jump" instructions are _always_ expanded if 10173 necessary; the "Branch" instructions are expanded when necessary 10174 _unless_ you specify `-no-relax'--in which case `as' gives an error 10175 instead. 10176 10177 These are the Compare-and-Branch instructions, their "Jump" variants, 10178 and the instruction pairs they may expand into: 10179 10180 Compare and 10181 Branch Jump Expanded to 10182 ------ ------ ------------ 10183 bbc chkbit; bno 10184 bbs chkbit; bo 10185 cmpibe cmpije cmpi; be 10186 cmpibg cmpijg cmpi; bg 10187 cmpibge cmpijge cmpi; bge 10188 cmpibl cmpijl cmpi; bl 10189 cmpible cmpijle cmpi; ble 10190 cmpibno cmpijno cmpi; bno 10191 cmpibne cmpijne cmpi; bne 10192 cmpibo cmpijo cmpi; bo 10193 cmpobe cmpoje cmpo; be 10194 cmpobg cmpojg cmpo; bg 10195 cmpobge cmpojge cmpo; bge 10196 cmpobl cmpojl cmpo; bl 10197 cmpoble cmpojle cmpo; ble 10198 cmpobne cmpojne cmpo; bne 10199 10200 10201 File: as.info, Node: IA-64-Dependent, Next: IP2K-Dependent, Prev: i960-Dependent, Up: Machine Dependencies 10202 10203 9.16 IA-64 Dependent Features 10204 ============================= 10205 10206 * Menu: 10207 10208 * IA-64 Options:: Options 10209 * IA-64 Syntax:: Syntax 10210 * IA-64 Opcodes:: Opcodes 10211 10212 10213 File: as.info, Node: IA-64 Options, Next: IA-64 Syntax, Up: IA-64-Dependent 10214 10215 9.16.1 Options 10216 -------------- 10217 10218 `-mconstant-gp' 10219 This option instructs the assembler to mark the resulting object 10220 file as using the "constant GP" model. With this model, it is 10221 assumed that the entire program uses a single global pointer (GP) 10222 value. Note that this option does not in any fashion affect the 10223 machine code emitted by the assembler. All it does is turn on the 10224 EF_IA_64_CONS_GP flag in the ELF file header. 10225 10226 `-mauto-pic' 10227 This option instructs the assembler to mark the resulting object 10228 file as using the "constant GP without function descriptor" data 10229 model. This model is like the "constant GP" model, except that it 10230 additionally does away with function descriptors. What this means 10231 is that the address of a function refers directly to the 10232 function's code entry-point. Normally, such an address would 10233 refer to a function descriptor, which contains both the code 10234 entry-point and the GP-value needed by the function. Note that 10235 this option does not in any fashion affect the machine code 10236 emitted by the assembler. All it does is turn on the 10237 EF_IA_64_NOFUNCDESC_CONS_GP flag in the ELF file header. 10238 10239 `-milp32' 10240 10241 `-milp64' 10242 10243 `-mlp64' 10244 10245 `-mp64' 10246 These options select the data model. The assembler defaults to 10247 `-mlp64' (LP64 data model). 10248 10249 `-mle' 10250 10251 `-mbe' 10252 These options select the byte order. The `-mle' option selects 10253 little-endian byte order (default) and `-mbe' selects big-endian 10254 byte order. Note that IA-64 machine code always uses 10255 little-endian byte order. 10256 10257 `-mtune=itanium1' 10258 10259 `-mtune=itanium2' 10260 Tune for a particular IA-64 CPU, ITANIUM1 or ITANIUM2. The default 10261 is ITANIUM2. 10262 10263 `-munwind-check=warning' 10264 10265 `-munwind-check=error' 10266 These options control what the assembler will do when performing 10267 consistency checks on unwind directives. `-munwind-check=warning' 10268 will make the assembler issue a warning when an unwind directive 10269 check fails. This is the default. `-munwind-check=error' will 10270 make the assembler issue an error when an unwind directive check 10271 fails. 10272 10273 `-mhint.b=ok' 10274 10275 `-mhint.b=warning' 10276 10277 `-mhint.b=error' 10278 These options control what the assembler will do when the `hint.b' 10279 instruction is used. `-mhint.b=ok' will make the assembler accept 10280 `hint.b'. `-mint.b=warning' will make the assembler issue a 10281 warning when `hint.b' is used. `-mhint.b=error' will make the 10282 assembler treat `hint.b' as an error, which is the default. 10283 10284 `-x' 10285 10286 `-xexplicit' 10287 These options turn on dependency violation checking. 10288 10289 `-xauto' 10290 This option instructs the assembler to automatically insert stop 10291 bits where necessary to remove dependency violations. This is the 10292 default mode. 10293 10294 `-xnone' 10295 This option turns off dependency violation checking. 10296 10297 `-xdebug' 10298 This turns on debug output intended to help tracking down bugs in 10299 the dependency violation checker. 10300 10301 `-xdebugn' 10302 This is a shortcut for -xnone -xdebug. 10303 10304 `-xdebugx' 10305 This is a shortcut for -xexplicit -xdebug. 10306 10307 10308 10309 File: as.info, Node: IA-64 Syntax, Next: IA-64 Opcodes, Prev: IA-64 Options, Up: IA-64-Dependent 10310 10311 9.16.2 Syntax 10312 ------------- 10313 10314 The assembler syntax closely follows the IA-64 Assembly Language 10315 Reference Guide. 10316 10317 * Menu: 10318 10319 * IA-64-Chars:: Special Characters 10320 * IA-64-Regs:: Register Names 10321 * IA-64-Bits:: Bit Names 10322 10323 10324 File: as.info, Node: IA-64-Chars, Next: IA-64-Regs, Up: IA-64 Syntax 10325 10326 9.16.2.1 Special Characters 10327 ........................... 10328 10329 `//' is the line comment token. 10330 10331 `;' can be used instead of a newline to separate statements. 10332 10333 10334 File: as.info, Node: IA-64-Regs, Next: IA-64-Bits, Prev: IA-64-Chars, Up: IA-64 Syntax 10335 10336 9.16.2.2 Register Names 10337 ....................... 10338 10339 The 128 integer registers are referred to as `rN'. The 128 10340 floating-point registers are referred to as `fN'. The 128 application 10341 registers are referred to as `arN'. The 128 control registers are 10342 referred to as `crN'. The 64 one-bit predicate registers are referred 10343 to as `pN'. The 8 branch registers are referred to as `bN'. In 10344 addition, the assembler defines a number of aliases: `gp' (`r1'), `sp' 10345 (`r12'), `rp' (`b0'), `ret0' (`r8'), `ret1' (`r9'), `ret2' (`r10'), 10346 `ret3' (`r9'), `fargN' (`f8+N'), and `fretN' (`f8+N'). 10347 10348 For convenience, the assembler also defines aliases for all named 10349 application and control registers. For example, `ar.bsp' refers to the 10350 register backing store pointer (`ar17'). Similarly, `cr.eoi' refers to 10351 the end-of-interrupt register (`cr67'). 10352 10353 10354 File: as.info, Node: IA-64-Bits, Prev: IA-64-Regs, Up: IA-64 Syntax 10355 10356 9.16.2.3 IA-64 Processor-Status-Register (PSR) Bit Names 10357 ........................................................ 10358 10359 The assembler defines bit masks for each of the bits in the IA-64 10360 processor status register. For example, `psr.ic' corresponds to a 10361 value of 0x2000. These masks are primarily intended for use with the 10362 `ssm'/`sum' and `rsm'/`rum' instructions, but they can be used anywhere 10363 else where an integer constant is expected. 10364 10365 10366 File: as.info, Node: IA-64 Opcodes, Prev: IA-64 Syntax, Up: IA-64-Dependent 10367 10368 9.16.3 Opcodes 10369 -------------- 10370 10371 For detailed information on the IA-64 machine instruction set, see the 10372 IA-64 Architecture Handbook 10373 (http://developer.intel.com/design/itanium/arch_spec.htm). 10374 10375 10376 File: as.info, Node: IP2K-Dependent, Next: M32C-Dependent, Prev: IA-64-Dependent, Up: Machine Dependencies 10377 10378 9.17 IP2K Dependent Features 10379 ============================ 10380 10381 * Menu: 10382 10383 * IP2K-Opts:: IP2K Options 10384 10385 10386 File: as.info, Node: IP2K-Opts, Up: IP2K-Dependent 10387 10388 9.17.1 IP2K Options 10389 ------------------- 10390 10391 The Ubicom IP2K version of `as' has a few machine dependent options: 10392 10393 `-mip2022ext' 10394 `as' can assemble the extended IP2022 instructions, but it will 10395 only do so if this is specifically allowed via this command line 10396 option. 10397 10398 `-mip2022' 10399 This option restores the assembler's default behaviour of not 10400 permitting the extended IP2022 instructions to be assembled. 10401 10402 10403 10404 File: as.info, Node: M32C-Dependent, Next: M32R-Dependent, Prev: IP2K-Dependent, Up: Machine Dependencies 10405 10406 9.18 M32C Dependent Features 10407 ============================ 10408 10409 `as' can assemble code for several different members of the Renesas 10410 M32C family. Normally the default is to assemble code for the M16C 10411 microprocessor. The `-m32c' option may be used to change the default 10412 to the M32C microprocessor. 10413 10414 * Menu: 10415 10416 * M32C-Opts:: M32C Options 10417 * M32C-Modifiers:: Symbolic Operand Modifiers 10418 10419 10420 File: as.info, Node: M32C-Opts, Next: M32C-Modifiers, Up: M32C-Dependent 10421 10422 9.18.1 M32C Options 10423 ------------------- 10424 10425 The Renesas M32C version of `as' has these machine-dependent options: 10426 10427 `-m32c' 10428 Assemble M32C instructions. 10429 10430 `-m16c' 10431 Assemble M16C instructions (default). 10432 10433 `-relax' 10434 Enable support for link-time relaxations. 10435 10436 `-h-tick-hex' 10437 Support H'00 style hex constants in addition to 0x00 style. 10438 10439 10440 10441 File: as.info, Node: M32C-Modifiers, Prev: M32C-Opts, Up: M32C-Dependent 10442 10443 9.18.2 Symbolic Operand Modifiers 10444 --------------------------------- 10445 10446 The assembler supports several modifiers when using symbol addresses in 10447 M32C instruction operands. The general syntax is the following: 10448 10449 %modifier(symbol) 10450 10451 `%dsp8' 10452 `%dsp16' 10453 These modifiers override the assembler's assumptions about how big 10454 a symbol's address is. Normally, when it sees an operand like 10455 `sym[a0]' it assumes `sym' may require the widest displacement 10456 field (16 bits for `-m16c', 24 bits for `-m32c'). These modifiers 10457 tell it to assume the address will fit in an 8 or 16 bit 10458 (respectively) unsigned displacement. Note that, of course, if it 10459 doesn't actually fit you will get linker errors. Example: 10460 10461 mov.w %dsp8(sym)[a0],r1 10462 mov.b #0,%dsp8(sym)[a0] 10463 10464 `%hi8' 10465 This modifier allows you to load bits 16 through 23 of a 24 bit 10466 address into an 8 bit register. This is useful with, for example, 10467 the M16C `smovf' instruction, which expects a 20 bit address in 10468 `r1h' and `a0'. Example: 10469 10470 mov.b #%hi8(sym),r1h 10471 mov.w #%lo16(sym),a0 10472 smovf.b 10473 10474 `%lo16' 10475 Likewise, this modifier allows you to load bits 0 through 15 of a 10476 24 bit address into a 16 bit register. 10477 10478 `%hi16' 10479 This modifier allows you to load bits 16 through 31 of a 32 bit 10480 address into a 16 bit register. While the M32C family only has 24 10481 bits of address space, it does support addresses in pairs of 16 bit 10482 registers (like `a1a0' for the `lde' instruction). This modifier 10483 is for loading the upper half in such cases. Example: 10484 10485 mov.w #%hi16(sym),a1 10486 mov.w #%lo16(sym),a0 10487 ... 10488 lde.w [a1a0],r1 10489 10490 10491 10492 File: as.info, Node: M32R-Dependent, Next: M68K-Dependent, Prev: M32C-Dependent, Up: Machine Dependencies 10493 10494 9.19 M32R Dependent Features 10495 ============================ 10496 10497 * Menu: 10498 10499 * M32R-Opts:: M32R Options 10500 * M32R-Directives:: M32R Directives 10501 * M32R-Warnings:: M32R Warnings 10502 10503 10504 File: as.info, Node: M32R-Opts, Next: M32R-Directives, Up: M32R-Dependent 10505 10506 9.19.1 M32R Options 10507 ------------------- 10508 10509 The Renease M32R version of `as' has a few machine dependent options: 10510 10511 `-m32rx' 10512 `as' can assemble code for several different members of the 10513 Renesas M32R family. Normally the default is to assemble code for 10514 the M32R microprocessor. This option may be used to change the 10515 default to the M32RX microprocessor, which adds some more 10516 instructions to the basic M32R instruction set, and some 10517 additional parameters to some of the original instructions. 10518 10519 `-m32r2' 10520 This option changes the target processor to the the M32R2 10521 microprocessor. 10522 10523 `-m32r' 10524 This option can be used to restore the assembler's default 10525 behaviour of assembling for the M32R microprocessor. This can be 10526 useful if the default has been changed by a previous command line 10527 option. 10528 10529 `-little' 10530 This option tells the assembler to produce little-endian code and 10531 data. The default is dependent upon how the toolchain was 10532 configured. 10533 10534 `-EL' 10535 This is a synonym for _-little_. 10536 10537 `-big' 10538 This option tells the assembler to produce big-endian code and 10539 data. 10540 10541 `-EB' 10542 This is a synonum for _-big_. 10543 10544 `-KPIC' 10545 This option specifies that the output of the assembler should be 10546 marked as position-independent code (PIC). 10547 10548 `-parallel' 10549 This option tells the assembler to attempts to combine two 10550 sequential instructions into a single, parallel instruction, where 10551 it is legal to do so. 10552 10553 `-no-parallel' 10554 This option disables a previously enabled _-parallel_ option. 10555 10556 `-no-bitinst' 10557 This option disables the support for the extended bit-field 10558 instructions provided by the M32R2. If this support needs to be 10559 re-enabled the _-bitinst_ switch can be used to restore it. 10560 10561 `-O' 10562 This option tells the assembler to attempt to optimize the 10563 instructions that it produces. This includes filling delay slots 10564 and converting sequential instructions into parallel ones. This 10565 option implies _-parallel_. 10566 10567 `-warn-explicit-parallel-conflicts' 10568 Instructs `as' to produce warning messages when questionable 10569 parallel instructions are encountered. This option is enabled by 10570 default, but `gcc' disables it when it invokes `as' directly. 10571 Questionable instructions are those whose behaviour would be 10572 different if they were executed sequentially. For example the 10573 code fragment `mv r1, r2 || mv r3, r1' produces a different result 10574 from `mv r1, r2 \n mv r3, r1' since the former moves r1 into r3 10575 and then r2 into r1, whereas the later moves r2 into r1 and r3. 10576 10577 `-Wp' 10578 This is a shorter synonym for the 10579 _-warn-explicit-parallel-conflicts_ option. 10580 10581 `-no-warn-explicit-parallel-conflicts' 10582 Instructs `as' not to produce warning messages when questionable 10583 parallel instructions are encountered. 10584 10585 `-Wnp' 10586 This is a shorter synonym for the 10587 _-no-warn-explicit-parallel-conflicts_ option. 10588 10589 `-ignore-parallel-conflicts' 10590 This option tells the assembler's to stop checking parallel 10591 instructions for constraint violations. This ability is provided 10592 for hardware vendors testing chip designs and should not be used 10593 under normal circumstances. 10594 10595 `-no-ignore-parallel-conflicts' 10596 This option restores the assembler's default behaviour of checking 10597 parallel instructions to detect constraint violations. 10598 10599 `-Ip' 10600 This is a shorter synonym for the _-ignore-parallel-conflicts_ 10601 option. 10602 10603 `-nIp' 10604 This is a shorter synonym for the _-no-ignore-parallel-conflicts_ 10605 option. 10606 10607 `-warn-unmatched-high' 10608 This option tells the assembler to produce a warning message if a 10609 `.high' pseudo op is encountered without a matching `.low' pseudo 10610 op. The presence of such an unmatched pseudo op usually indicates 10611 a programming error. 10612 10613 `-no-warn-unmatched-high' 10614 Disables a previously enabled _-warn-unmatched-high_ option. 10615 10616 `-Wuh' 10617 This is a shorter synonym for the _-warn-unmatched-high_ option. 10618 10619 `-Wnuh' 10620 This is a shorter synonym for the _-no-warn-unmatched-high_ option. 10621 10622 10623 10624 File: as.info, Node: M32R-Directives, Next: M32R-Warnings, Prev: M32R-Opts, Up: M32R-Dependent 10625 10626 9.19.2 M32R Directives 10627 ---------------------- 10628 10629 The Renease M32R version of `as' has a few architecture specific 10630 directives: 10631 10632 `low EXPRESSION' 10633 The `low' directive computes the value of its expression and 10634 places the lower 16-bits of the result into the immediate-field of 10635 the instruction. For example: 10636 10637 or3 r0, r0, #low(0x12345678) ; compute r0 = r0 | 0x5678 10638 add3, r0, r0, #low(fred) ; compute r0 = r0 + low 16-bits of address of fred 10639 10640 `high EXPRESSION' 10641 The `high' directive computes the value of its expression and 10642 places the upper 16-bits of the result into the immediate-field of 10643 the instruction. For example: 10644 10645 seth r0, #high(0x12345678) ; compute r0 = 0x12340000 10646 seth, r0, #high(fred) ; compute r0 = upper 16-bits of address of fred 10647 10648 `shigh EXPRESSION' 10649 The `shigh' directive is very similar to the `high' directive. It 10650 also computes the value of its expression and places the upper 10651 16-bits of the result into the immediate-field of the instruction. 10652 The difference is that `shigh' also checks to see if the lower 10653 16-bits could be interpreted as a signed number, and if so it 10654 assumes that a borrow will occur from the upper-16 bits. To 10655 compensate for this the `shigh' directive pre-biases the upper 16 10656 bit value by adding one to it. For example: 10657 10658 For example: 10659 10660 seth r0, #shigh(0x12345678) ; compute r0 = 0x12340000 10661 seth r0, #shigh(0x00008000) ; compute r0 = 0x00010000 10662 10663 In the second example the lower 16-bits are 0x8000. If these are 10664 treated as a signed value and sign extended to 32-bits then the 10665 value becomes 0xffff8000. If this value is then added to 10666 0x00010000 then the result is 0x00008000. 10667 10668 This behaviour is to allow for the different semantics of the 10669 `or3' and `add3' instructions. The `or3' instruction treats its 10670 16-bit immediate argument as unsigned whereas the `add3' treats 10671 its 16-bit immediate as a signed value. So for example: 10672 10673 seth r0, #shigh(0x00008000) 10674 add3 r0, r0, #low(0x00008000) 10675 10676 Produces the correct result in r0, whereas: 10677 10678 seth r0, #shigh(0x00008000) 10679 or3 r0, r0, #low(0x00008000) 10680 10681 Stores 0xffff8000 into r0. 10682 10683 Note - the `shigh' directive does not know where in the assembly 10684 source code the lower 16-bits of the value are going set, so it 10685 cannot check to make sure that an `or3' instruction is being used 10686 rather than an `add3' instruction. It is up to the programmer to 10687 make sure that correct directives are used. 10688 10689 `.m32r' 10690 The directive performs a similar thing as the _-m32r_ command line 10691 option. It tells the assembler to only accept M32R instructions 10692 from now on. An instructions from later M32R architectures are 10693 refused. 10694 10695 `.m32rx' 10696 The directive performs a similar thing as the _-m32rx_ command 10697 line option. It tells the assembler to start accepting the extra 10698 instructions in the M32RX ISA as well as the ordinary M32R ISA. 10699 10700 `.m32r2' 10701 The directive performs a similar thing as the _-m32r2_ command 10702 line option. It tells the assembler to start accepting the extra 10703 instructions in the M32R2 ISA as well as the ordinary M32R ISA. 10704 10705 `.little' 10706 The directive performs a similar thing as the _-little_ command 10707 line option. It tells the assembler to start producing 10708 little-endian code and data. This option should be used with care 10709 as producing mixed-endian binary files is fraught with danger. 10710 10711 `.big' 10712 The directive performs a similar thing as the _-big_ command line 10713 option. It tells the assembler to start producing big-endian code 10714 and data. This option should be used with care as producing 10715 mixed-endian binary files is fraught with danger. 10716 10717 10718 10719 File: as.info, Node: M32R-Warnings, Prev: M32R-Directives, Up: M32R-Dependent 10720 10721 9.19.3 M32R Warnings 10722 -------------------- 10723 10724 There are several warning and error messages that can be produced by 10725 `as' which are specific to the M32R: 10726 10727 `output of 1st instruction is the same as an input to 2nd instruction - is this intentional ?' 10728 This message is only produced if warnings for explicit parallel 10729 conflicts have been enabled. It indicates that the assembler has 10730 encountered a parallel instruction in which the destination 10731 register of the left hand instruction is used as an input register 10732 in the right hand instruction. For example in this code fragment 10733 `mv r1, r2 || neg r3, r1' register r1 is the destination of the 10734 move instruction and the input to the neg instruction. 10735 10736 `output of 2nd instruction is the same as an input to 1st instruction - is this intentional ?' 10737 This message is only produced if warnings for explicit parallel 10738 conflicts have been enabled. It indicates that the assembler has 10739 encountered a parallel instruction in which the destination 10740 register of the right hand instruction is used as an input 10741 register in the left hand instruction. For example in this code 10742 fragment `mv r1, r2 || neg r2, r3' register r2 is the destination 10743 of the neg instruction and the input to the move instruction. 10744 10745 `instruction `...' is for the M32RX only' 10746 This message is produced when the assembler encounters an 10747 instruction which is only supported by the M32Rx processor, and 10748 the `-m32rx' command line flag has not been specified to allow 10749 assembly of such instructions. 10750 10751 `unknown instruction `...'' 10752 This message is produced when the assembler encounters an 10753 instruction which it does not recognize. 10754 10755 `only the NOP instruction can be issued in parallel on the m32r' 10756 This message is produced when the assembler encounters a parallel 10757 instruction which does not involve a NOP instruction and the 10758 `-m32rx' command line flag has not been specified. Only the M32Rx 10759 processor is able to execute two instructions in parallel. 10760 10761 `instruction `...' cannot be executed in parallel.' 10762 This message is produced when the assembler encounters a parallel 10763 instruction which is made up of one or two instructions which 10764 cannot be executed in parallel. 10765 10766 `Instructions share the same execution pipeline' 10767 This message is produced when the assembler encounters a parallel 10768 instruction whoes components both use the same execution pipeline. 10769 10770 `Instructions write to the same destination register.' 10771 This message is produced when the assembler encounters a parallel 10772 instruction where both components attempt to modify the same 10773 register. For example these code fragments will produce this 10774 message: `mv r1, r2 || neg r1, r3' `jl r0 || mv r14, r1' `st r2, 10775 @-r1 || mv r1, r3' `mv r1, r2 || ld r0, @r1+' `cmp r1, r2 || addx 10776 r3, r4' (Both write to the condition bit) 10777 10778 10779 10780 File: as.info, Node: M68K-Dependent, Next: M68HC11-Dependent, Prev: M32R-Dependent, Up: Machine Dependencies 10781 10782 9.20 M680x0 Dependent Features 10783 ============================== 10784 10785 * Menu: 10786 10787 * M68K-Opts:: M680x0 Options 10788 * M68K-Syntax:: Syntax 10789 * M68K-Moto-Syntax:: Motorola Syntax 10790 * M68K-Float:: Floating Point 10791 * M68K-Directives:: 680x0 Machine Directives 10792 * M68K-opcodes:: Opcodes 10793 10794 10795 File: as.info, Node: M68K-Opts, Next: M68K-Syntax, Up: M68K-Dependent 10796 10797 9.20.1 M680x0 Options 10798 --------------------- 10799 10800 The Motorola 680x0 version of `as' has a few machine dependent options: 10801 10802 `-march=ARCHITECTURE' 10803 This option specifies a target architecture. The following 10804 architectures are recognized: `68000', `68010', `68020', `68030', 10805 `68040', `68060', `cpu32', `isaa', `isaaplus', `isab', `isac' and 10806 `cfv4e'. 10807 10808 `-mcpu=CPU' 10809 This option specifies a target cpu. When used in conjunction with 10810 the `-march' option, the cpu must be within the specified 10811 architecture. Also, the generic features of the architecture are 10812 used for instruction generation, rather than those of the specific 10813 chip. 10814 10815 `-m[no-]68851' 10816 10817 `-m[no-]68881' 10818 10819 `-m[no-]div' 10820 10821 `-m[no-]usp' 10822 10823 `-m[no-]float' 10824 10825 `-m[no-]mac' 10826 10827 `-m[no-]emac' 10828 Enable or disable various architecture specific features. If a 10829 chip or architecture by default supports an option (for instance 10830 `-march=isaaplus' includes the `-mdiv' option), explicitly 10831 disabling the option will override the default. 10832 10833 `-l' 10834 You can use the `-l' option to shorten the size of references to 10835 undefined symbols. If you do not use the `-l' option, references 10836 to undefined symbols are wide enough for a full `long' (32 bits). 10837 (Since `as' cannot know where these symbols end up, `as' can only 10838 allocate space for the linker to fill in later. Since `as' does 10839 not know how far away these symbols are, it allocates as much 10840 space as it can.) If you use this option, the references are only 10841 one word wide (16 bits). This may be useful if you want the 10842 object file to be as small as possible, and you know that the 10843 relevant symbols are always less than 17 bits away. 10844 10845 `--register-prefix-optional' 10846 For some configurations, especially those where the compiler 10847 normally does not prepend an underscore to the names of user 10848 variables, the assembler requires a `%' before any use of a 10849 register name. This is intended to let the assembler distinguish 10850 between C variables and functions named `a0' through `a7', and so 10851 on. The `%' is always accepted, but is not required for certain 10852 configurations, notably `sun3'. The `--register-prefix-optional' 10853 option may be used to permit omitting the `%' even for 10854 configurations for which it is normally required. If this is 10855 done, it will generally be impossible to refer to C variables and 10856 functions with the same names as register names. 10857 10858 `--bitwise-or' 10859 Normally the character `|' is treated as a comment character, which 10860 means that it can not be used in expressions. The `--bitwise-or' 10861 option turns `|' into a normal character. In this mode, you must 10862 either use C style comments, or start comments with a `#' character 10863 at the beginning of a line. 10864 10865 `--base-size-default-16 --base-size-default-32' 10866 If you use an addressing mode with a base register without 10867 specifying the size, `as' will normally use the full 32 bit value. 10868 For example, the addressing mode `%a0@(%d0)' is equivalent to 10869 `%a0@(%d0:l)'. You may use the `--base-size-default-16' option to 10870 tell `as' to default to using the 16 bit value. In this case, 10871 `%a0@(%d0)' is equivalent to `%a0@(%d0:w)'. You may use the 10872 `--base-size-default-32' option to restore the default behaviour. 10873 10874 `--disp-size-default-16 --disp-size-default-32' 10875 If you use an addressing mode with a displacement, and the value 10876 of the displacement is not known, `as' will normally assume that 10877 the value is 32 bits. For example, if the symbol `disp' has not 10878 been defined, `as' will assemble the addressing mode 10879 `%a0@(disp,%d0)' as though `disp' is a 32 bit value. You may use 10880 the `--disp-size-default-16' option to tell `as' to instead assume 10881 that the displacement is 16 bits. In this case, `as' will 10882 assemble `%a0@(disp,%d0)' as though `disp' is a 16 bit value. You 10883 may use the `--disp-size-default-32' option to restore the default 10884 behaviour. 10885 10886 `--pcrel' 10887 Always keep branches PC-relative. In the M680x0 architecture all 10888 branches are defined as PC-relative. However, on some processors 10889 they are limited to word displacements maximum. When `as' needs a 10890 long branch that is not available, it normally emits an absolute 10891 jump instead. This option disables this substitution. When this 10892 option is given and no long branches are available, only word 10893 branches will be emitted. An error message will be generated if a 10894 word branch cannot reach its target. This option has no effect on 10895 68020 and other processors that have long branches. *note Branch 10896 Improvement: M68K-Branch. 10897 10898 `-m68000' 10899 `as' can assemble code for several different members of the 10900 Motorola 680x0 family. The default depends upon how `as' was 10901 configured when it was built; normally, the default is to assemble 10902 code for the 68020 microprocessor. The following options may be 10903 used to change the default. These options control which 10904 instructions and addressing modes are permitted. The members of 10905 the 680x0 family are very similar. For detailed information about 10906 the differences, see the Motorola manuals. 10907 10908 `-m68000' 10909 `-m68ec000' 10910 `-m68hc000' 10911 `-m68hc001' 10912 `-m68008' 10913 `-m68302' 10914 `-m68306' 10915 `-m68307' 10916 `-m68322' 10917 `-m68356' 10918 Assemble for the 68000. `-m68008', `-m68302', and so on are 10919 synonyms for `-m68000', since the chips are the same from the 10920 point of view of the assembler. 10921 10922 `-m68010' 10923 Assemble for the 68010. 10924 10925 `-m68020' 10926 `-m68ec020' 10927 Assemble for the 68020. This is normally the default. 10928 10929 `-m68030' 10930 `-m68ec030' 10931 Assemble for the 68030. 10932 10933 `-m68040' 10934 `-m68ec040' 10935 Assemble for the 68040. 10936 10937 `-m68060' 10938 `-m68ec060' 10939 Assemble for the 68060. 10940 10941 `-mcpu32' 10942 `-m68330' 10943 `-m68331' 10944 `-m68332' 10945 `-m68333' 10946 `-m68334' 10947 `-m68336' 10948 `-m68340' 10949 `-m68341' 10950 `-m68349' 10951 `-m68360' 10952 Assemble for the CPU32 family of chips. 10953 10954 `-m5200' 10955 10956 `-m5202' 10957 10958 `-m5204' 10959 10960 `-m5206' 10961 10962 `-m5206e' 10963 10964 `-m521x' 10965 10966 `-m5249' 10967 10968 `-m528x' 10969 10970 `-m5307' 10971 10972 `-m5407' 10973 10974 `-m547x' 10975 10976 `-m548x' 10977 10978 `-mcfv4' 10979 10980 `-mcfv4e' 10981 Assemble for the ColdFire family of chips. 10982 10983 `-m68881' 10984 `-m68882' 10985 Assemble 68881 floating point instructions. This is the 10986 default for the 68020, 68030, and the CPU32. The 68040 and 10987 68060 always support floating point instructions. 10988 10989 `-mno-68881' 10990 Do not assemble 68881 floating point instructions. This is 10991 the default for 68000 and the 68010. The 68040 and 68060 10992 always support floating point instructions, even if this 10993 option is used. 10994 10995 `-m68851' 10996 Assemble 68851 MMU instructions. This is the default for the 10997 68020, 68030, and 68060. The 68040 accepts a somewhat 10998 different set of MMU instructions; `-m68851' and `-m68040' 10999 should not be used together. 11000 11001 `-mno-68851' 11002 Do not assemble 68851 MMU instructions. This is the default 11003 for the 68000, 68010, and the CPU32. The 68040 accepts a 11004 somewhat different set of MMU instructions. 11005 11006 11007 File: as.info, Node: M68K-Syntax, Next: M68K-Moto-Syntax, Prev: M68K-Opts, Up: M68K-Dependent 11008 11009 9.20.2 Syntax 11010 ------------- 11011 11012 This syntax for the Motorola 680x0 was developed at MIT. 11013 11014 The 680x0 version of `as' uses instructions names and syntax 11015 compatible with the Sun assembler. Intervening periods are ignored; 11016 for example, `movl' is equivalent to `mov.l'. 11017 11018 In the following table APC stands for any of the address registers 11019 (`%a0' through `%a7'), the program counter (`%pc'), the zero-address 11020 relative to the program counter (`%zpc'), a suppressed address register 11021 (`%za0' through `%za7'), or it may be omitted entirely. The use of 11022 SIZE means one of `w' or `l', and it may be omitted, along with the 11023 leading colon, unless a scale is also specified. The use of SCALE 11024 means one of `1', `2', `4', or `8', and it may always be omitted along 11025 with the leading colon. 11026 11027 The following addressing modes are understood: 11028 "Immediate" 11029 `#NUMBER' 11030 11031 "Data Register" 11032 `%d0' through `%d7' 11033 11034 "Address Register" 11035 `%a0' through `%a7' 11036 `%a7' is also known as `%sp', i.e., the Stack Pointer. `%a6' is 11037 also known as `%fp', the Frame Pointer. 11038 11039 "Address Register Indirect" 11040 `%a0@' through `%a7@' 11041 11042 "Address Register Postincrement" 11043 `%a0@+' through `%a7@+' 11044 11045 "Address Register Predecrement" 11046 `%a0@-' through `%a7@-' 11047 11048 "Indirect Plus Offset" 11049 `APC@(NUMBER)' 11050 11051 "Index" 11052 `APC@(NUMBER,REGISTER:SIZE:SCALE)' 11053 11054 The NUMBER may be omitted. 11055 11056 "Postindex" 11057 `APC@(NUMBER)@(ONUMBER,REGISTER:SIZE:SCALE)' 11058 11059 The ONUMBER or the REGISTER, but not both, may be omitted. 11060 11061 "Preindex" 11062 `APC@(NUMBER,REGISTER:SIZE:SCALE)@(ONUMBER)' 11063 11064 The NUMBER may be omitted. Omitting the REGISTER produces the 11065 Postindex addressing mode. 11066 11067 "Absolute" 11068 `SYMBOL', or `DIGITS', optionally followed by `:b', `:w', or `:l'. 11069 11070 11071 File: as.info, Node: M68K-Moto-Syntax, Next: M68K-Float, Prev: M68K-Syntax, Up: M68K-Dependent 11072 11073 9.20.3 Motorola Syntax 11074 ---------------------- 11075 11076 The standard Motorola syntax for this chip differs from the syntax 11077 already discussed (*note Syntax: M68K-Syntax.). `as' can accept 11078 Motorola syntax for operands, even if MIT syntax is used for other 11079 operands in the same instruction. The two kinds of syntax are fully 11080 compatible. 11081 11082 In the following table APC stands for any of the address registers 11083 (`%a0' through `%a7'), the program counter (`%pc'), the zero-address 11084 relative to the program counter (`%zpc'), or a suppressed address 11085 register (`%za0' through `%za7'). The use of SIZE means one of `w' or 11086 `l', and it may always be omitted along with the leading dot. The use 11087 of SCALE means one of `1', `2', `4', or `8', and it may always be 11088 omitted along with the leading asterisk. 11089 11090 The following additional addressing modes are understood: 11091 11092 "Address Register Indirect" 11093 `(%a0)' through `(%a7)' 11094 `%a7' is also known as `%sp', i.e., the Stack Pointer. `%a6' is 11095 also known as `%fp', the Frame Pointer. 11096 11097 "Address Register Postincrement" 11098 `(%a0)+' through `(%a7)+' 11099 11100 "Address Register Predecrement" 11101 `-(%a0)' through `-(%a7)' 11102 11103 "Indirect Plus Offset" 11104 `NUMBER(%A0)' through `NUMBER(%A7)', or `NUMBER(%PC)'. 11105 11106 The NUMBER may also appear within the parentheses, as in 11107 `(NUMBER,%A0)'. When used with the PC, the NUMBER may be omitted 11108 (with an address register, omitting the NUMBER produces Address 11109 Register Indirect mode). 11110 11111 "Index" 11112 `NUMBER(APC,REGISTER.SIZE*SCALE)' 11113 11114 The NUMBER may be omitted, or it may appear within the 11115 parentheses. The APC may be omitted. The REGISTER and the APC 11116 may appear in either order. If both APC and REGISTER are address 11117 registers, and the SIZE and SCALE are omitted, then the first 11118 register is taken as the base register, and the second as the 11119 index register. 11120 11121 "Postindex" 11122 `([NUMBER,APC],REGISTER.SIZE*SCALE,ONUMBER)' 11123 11124 The ONUMBER, or the REGISTER, or both, may be omitted. Either the 11125 NUMBER or the APC may be omitted, but not both. 11126 11127 "Preindex" 11128 `([NUMBER,APC,REGISTER.SIZE*SCALE],ONUMBER)' 11129 11130 The NUMBER, or the APC, or the REGISTER, or any two of them, may 11131 be omitted. The ONUMBER may be omitted. The REGISTER and the APC 11132 may appear in either order. If both APC and REGISTER are address 11133 registers, and the SIZE and SCALE are omitted, then the first 11134 register is taken as the base register, and the second as the 11135 index register. 11136 11137 11138 File: as.info, Node: M68K-Float, Next: M68K-Directives, Prev: M68K-Moto-Syntax, Up: M68K-Dependent 11139 11140 9.20.4 Floating Point 11141 --------------------- 11142 11143 Packed decimal (P) format floating literals are not supported. Feel 11144 free to add the code! 11145 11146 The floating point formats generated by directives are these. 11147 11148 `.float' 11149 `Single' precision floating point constants. 11150 11151 `.double' 11152 `Double' precision floating point constants. 11153 11154 `.extend' 11155 `.ldouble' 11156 `Extended' precision (`long double') floating point constants. 11157 11158 11159 File: as.info, Node: M68K-Directives, Next: M68K-opcodes, Prev: M68K-Float, Up: M68K-Dependent 11160 11161 9.20.5 680x0 Machine Directives 11162 ------------------------------- 11163 11164 In order to be compatible with the Sun assembler the 680x0 assembler 11165 understands the following directives. 11166 11167 `.data1' 11168 This directive is identical to a `.data 1' directive. 11169 11170 `.data2' 11171 This directive is identical to a `.data 2' directive. 11172 11173 `.even' 11174 This directive is a special case of the `.align' directive; it 11175 aligns the output to an even byte boundary. 11176 11177 `.skip' 11178 This directive is identical to a `.space' directive. 11179 11180 `.arch NAME' 11181 Select the target architecture and extension features. Valid 11182 values for NAME are the same as for the `-march' command line 11183 option. This directive cannot be specified after any instructions 11184 have been assembled. If it is given multiple times, or in 11185 conjunction with the `-march' option, all uses must be for the 11186 same architecture and extension set. 11187 11188 `.cpu NAME' 11189 Select the target cpu. Valid valuse for NAME are the same as for 11190 the `-mcpu' command line option. This directive cannot be 11191 specified after any instructions have been assembled. If it is 11192 given multiple times, or in conjunction with the `-mopt' option, 11193 all uses must be for the same cpu. 11194 11195 11196 11197 File: as.info, Node: M68K-opcodes, Prev: M68K-Directives, Up: M68K-Dependent 11198 11199 9.20.6 Opcodes 11200 -------------- 11201 11202 * Menu: 11203 11204 * M68K-Branch:: Branch Improvement 11205 * M68K-Chars:: Special Characters 11206 11207 11208 File: as.info, Node: M68K-Branch, Next: M68K-Chars, Up: M68K-opcodes 11209 11210 9.20.6.1 Branch Improvement 11211 ........................... 11212 11213 Certain pseudo opcodes are permitted for branch instructions. They 11214 expand to the shortest branch instruction that reach the target. 11215 Generally these mnemonics are made by substituting `j' for `b' at the 11216 start of a Motorola mnemonic. 11217 11218 The following table summarizes the pseudo-operations. A `*' flags 11219 cases that are more fully described after the table: 11220 11221 Displacement 11222 +------------------------------------------------------------ 11223 | 68020 68000/10, not PC-relative OK 11224 Pseudo-Op |BYTE WORD LONG ABSOLUTE LONG JUMP ** 11225 +------------------------------------------------------------ 11226 jbsr |bsrs bsrw bsrl jsr 11227 jra |bras braw bral jmp 11228 * jXX |bXXs bXXw bXXl bNXs;jmp 11229 * dbXX | N/A dbXXw dbXX;bras;bral dbXX;bras;jmp 11230 fjXX | N/A fbXXw fbXXl N/A 11231 11232 XX: condition 11233 NX: negative of condition XX 11234 `*'--see full description below 11235 `**'--this expansion mode is disallowed by `--pcrel' 11236 11237 `jbsr' 11238 `jra' 11239 These are the simplest jump pseudo-operations; they always map to 11240 one particular machine instruction, depending on the displacement 11241 to the branch target. This instruction will be a byte or word 11242 branch is that is sufficient. Otherwise, a long branch will be 11243 emitted if available. If no long branches are available and the 11244 `--pcrel' option is not given, an absolute long jump will be 11245 emitted instead. If no long branches are available, the `--pcrel' 11246 option is given, and a word branch cannot reach the target, an 11247 error message is generated. 11248 11249 In addition to standard branch operands, `as' allows these 11250 pseudo-operations to have all operands that are allowed for jsr 11251 and jmp, substituting these instructions if the operand given is 11252 not valid for a branch instruction. 11253 11254 `jXX' 11255 Here, `jXX' stands for an entire family of pseudo-operations, 11256 where XX is a conditional branch or condition-code test. The full 11257 list of pseudo-ops in this family is: 11258 jhi jls jcc jcs jne jeq jvc 11259 jvs jpl jmi jge jlt jgt jle 11260 11261 Usually, each of these pseudo-operations expands to a single branch 11262 instruction. However, if a word branch is not sufficient, no long 11263 branches are available, and the `--pcrel' option is not given, `as' 11264 issues a longer code fragment in terms of NX, the opposite 11265 condition to XX. For example, under these conditions: 11266 jXX foo 11267 gives 11268 bNXs oof 11269 jmp foo 11270 oof: 11271 11272 `dbXX' 11273 The full family of pseudo-operations covered here is 11274 dbhi dbls dbcc dbcs dbne dbeq dbvc 11275 dbvs dbpl dbmi dbge dblt dbgt dble 11276 dbf dbra dbt 11277 11278 Motorola `dbXX' instructions allow word displacements only. When 11279 a word displacement is sufficient, each of these pseudo-operations 11280 expands to the corresponding Motorola instruction. When a word 11281 displacement is not sufficient and long branches are available, 11282 when the source reads `dbXX foo', `as' emits 11283 dbXX oo1 11284 bras oo2 11285 oo1:bral foo 11286 oo2: 11287 11288 If, however, long branches are not available and the `--pcrel' 11289 option is not given, `as' emits 11290 dbXX oo1 11291 bras oo2 11292 oo1:jmp foo 11293 oo2: 11294 11295 `fjXX' 11296 This family includes 11297 fjne fjeq fjge fjlt fjgt fjle fjf 11298 fjt fjgl fjgle fjnge fjngl fjngle fjngt 11299 fjnle fjnlt fjoge fjogl fjogt fjole fjolt 11300 fjor fjseq fjsf fjsne fjst fjueq fjuge 11301 fjugt fjule fjult fjun 11302 11303 Each of these pseudo-operations always expands to a single Motorola 11304 coprocessor branch instruction, word or long. All Motorola 11305 coprocessor branch instructions allow both word and long 11306 displacements. 11307 11308 11309 11310 File: as.info, Node: M68K-Chars, Prev: M68K-Branch, Up: M68K-opcodes 11311 11312 9.20.6.2 Special Characters 11313 ........................... 11314 11315 The immediate character is `#' for Sun compatibility. The line-comment 11316 character is `|' (unless the `--bitwise-or' option is used). If a `#' 11317 appears at the beginning of a line, it is treated as a comment unless 11318 it looks like `# line file', in which case it is treated normally. 11319 11320 11321 File: as.info, Node: M68HC11-Dependent, Next: MIPS-Dependent, Prev: M68K-Dependent, Up: Machine Dependencies 11322 11323 9.21 M68HC11 and M68HC12 Dependent Features 11324 =========================================== 11325 11326 * Menu: 11327 11328 * M68HC11-Opts:: M68HC11 and M68HC12 Options 11329 * M68HC11-Syntax:: Syntax 11330 * M68HC11-Modifiers:: Symbolic Operand Modifiers 11331 * M68HC11-Directives:: Assembler Directives 11332 * M68HC11-Float:: Floating Point 11333 * M68HC11-opcodes:: Opcodes 11334 11335 11336 File: as.info, Node: M68HC11-Opts, Next: M68HC11-Syntax, Up: M68HC11-Dependent 11337 11338 9.21.1 M68HC11 and M68HC12 Options 11339 ---------------------------------- 11340 11341 The Motorola 68HC11 and 68HC12 version of `as' have a few machine 11342 dependent options. 11343 11344 `-m68hc11' 11345 This option switches the assembler in the M68HC11 mode. In this 11346 mode, the assembler only accepts 68HC11 operands and mnemonics. It 11347 produces code for the 68HC11. 11348 11349 `-m68hc12' 11350 This option switches the assembler in the M68HC12 mode. In this 11351 mode, the assembler also accepts 68HC12 operands and mnemonics. It 11352 produces code for the 68HC12. A few 68HC11 instructions are 11353 replaced by some 68HC12 instructions as recommended by Motorola 11354 specifications. 11355 11356 `-m68hcs12' 11357 This option switches the assembler in the M68HCS12 mode. This 11358 mode is similar to `-m68hc12' but specifies to assemble for the 11359 68HCS12 series. The only difference is on the assembling of the 11360 `movb' and `movw' instruction when a PC-relative operand is used. 11361 11362 `-mshort' 11363 This option controls the ABI and indicates to use a 16-bit integer 11364 ABI. It has no effect on the assembled instructions. This is the 11365 default. 11366 11367 `-mlong' 11368 This option controls the ABI and indicates to use a 32-bit integer 11369 ABI. 11370 11371 `-mshort-double' 11372 This option controls the ABI and indicates to use a 32-bit float 11373 ABI. This is the default. 11374 11375 `-mlong-double' 11376 This option controls the ABI and indicates to use a 64-bit float 11377 ABI. 11378 11379 `--strict-direct-mode' 11380 You can use the `--strict-direct-mode' option to disable the 11381 automatic translation of direct page mode addressing into extended 11382 mode when the instruction does not support direct mode. For 11383 example, the `clr' instruction does not support direct page mode 11384 addressing. When it is used with the direct page mode, `as' will 11385 ignore it and generate an absolute addressing. This option 11386 prevents `as' from doing this, and the wrong usage of the direct 11387 page mode will raise an error. 11388 11389 `--short-branches' 11390 The `--short-branches' option turns off the translation of 11391 relative branches into absolute branches when the branch offset is 11392 out of range. By default `as' transforms the relative branch 11393 (`bsr', `bgt', `bge', `beq', `bne', `ble', `blt', `bhi', `bcc', 11394 `bls', `bcs', `bmi', `bvs', `bvs', `bra') into an absolute branch 11395 when the offset is out of the -128 .. 127 range. In that case, 11396 the `bsr' instruction is translated into a `jsr', the `bra' 11397 instruction is translated into a `jmp' and the conditional 11398 branches instructions are inverted and followed by a `jmp'. This 11399 option disables these translations and `as' will generate an error 11400 if a relative branch is out of range. This option does not affect 11401 the optimization associated to the `jbra', `jbsr' and `jbXX' 11402 pseudo opcodes. 11403 11404 `--force-long-branches' 11405 The `--force-long-branches' option forces the translation of 11406 relative branches into absolute branches. This option does not 11407 affect the optimization associated to the `jbra', `jbsr' and 11408 `jbXX' pseudo opcodes. 11409 11410 `--print-insn-syntax' 11411 You can use the `--print-insn-syntax' option to obtain the syntax 11412 description of the instruction when an error is detected. 11413 11414 `--print-opcodes' 11415 The `--print-opcodes' option prints the list of all the 11416 instructions with their syntax. The first item of each line 11417 represents the instruction name and the rest of the line indicates 11418 the possible operands for that instruction. The list is printed in 11419 alphabetical order. Once the list is printed `as' exits. 11420 11421 `--generate-example' 11422 The `--generate-example' option is similar to `--print-opcodes' 11423 but it generates an example for each instruction instead. 11424 11425 11426 File: as.info, Node: M68HC11-Syntax, Next: M68HC11-Modifiers, Prev: M68HC11-Opts, Up: M68HC11-Dependent 11427 11428 9.21.2 Syntax 11429 ------------- 11430 11431 In the M68HC11 syntax, the instruction name comes first and it may be 11432 followed by one or several operands (up to three). Operands are 11433 separated by comma (`,'). In the normal mode, `as' will complain if too 11434 many operands are specified for a given instruction. In the MRI mode 11435 (turned on with `-M' option), it will treat them as comments. Example: 11436 11437 inx 11438 lda #23 11439 bset 2,x #4 11440 brclr *bot #8 foo 11441 11442 The following addressing modes are understood for 68HC11 and 68HC12: 11443 "Immediate" 11444 `#NUMBER' 11445 11446 "Address Register" 11447 `NUMBER,X', `NUMBER,Y' 11448 11449 The NUMBER may be omitted in which case 0 is assumed. 11450 11451 "Direct Addressing mode" 11452 `*SYMBOL', or `*DIGITS' 11453 11454 "Absolute" 11455 `SYMBOL', or `DIGITS' 11456 11457 The M68HC12 has other more complex addressing modes. All of them are 11458 supported and they are represented below: 11459 11460 "Constant Offset Indexed Addressing Mode" 11461 `NUMBER,REG' 11462 11463 The NUMBER may be omitted in which case 0 is assumed. The 11464 register can be either `X', `Y', `SP' or `PC'. The assembler will 11465 use the smaller post-byte definition according to the constant 11466 value (5-bit constant offset, 9-bit constant offset or 16-bit 11467 constant offset). If the constant is not known by the assembler 11468 it will use the 16-bit constant offset post-byte and the value 11469 will be resolved at link time. 11470 11471 "Offset Indexed Indirect" 11472 `[NUMBER,REG]' 11473 11474 The register can be either `X', `Y', `SP' or `PC'. 11475 11476 "Auto Pre-Increment/Pre-Decrement/Post-Increment/Post-Decrement" 11477 `NUMBER,-REG' `NUMBER,+REG' `NUMBER,REG-' `NUMBER,REG+' 11478 11479 The number must be in the range `-8'..`+8' and must not be 0. The 11480 register can be either `X', `Y', `SP' or `PC'. 11481 11482 "Accumulator Offset" 11483 `ACC,REG' 11484 11485 The accumulator register can be either `A', `B' or `D'. The 11486 register can be either `X', `Y', `SP' or `PC'. 11487 11488 "Accumulator D offset indexed-indirect" 11489 `[D,REG]' 11490 11491 The register can be either `X', `Y', `SP' or `PC'. 11492 11493 11494 For example: 11495 11496 ldab 1024,sp 11497 ldd [10,x] 11498 orab 3,+x 11499 stab -2,y- 11500 ldx a,pc 11501 sty [d,sp] 11502 11503 11504 File: as.info, Node: M68HC11-Modifiers, Next: M68HC11-Directives, Prev: M68HC11-Syntax, Up: M68HC11-Dependent 11505 11506 9.21.3 Symbolic Operand Modifiers 11507 --------------------------------- 11508 11509 The assembler supports several modifiers when using symbol addresses in 11510 68HC11 and 68HC12 instruction operands. The general syntax is the 11511 following: 11512 11513 %modifier(symbol) 11514 11515 `%addr' 11516 This modifier indicates to the assembler and linker to use the 11517 16-bit physical address corresponding to the symbol. This is 11518 intended to be used on memory window systems to map a symbol in 11519 the memory bank window. If the symbol is in a memory expansion 11520 part, the physical address corresponds to the symbol address 11521 within the memory bank window. If the symbol is not in a memory 11522 expansion part, this is the symbol address (using or not using the 11523 %addr modifier has no effect in that case). 11524 11525 `%page' 11526 This modifier indicates to use the memory page number corresponding 11527 to the symbol. If the symbol is in a memory expansion part, its 11528 page number is computed by the linker as a number used to map the 11529 page containing the symbol in the memory bank window. If the 11530 symbol is not in a memory expansion part, the page number is 0. 11531 11532 `%hi' 11533 This modifier indicates to use the 8-bit high part of the physical 11534 address of the symbol. 11535 11536 `%lo' 11537 This modifier indicates to use the 8-bit low part of the physical 11538 address of the symbol. 11539 11540 11541 For example a 68HC12 call to a function `foo_example' stored in 11542 memory expansion part could be written as follows: 11543 11544 call %addr(foo_example),%page(foo_example) 11545 11546 and this is equivalent to 11547 11548 call foo_example 11549 11550 And for 68HC11 it could be written as follows: 11551 11552 ldab #%page(foo_example) 11553 stab _page_switch 11554 jsr %addr(foo_example) 11555 11556 11557 File: as.info, Node: M68HC11-Directives, Next: M68HC11-Float, Prev: M68HC11-Modifiers, Up: M68HC11-Dependent 11558 11559 9.21.4 Assembler Directives 11560 --------------------------- 11561 11562 The 68HC11 and 68HC12 version of `as' have the following specific 11563 assembler directives: 11564 11565 `.relax' 11566 The relax directive is used by the `GNU Compiler' to emit a 11567 specific relocation to mark a group of instructions for linker 11568 relaxation. The sequence of instructions within the group must be 11569 known to the linker so that relaxation can be performed. 11570 11571 `.mode [mshort|mlong|mshort-double|mlong-double]' 11572 This directive specifies the ABI. It overrides the `-mshort', 11573 `-mlong', `-mshort-double' and `-mlong-double' options. 11574 11575 `.far SYMBOL' 11576 This directive marks the symbol as a `far' symbol meaning that it 11577 uses a `call/rtc' calling convention as opposed to `jsr/rts'. 11578 During a final link, the linker will identify references to the 11579 `far' symbol and will verify the proper calling convention. 11580 11581 `.interrupt SYMBOL' 11582 This directive marks the symbol as an interrupt entry point. This 11583 information is then used by the debugger to correctly unwind the 11584 frame across interrupts. 11585 11586 `.xrefb SYMBOL' 11587 This directive is defined for compatibility with the 11588 `Specification for Motorola 8 and 16-Bit Assembly Language Input 11589 Standard' and is ignored. 11590 11591 11592 11593 File: as.info, Node: M68HC11-Float, Next: M68HC11-opcodes, Prev: M68HC11-Directives, Up: M68HC11-Dependent 11594 11595 9.21.5 Floating Point 11596 --------------------- 11597 11598 Packed decimal (P) format floating literals are not supported. Feel 11599 free to add the code! 11600 11601 The floating point formats generated by directives are these. 11602 11603 `.float' 11604 `Single' precision floating point constants. 11605 11606 `.double' 11607 `Double' precision floating point constants. 11608 11609 `.extend' 11610 `.ldouble' 11611 `Extended' precision (`long double') floating point constants. 11612 11613 11614 File: as.info, Node: M68HC11-opcodes, Prev: M68HC11-Float, Up: M68HC11-Dependent 11615 11616 9.21.6 Opcodes 11617 -------------- 11618 11619 * Menu: 11620 11621 * M68HC11-Branch:: Branch Improvement 11622 11623 11624 File: as.info, Node: M68HC11-Branch, Up: M68HC11-opcodes 11625 11626 9.21.6.1 Branch Improvement 11627 ........................... 11628 11629 Certain pseudo opcodes are permitted for branch instructions. They 11630 expand to the shortest branch instruction that reach the target. 11631 Generally these mnemonics are made by prepending `j' to the start of 11632 Motorola mnemonic. These pseudo opcodes are not affected by the 11633 `--short-branches' or `--force-long-branches' options. 11634 11635 The following table summarizes the pseudo-operations. 11636 11637 Displacement Width 11638 +-------------------------------------------------------------+ 11639 | Options | 11640 | --short-branches --force-long-branches | 11641 +--------------------------+----------------------------------+ 11642 Op |BYTE WORD | BYTE WORD | 11643 +--------------------------+----------------------------------+ 11644 bsr | bsr <pc-rel> <error> | jsr <abs> | 11645 bra | bra <pc-rel> <error> | jmp <abs> | 11646 jbsr | bsr <pc-rel> jsr <abs> | bsr <pc-rel> jsr <abs> | 11647 jbra | bra <pc-rel> jmp <abs> | bra <pc-rel> jmp <abs> | 11648 bXX | bXX <pc-rel> <error> | bNX +3; jmp <abs> | 11649 jbXX | bXX <pc-rel> bNX +3; | bXX <pc-rel> bNX +3; jmp <abs> | 11650 | jmp <abs> | | 11651 +--------------------------+----------------------------------+ 11652 XX: condition 11653 NX: negative of condition XX 11654 11655 `jbsr' 11656 `jbra' 11657 These are the simplest jump pseudo-operations; they always map to 11658 one particular machine instruction, depending on the displacement 11659 to the branch target. 11660 11661 `jbXX' 11662 Here, `jbXX' stands for an entire family of pseudo-operations, 11663 where XX is a conditional branch or condition-code test. The full 11664 list of pseudo-ops in this family is: 11665 jbcc jbeq jbge jbgt jbhi jbvs jbpl jblo 11666 jbcs jbne jblt jble jbls jbvc jbmi 11667 11668 For the cases of non-PC relative displacements and long 11669 displacements, `as' issues a longer code fragment in terms of NX, 11670 the opposite condition to XX. For example, for the non-PC 11671 relative case: 11672 jbXX foo 11673 gives 11674 bNXs oof 11675 jmp foo 11676 oof: 11677 11678 11679 11680 File: as.info, Node: MIPS-Dependent, Next: MMIX-Dependent, Prev: M68HC11-Dependent, Up: Machine Dependencies 11681 11682 9.22 MIPS Dependent Features 11683 ============================ 11684 11685 GNU `as' for MIPS architectures supports several different MIPS 11686 processors, and MIPS ISA levels I through V, MIPS32, and MIPS64. For 11687 information about the MIPS instruction set, see `MIPS RISC 11688 Architecture', by Kane and Heindrich (Prentice-Hall). For an overview 11689 of MIPS assembly conventions, see "Appendix D: Assembly Language 11690 Programming" in the same work. 11691 11692 * Menu: 11693 11694 * MIPS Opts:: Assembler options 11695 * MIPS Object:: ECOFF object code 11696 * MIPS Stabs:: Directives for debugging information 11697 * MIPS ISA:: Directives to override the ISA level 11698 * MIPS symbol sizes:: Directives to override the size of symbols 11699 * MIPS autoextend:: Directives for extending MIPS 16 bit instructions 11700 * MIPS insn:: Directive to mark data as an instruction 11701 * MIPS option stack:: Directives to save and restore options 11702 * MIPS ASE instruction generation overrides:: Directives to control 11703 generation of MIPS ASE instructions 11704 * MIPS floating-point:: Directives to override floating-point options 11705 11706 11707 File: as.info, Node: MIPS Opts, Next: MIPS Object, Up: MIPS-Dependent 11708 11709 9.22.1 Assembler options 11710 ------------------------ 11711 11712 The MIPS configurations of GNU `as' support these special options: 11713 11714 `-G NUM' 11715 This option sets the largest size of an object that can be 11716 referenced implicitly with the `gp' register. It is only accepted 11717 for targets that use ECOFF format. The default value is 8. 11718 11719 `-EB' 11720 `-EL' 11721 Any MIPS configuration of `as' can select big-endian or 11722 little-endian output at run time (unlike the other GNU development 11723 tools, which must be configured for one or the other). Use `-EB' 11724 to select big-endian output, and `-EL' for little-endian. 11725 11726 `-KPIC' 11727 Generate SVR4-style PIC. This option tells the assembler to 11728 generate SVR4-style position-independent macro expansions. It 11729 also tells the assembler to mark the output file as PIC. 11730 11731 `-mvxworks-pic' 11732 Generate VxWorks PIC. This option tells the assembler to generate 11733 VxWorks-style position-independent macro expansions. 11734 11735 `-mips1' 11736 `-mips2' 11737 `-mips3' 11738 `-mips4' 11739 `-mips5' 11740 `-mips32' 11741 `-mips32r2' 11742 `-mips64' 11743 `-mips64r2' 11744 Generate code for a particular MIPS Instruction Set Architecture 11745 level. `-mips1' corresponds to the R2000 and R3000 processors, 11746 `-mips2' to the R6000 processor, `-mips3' to the R4000 processor, 11747 and `-mips4' to the R8000 and R10000 processors. `-mips5', 11748 `-mips32', `-mips32r2', `-mips64', and `-mips64r2' correspond to 11749 generic MIPS V, MIPS32, MIPS32 RELEASE 2, MIPS64, and MIPS64 11750 RELEASE 2 ISA processors, respectively. You can also switch 11751 instruction sets during the assembly; see *Note Directives to 11752 override the ISA level: MIPS ISA. 11753 11754 `-mgp32' 11755 `-mfp32' 11756 Some macros have different expansions for 32-bit and 64-bit 11757 registers. The register sizes are normally inferred from the ISA 11758 and ABI, but these flags force a certain group of registers to be 11759 treated as 32 bits wide at all times. `-mgp32' controls the size 11760 of general-purpose registers and `-mfp32' controls the size of 11761 floating-point registers. 11762 11763 The `.set gp=32' and `.set fp=32' directives allow the size of 11764 registers to be changed for parts of an object. The default value 11765 is restored by `.set gp=default' and `.set fp=default'. 11766 11767 On some MIPS variants there is a 32-bit mode flag; when this flag 11768 is set, 64-bit instructions generate a trap. Also, some 32-bit 11769 OSes only save the 32-bit registers on a context switch, so it is 11770 essential never to use the 64-bit registers. 11771 11772 `-mgp64' 11773 `-mfp64' 11774 Assume that 64-bit registers are available. This is provided in 11775 the interests of symmetry with `-mgp32' and `-mfp32'. 11776 11777 The `.set gp=64' and `.set fp=64' directives allow the size of 11778 registers to be changed for parts of an object. The default value 11779 is restored by `.set gp=default' and `.set fp=default'. 11780 11781 `-mips16' 11782 `-no-mips16' 11783 Generate code for the MIPS 16 processor. This is equivalent to 11784 putting `.set mips16' at the start of the assembly file. 11785 `-no-mips16' turns off this option. 11786 11787 `-msmartmips' 11788 `-mno-smartmips' 11789 Enables the SmartMIPS extensions to the MIPS32 instruction set, 11790 which provides a number of new instructions which target smartcard 11791 and cryptographic applications. This is equivalent to putting 11792 `.set smartmips' at the start of the assembly file. 11793 `-mno-smartmips' turns off this option. 11794 11795 `-mips3d' 11796 `-no-mips3d' 11797 Generate code for the MIPS-3D Application Specific Extension. 11798 This tells the assembler to accept MIPS-3D instructions. 11799 `-no-mips3d' turns off this option. 11800 11801 `-mdmx' 11802 `-no-mdmx' 11803 Generate code for the MDMX Application Specific Extension. This 11804 tells the assembler to accept MDMX instructions. `-no-mdmx' turns 11805 off this option. 11806 11807 `-mdsp' 11808 `-mno-dsp' 11809 Generate code for the DSP Release 1 Application Specific Extension. 11810 This tells the assembler to accept DSP Release 1 instructions. 11811 `-mno-dsp' turns off this option. 11812 11813 `-mdspr2' 11814 `-mno-dspr2' 11815 Generate code for the DSP Release 2 Application Specific Extension. 11816 This option implies -mdsp. This tells the assembler to accept DSP 11817 Release 2 instructions. `-mno-dspr2' turns off this option. 11818 11819 `-mmt' 11820 `-mno-mt' 11821 Generate code for the MT Application Specific Extension. This 11822 tells the assembler to accept MT instructions. `-mno-mt' turns 11823 off this option. 11824 11825 `-mfix7000' 11826 `-mno-fix7000' 11827 Cause nops to be inserted if the read of the destination register 11828 of an mfhi or mflo instruction occurs in the following two 11829 instructions. 11830 11831 `-mfix-vr4120' 11832 `-no-mfix-vr4120' 11833 Insert nops to work around certain VR4120 errata. This option is 11834 intended to be used on GCC-generated code: it is not designed to 11835 catch all problems in hand-written assembler code. 11836 11837 `-mfix-vr4130' 11838 `-no-mfix-vr4130' 11839 Insert nops to work around the VR4130 `mflo'/`mfhi' errata. 11840 11841 `-m4010' 11842 `-no-m4010' 11843 Generate code for the LSI R4010 chip. This tells the assembler to 11844 accept the R4010 specific instructions (`addciu', `ffc', etc.), 11845 and to not schedule `nop' instructions around accesses to the `HI' 11846 and `LO' registers. `-no-m4010' turns off this option. 11847 11848 `-m4650' 11849 `-no-m4650' 11850 Generate code for the MIPS R4650 chip. This tells the assembler 11851 to accept the `mad' and `madu' instruction, and to not schedule 11852 `nop' instructions around accesses to the `HI' and `LO' registers. 11853 `-no-m4650' turns off this option. 11854 11855 `-m3900' 11856 `-no-m3900' 11857 `-m4100' 11858 `-no-m4100' 11859 For each option `-mNNNN', generate code for the MIPS RNNNN chip. 11860 This tells the assembler to accept instructions specific to that 11861 chip, and to schedule for that chip's hazards. 11862 11863 `-march=CPU' 11864 Generate code for a particular MIPS cpu. It is exactly equivalent 11865 to `-mCPU', except that there are more value of CPU understood. 11866 Valid CPU value are: 11867 11868 2000, 3000, 3900, 4000, 4010, 4100, 4111, vr4120, vr4130, 11869 vr4181, 4300, 4400, 4600, 4650, 5000, rm5200, rm5230, rm5231, 11870 rm5261, rm5721, vr5400, vr5500, 6000, rm7000, 8000, rm9000, 11871 10000, 12000, 4kc, 4km, 4kp, 4ksc, 4kec, 4kem, 4kep, 4ksd, 11872 m4k, m4kp, 24kc, 24kf2_1, 24kf, 24kf1_1, 24kec, 24kef2_1, 11873 24kef, 24kef1_1, 34kc, 34kf2_1, 34kf, 34kf1_1, 74kc, 74kf2_1, 11874 74kf, 74kf1_1, 74kf3_2, 5kc, 5kf, 20kc, 25kf, sb1, sb1a, 11875 loongson2e, loongson2f, octeon 11876 11877 For compatibility reasons, `Nx' and `Bfx' are accepted as synonyms 11878 for `Nf1_1'. These values are deprecated. 11879 11880 `-mtune=CPU' 11881 Schedule and tune for a particular MIPS cpu. Valid CPU values are 11882 identical to `-march=CPU'. 11883 11884 `-mabi=ABI' 11885 Record which ABI the source code uses. The recognized arguments 11886 are: `32', `n32', `o64', `64' and `eabi'. 11887 11888 `-msym32' 11889 `-mno-sym32' 11890 Equivalent to adding `.set sym32' or `.set nosym32' to the 11891 beginning of the assembler input. *Note MIPS symbol sizes::. 11892 11893 `-nocpp' 11894 This option is ignored. It is accepted for command-line 11895 compatibility with other assemblers, which use it to turn off C 11896 style preprocessing. With GNU `as', there is no need for 11897 `-nocpp', because the GNU assembler itself never runs the C 11898 preprocessor. 11899 11900 `-msoft-float' 11901 `-mhard-float' 11902 Disable or enable floating-point instructions. Note that by 11903 default floating-point instructions are always allowed even with 11904 CPU targets that don't have support for these instructions. 11905 11906 `-msingle-float' 11907 `-mdouble-float' 11908 Disable or enable double-precision floating-point operations. Note 11909 that by default double-precision floating-point operations are 11910 always allowed even with CPU targets that don't have support for 11911 these operations. 11912 11913 `--construct-floats' 11914 `--no-construct-floats' 11915 The `--no-construct-floats' option disables the construction of 11916 double width floating point constants by loading the two halves of 11917 the value into the two single width floating point registers that 11918 make up the double width register. This feature is useful if the 11919 processor support the FR bit in its status register, and this bit 11920 is known (by the programmer) to be set. This bit prevents the 11921 aliasing of the double width register by the single width 11922 registers. 11923 11924 By default `--construct-floats' is selected, allowing construction 11925 of these floating point constants. 11926 11927 `--trap' 11928 `--no-break' 11929 `as' automatically macro expands certain division and 11930 multiplication instructions to check for overflow and division by 11931 zero. This option causes `as' to generate code to take a trap 11932 exception rather than a break exception when an error is detected. 11933 The trap instructions are only supported at Instruction Set 11934 Architecture level 2 and higher. 11935 11936 `--break' 11937 `--no-trap' 11938 Generate code to take a break exception rather than a trap 11939 exception when an error is detected. This is the default. 11940 11941 `-mpdr' 11942 `-mno-pdr' 11943 Control generation of `.pdr' sections. Off by default on IRIX, on 11944 elsewhere. 11945 11946 `-mshared' 11947 `-mno-shared' 11948 When generating code using the Unix calling conventions (selected 11949 by `-KPIC' or `-mcall_shared'), gas will normally generate code 11950 which can go into a shared library. The `-mno-shared' option 11951 tells gas to generate code which uses the calling convention, but 11952 can not go into a shared library. The resulting code is slightly 11953 more efficient. This option only affects the handling of the 11954 `.cpload' and `.cpsetup' pseudo-ops. 11955 11956 11957 File: as.info, Node: MIPS Object, Next: MIPS Stabs, Prev: MIPS Opts, Up: MIPS-Dependent 11958 11959 9.22.2 MIPS ECOFF object code 11960 ----------------------------- 11961 11962 Assembling for a MIPS ECOFF target supports some additional sections 11963 besides the usual `.text', `.data' and `.bss'. The additional sections 11964 are `.rdata', used for read-only data, `.sdata', used for small data, 11965 and `.sbss', used for small common objects. 11966 11967 When assembling for ECOFF, the assembler uses the `$gp' (`$28') 11968 register to form the address of a "small object". Any object in the 11969 `.sdata' or `.sbss' sections is considered "small" in this sense. For 11970 external objects, or for objects in the `.bss' section, you can use the 11971 `gcc' `-G' option to control the size of objects addressed via `$gp'; 11972 the default value is 8, meaning that a reference to any object eight 11973 bytes or smaller uses `$gp'. Passing `-G 0' to `as' prevents it from 11974 using the `$gp' register on the basis of object size (but the assembler 11975 uses `$gp' for objects in `.sdata' or `sbss' in any case). The size of 11976 an object in the `.bss' section is set by the `.comm' or `.lcomm' 11977 directive that defines it. The size of an external object may be set 11978 with the `.extern' directive. For example, `.extern sym,4' declares 11979 that the object at `sym' is 4 bytes in length, whie leaving `sym' 11980 otherwise undefined. 11981 11982 Using small ECOFF objects requires linker support, and assumes that 11983 the `$gp' register is correctly initialized (normally done 11984 automatically by the startup code). MIPS ECOFF assembly code must not 11985 modify the `$gp' register. 11986 11987 11988 File: as.info, Node: MIPS Stabs, Next: MIPS ISA, Prev: MIPS Object, Up: MIPS-Dependent 11989 11990 9.22.3 Directives for debugging information 11991 ------------------------------------------- 11992 11993 MIPS ECOFF `as' supports several directives used for generating 11994 debugging information which are not support by traditional MIPS 11995 assemblers. These are `.def', `.endef', `.dim', `.file', `.scl', 11996 `.size', `.tag', `.type', `.val', `.stabd', `.stabn', and `.stabs'. 11997 The debugging information generated by the three `.stab' directives can 11998 only be read by GDB, not by traditional MIPS debuggers (this 11999 enhancement is required to fully support C++ debugging). These 12000 directives are primarily used by compilers, not assembly language 12001 programmers! 12002 12003 12004 File: as.info, Node: MIPS symbol sizes, Next: MIPS autoextend, Prev: MIPS ISA, Up: MIPS-Dependent 12005 12006 9.22.4 Directives to override the size of symbols 12007 ------------------------------------------------- 12008 12009 The n64 ABI allows symbols to have any 64-bit value. Although this 12010 provides a great deal of flexibility, it means that some macros have 12011 much longer expansions than their 32-bit counterparts. For example, 12012 the non-PIC expansion of `dla $4,sym' is usually: 12013 12014 lui $4,%highest(sym) 12015 lui $1,%hi(sym) 12016 daddiu $4,$4,%higher(sym) 12017 daddiu $1,$1,%lo(sym) 12018 dsll32 $4,$4,0 12019 daddu $4,$4,$1 12020 12021 whereas the 32-bit expansion is simply: 12022 12023 lui $4,%hi(sym) 12024 daddiu $4,$4,%lo(sym) 12025 12026 n64 code is sometimes constructed in such a way that all symbolic 12027 constants are known to have 32-bit values, and in such cases, it's 12028 preferable to use the 32-bit expansion instead of the 64-bit expansion. 12029 12030 You can use the `.set sym32' directive to tell the assembler that, 12031 from this point on, all expressions of the form `SYMBOL' or `SYMBOL + 12032 OFFSET' have 32-bit values. For example: 12033 12034 .set sym32 12035 dla $4,sym 12036 lw $4,sym+16 12037 sw $4,sym+0x8000($4) 12038 12039 will cause the assembler to treat `sym', `sym+16' and `sym+0x8000' 12040 as 32-bit values. The handling of non-symbolic addresses is not 12041 affected. 12042 12043 The directive `.set nosym32' ends a `.set sym32' block and reverts 12044 to the normal behavior. It is also possible to change the symbol size 12045 using the command-line options `-msym32' and `-mno-sym32'. 12046 12047 These options and directives are always accepted, but at present, 12048 they have no effect for anything other than n64. 12049 12050 12051 File: as.info, Node: MIPS ISA, Next: MIPS symbol sizes, Prev: MIPS Stabs, Up: MIPS-Dependent 12052 12053 9.22.5 Directives to override the ISA level 12054 ------------------------------------------- 12055 12056 GNU `as' supports an additional directive to change the MIPS 12057 Instruction Set Architecture level on the fly: `.set mipsN'. N should 12058 be a number from 0 to 5, or 32, 32r2, 64 or 64r2. The values other 12059 than 0 make the assembler accept instructions for the corresponding ISA 12060 level, from that point on in the assembly. `.set mipsN' affects not 12061 only which instructions are permitted, but also how certain macros are 12062 expanded. `.set mips0' restores the ISA level to its original level: 12063 either the level you selected with command line options, or the default 12064 for your configuration. You can use this feature to permit specific 12065 MIPS3 instructions while assembling in 32 bit mode. Use this directive 12066 with care! 12067 12068 The `.set arch=CPU' directive provides even finer control. It 12069 changes the effective CPU target and allows the assembler to use 12070 instructions specific to a particular CPU. All CPUs supported by the 12071 `-march' command line option are also selectable by this directive. 12072 The original value is restored by `.set arch=default'. 12073 12074 The directive `.set mips16' puts the assembler into MIPS 16 mode, in 12075 which it will assemble instructions for the MIPS 16 processor. Use 12076 `.set nomips16' to return to normal 32 bit mode. 12077 12078 Traditional MIPS assemblers do not support this directive. 12079 12080 12081 File: as.info, Node: MIPS autoextend, Next: MIPS insn, Prev: MIPS symbol sizes, Up: MIPS-Dependent 12082 12083 9.22.6 Directives for extending MIPS 16 bit instructions 12084 -------------------------------------------------------- 12085 12086 By default, MIPS 16 instructions are automatically extended to 32 bits 12087 when necessary. The directive `.set noautoextend' will turn this off. 12088 When `.set noautoextend' is in effect, any 32 bit instruction must be 12089 explicitly extended with the `.e' modifier (e.g., `li.e $4,1000'). The 12090 directive `.set autoextend' may be used to once again automatically 12091 extend instructions when necessary. 12092 12093 This directive is only meaningful when in MIPS 16 mode. Traditional 12094 MIPS assemblers do not support this directive. 12095 12096 12097 File: as.info, Node: MIPS insn, Next: MIPS option stack, Prev: MIPS autoextend, Up: MIPS-Dependent 12098 12099 9.22.7 Directive to mark data as an instruction 12100 ----------------------------------------------- 12101 12102 The `.insn' directive tells `as' that the following data is actually 12103 instructions. This makes a difference in MIPS 16 mode: when loading 12104 the address of a label which precedes instructions, `as' automatically 12105 adds 1 to the value, so that jumping to the loaded address will do the 12106 right thing. 12107 12108 12109 File: as.info, Node: MIPS option stack, Next: MIPS ASE instruction generation overrides, Prev: MIPS insn, Up: MIPS-Dependent 12110 12111 9.22.8 Directives to save and restore options 12112 --------------------------------------------- 12113 12114 The directives `.set push' and `.set pop' may be used to save and 12115 restore the current settings for all the options which are controlled 12116 by `.set'. The `.set push' directive saves the current settings on a 12117 stack. The `.set pop' directive pops the stack and restores the 12118 settings. 12119 12120 These directives can be useful inside an macro which must change an 12121 option such as the ISA level or instruction reordering but does not want 12122 to change the state of the code which invoked the macro. 12123 12124 Traditional MIPS assemblers do not support these directives. 12125 12126 12127 File: as.info, Node: MIPS ASE instruction generation overrides, Next: MIPS floating-point, Prev: MIPS option stack, Up: MIPS-Dependent 12128 12129 9.22.9 Directives to control generation of MIPS ASE instructions 12130 ---------------------------------------------------------------- 12131 12132 The directive `.set mips3d' makes the assembler accept instructions 12133 from the MIPS-3D Application Specific Extension from that point on in 12134 the assembly. The `.set nomips3d' directive prevents MIPS-3D 12135 instructions from being accepted. 12136 12137 The directive `.set smartmips' makes the assembler accept 12138 instructions from the SmartMIPS Application Specific Extension to the 12139 MIPS32 ISA from that point on in the assembly. The `.set nosmartmips' 12140 directive prevents SmartMIPS instructions from being accepted. 12141 12142 The directive `.set mdmx' makes the assembler accept instructions 12143 from the MDMX Application Specific Extension from that point on in the 12144 assembly. The `.set nomdmx' directive prevents MDMX instructions from 12145 being accepted. 12146 12147 The directive `.set dsp' makes the assembler accept instructions 12148 from the DSP Release 1 Application Specific Extension from that point 12149 on in the assembly. The `.set nodsp' directive prevents DSP Release 1 12150 instructions from being accepted. 12151 12152 The directive `.set dspr2' makes the assembler accept instructions 12153 from the DSP Release 2 Application Specific Extension from that point 12154 on in the assembly. This dirctive implies `.set dsp'. The `.set 12155 nodspr2' directive prevents DSP Release 2 instructions from being 12156 accepted. 12157 12158 The directive `.set mt' makes the assembler accept instructions from 12159 the MT Application Specific Extension from that point on in the 12160 assembly. The `.set nomt' directive prevents MT instructions from 12161 being accepted. 12162 12163 Traditional MIPS assemblers do not support these directives. 12164 12165 12166 File: as.info, Node: MIPS floating-point, Prev: MIPS ASE instruction generation overrides, Up: MIPS-Dependent 12167 12168 9.22.10 Directives to override floating-point options 12169 ----------------------------------------------------- 12170 12171 The directives `.set softfloat' and `.set hardfloat' provide finer 12172 control of disabling and enabling float-point instructions. These 12173 directives always override the default (that hard-float instructions 12174 are accepted) or the command-line options (`-msoft-float' and 12175 `-mhard-float'). 12176 12177 The directives `.set singlefloat' and `.set doublefloat' provide 12178 finer control of disabling and enabling double-precision float-point 12179 operations. These directives always override the default (that 12180 double-precision operations are accepted) or the command-line options 12181 (`-msingle-float' and `-mdouble-float'). 12182 12183 Traditional MIPS assemblers do not support these directives. 12184 12185 12186 File: as.info, Node: MMIX-Dependent, Next: MSP430-Dependent, Prev: MIPS-Dependent, Up: Machine Dependencies 12187 12188 9.23 MMIX Dependent Features 12189 ============================ 12190 12191 * Menu: 12192 12193 * MMIX-Opts:: Command-line Options 12194 * MMIX-Expand:: Instruction expansion 12195 * MMIX-Syntax:: Syntax 12196 * MMIX-mmixal:: Differences to `mmixal' syntax and semantics 12197 12198 12199 File: as.info, Node: MMIX-Opts, Next: MMIX-Expand, Up: MMIX-Dependent 12200 12201 9.23.1 Command-line Options 12202 --------------------------- 12203 12204 The MMIX version of `as' has some machine-dependent options. 12205 12206 When `--fixed-special-register-names' is specified, only the register 12207 names specified in *Note MMIX-Regs:: are recognized in the instructions 12208 `PUT' and `GET'. 12209 12210 You can use the `--globalize-symbols' to make all symbols global. 12211 This option is useful when splitting up a `mmixal' program into several 12212 files. 12213 12214 The `--gnu-syntax' turns off most syntax compatibility with 12215 `mmixal'. Its usability is currently doubtful. 12216 12217 The `--relax' option is not fully supported, but will eventually make 12218 the object file prepared for linker relaxation. 12219 12220 If you want to avoid inadvertently calling a predefined symbol and 12221 would rather get an error, for example when using `as' with a compiler 12222 or other machine-generated code, specify `--no-predefined-syms'. This 12223 turns off built-in predefined definitions of all such symbols, 12224 including rounding-mode symbols, segment symbols, `BIT' symbols, and 12225 `TRAP' symbols used in `mmix' "system calls". It also turns off 12226 predefined special-register names, except when used in `PUT' and `GET' 12227 instructions. 12228 12229 By default, some instructions are expanded to fit the size of the 12230 operand or an external symbol (*note MMIX-Expand::). By passing 12231 `--no-expand', no such expansion will be done, instead causing errors 12232 at link time if the operand does not fit. 12233 12234 The `mmixal' documentation (*note mmixsite::) specifies that global 12235 registers allocated with the `GREG' directive (*note MMIX-greg::) and 12236 initialized to the same non-zero value, will refer to the same global 12237 register. This isn't strictly enforceable in `as' since the final 12238 addresses aren't known until link-time, but it will do an effort unless 12239 the `--no-merge-gregs' option is specified. (Register merging isn't 12240 yet implemented in `ld'.) 12241 12242 `as' will warn every time it expands an instruction to fit an 12243 operand unless the option `-x' is specified. It is believed that this 12244 behaviour is more useful than just mimicking `mmixal''s behaviour, in 12245 which instructions are only expanded if the `-x' option is specified, 12246 and assembly fails otherwise, when an instruction needs to be expanded. 12247 It needs to be kept in mind that `mmixal' is both an assembler and 12248 linker, while `as' will expand instructions that at link stage can be 12249 contracted. (Though linker relaxation isn't yet implemented in `ld'.) 12250 The option `-x' also imples `--linker-allocated-gregs'. 12251 12252 If instruction expansion is enabled, `as' can expand a `PUSHJ' 12253 instruction into a series of instructions. The shortest expansion is 12254 to not expand it, but just mark the call as redirectable to a stub, 12255 which `ld' creates at link-time, but only if the original `PUSHJ' 12256 instruction is found not to reach the target. The stub consists of the 12257 necessary instructions to form a jump to the target. This happens if 12258 `as' can assert that the `PUSHJ' instruction can reach such a stub. 12259 The option `--no-pushj-stubs' disables this shorter expansion, and the 12260 longer series of instructions is then created at assembly-time. The 12261 option `--no-stubs' is a synonym, intended for compatibility with 12262 future releases, where generation of stubs for other instructions may 12263 be implemented. 12264 12265 Usually a two-operand-expression (*note GREG-base::) without a 12266 matching `GREG' directive is treated as an error by `as'. When the 12267 option `--linker-allocated-gregs' is in effect, they are instead passed 12268 through to the linker, which will allocate as many global registers as 12269 is needed. 12270 12271 12272 File: as.info, Node: MMIX-Expand, Next: MMIX-Syntax, Prev: MMIX-Opts, Up: MMIX-Dependent 12273 12274 9.23.2 Instruction expansion 12275 ---------------------------- 12276 12277 When `as' encounters an instruction with an operand that is either not 12278 known or does not fit the operand size of the instruction, `as' (and 12279 `ld') will expand the instruction into a sequence of instructions 12280 semantically equivalent to the operand fitting the instruction. 12281 Expansion will take place for the following instructions: 12282 12283 `GETA' 12284 Expands to a sequence of four instructions: `SETL', `INCML', 12285 `INCMH' and `INCH'. The operand must be a multiple of four. 12286 12287 Conditional branches 12288 A branch instruction is turned into a branch with the complemented 12289 condition and prediction bit over five instructions; four 12290 instructions setting `$255' to the operand value, which like with 12291 `GETA' must be a multiple of four, and a final `GO $255,$255,0'. 12292 12293 `PUSHJ' 12294 Similar to expansion for conditional branches; four instructions 12295 set `$255' to the operand value, followed by a `PUSHGO 12296 $255,$255,0'. 12297 12298 `JMP' 12299 Similar to conditional branches and `PUSHJ'. The final instruction 12300 is `GO $255,$255,0'. 12301 12302 The linker `ld' is expected to shrink these expansions for code 12303 assembled with `--relax' (though not currently implemented). 12304 12305 12306 File: as.info, Node: MMIX-Syntax, Next: MMIX-mmixal, Prev: MMIX-Expand, Up: MMIX-Dependent 12307 12308 9.23.3 Syntax 12309 ------------- 12310 12311 The assembly syntax is supposed to be upward compatible with that 12312 described in Sections 1.3 and 1.4 of `The Art of Computer Programming, 12313 Volume 1'. Draft versions of those chapters as well as other MMIX 12314 information is located at 12315 `http://www-cs-faculty.stanford.edu/~knuth/mmix-news.html'. Most code 12316 examples from the mmixal package located there should work unmodified 12317 when assembled and linked as single files, with a few noteworthy 12318 exceptions (*note MMIX-mmixal::). 12319 12320 Before an instruction is emitted, the current location is aligned to 12321 the next four-byte boundary. If a label is defined at the beginning of 12322 the line, its value will be the aligned value. 12323 12324 In addition to the traditional hex-prefix `0x', a hexadecimal number 12325 can also be specified by the prefix character `#'. 12326 12327 After all operands to an MMIX instruction or directive have been 12328 specified, the rest of the line is ignored, treated as a comment. 12329 12330 * Menu: 12331 12332 * MMIX-Chars:: Special Characters 12333 * MMIX-Symbols:: Symbols 12334 * MMIX-Regs:: Register Names 12335 * MMIX-Pseudos:: Assembler Directives 12336 12337 12338 File: as.info, Node: MMIX-Chars, Next: MMIX-Symbols, Up: MMIX-Syntax 12339 12340 9.23.3.1 Special Characters 12341 ........................... 12342 12343 The characters `*' and `#' are line comment characters; each start a 12344 comment at the beginning of a line, but only at the beginning of a 12345 line. A `#' prefixes a hexadecimal number if found elsewhere on a line. 12346 12347 Two other characters, `%' and `!', each start a comment anywhere on 12348 the line. Thus you can't use the `modulus' and `not' operators in 12349 expressions normally associated with these two characters. 12350 12351 A `;' is a line separator, treated as a new-line, so separate 12352 instructions can be specified on a single line. 12353 12354 12355 File: as.info, Node: MMIX-Symbols, Next: MMIX-Regs, Prev: MMIX-Chars, Up: MMIX-Syntax 12356 12357 9.23.3.2 Symbols 12358 ................ 12359 12360 The character `:' is permitted in identifiers. There are two 12361 exceptions to it being treated as any other symbol character: if a 12362 symbol begins with `:', it means that the symbol is in the global 12363 namespace and that the current prefix should not be prepended to that 12364 symbol (*note MMIX-prefix::). The `:' is then not considered part of 12365 the symbol. For a symbol in the label position (first on a line), a `:' 12366 at the end of a symbol is silently stripped off. A label is permitted, 12367 but not required, to be followed by a `:', as with many other assembly 12368 formats. 12369 12370 The character `@' in an expression, is a synonym for `.', the 12371 current location. 12372 12373 In addition to the common forward and backward local symbol formats 12374 (*note Symbol Names::), they can be specified with upper-case `B' and 12375 `F', as in `8B' and `9F'. A local label defined for the current 12376 position is written with a `H' appended to the number: 12377 3H LDB $0,$1,2 12378 This and traditional local-label formats cannot be mixed: a label 12379 must be defined and referred to using the same format. 12380 12381 There's a minor caveat: just as for the ordinary local symbols, the 12382 local symbols are translated into ordinary symbols using control 12383 characters are to hide the ordinal number of the symbol. 12384 Unfortunately, these symbols are not translated back in error messages. 12385 Thus you may see confusing error messages when local symbols are used. 12386 Control characters `\003' (control-C) and `\004' (control-D) are used 12387 for the MMIX-specific local-symbol syntax. 12388 12389 The symbol `Main' is handled specially; it is always global. 12390 12391 By defining the symbols `__.MMIX.start..text' and 12392 `__.MMIX.start..data', the address of respectively the `.text' and 12393 `.data' segments of the final program can be defined, though when 12394 linking more than one object file, the code or data in the object file 12395 containing the symbol is not guaranteed to be start at that position; 12396 just the final executable. *Note MMIX-loc::. 12397 12398 12399 File: as.info, Node: MMIX-Regs, Next: MMIX-Pseudos, Prev: MMIX-Symbols, Up: MMIX-Syntax 12400 12401 9.23.3.3 Register names 12402 ....................... 12403 12404 Local and global registers are specified as `$0' to `$255'. The 12405 recognized special register names are `rJ', `rA', `rB', `rC', `rD', 12406 `rE', `rF', `rG', `rH', `rI', `rK', `rL', `rM', `rN', `rO', `rP', `rQ', 12407 `rR', `rS', `rT', `rU', `rV', `rW', `rX', `rY', `rZ', `rBB', `rTT', 12408 `rWW', `rXX', `rYY' and `rZZ'. A leading `:' is optional for special 12409 register names. 12410 12411 Local and global symbols can be equated to register names and used in 12412 place of ordinary registers. 12413 12414 Similarly for special registers, local and global symbols can be 12415 used. Also, symbols equated from numbers and constant expressions are 12416 allowed in place of a special register, except when either of the 12417 options `--no-predefined-syms' and `--fixed-special-register-names' are 12418 specified. Then only the special register names above are allowed for 12419 the instructions having a special register operand; `GET' and `PUT'. 12420 12421 12422 File: as.info, Node: MMIX-Pseudos, Prev: MMIX-Regs, Up: MMIX-Syntax 12423 12424 9.23.3.4 Assembler Directives 12425 ............................. 12426 12427 `LOC' 12428 The `LOC' directive sets the current location to the value of the 12429 operand field, which may include changing sections. If the 12430 operand is a constant, the section is set to either `.data' if the 12431 value is `0x2000000000000000' or larger, else it is set to `.text'. 12432 Within a section, the current location may only be changed to 12433 monotonically higher addresses. A LOC expression must be a 12434 previously defined symbol or a "pure" constant. 12435 12436 An example, which sets the label PREV to the current location, and 12437 updates the current location to eight bytes forward: 12438 prev LOC @+8 12439 12440 When a LOC has a constant as its operand, a symbol 12441 `__.MMIX.start..text' or `__.MMIX.start..data' is defined 12442 depending on the address as mentioned above. Each such symbol is 12443 interpreted as special by the linker, locating the section at that 12444 address. Note that if multiple files are linked, the first object 12445 file with that section will be mapped to that address (not 12446 necessarily the file with the LOC definition). 12447 12448 `LOCAL' 12449 Example: 12450 LOCAL external_symbol 12451 LOCAL 42 12452 .local asymbol 12453 12454 This directive-operation generates a link-time assertion that the 12455 operand does not correspond to a global register. The operand is 12456 an expression that at link-time resolves to a register symbol or a 12457 number. A number is treated as the register having that number. 12458 There is one restriction on the use of this directive: the 12459 pseudo-directive must be placed in a section with contents, code 12460 or data. 12461 12462 `IS' 12463 The `IS' directive: 12464 asymbol IS an_expression 12465 sets the symbol `asymbol' to `an_expression'. A symbol may not be 12466 set more than once using this directive. Local labels may be set 12467 using this directive, for example: 12468 5H IS @+4 12469 12470 `GREG' 12471 This directive reserves a global register, gives it an initial 12472 value and optionally gives it a symbolic name. Some examples: 12473 12474 areg GREG 12475 breg GREG data_value 12476 GREG data_buffer 12477 .greg creg, another_data_value 12478 12479 The symbolic register name can be used in place of a (non-special) 12480 register. If a value isn't provided, it defaults to zero. Unless 12481 the option `--no-merge-gregs' is specified, non-zero registers 12482 allocated with this directive may be eliminated by `as'; another 12483 register with the same value used in its place. Any of the 12484 instructions `CSWAP', `GO', `LDA', `LDBU', `LDB', `LDHT', `LDOU', 12485 `LDO', `LDSF', `LDTU', `LDT', `LDUNC', `LDVTS', `LDWU', `LDW', 12486 `PREGO', `PRELD', `PREST', `PUSHGO', `STBU', `STB', `STCO', `STHT', 12487 `STOU', `STSF', `STTU', `STT', `STUNC', `SYNCD', `SYNCID', can 12488 have a value nearby an initial value in place of its second and 12489 third operands. Here, "nearby" is defined as within the range 12490 0...255 from the initial value of such an allocated register. 12491 12492 buffer1 BYTE 0,0,0,0,0 12493 buffer2 BYTE 0,0,0,0,0 12494 ... 12495 GREG buffer1 12496 LDOU $42,buffer2 12497 In the example above, the `Y' field of the `LDOUI' instruction 12498 (LDOU with a constant Z) will be replaced with the global register 12499 allocated for `buffer1', and the `Z' field will have the value 5, 12500 the offset from `buffer1' to `buffer2'. The result is equivalent 12501 to this code: 12502 buffer1 BYTE 0,0,0,0,0 12503 buffer2 BYTE 0,0,0,0,0 12504 ... 12505 tmpreg GREG buffer1 12506 LDOU $42,tmpreg,(buffer2-buffer1) 12507 12508 Global registers allocated with this directive are allocated in 12509 order higher-to-lower within a file. Other than that, the exact 12510 order of register allocation and elimination is undefined. For 12511 example, the order is undefined when more than one file with such 12512 directives are linked together. With the options `-x' and 12513 `--linker-allocated-gregs', `GREG' directives for two-operand 12514 cases like the one mentioned above can be omitted. Sufficient 12515 global registers will then be allocated by the linker. 12516 12517 `BYTE' 12518 The `BYTE' directive takes a series of operands separated by a 12519 comma. If an operand is a string (*note Strings::), each 12520 character of that string is emitted as a byte. Other operands 12521 must be constant expressions without forward references, in the 12522 range 0...255. If you need operands having expressions with 12523 forward references, use `.byte' (*note Byte::). An operand can be 12524 omitted, defaulting to a zero value. 12525 12526 `WYDE' 12527 `TETRA' 12528 `OCTA' 12529 The directives `WYDE', `TETRA' and `OCTA' emit constants of two, 12530 four and eight bytes size respectively. Before anything else 12531 happens for the directive, the current location is aligned to the 12532 respective constant-size boundary. If a label is defined at the 12533 beginning of the line, its value will be that after the alignment. 12534 A single operand can be omitted, defaulting to a zero value 12535 emitted for the directive. Operands can be expressed as strings 12536 (*note Strings::), in which case each character in the string is 12537 emitted as a separate constant of the size indicated by the 12538 directive. 12539 12540 `PREFIX' 12541 The `PREFIX' directive sets a symbol name prefix to be prepended to 12542 all symbols (except local symbols, *note MMIX-Symbols::), that are 12543 not prefixed with `:', until the next `PREFIX' directive. Such 12544 prefixes accumulate. For example, 12545 PREFIX a 12546 PREFIX b 12547 c IS 0 12548 defines a symbol `abc' with the value 0. 12549 12550 `BSPEC' 12551 `ESPEC' 12552 A pair of `BSPEC' and `ESPEC' directives delimit a section of 12553 special contents (without specified semantics). Example: 12554 BSPEC 42 12555 TETRA 1,2,3 12556 ESPEC 12557 The single operand to `BSPEC' must be number in the range 0...255. 12558 The `BSPEC' number 80 is used by the GNU binutils implementation. 12559 12560 12561 File: as.info, Node: MMIX-mmixal, Prev: MMIX-Syntax, Up: MMIX-Dependent 12562 12563 9.23.4 Differences to `mmixal' 12564 ------------------------------ 12565 12566 The binutils `as' and `ld' combination has a few differences in 12567 function compared to `mmixal' (*note mmixsite::). 12568 12569 The replacement of a symbol with a GREG-allocated register (*note 12570 GREG-base::) is not handled the exactly same way in `as' as in 12571 `mmixal'. This is apparent in the `mmixal' example file `inout.mms', 12572 where different registers with different offsets, eventually yielding 12573 the same address, are used in the first instruction. This type of 12574 difference should however not affect the function of any program unless 12575 it has specific assumptions about the allocated register number. 12576 12577 Line numbers (in the `mmo' object format) are currently not 12578 supported. 12579 12580 Expression operator precedence is not that of mmixal: operator 12581 precedence is that of the C programming language. It's recommended to 12582 use parentheses to explicitly specify wanted operator precedence 12583 whenever more than one type of operators are used. 12584 12585 The serialize unary operator `&', the fractional division operator 12586 `//', the logical not operator `!' and the modulus operator `%' are not 12587 available. 12588 12589 Symbols are not global by default, unless the option 12590 `--globalize-symbols' is passed. Use the `.global' directive to 12591 globalize symbols (*note Global::). 12592 12593 Operand syntax is a bit stricter with `as' than `mmixal'. For 12594 example, you can't say `addu 1,2,3', instead you must write `addu 12595 $1,$2,3'. 12596 12597 You can't LOC to a lower address than those already visited (i.e., 12598 "backwards"). 12599 12600 A LOC directive must come before any emitted code. 12601 12602 Predefined symbols are visible as file-local symbols after use. (In 12603 the ELF file, that is--the linked mmo file has no notion of a file-local 12604 symbol.) 12605 12606 Some mapping of constant expressions to sections in LOC expressions 12607 is attempted, but that functionality is easily confused and should be 12608 avoided unless compatibility with `mmixal' is required. A LOC 12609 expression to `0x2000000000000000' or higher, maps to the `.data' 12610 section and lower addresses map to the `.text' section (*note 12611 MMIX-loc::). 12612 12613 The code and data areas are each contiguous. Sparse programs with 12614 far-away LOC directives will take up the same amount of space as a 12615 contiguous program with zeros filled in the gaps between the LOC 12616 directives. If you need sparse programs, you might try and get the 12617 wanted effect with a linker script and splitting up the code parts into 12618 sections (*note Section::). Assembly code for this, to be compatible 12619 with `mmixal', would look something like: 12620 .if 0 12621 LOC away_expression 12622 .else 12623 .section away,"ax" 12624 .fi 12625 `as' will not execute the LOC directive and `mmixal' ignores the 12626 lines with `.'. This construct can be used generally to help 12627 compatibility. 12628 12629 Symbols can't be defined twice-not even to the same value. 12630 12631 Instruction mnemonics are recognized case-insensitive, though the 12632 `IS' and `GREG' pseudo-operations must be specified in upper-case 12633 characters. 12634 12635 There's no unicode support. 12636 12637 The following is a list of programs in `mmix.tar.gz', available at 12638 `http://www-cs-faculty.stanford.edu/~knuth/mmix-news.html', last 12639 checked with the version dated 2001-08-25 (md5sum 12640 c393470cfc86fac040487d22d2bf0172) that assemble with `mmixal' but do 12641 not assemble with `as': 12642 12643 `silly.mms' 12644 LOC to a previous address. 12645 12646 `sim.mms' 12647 Redefines symbol `Done'. 12648 12649 `test.mms' 12650 Uses the serial operator `&'. 12651 12652 12653 File: as.info, Node: MSP430-Dependent, Next: SH-Dependent, Prev: MMIX-Dependent, Up: Machine Dependencies 12654 12655 9.24 MSP 430 Dependent Features 12656 =============================== 12657 12658 * Menu: 12659 12660 * MSP430 Options:: Options 12661 * MSP430 Syntax:: Syntax 12662 * MSP430 Floating Point:: Floating Point 12663 * MSP430 Directives:: MSP 430 Machine Directives 12664 * MSP430 Opcodes:: Opcodes 12665 * MSP430 Profiling Capability:: Profiling Capability 12666 12667 12668 File: as.info, Node: MSP430 Options, Next: MSP430 Syntax, Up: MSP430-Dependent 12669 12670 9.24.1 Options 12671 -------------- 12672 12673 `-m' 12674 select the mpu arch. Currently has no effect. 12675 12676 `-mP' 12677 enables polymorph instructions handler. 12678 12679 `-mQ' 12680 enables relaxation at assembly time. DANGEROUS! 12681 12682 12683 12684 File: as.info, Node: MSP430 Syntax, Next: MSP430 Floating Point, Prev: MSP430 Options, Up: MSP430-Dependent 12685 12686 9.24.2 Syntax 12687 ------------- 12688 12689 * Menu: 12690 12691 * MSP430-Macros:: Macros 12692 * MSP430-Chars:: Special Characters 12693 * MSP430-Regs:: Register Names 12694 * MSP430-Ext:: Assembler Extensions 12695 12696 12697 File: as.info, Node: MSP430-Macros, Next: MSP430-Chars, Up: MSP430 Syntax 12698 12699 9.24.2.1 Macros 12700 ............... 12701 12702 The macro syntax used on the MSP 430 is like that described in the MSP 12703 430 Family Assembler Specification. Normal `as' macros should still 12704 work. 12705 12706 Additional built-in macros are: 12707 12708 `llo(exp)' 12709 Extracts least significant word from 32-bit expression 'exp'. 12710 12711 `lhi(exp)' 12712 Extracts most significant word from 32-bit expression 'exp'. 12713 12714 `hlo(exp)' 12715 Extracts 3rd word from 64-bit expression 'exp'. 12716 12717 `hhi(exp)' 12718 Extracts 4rd word from 64-bit expression 'exp'. 12719 12720 12721 They normally being used as an immediate source operand. 12722 mov #llo(1), r10 ; == mov #1, r10 12723 mov #lhi(1), r10 ; == mov #0, r10 12724 12725 12726 File: as.info, Node: MSP430-Chars, Next: MSP430-Regs, Prev: MSP430-Macros, Up: MSP430 Syntax 12727 12728 9.24.2.2 Special Characters 12729 ........................... 12730 12731 `;' is the line comment character. 12732 12733 The character `$' in jump instructions indicates current location and 12734 implemented only for TI syntax compatibility. 12735 12736 12737 File: as.info, Node: MSP430-Regs, Next: MSP430-Ext, Prev: MSP430-Chars, Up: MSP430 Syntax 12738 12739 9.24.2.3 Register Names 12740 ....................... 12741 12742 General-purpose registers are represented by predefined symbols of the 12743 form `rN' (for global registers), where N represents a number between 12744 `0' and `15'. The leading letters may be in either upper or lower 12745 case; for example, `r13' and `R7' are both valid register names. 12746 12747 Register names `PC', `SP' and `SR' cannot be used as register names 12748 and will be treated as variables. Use `r0', `r1', and `r2' instead. 12749 12750 12751 File: as.info, Node: MSP430-Ext, Prev: MSP430-Regs, Up: MSP430 Syntax 12752 12753 9.24.2.4 Assembler Extensions 12754 ............................. 12755 12756 `@rN' 12757 As destination operand being treated as `0(rn)' 12758 12759 `0(rN)' 12760 As source operand being treated as `@rn' 12761 12762 `jCOND +N' 12763 Skips next N bytes followed by jump instruction and equivalent to 12764 `jCOND $+N+2' 12765 12766 12767 Also, there are some instructions, which cannot be found in other 12768 assemblers. These are branch instructions, which has different opcodes 12769 upon jump distance. They all got PC relative addressing mode. 12770 12771 `beq label' 12772 A polymorph instruction which is `jeq label' in case if jump 12773 distance within allowed range for cpu's jump instruction. If not, 12774 this unrolls into a sequence of 12775 jne $+6 12776 br label 12777 12778 `bne label' 12779 A polymorph instruction which is `jne label' or `jeq +4; br label' 12780 12781 `blt label' 12782 A polymorph instruction which is `jl label' or `jge +4; br label' 12783 12784 `bltn label' 12785 A polymorph instruction which is `jn label' or `jn +2; jmp +4; br 12786 label' 12787 12788 `bltu label' 12789 A polymorph instruction which is `jlo label' or `jhs +2; br label' 12790 12791 `bge label' 12792 A polymorph instruction which is `jge label' or `jl +4; br label' 12793 12794 `bgeu label' 12795 A polymorph instruction which is `jhs label' or `jlo +4; br label' 12796 12797 `bgt label' 12798 A polymorph instruction which is `jeq +2; jge label' or `jeq +6; 12799 jl +4; br label' 12800 12801 `bgtu label' 12802 A polymorph instruction which is `jeq +2; jhs label' or `jeq +6; 12803 jlo +4; br label' 12804 12805 `bleu label' 12806 A polymorph instruction which is `jeq label; jlo label' or `jeq 12807 +2; jhs +4; br label' 12808 12809 `ble label' 12810 A polymorph instruction which is `jeq label; jl label' or `jeq 12811 +2; jge +4; br label' 12812 12813 `jump label' 12814 A polymorph instruction which is `jmp label' or `br label' 12815 12816 12817 File: as.info, Node: MSP430 Floating Point, Next: MSP430 Directives, Prev: MSP430 Syntax, Up: MSP430-Dependent 12818 12819 9.24.3 Floating Point 12820 --------------------- 12821 12822 The MSP 430 family uses IEEE 32-bit floating-point numbers. 12823 12824 12825 File: as.info, Node: MSP430 Directives, Next: MSP430 Opcodes, Prev: MSP430 Floating Point, Up: MSP430-Dependent 12826 12827 9.24.4 MSP 430 Machine Directives 12828 --------------------------------- 12829 12830 `.file' 12831 This directive is ignored; it is accepted for compatibility with 12832 other MSP 430 assemblers. 12833 12834 _Warning:_ in other versions of the GNU assembler, `.file' is 12835 used for the directive called `.app-file' in the MSP 430 12836 support. 12837 12838 `.line' 12839 This directive is ignored; it is accepted for compatibility with 12840 other MSP 430 assemblers. 12841 12842 `.arch' 12843 Currently this directive is ignored; it is accepted for 12844 compatibility with other MSP 430 assemblers. 12845 12846 `.profiler' 12847 This directive instructs assembler to add new profile entry to the 12848 object file. 12849 12850 12851 12852 File: as.info, Node: MSP430 Opcodes, Next: MSP430 Profiling Capability, Prev: MSP430 Directives, Up: MSP430-Dependent 12853 12854 9.24.5 Opcodes 12855 -------------- 12856 12857 `as' implements all the standard MSP 430 opcodes. No additional 12858 pseudo-instructions are needed on this family. 12859 12860 For information on the 430 machine instruction set, see `MSP430 12861 User's Manual, document slau049d', Texas Instrument, Inc. 12862 12863 12864 File: as.info, Node: MSP430 Profiling Capability, Prev: MSP430 Opcodes, Up: MSP430-Dependent 12865 12866 9.24.6 Profiling Capability 12867 --------------------------- 12868 12869 It is a performance hit to use gcc's profiling approach for this tiny 12870 target. Even more - jtag hardware facility does not perform any 12871 profiling functions. However we've got gdb's built-in simulator where 12872 we can do anything. 12873 12874 We define new section `.profiler' which holds all profiling 12875 information. We define new pseudo operation `.profiler' which will 12876 instruct assembler to add new profile entry to the object file. Profile 12877 should take place at the present address. 12878 12879 Pseudo operation format: 12880 12881 `.profiler flags,function_to_profile [, cycle_corrector, extra]' 12882 12883 where: 12884 12885 `flags' is a combination of the following characters: 12886 12887 `s' 12888 function entry 12889 12890 `x' 12891 function exit 12892 12893 `i' 12894 function is in init section 12895 12896 `f' 12897 function is in fini section 12898 12899 `l' 12900 library call 12901 12902 `c' 12903 libc standard call 12904 12905 `d' 12906 stack value demand 12907 12908 `I' 12909 interrupt service routine 12910 12911 `P' 12912 prologue start 12913 12914 `p' 12915 prologue end 12916 12917 `E' 12918 epilogue start 12919 12920 `e' 12921 epilogue end 12922 12923 `j' 12924 long jump / sjlj unwind 12925 12926 `a' 12927 an arbitrary code fragment 12928 12929 `t' 12930 extra parameter saved (a constant value like frame size) 12931 12932 `function_to_profile' 12933 a function address 12934 12935 `cycle_corrector' 12936 a value which should be added to the cycle counter, zero if 12937 omitted. 12938 12939 `extra' 12940 any extra parameter, zero if omitted. 12941 12942 12943 For example: 12944 .global fxx 12945 .type fxx,@function 12946 fxx: 12947 .LFrameOffset_fxx=0x08 12948 .profiler "scdP", fxx ; function entry. 12949 ; we also demand stack value to be saved 12950 push r11 12951 push r10 12952 push r9 12953 push r8 12954 .profiler "cdpt",fxx,0, .LFrameOffset_fxx ; check stack value at this point 12955 ; (this is a prologue end) 12956 ; note, that spare var filled with 12957 ; the farme size 12958 mov r15,r8 12959 ... 12960 .profiler cdE,fxx ; check stack 12961 pop r8 12962 pop r9 12963 pop r10 12964 pop r11 12965 .profiler xcde,fxx,3 ; exit adds 3 to the cycle counter 12966 ret ; cause 'ret' insn takes 3 cycles 12967 12968 12969 File: as.info, Node: PDP-11-Dependent, Next: PJ-Dependent, Prev: SH64-Dependent, Up: Machine Dependencies 12970 12971 9.25 PDP-11 Dependent Features 12972 ============================== 12973 12974 * Menu: 12975 12976 * PDP-11-Options:: Options 12977 * PDP-11-Pseudos:: Assembler Directives 12978 * PDP-11-Syntax:: DEC Syntax versus BSD Syntax 12979 * PDP-11-Mnemonics:: Instruction Naming 12980 * PDP-11-Synthetic:: Synthetic Instructions 12981 12982 12983 File: as.info, Node: PDP-11-Options, Next: PDP-11-Pseudos, Up: PDP-11-Dependent 12984 12985 9.25.1 Options 12986 -------------- 12987 12988 The PDP-11 version of `as' has a rich set of machine dependent options. 12989 12990 9.25.1.1 Code Generation Options 12991 ................................ 12992 12993 `-mpic | -mno-pic' 12994 Generate position-independent (or position-dependent) code. 12995 12996 The default is to generate position-independent code. 12997 12998 9.25.1.2 Instruction Set Extension Options 12999 .......................................... 13000 13001 These options enables or disables the use of extensions over the base 13002 line instruction set as introduced by the first PDP-11 CPU: the KA11. 13003 Most options come in two variants: a `-m'EXTENSION that enables 13004 EXTENSION, and a `-mno-'EXTENSION that disables EXTENSION. 13005 13006 The default is to enable all extensions. 13007 13008 `-mall | -mall-extensions' 13009 Enable all instruction set extensions. 13010 13011 `-mno-extensions' 13012 Disable all instruction set extensions. 13013 13014 `-mcis | -mno-cis' 13015 Enable (or disable) the use of the commercial instruction set, 13016 which consists of these instructions: `ADDNI', `ADDN', `ADDPI', 13017 `ADDP', `ASHNI', `ASHN', `ASHPI', `ASHP', `CMPCI', `CMPC', 13018 `CMPNI', `CMPN', `CMPPI', `CMPP', `CVTLNI', `CVTLN', `CVTLPI', 13019 `CVTLP', `CVTNLI', `CVTNL', `CVTNPI', `CVTNP', `CVTPLI', `CVTPL', 13020 `CVTPNI', `CVTPN', `DIVPI', `DIVP', `L2DR', `L3DR', `LOCCI', 13021 `LOCC', `MATCI', `MATC', `MOVCI', `MOVC', `MOVRCI', `MOVRC', 13022 `MOVTCI', `MOVTC', `MULPI', `MULP', `SCANCI', `SCANC', `SKPCI', 13023 `SKPC', `SPANCI', `SPANC', `SUBNI', `SUBN', `SUBPI', and `SUBP'. 13024 13025 `-mcsm | -mno-csm' 13026 Enable (or disable) the use of the `CSM' instruction. 13027 13028 `-meis | -mno-eis' 13029 Enable (or disable) the use of the extended instruction set, which 13030 consists of these instructions: `ASHC', `ASH', `DIV', `MARK', 13031 `MUL', `RTT', `SOB' `SXT', and `XOR'. 13032 13033 `-mfis | -mkev11' 13034 `-mno-fis | -mno-kev11' 13035 Enable (or disable) the use of the KEV11 floating-point 13036 instructions: `FADD', `FDIV', `FMUL', and `FSUB'. 13037 13038 `-mfpp | -mfpu | -mfp-11' 13039 `-mno-fpp | -mno-fpu | -mno-fp-11' 13040 Enable (or disable) the use of FP-11 floating-point instructions: 13041 `ABSF', `ADDF', `CFCC', `CLRF', `CMPF', `DIVF', `LDCFF', `LDCIF', 13042 `LDEXP', `LDF', `LDFPS', `MODF', `MULF', `NEGF', `SETD', `SETF', 13043 `SETI', `SETL', `STCFF', `STCFI', `STEXP', `STF', `STFPS', `STST', 13044 `SUBF', and `TSTF'. 13045 13046 `-mlimited-eis | -mno-limited-eis' 13047 Enable (or disable) the use of the limited extended instruction 13048 set: `MARK', `RTT', `SOB', `SXT', and `XOR'. 13049 13050 The -mno-limited-eis options also implies -mno-eis. 13051 13052 `-mmfpt | -mno-mfpt' 13053 Enable (or disable) the use of the `MFPT' instruction. 13054 13055 `-mmultiproc | -mno-multiproc' 13056 Enable (or disable) the use of multiprocessor instructions: 13057 `TSTSET' and `WRTLCK'. 13058 13059 `-mmxps | -mno-mxps' 13060 Enable (or disable) the use of the `MFPS' and `MTPS' instructions. 13061 13062 `-mspl | -mno-spl' 13063 Enable (or disable) the use of the `SPL' instruction. 13064 13065 Enable (or disable) the use of the microcode instructions: `LDUB', 13066 `MED', and `XFC'. 13067 13068 9.25.1.3 CPU Model Options 13069 .......................... 13070 13071 These options enable the instruction set extensions supported by a 13072 particular CPU, and disables all other extensions. 13073 13074 `-mka11' 13075 KA11 CPU. Base line instruction set only. 13076 13077 `-mkb11' 13078 KB11 CPU. Enable extended instruction set and `SPL'. 13079 13080 `-mkd11a' 13081 KD11-A CPU. Enable limited extended instruction set. 13082 13083 `-mkd11b' 13084 KD11-B CPU. Base line instruction set only. 13085 13086 `-mkd11d' 13087 KD11-D CPU. Base line instruction set only. 13088 13089 `-mkd11e' 13090 KD11-E CPU. Enable extended instruction set, `MFPS', and `MTPS'. 13091 13092 `-mkd11f | -mkd11h | -mkd11q' 13093 KD11-F, KD11-H, or KD11-Q CPU. Enable limited extended 13094 instruction set, `MFPS', and `MTPS'. 13095 13096 `-mkd11k' 13097 KD11-K CPU. Enable extended instruction set, `LDUB', `MED', 13098 `MFPS', `MFPT', `MTPS', and `XFC'. 13099 13100 `-mkd11z' 13101 KD11-Z CPU. Enable extended instruction set, `CSM', `MFPS', 13102 `MFPT', `MTPS', and `SPL'. 13103 13104 `-mf11' 13105 F11 CPU. Enable extended instruction set, `MFPS', `MFPT', and 13106 `MTPS'. 13107 13108 `-mj11' 13109 J11 CPU. Enable extended instruction set, `CSM', `MFPS', `MFPT', 13110 `MTPS', `SPL', `TSTSET', and `WRTLCK'. 13111 13112 `-mt11' 13113 T11 CPU. Enable limited extended instruction set, `MFPS', and 13114 `MTPS'. 13115 13116 9.25.1.4 Machine Model Options 13117 .............................. 13118 13119 These options enable the instruction set extensions supported by a 13120 particular machine model, and disables all other extensions. 13121 13122 `-m11/03' 13123 Same as `-mkd11f'. 13124 13125 `-m11/04' 13126 Same as `-mkd11d'. 13127 13128 `-m11/05 | -m11/10' 13129 Same as `-mkd11b'. 13130 13131 `-m11/15 | -m11/20' 13132 Same as `-mka11'. 13133 13134 `-m11/21' 13135 Same as `-mt11'. 13136 13137 `-m11/23 | -m11/24' 13138 Same as `-mf11'. 13139 13140 `-m11/34' 13141 Same as `-mkd11e'. 13142 13143 `-m11/34a' 13144 Ame as `-mkd11e' `-mfpp'. 13145 13146 `-m11/35 | -m11/40' 13147 Same as `-mkd11a'. 13148 13149 `-m11/44' 13150 Same as `-mkd11z'. 13151 13152 `-m11/45 | -m11/50 | -m11/55 | -m11/70' 13153 Same as `-mkb11'. 13154 13155 `-m11/53 | -m11/73 | -m11/83 | -m11/84 | -m11/93 | -m11/94' 13156 Same as `-mj11'. 13157 13158 `-m11/60' 13159 Same as `-mkd11k'. 13160 13161 13162 File: as.info, Node: PDP-11-Pseudos, Next: PDP-11-Syntax, Prev: PDP-11-Options, Up: PDP-11-Dependent 13163 13164 9.25.2 Assembler Directives 13165 --------------------------- 13166 13167 The PDP-11 version of `as' has a few machine dependent assembler 13168 directives. 13169 13170 `.bss' 13171 Switch to the `bss' section. 13172 13173 `.even' 13174 Align the location counter to an even number. 13175 13176 13177 File: as.info, Node: PDP-11-Syntax, Next: PDP-11-Mnemonics, Prev: PDP-11-Pseudos, Up: PDP-11-Dependent 13178 13179 9.25.3 PDP-11 Assembly Language Syntax 13180 -------------------------------------- 13181 13182 `as' supports both DEC syntax and BSD syntax. The only difference is 13183 that in DEC syntax, a `#' character is used to denote an immediate 13184 constants, while in BSD syntax the character for this purpose is `$'. 13185 13186 general-purpose registers are named `r0' through `r7'. Mnemonic 13187 alternatives for `r6' and `r7' are `sp' and `pc', respectively. 13188 13189 Floating-point registers are named `ac0' through `ac3', or 13190 alternatively `fr0' through `fr3'. 13191 13192 Comments are started with a `#' or a `/' character, and extend to 13193 the end of the line. (FIXME: clash with immediates?) 13194 13195 13196 File: as.info, Node: PDP-11-Mnemonics, Next: PDP-11-Synthetic, Prev: PDP-11-Syntax, Up: PDP-11-Dependent 13197 13198 9.25.4 Instruction Naming 13199 ------------------------- 13200 13201 Some instructions have alternative names. 13202 13203 `BCC' 13204 `BHIS' 13205 13206 `BCS' 13207 `BLO' 13208 13209 `L2DR' 13210 `L2D' 13211 13212 `L3DR' 13213 `L3D' 13214 13215 `SYS' 13216 `TRAP' 13217 13218 13219 File: as.info, Node: PDP-11-Synthetic, Prev: PDP-11-Mnemonics, Up: PDP-11-Dependent 13220 13221 9.25.5 Synthetic Instructions 13222 ----------------------------- 13223 13224 The `JBR' and `J'CC synthetic instructions are not supported yet. 13225 13226 13227 File: as.info, Node: PJ-Dependent, Next: PPC-Dependent, Prev: PDP-11-Dependent, Up: Machine Dependencies 13228 13229 9.26 picoJava Dependent Features 13230 ================================ 13231 13232 * Menu: 13233 13234 * PJ Options:: Options 13235 13236 13237 File: as.info, Node: PJ Options, Up: PJ-Dependent 13238 13239 9.26.1 Options 13240 -------------- 13241 13242 `as' has two additional command-line options for the picoJava 13243 architecture. 13244 `-ml' 13245 This option selects little endian data output. 13246 13247 `-mb' 13248 This option selects big endian data output. 13249 13250 13251 File: as.info, Node: PPC-Dependent, Next: Sparc-Dependent, Prev: PJ-Dependent, Up: Machine Dependencies 13252 13253 9.27 PowerPC Dependent Features 13254 =============================== 13255 13256 * Menu: 13257 13258 * PowerPC-Opts:: Options 13259 * PowerPC-Pseudo:: PowerPC Assembler Directives 13260 13261 13262 File: as.info, Node: PowerPC-Opts, Next: PowerPC-Pseudo, Up: PPC-Dependent 13263 13264 9.27.1 Options 13265 -------------- 13266 13267 The PowerPC chip family includes several successive levels, using the 13268 same core instruction set, but including a few additional instructions 13269 at each level. There are exceptions to this however. For details on 13270 what instructions each variant supports, please see the chip's 13271 architecture reference manual. 13272 13273 The following table lists all available PowerPC options. 13274 13275 `-mpwrx | -mpwr2' 13276 Generate code for POWER/2 (RIOS2). 13277 13278 `-mpwr' 13279 Generate code for POWER (RIOS1) 13280 13281 `-m601' 13282 Generate code for PowerPC 601. 13283 13284 `-mppc, -mppc32, -m603, -m604' 13285 Generate code for PowerPC 603/604. 13286 13287 `-m403, -m405' 13288 Generate code for PowerPC 403/405. 13289 13290 `-m440' 13291 Generate code for PowerPC 440. BookE and some 405 instructions. 13292 13293 `-m7400, -m7410, -m7450, -m7455' 13294 Generate code for PowerPC 7400/7410/7450/7455. 13295 13296 `-m750cl' 13297 Generate code for PowerPC 750CL. 13298 13299 `-mppc64, -m620' 13300 Generate code for PowerPC 620/625/630. 13301 13302 `-me500, -me500x2' 13303 Generate code for Motorola e500 core complex. 13304 13305 `-mspe' 13306 Generate code for Motorola SPE instructions. 13307 13308 `-mppc64bridge' 13309 Generate code for PowerPC 64, including bridge insns. 13310 13311 `-mbooke64' 13312 Generate code for 64-bit BookE. 13313 13314 `-mbooke, mbooke32' 13315 Generate code for 32-bit BookE. 13316 13317 `-me300' 13318 Generate code for PowerPC e300 family. 13319 13320 `-maltivec' 13321 Generate code for processors with AltiVec instructions. 13322 13323 `-mvsx' 13324 Generate code for processors with Vector-Scalar (VSX) instructions. 13325 13326 `-mpower4' 13327 Generate code for Power4 architecture. 13328 13329 `-mpower5' 13330 Generate code for Power5 architecture. 13331 13332 `-mpower6' 13333 Generate code for Power6 architecture. 13334 13335 `-mpower7' 13336 Generate code for Power7 architecture. 13337 13338 `-mcell' 13339 Generate code for Cell Broadband Engine architecture. 13340 13341 `-mcom' 13342 Generate code Power/PowerPC common instructions. 13343 13344 `-many' 13345 Generate code for any architecture (PWR/PWRX/PPC). 13346 13347 `-mregnames' 13348 Allow symbolic names for registers. 13349 13350 `-mno-regnames' 13351 Do not allow symbolic names for registers. 13352 13353 `-mrelocatable' 13354 Support for GCC's -mrelocatable option. 13355 13356 `-mrelocatable-lib' 13357 Support for GCC's -mrelocatable-lib option. 13358 13359 `-memb' 13360 Set PPC_EMB bit in ELF flags. 13361 13362 `-mlittle, -mlittle-endian' 13363 Generate code for a little endian machine. 13364 13365 `-mbig, -mbig-endian' 13366 Generate code for a big endian machine. 13367 13368 `-msolaris' 13369 Generate code for Solaris. 13370 13371 `-mno-solaris' 13372 Do not generate code for Solaris. 13373 13374 13375 File: as.info, Node: PowerPC-Pseudo, Prev: PowerPC-Opts, Up: PPC-Dependent 13376 13377 9.27.2 PowerPC Assembler Directives 13378 ----------------------------------- 13379 13380 A number of assembler directives are available for PowerPC. The 13381 following table is far from complete. 13382 13383 `.machine "string"' 13384 This directive allows you to change the machine for which code is 13385 generated. `"string"' may be any of the -m cpu selection options 13386 (without the -m) enclosed in double quotes, `"push"', or `"pop"'. 13387 `.machine "push"' saves the currently selected cpu, which may be 13388 restored with `.machine "pop"'. 13389 13390 13391 File: as.info, Node: SH-Dependent, Next: SH64-Dependent, Prev: MSP430-Dependent, Up: Machine Dependencies 13392 13393 9.28 Renesas / SuperH SH Dependent Features 13394 =========================================== 13395 13396 * Menu: 13397 13398 * SH Options:: Options 13399 * SH Syntax:: Syntax 13400 * SH Floating Point:: Floating Point 13401 * SH Directives:: SH Machine Directives 13402 * SH Opcodes:: Opcodes 13403 13404 13405 File: as.info, Node: SH Options, Next: SH Syntax, Up: SH-Dependent 13406 13407 9.28.1 Options 13408 -------------- 13409 13410 `as' has following command-line options for the Renesas (formerly 13411 Hitachi) / SuperH SH family. 13412 13413 `--little' 13414 Generate little endian code. 13415 13416 `--big' 13417 Generate big endian code. 13418 13419 `--relax' 13420 Alter jump instructions for long displacements. 13421 13422 `--small' 13423 Align sections to 4 byte boundaries, not 16. 13424 13425 `--dsp' 13426 Enable sh-dsp insns, and disable sh3e / sh4 insns. 13427 13428 `--renesas' 13429 Disable optimization with section symbol for compatibility with 13430 Renesas assembler. 13431 13432 `--allow-reg-prefix' 13433 Allow '$' as a register name prefix. 13434 13435 `--isa=sh4 | sh4a' 13436 Specify the sh4 or sh4a instruction set. 13437 13438 `--isa=dsp' 13439 Enable sh-dsp insns, and disable sh3e / sh4 insns. 13440 13441 `--isa=fp' 13442 Enable sh2e, sh3e, sh4, and sh4a insn sets. 13443 13444 `--isa=all' 13445 Enable sh1, sh2, sh2e, sh3, sh3e, sh4, sh4a, and sh-dsp insn sets. 13446 13447 `-h-tick-hex' 13448 Support H'00 style hex constants in addition to 0x00 style. 13449 13450 13451 13452 File: as.info, Node: SH Syntax, Next: SH Floating Point, Prev: SH Options, Up: SH-Dependent 13453 13454 9.28.2 Syntax 13455 ------------- 13456 13457 * Menu: 13458 13459 * SH-Chars:: Special Characters 13460 * SH-Regs:: Register Names 13461 * SH-Addressing:: Addressing Modes 13462 13463 13464 File: as.info, Node: SH-Chars, Next: SH-Regs, Up: SH Syntax 13465 13466 9.28.2.1 Special Characters 13467 ........................... 13468 13469 `!' is the line comment character. 13470 13471 You can use `;' instead of a newline to separate statements. 13472 13473 Since `$' has no special meaning, you may use it in symbol names. 13474 13475 13476 File: as.info, Node: SH-Regs, Next: SH-Addressing, Prev: SH-Chars, Up: SH Syntax 13477 13478 9.28.2.2 Register Names 13479 ....................... 13480 13481 You can use the predefined symbols `r0', `r1', `r2', `r3', `r4', `r5', 13482 `r6', `r7', `r8', `r9', `r10', `r11', `r12', `r13', `r14', and `r15' to 13483 refer to the SH registers. 13484 13485 The SH also has these control registers: 13486 13487 `pr' 13488 procedure register (holds return address) 13489 13490 `pc' 13491 program counter 13492 13493 `mach' 13494 `macl' 13495 high and low multiply accumulator registers 13496 13497 `sr' 13498 status register 13499 13500 `gbr' 13501 global base register 13502 13503 `vbr' 13504 vector base register (for interrupt vectors) 13505 13506 13507 File: as.info, Node: SH-Addressing, Prev: SH-Regs, Up: SH Syntax 13508 13509 9.28.2.3 Addressing Modes 13510 ......................... 13511 13512 `as' understands the following addressing modes for the SH. `RN' in 13513 the following refers to any of the numbered registers, but _not_ the 13514 control registers. 13515 13516 `RN' 13517 Register direct 13518 13519 `@RN' 13520 Register indirect 13521 13522 `@-RN' 13523 Register indirect with pre-decrement 13524 13525 `@RN+' 13526 Register indirect with post-increment 13527 13528 `@(DISP, RN)' 13529 Register indirect with displacement 13530 13531 `@(R0, RN)' 13532 Register indexed 13533 13534 `@(DISP, GBR)' 13535 `GBR' offset 13536 13537 `@(R0, GBR)' 13538 GBR indexed 13539 13540 `ADDR' 13541 `@(DISP, PC)' 13542 PC relative address (for branch or for addressing memory). The 13543 `as' implementation allows you to use the simpler form ADDR 13544 anywhere a PC relative address is called for; the alternate form 13545 is supported for compatibility with other assemblers. 13546 13547 `#IMM' 13548 Immediate data 13549 13550 13551 File: as.info, Node: SH Floating Point, Next: SH Directives, Prev: SH Syntax, Up: SH-Dependent 13552 13553 9.28.3 Floating Point 13554 --------------------- 13555 13556 SH2E, SH3E and SH4 groups have on-chip floating-point unit (FPU). Other 13557 SH groups can use `.float' directive to generate IEEE floating-point 13558 numbers. 13559 13560 SH2E and SH3E support single-precision floating point calculations as 13561 well as entirely PCAPI compatible emulation of double-precision 13562 floating point calculations. SH2E and SH3E instructions are a subset of 13563 the floating point calculations conforming to the IEEE754 standard. 13564 13565 In addition to single-precision and double-precision floating-point 13566 operation capability, the on-chip FPU of SH4 has a 128-bit graphic 13567 engine that enables 32-bit floating-point data to be processed 128 bits 13568 at a time. It also supports 4 * 4 array operations and inner product 13569 operations. Also, a superscalar architecture is employed that enables 13570 simultaneous execution of two instructions (including FPU 13571 instructions), providing performance of up to twice that of 13572 conventional architectures at the same frequency. 13573 13574 13575 File: as.info, Node: SH Directives, Next: SH Opcodes, Prev: SH Floating Point, Up: SH-Dependent 13576 13577 9.28.4 SH Machine Directives 13578 ---------------------------- 13579 13580 `uaword' 13581 `ualong' 13582 `as' will issue a warning when a misaligned `.word' or `.long' 13583 directive is used. You may use `.uaword' or `.ualong' to indicate 13584 that the value is intentionally misaligned. 13585 13586 13587 File: as.info, Node: SH Opcodes, Prev: SH Directives, Up: SH-Dependent 13588 13589 9.28.5 Opcodes 13590 -------------- 13591 13592 For detailed information on the SH machine instruction set, see 13593 `SH-Microcomputer User's Manual' (Renesas) or `SH-4 32-bit CPU Core 13594 Architecture' (SuperH) and `SuperH (SH) 64-Bit RISC Series' (SuperH). 13595 13596 `as' implements all the standard SH opcodes. No additional 13597 pseudo-instructions are needed on this family. Note, however, that 13598 because `as' supports a simpler form of PC-relative addressing, you may 13599 simply write (for example) 13600 13601 mov.l bar,r0 13602 13603 where other assemblers might require an explicit displacement to `bar' 13604 from the program counter: 13605 13606 mov.l @(DISP, PC) 13607 13608 Here is a summary of SH opcodes: 13609 13610 Legend: 13611 Rn a numbered register 13612 Rm another numbered register 13613 #imm immediate data 13614 disp displacement 13615 disp8 8-bit displacement 13616 disp12 12-bit displacement 13617 13618 add #imm,Rn lds.l @Rn+,PR 13619 add Rm,Rn mac.w @Rm+,@Rn+ 13620 addc Rm,Rn mov #imm,Rn 13621 addv Rm,Rn mov Rm,Rn 13622 and #imm,R0 mov.b Rm,@(R0,Rn) 13623 and Rm,Rn mov.b Rm,@-Rn 13624 and.b #imm,@(R0,GBR) mov.b Rm,@Rn 13625 bf disp8 mov.b @(disp,Rm),R0 13626 bra disp12 mov.b @(disp,GBR),R0 13627 bsr disp12 mov.b @(R0,Rm),Rn 13628 bt disp8 mov.b @Rm+,Rn 13629 clrmac mov.b @Rm,Rn 13630 clrt mov.b R0,@(disp,Rm) 13631 cmp/eq #imm,R0 mov.b R0,@(disp,GBR) 13632 cmp/eq Rm,Rn mov.l Rm,@(disp,Rn) 13633 cmp/ge Rm,Rn mov.l Rm,@(R0,Rn) 13634 cmp/gt Rm,Rn mov.l Rm,@-Rn 13635 cmp/hi Rm,Rn mov.l Rm,@Rn 13636 cmp/hs Rm,Rn mov.l @(disp,Rn),Rm 13637 cmp/pl Rn mov.l @(disp,GBR),R0 13638 cmp/pz Rn mov.l @(disp,PC),Rn 13639 cmp/str Rm,Rn mov.l @(R0,Rm),Rn 13640 div0s Rm,Rn mov.l @Rm+,Rn 13641 div0u mov.l @Rm,Rn 13642 div1 Rm,Rn mov.l R0,@(disp,GBR) 13643 exts.b Rm,Rn mov.w Rm,@(R0,Rn) 13644 exts.w Rm,Rn mov.w Rm,@-Rn 13645 extu.b Rm,Rn mov.w Rm,@Rn 13646 extu.w Rm,Rn mov.w @(disp,Rm),R0 13647 jmp @Rn mov.w @(disp,GBR),R0 13648 jsr @Rn mov.w @(disp,PC),Rn 13649 ldc Rn,GBR mov.w @(R0,Rm),Rn 13650 ldc Rn,SR mov.w @Rm+,Rn 13651 ldc Rn,VBR mov.w @Rm,Rn 13652 ldc.l @Rn+,GBR mov.w R0,@(disp,Rm) 13653 ldc.l @Rn+,SR mov.w R0,@(disp,GBR) 13654 ldc.l @Rn+,VBR mova @(disp,PC),R0 13655 lds Rn,MACH movt Rn 13656 lds Rn,MACL muls Rm,Rn 13657 lds Rn,PR mulu Rm,Rn 13658 lds.l @Rn+,MACH neg Rm,Rn 13659 lds.l @Rn+,MACL negc Rm,Rn 13660 13661 nop stc VBR,Rn 13662 not Rm,Rn stc.l GBR,@-Rn 13663 or #imm,R0 stc.l SR,@-Rn 13664 or Rm,Rn stc.l VBR,@-Rn 13665 or.b #imm,@(R0,GBR) sts MACH,Rn 13666 rotcl Rn sts MACL,Rn 13667 rotcr Rn sts PR,Rn 13668 rotl Rn sts.l MACH,@-Rn 13669 rotr Rn sts.l MACL,@-Rn 13670 rte sts.l PR,@-Rn 13671 rts sub Rm,Rn 13672 sett subc Rm,Rn 13673 shal Rn subv Rm,Rn 13674 shar Rn swap.b Rm,Rn 13675 shll Rn swap.w Rm,Rn 13676 shll16 Rn tas.b @Rn 13677 shll2 Rn trapa #imm 13678 shll8 Rn tst #imm,R0 13679 shlr Rn tst Rm,Rn 13680 shlr16 Rn tst.b #imm,@(R0,GBR) 13681 shlr2 Rn xor #imm,R0 13682 shlr8 Rn xor Rm,Rn 13683 sleep xor.b #imm,@(R0,GBR) 13684 stc GBR,Rn xtrct Rm,Rn 13685 stc SR,Rn 13686 13687 13688 File: as.info, Node: SH64-Dependent, Next: PDP-11-Dependent, Prev: SH-Dependent, Up: Machine Dependencies 13689 13690 9.29 SuperH SH64 Dependent Features 13691 =================================== 13692 13693 * Menu: 13694 13695 * SH64 Options:: Options 13696 * SH64 Syntax:: Syntax 13697 * SH64 Directives:: SH64 Machine Directives 13698 * SH64 Opcodes:: Opcodes 13699 13700 13701 File: as.info, Node: SH64 Options, Next: SH64 Syntax, Up: SH64-Dependent 13702 13703 9.29.1 Options 13704 -------------- 13705 13706 `-isa=sh4 | sh4a' 13707 Specify the sh4 or sh4a instruction set. 13708 13709 `-isa=dsp' 13710 Enable sh-dsp insns, and disable sh3e / sh4 insns. 13711 13712 `-isa=fp' 13713 Enable sh2e, sh3e, sh4, and sh4a insn sets. 13714 13715 `-isa=all' 13716 Enable sh1, sh2, sh2e, sh3, sh3e, sh4, sh4a, and sh-dsp insn sets. 13717 13718 `-isa=shmedia | -isa=shcompact' 13719 Specify the default instruction set. `SHmedia' specifies the 13720 32-bit opcodes, and `SHcompact' specifies the 16-bit opcodes 13721 compatible with previous SH families. The default depends on the 13722 ABI selected; the default for the 64-bit ABI is SHmedia, and the 13723 default for the 32-bit ABI is SHcompact. If neither the ABI nor 13724 the ISA is specified, the default is 32-bit SHcompact. 13725 13726 Note that the `.mode' pseudo-op is not permitted if the ISA is not 13727 specified on the command line. 13728 13729 `-abi=32 | -abi=64' 13730 Specify the default ABI. If the ISA is specified and the ABI is 13731 not, the default ABI depends on the ISA, with SHmedia defaulting 13732 to 64-bit and SHcompact defaulting to 32-bit. 13733 13734 Note that the `.abi' pseudo-op is not permitted if the ABI is not 13735 specified on the command line. When the ABI is specified on the 13736 command line, any `.abi' pseudo-ops in the source must match it. 13737 13738 `-shcompact-const-crange' 13739 Emit code-range descriptors for constants in SHcompact code 13740 sections. 13741 13742 `-no-mix' 13743 Disallow SHmedia code in the same section as constants and 13744 SHcompact code. 13745 13746 `-no-expand' 13747 Do not expand MOVI, PT, PTA or PTB instructions. 13748 13749 `-expand-pt32' 13750 With -abi=64, expand PT, PTA and PTB instructions to 32 bits only. 13751 13752 `-h-tick-hex' 13753 Support H'00 style hex constants in addition to 0x00 style. 13754 13755 13756 13757 File: as.info, Node: SH64 Syntax, Next: SH64 Directives, Prev: SH64 Options, Up: SH64-Dependent 13758 13759 9.29.2 Syntax 13760 ------------- 13761 13762 * Menu: 13763 13764 * SH64-Chars:: Special Characters 13765 * SH64-Regs:: Register Names 13766 * SH64-Addressing:: Addressing Modes 13767 13768 13769 File: as.info, Node: SH64-Chars, Next: SH64-Regs, Up: SH64 Syntax 13770 13771 9.29.2.1 Special Characters 13772 ........................... 13773 13774 `!' is the line comment character. 13775 13776 You can use `;' instead of a newline to separate statements. 13777 13778 Since `$' has no special meaning, you may use it in symbol names. 13779 13780 13781 File: as.info, Node: SH64-Regs, Next: SH64-Addressing, Prev: SH64-Chars, Up: SH64 Syntax 13782 13783 9.29.2.2 Register Names 13784 ....................... 13785 13786 You can use the predefined symbols `r0' through `r63' to refer to the 13787 SH64 general registers, `cr0' through `cr63' for control registers, 13788 `tr0' through `tr7' for target address registers, `fr0' through `fr63' 13789 for single-precision floating point registers, `dr0' through `dr62' 13790 (even numbered registers only) for double-precision floating point 13791 registers, `fv0' through `fv60' (multiples of four only) for 13792 single-precision floating point vectors, `fp0' through `fp62' (even 13793 numbered registers only) for single-precision floating point pairs, 13794 `mtrx0' through `mtrx48' (multiples of 16 only) for 4x4 matrices of 13795 single-precision floating point registers, `pc' for the program 13796 counter, and `fpscr' for the floating point status and control register. 13797 13798 You can also refer to the control registers by the mnemonics `sr', 13799 `ssr', `pssr', `intevt', `expevt', `pexpevt', `tra', `spc', `pspc', 13800 `resvec', `vbr', `tea', `dcr', `kcr0', `kcr1', `ctc', and `usr'. 13801 13802 13803 File: as.info, Node: SH64-Addressing, Prev: SH64-Regs, Up: SH64 Syntax 13804 13805 9.29.2.3 Addressing Modes 13806 ......................... 13807 13808 SH64 operands consist of either a register or immediate value. The 13809 immediate value can be a constant or label reference (or portion of a 13810 label reference), as in this example: 13811 13812 movi 4,r2 13813 pt function, tr4 13814 movi (function >> 16) & 65535,r0 13815 shori function & 65535, r0 13816 ld.l r0,4,r0 13817 13818 Instruction label references can reference labels in either SHmedia 13819 or SHcompact. To differentiate between the two, labels in SHmedia 13820 sections will always have the least significant bit set (i.e. they will 13821 be odd), which SHcompact labels will have the least significant bit 13822 reset (i.e. they will be even). If you need to reference the actual 13823 address of a label, you can use the `datalabel' modifier, as in this 13824 example: 13825 13826 .long function 13827 .long datalabel function 13828 13829 In that example, the first longword may or may not have the least 13830 significant bit set depending on whether the label is an SHmedia label 13831 or an SHcompact label. The second longword will be the actual address 13832 of the label, regardless of what type of label it is. 13833 13834 13835 File: as.info, Node: SH64 Directives, Next: SH64 Opcodes, Prev: SH64 Syntax, Up: SH64-Dependent 13836 13837 9.29.3 SH64 Machine Directives 13838 ------------------------------ 13839 13840 In addition to the SH directives, the SH64 provides the following 13841 directives: 13842 13843 `.mode [shmedia|shcompact]' 13844 `.isa [shmedia|shcompact]' 13845 Specify the ISA for the following instructions (the two directives 13846 are equivalent). Note that programs such as `objdump' rely on 13847 symbolic labels to determine when such mode switches occur (by 13848 checking the least significant bit of the label's address), so 13849 such mode/isa changes should always be followed by a label (in 13850 practice, this is true anyway). Note that you cannot use these 13851 directives if you didn't specify an ISA on the command line. 13852 13853 `.abi [32|64]' 13854 Specify the ABI for the following instructions. Note that you 13855 cannot use this directive unless you specified an ABI on the 13856 command line, and the ABIs specified must match. 13857 13858 `.uaquad' 13859 Like .uaword and .ualong, this allows you to specify an 13860 intentionally unaligned quadword (64 bit word). 13861 13862 13863 13864 File: as.info, Node: SH64 Opcodes, Prev: SH64 Directives, Up: SH64-Dependent 13865 13866 9.29.4 Opcodes 13867 -------------- 13868 13869 For detailed information on the SH64 machine instruction set, see 13870 `SuperH 64 bit RISC Series Architecture Manual' (SuperH, Inc.). 13871 13872 `as' implements all the standard SH64 opcodes. In addition, the 13873 following pseudo-opcodes may be expanded into one or more alternate 13874 opcodes: 13875 13876 `movi' 13877 If the value doesn't fit into a standard `movi' opcode, `as' will 13878 replace the `movi' with a sequence of `movi' and `shori' opcodes. 13879 13880 `pt' 13881 This expands to a sequence of `movi' and `shori' opcode, followed 13882 by a `ptrel' opcode, or to a `pta' or `ptb' opcode, depending on 13883 the label referenced. 13884 13885 13886 13887 File: as.info, Node: Sparc-Dependent, Next: TIC54X-Dependent, Prev: PPC-Dependent, Up: Machine Dependencies 13888 13889 9.30 SPARC Dependent Features 13890 ============================= 13891 13892 * Menu: 13893 13894 * Sparc-Opts:: Options 13895 * Sparc-Aligned-Data:: Option to enforce aligned data 13896 * Sparc-Syntax:: Syntax 13897 * Sparc-Float:: Floating Point 13898 * Sparc-Directives:: Sparc Machine Directives 13899 13900 13901 File: as.info, Node: Sparc-Opts, Next: Sparc-Aligned-Data, Up: Sparc-Dependent 13902 13903 9.30.1 Options 13904 -------------- 13905 13906 The SPARC chip family includes several successive versions, using the 13907 same core instruction set, but including a few additional instructions 13908 at each version. There are exceptions to this however. For details on 13909 what instructions each variant supports, please see the chip's 13910 architecture reference manual. 13911 13912 By default, `as' assumes the core instruction set (SPARC v6), but 13913 "bumps" the architecture level as needed: it switches to successively 13914 higher architectures as it encounters instructions that only exist in 13915 the higher levels. 13916 13917 If not configured for SPARC v9 (`sparc64-*-*') GAS will not bump 13918 past sparclite by default, an option must be passed to enable the v9 13919 instructions. 13920 13921 GAS treats sparclite as being compatible with v8, unless an 13922 architecture is explicitly requested. SPARC v9 is always incompatible 13923 with sparclite. 13924 13925 `-Av6 | -Av7 | -Av8 | -Asparclet | -Asparclite' 13926 `-Av8plus | -Av8plusa | -Av9 | -Av9a' 13927 Use one of the `-A' options to select one of the SPARC 13928 architectures explicitly. If you select an architecture 13929 explicitly, `as' reports a fatal error if it encounters an 13930 instruction or feature requiring an incompatible or higher level. 13931 13932 `-Av8plus' and `-Av8plusa' select a 32 bit environment. 13933 13934 `-Av9' and `-Av9a' select a 64 bit environment and are not 13935 available unless GAS is explicitly configured with 64 bit 13936 environment support. 13937 13938 `-Av8plusa' and `-Av9a' enable the SPARC V9 instruction set with 13939 UltraSPARC extensions. 13940 13941 `-xarch=v8plus | -xarch=v8plusa' 13942 For compatibility with the SunOS v9 assembler. These options are 13943 equivalent to -Av8plus and -Av8plusa, respectively. 13944 13945 `-bump' 13946 Warn whenever it is necessary to switch to another level. If an 13947 architecture level is explicitly requested, GAS will not issue 13948 warnings until that level is reached, and will then bump the level 13949 as required (except between incompatible levels). 13950 13951 `-32 | -64' 13952 Select the word size, either 32 bits or 64 bits. These options 13953 are only available with the ELF object file format, and require 13954 that the necessary BFD support has been included. 13955 13956 13957 File: as.info, Node: Sparc-Aligned-Data, Next: Sparc-Syntax, Prev: Sparc-Opts, Up: Sparc-Dependent 13958 13959 9.30.2 Enforcing aligned data 13960 ----------------------------- 13961 13962 SPARC GAS normally permits data to be misaligned. For example, it 13963 permits the `.long' pseudo-op to be used on a byte boundary. However, 13964 the native SunOS assemblers issue an error when they see misaligned 13965 data. 13966 13967 You can use the `--enforce-aligned-data' option to make SPARC GAS 13968 also issue an error about misaligned data, just as the SunOS assemblers 13969 do. 13970 13971 The `--enforce-aligned-data' option is not the default because gcc 13972 issues misaligned data pseudo-ops when it initializes certain packed 13973 data structures (structures defined using the `packed' attribute). You 13974 may have to assemble with GAS in order to initialize packed data 13975 structures in your own code. 13976 13977 13978 File: as.info, Node: Sparc-Syntax, Next: Sparc-Float, Prev: Sparc-Aligned-Data, Up: Sparc-Dependent 13979 13980 9.30.3 Sparc Syntax 13981 ------------------- 13982 13983 The assembler syntax closely follows The Sparc Architecture Manual, 13984 versions 8 and 9, as well as most extensions defined by Sun for their 13985 UltraSPARC and Niagara line of processors. 13986 13987 * Menu: 13988 13989 * Sparc-Chars:: Special Characters 13990 * Sparc-Regs:: Register Names 13991 * Sparc-Constants:: Constant Names 13992 * Sparc-Relocs:: Relocations 13993 * Sparc-Size-Translations:: Size Translations 13994 13995 13996 File: as.info, Node: Sparc-Chars, Next: Sparc-Regs, Up: Sparc-Syntax 13997 13998 9.30.3.1 Special Characters 13999 ........................... 14000 14001 `#' is the line comment character. 14002 14003 `;' can be used instead of a newline to separate statements. 14004 14005 14006 File: as.info, Node: Sparc-Regs, Next: Sparc-Constants, Prev: Sparc-Chars, Up: Sparc-Syntax 14007 14008 9.30.3.2 Register Names 14009 ....................... 14010 14011 The Sparc integer register file is broken down into global, outgoing, 14012 local, and incoming. 14013 14014 * The 8 global registers are referred to as `%gN'. 14015 14016 * The 8 outgoing registers are referred to as `%oN'. 14017 14018 * The 8 local registers are referred to as `%lN'. 14019 14020 * The 8 incoming registers are referred to as `%iN'. 14021 14022 * The frame pointer register `%i6' can be referenced using the alias 14023 `%fp'. 14024 14025 * The stack pointer register `%o6' can be referenced using the alias 14026 `%sp'. 14027 14028 Floating point registers are simply referred to as `%fN'. When 14029 assembling for pre-V9, only 32 floating point registers are available. 14030 For V9 and later there are 64, but there are restrictions when 14031 referencing the upper 32 registers. They can only be accessed as 14032 double or quad, and thus only even or quad numbered accesses are 14033 allowed. For example, `%f34' is a legal floating point register, but 14034 `%f35' is not. 14035 14036 Certain V9 instructions allow access to ancillary state registers. 14037 Most simply they can be referred to as `%asrN' where N can be from 16 14038 to 31. However, there are some aliases defined to reference ASR 14039 registers defined for various UltraSPARC processors: 14040 14041 * The tick compare register is referred to as `%tick_cmpr'. 14042 14043 * The system tick register is referred to as `%stick'. An alias, 14044 `%sys_tick', exists but is deprecated and should not be used by 14045 new software. 14046 14047 * The system tick compare register is referred to as `%stick_cmpr'. 14048 An alias, `%sys_tick_cmpr', exists but is deprecated and should 14049 not be used by new software. 14050 14051 * The software interrupt register is referred to as `%softint'. 14052 14053 * The set software interrupt register is referred to as 14054 `%set_softint'. The mnemonic `%softint_set' is provided as an 14055 alias. 14056 14057 * The clear software interrupt register is referred to as 14058 `%clear_softint'. The mnemonic `%softint_clear' is provided as an 14059 alias. 14060 14061 * The performance instrumentation counters register is referred to as 14062 `%pic'. 14063 14064 * The performance control register is referred to as `%pcr'. 14065 14066 * The graphics status register is referred to as `%gsr'. 14067 14068 * The V9 dispatch control register is referred to as `%dcr'. 14069 14070 Various V9 branch and conditional move instructions allow 14071 specification of which set of integer condition codes to test. These 14072 are referred to as `%xcc' and `%icc'. 14073 14074 In V9, there are 4 sets of floating point condition codes which are 14075 referred to as `%fccN'. 14076 14077 Several special privileged and non-privileged registers exist: 14078 14079 * The V9 address space identifier register is referred to as `%asi'. 14080 14081 * The V9 restorable windows register is referred to as `%canrestore'. 14082 14083 * The V9 savable windows register is referred to as `%cansave'. 14084 14085 * The V9 clean windows register is referred to as `%cleanwin'. 14086 14087 * The V9 current window pointer register is referred to as `%cwp'. 14088 14089 * The floating-point queue register is referred to as `%fq'. 14090 14091 * The V8 co-processor queue register is referred to as `%cq'. 14092 14093 * The floating point status register is referred to as `%fsr'. 14094 14095 * The other windows register is referred to as `%otherwin'. 14096 14097 * The V9 program counter register is referred to as `%pc'. 14098 14099 * The V9 next program counter register is referred to as `%npc'. 14100 14101 * The V9 processor interrupt level register is referred to as `%pil'. 14102 14103 * The V9 processor state register is referred to as `%pstate'. 14104 14105 * The trap base address register is referred to as `%tba'. 14106 14107 * The V9 tick register is referred to as `%tick'. 14108 14109 * The V9 trap level is referred to as `%tl'. 14110 14111 * The V9 trap program counter is referred to as `%tpc'. 14112 14113 * The V9 trap next program counter is referred to as `%tnpc'. 14114 14115 * The V9 trap state is referred to as `%tstate'. 14116 14117 * The V9 trap type is referred to as `%tt'. 14118 14119 * The V9 condition codes is referred to as `%ccr'. 14120 14121 * The V9 floating-point registers state is referred to as `%fprs'. 14122 14123 * The V9 version register is referred to as `%ver'. 14124 14125 * The V9 window state register is referred to as `%wstate'. 14126 14127 * The Y register is referred to as `%y'. 14128 14129 * The V8 window invalid mask register is referred to as `%wim'. 14130 14131 * The V8 processor state register is referred to as `%psr'. 14132 14133 * The V9 global register level register is referred to as `%gl'. 14134 14135 Several special register names exist for hypervisor mode code: 14136 14137 * The hyperprivileged processor state register is referred to as 14138 `%hpstate'. 14139 14140 * The hyperprivileged trap state register is referred to as 14141 `%htstate'. 14142 14143 * The hyperprivileged interrupt pending register is referred to as 14144 `%hintp'. 14145 14146 * The hyperprivileged trap base address register is referred to as 14147 `%htba'. 14148 14149 * The hyperprivileged implementation version register is referred to 14150 as `%hver'. 14151 14152 * The hyperprivileged system tick compare register is referred to as 14153 `%hstick_cmpr'. Note that there is no `%hstick' register, the 14154 normal `%stick' is used. 14155 14156 14157 File: as.info, Node: Sparc-Constants, Next: Sparc-Relocs, Prev: Sparc-Regs, Up: Sparc-Syntax 14158 14159 9.30.3.3 Constants 14160 .................. 14161 14162 Several Sparc instructions take an immediate operand field for which 14163 mnemonic names exist. Two such examples are `membar' and `prefetch'. 14164 Another example are the set of V9 memory access instruction that allow 14165 specification of an address space identifier. 14166 14167 The `membar' instruction specifies a memory barrier that is the 14168 defined by the operand which is a bitmask. The supported mask 14169 mnemonics are: 14170 14171 * `#Sync' requests that all operations (including nonmemory 14172 reference operations) appearing prior to the `membar' must have 14173 been performed and the effects of any exceptions become visible 14174 before any instructions after the `membar' may be initiated. This 14175 corresponds to `membar' cmask field bit 2. 14176 14177 * `#MemIssue' requests that all memory reference operations 14178 appearing prior to the `membar' must have been performed before 14179 any memory operation after the `membar' may be initiated. This 14180 corresponds to `membar' cmask field bit 1. 14181 14182 * `#Lookaside' requests that a store appearing prior to the `membar' 14183 must complete before any load following the `membar' referencing 14184 the same address can be initiated. This corresponds to `membar' 14185 cmask field bit 0. 14186 14187 * `#StoreStore' defines that the effects of all stores appearing 14188 prior to the `membar' instruction must be visible to all 14189 processors before the effect of any stores following the `membar'. 14190 Equivalent to the deprecated `stbar' instruction. This 14191 corresponds to `membar' mmask field bit 3. 14192 14193 * `#LoadStore' defines all loads appearing prior to the `membar' 14194 instruction must have been performed before the effect of any 14195 stores following the `membar' is visible to any other processor. 14196 This corresponds to `membar' mmask field bit 2. 14197 14198 * `#StoreLoad' defines that the effects of all stores appearing 14199 prior to the `membar' instruction must be visible to all 14200 processors before loads following the `membar' may be performed. 14201 This corresponds to `membar' mmask field bit 1. 14202 14203 * `#LoadLoad' defines that all loads appearing prior to the `membar' 14204 instruction must have been performed before any loads following 14205 the `membar' may be performed. This corresponds to `membar' mmask 14206 field bit 0. 14207 14208 14209 These values can be ored together, for example: 14210 14211 membar #Sync 14212 membar #StoreLoad | #LoadLoad 14213 membar #StoreLoad | #StoreStore 14214 14215 The `prefetch' and `prefetcha' instructions take a prefetch function 14216 code. The following prefetch function code constant mnemonics are 14217 available: 14218 14219 * `#n_reads' requests a prefetch for several reads, and corresponds 14220 to a prefetch function code of 0. 14221 14222 `#one_read' requests a prefetch for one read, and corresponds to a 14223 prefetch function code of 1. 14224 14225 `#n_writes' requests a prefetch for several writes (and possibly 14226 reads), and corresponds to a prefetch function code of 2. 14227 14228 `#one_write' requests a prefetch for one write, and corresponds to 14229 a prefetch function code of 3. 14230 14231 `#page' requests a prefetch page, and corresponds to a prefetch 14232 function code of 4. 14233 14234 `#invalidate' requests a prefetch invalidate, and corresponds to a 14235 prefetch function code of 16. 14236 14237 `#unified' requests a prefetch to the nearest unified cache, and 14238 corresponds to a prefetch function code of 17. 14239 14240 `#n_reads_strong' requests a strong prefetch for several reads, 14241 and corresponds to a prefetch function code of 20. 14242 14243 `#one_read_strong' requests a strong prefetch for one read, and 14244 corresponds to a prefetch function code of 21. 14245 14246 `#n_writes_strong' requests a strong prefetch for several writes, 14247 and corresponds to a prefetch function code of 22. 14248 14249 `#one_write_strong' requests a strong prefetch for one write, and 14250 corresponds to a prefetch function code of 23. 14251 14252 Onle one prefetch code may be specified. Here are some examples: 14253 14254 prefetch [%l0 + %l2], #one_read 14255 prefetch [%g2 + 8], #n_writes 14256 prefetcha [%g1] 0x8, #unified 14257 prefetcha [%o0 + 0x10] %asi, #n_reads 14258 14259 The actual behavior of a given prefetch function code is processor 14260 specific. If a processor does not implement a given prefetch 14261 function code, it will treat the prefetch instruction as a nop. 14262 14263 For instructions that accept an immediate address space identifier, 14264 `as' provides many mnemonics corresponding to V9 defined as well 14265 as UltraSPARC and Niagara extended values. For example, `#ASI_P' 14266 and `#ASI_BLK_INIT_QUAD_LDD_AIUS'. See the V9 and processor 14267 specific manuals for details. 14268 14269 14270 14271 File: as.info, Node: Sparc-Relocs, Next: Sparc-Size-Translations, Prev: Sparc-Constants, Up: Sparc-Syntax 14272 14273 9.30.3.4 Relocations 14274 .................... 14275 14276 ELF relocations are available as defined in the 32-bit and 64-bit Sparc 14277 ELF specifications. 14278 14279 `R_SPARC_HI22' is obtained using `%hi' and `R_SPARC_LO10' is 14280 obtained using `%lo'. Likewise `R_SPARC_HIX22' is obtained from `%hix' 14281 and `R_SPARC_LOX10' is obtained using `%lox'. For example: 14282 14283 sethi %hi(symbol), %g1 14284 or %g1, %lo(symbol), %g1 14285 14286 sethi %hix(symbol), %g1 14287 xor %g1, %lox(symbol), %g1 14288 14289 These "high" mnemonics extract bits 31:10 of their operand, and the 14290 "low" mnemonics extract bits 9:0 of their operand. 14291 14292 V9 code model relocations can be requested as follows: 14293 14294 * `R_SPARC_HH22' is requested using `%hh'. It can also be generated 14295 using `%uhi'. 14296 14297 * `R_SPARC_HM10' is requested using `%hm'. It can also be generated 14298 using `%ulo'. 14299 14300 * `R_SPARC_LM22' is requested using `%lm'. 14301 14302 * `R_SPARC_H44' is requested using `%h44'. 14303 14304 * `R_SPARC_M44' is requested using `%m44'. 14305 14306 * `R_SPARC_L44' is requested using `%l44'. 14307 14308 The PC relative relocation `R_SPARC_PC22' can be obtained by 14309 enclosing an operand inside of `%pc22'. Likewise, the `R_SPARC_PC10' 14310 relocation can be obtained using `%pc10'. These are mostly used when 14311 assembling PIC code. For example, the standard PIC sequence on Sparc 14312 to get the base of the global offset table, PC relative, into a 14313 register, can be performed as: 14314 14315 sethi %pc22(_GLOBAL_OFFSET_TABLE_-4), %l7 14316 add %l7, %pc10(_GLOBAL_OFFSET_TABLE_+4), %l7 14317 14318 Several relocations exist to allow the link editor to potentially 14319 optimize GOT data references. The `R_SPARC_GOTDATA_OP_HIX22' 14320 relocation can obtained by enclosing an operand inside of 14321 `%gdop_hix22'. The `R_SPARC_GOTDATA_OP_LOX10' relocation can obtained 14322 by enclosing an operand inside of `%gdop_lox10'. Likewise, 14323 `R_SPARC_GOTDATA_OP' can be obtained by enclosing an operand inside of 14324 `%gdop'. For example, assuming the GOT base is in register `%l7': 14325 14326 sethi %gdop_hix22(symbol), %l1 14327 xor %l1, %gdop_lox10(symbol), %l1 14328 ld [%l7 + %l1], %l2, %gdop(symbol) 14329 14330 There are many relocations that can be requested for access to 14331 thread local storage variables. All of the Sparc TLS mnemonics are 14332 supported: 14333 14334 * `R_SPARC_TLS_GD_HI22' is requested using `%tgd_hi22'. 14335 14336 * `R_SPARC_TLS_GD_LO10' is requested using `%tgd_lo10'. 14337 14338 * `R_SPARC_TLS_GD_ADD' is requested using `%tgd_add'. 14339 14340 * `R_SPARC_TLS_GD_CALL' is requested using `%tgd_call'. 14341 14342 * `R_SPARC_TLS_LDM_HI22' is requested using `%tldm_hi22'. 14343 14344 * `R_SPARC_TLS_LDM_LO10' is requested using `%tldm_lo10'. 14345 14346 * `R_SPARC_TLS_LDM_ADD' is requested using `%tldm_add'. 14347 14348 * `R_SPARC_TLS_LDM_CALL' is requested using `%tldm_call'. 14349 14350 * `R_SPARC_TLS_LDO_HIX22' is requested using `%tldo_hix22'. 14351 14352 * `R_SPARC_TLS_LDO_LOX10' is requested using `%tldo_lox10'. 14353 14354 * `R_SPARC_TLS_LDO_ADD' is requested using `%tldo_add'. 14355 14356 * `R_SPARC_TLS_IE_HI22' is requested using `%tie_hi22'. 14357 14358 * `R_SPARC_TLS_IE_LO10' is requested using `%tie_lo10'. 14359 14360 * `R_SPARC_TLS_IE_LD' is requested using `%tie_ld'. 14361 14362 * `R_SPARC_TLS_IE_LDX' is requested using `%tie_ldx'. 14363 14364 * `R_SPARC_TLS_IE_ADD' is requested using `%tie_add'. 14365 14366 * `R_SPARC_TLS_LE_HIX22' is requested using `%tle_hix22'. 14367 14368 * `R_SPARC_TLS_LE_LOX10' is requested using `%tle_lox10'. 14369 14370 Here are some example TLS model sequences. 14371 14372 First, General Dynamic: 14373 14374 sethi %tgd_hi22(symbol), %l1 14375 add %l1, %tgd_lo10(symbol), %l1 14376 add %l7, %l1, %o0, %tgd_add(symbol) 14377 call __tls_get_addr, %tgd_call(symbol) 14378 nop 14379 14380 Local Dynamic: 14381 14382 sethi %tldm_hi22(symbol), %l1 14383 add %l1, %tldm_lo10(symbol), %l1 14384 add %l7, %l1, %o0, %tldm_add(symbol) 14385 call __tls_get_addr, %tldm_call(symbol) 14386 nop 14387 14388 sethi %tldo_hix22(symbol), %l1 14389 xor %l1, %tldo_lox10(symbol), %l1 14390 add %o0, %l1, %l1, %tldo_add(symbol) 14391 14392 Initial Exec: 14393 14394 sethi %tie_hi22(symbol), %l1 14395 add %l1, %tie_lo10(symbol), %l1 14396 ld [%l7 + %l1], %o0, %tie_ld(symbol) 14397 add %g7, %o0, %o0, %tie_add(symbol) 14398 14399 sethi %tie_hi22(symbol), %l1 14400 add %l1, %tie_lo10(symbol), %l1 14401 ldx [%l7 + %l1], %o0, %tie_ldx(symbol) 14402 add %g7, %o0, %o0, %tie_add(symbol) 14403 14404 And finally, Local Exec: 14405 14406 sethi %tle_hix22(symbol), %l1 14407 add %l1, %tle_lox10(symbol), %l1 14408 add %g7, %l1, %l1 14409 14410 When assembling for 64-bit, and a secondary constant addend is 14411 specified in an address expression that would normally generate an 14412 `R_SPARC_LO10' relocation, the assembler will emit an `R_SPARC_OLO10' 14413 instead. 14414 14415 14416 File: as.info, Node: Sparc-Size-Translations, Prev: Sparc-Relocs, Up: Sparc-Syntax 14417 14418 9.30.3.5 Size Translations 14419 .......................... 14420 14421 Often it is desirable to write code in an operand size agnostic manner. 14422 `as' provides support for this via operand size opcode translations. 14423 Translations are supported for loads, stores, shifts, compare-and-swap 14424 atomics, and the `clr' synthetic instruction. 14425 14426 If generating 32-bit code, `as' will generate the 32-bit opcode. 14427 Whereas if 64-bit code is being generated, the 64-bit opcode will be 14428 emitted. For example `ldn' will be transformed into `ld' for 32-bit 14429 code and `ldx' for 64-bit code. 14430 14431 Here is an example meant to demonstrate all the supported opcode 14432 translations: 14433 14434 ldn [%o0], %o1 14435 ldna [%o0] %asi, %o2 14436 stn %o1, [%o0] 14437 stna %o2, [%o0] %asi 14438 slln %o3, 3, %o3 14439 srln %o4, 8, %o4 14440 sran %o5, 12, %o5 14441 casn [%o0], %o1, %o2 14442 casna [%o0] %asi, %o1, %o2 14443 clrn %g1 14444 14445 In 32-bit mode `as' will emit: 14446 14447 ld [%o0], %o1 14448 lda [%o0] %asi, %o2 14449 st %o1, [%o0] 14450 sta %o2, [%o0] %asi 14451 sll %o3, 3, %o3 14452 srl %o4, 8, %o4 14453 sra %o5, 12, %o5 14454 cas [%o0], %o1, %o2 14455 casa [%o0] %asi, %o1, %o2 14456 clr %g1 14457 14458 And in 64-bit mode `as' will emit: 14459 14460 ldx [%o0], %o1 14461 ldxa [%o0] %asi, %o2 14462 stx %o1, [%o0] 14463 stxa %o2, [%o0] %asi 14464 sllx %o3, 3, %o3 14465 srlx %o4, 8, %o4 14466 srax %o5, 12, %o5 14467 casx [%o0], %o1, %o2 14468 casxa [%o0] %asi, %o1, %o2 14469 clrx %g1 14470 14471 Finally, the `.nword' translating directive is supported as well. 14472 It is documented in the section on Sparc machine directives. 14473 14474 14475 File: as.info, Node: Sparc-Float, Next: Sparc-Directives, Prev: Sparc-Syntax, Up: Sparc-Dependent 14476 14477 9.30.4 Floating Point 14478 --------------------- 14479 14480 The Sparc uses IEEE floating-point numbers. 14481 14482 14483 File: as.info, Node: Sparc-Directives, Prev: Sparc-Float, Up: Sparc-Dependent 14484 14485 9.30.5 Sparc Machine Directives 14486 ------------------------------- 14487 14488 The Sparc version of `as' supports the following additional machine 14489 directives: 14490 14491 `.align' 14492 This must be followed by the desired alignment in bytes. 14493 14494 `.common' 14495 This must be followed by a symbol name, a positive number, and 14496 `"bss"'. This behaves somewhat like `.comm', but the syntax is 14497 different. 14498 14499 `.half' 14500 This is functionally identical to `.short'. 14501 14502 `.nword' 14503 On the Sparc, the `.nword' directive produces native word sized 14504 value, ie. if assembling with -32 it is equivalent to `.word', if 14505 assembling with -64 it is equivalent to `.xword'. 14506 14507 `.proc' 14508 This directive is ignored. Any text following it on the same line 14509 is also ignored. 14510 14511 `.register' 14512 This directive declares use of a global application or system 14513 register. It must be followed by a register name %g2, %g3, %g6 or 14514 %g7, comma and the symbol name for that register. If symbol name 14515 is `#scratch', it is a scratch register, if it is `#ignore', it 14516 just suppresses any errors about using undeclared global register, 14517 but does not emit any information about it into the object file. 14518 This can be useful e.g. if you save the register before use and 14519 restore it after. 14520 14521 `.reserve' 14522 This must be followed by a symbol name, a positive number, and 14523 `"bss"'. This behaves somewhat like `.lcomm', but the syntax is 14524 different. 14525 14526 `.seg' 14527 This must be followed by `"text"', `"data"', or `"data1"'. It 14528 behaves like `.text', `.data', or `.data 1'. 14529 14530 `.skip' 14531 This is functionally identical to the `.space' directive. 14532 14533 `.word' 14534 On the Sparc, the `.word' directive produces 32 bit values, 14535 instead of the 16 bit values it produces on many other machines. 14536 14537 `.xword' 14538 On the Sparc V9 processor, the `.xword' directive produces 64 bit 14539 values. 14540 14541 14542 File: as.info, Node: TIC54X-Dependent, Next: V850-Dependent, Prev: Sparc-Dependent, Up: Machine Dependencies 14543 14544 9.31 TIC54X Dependent Features 14545 ============================== 14546 14547 * Menu: 14548 14549 * TIC54X-Opts:: Command-line Options 14550 * TIC54X-Block:: Blocking 14551 * TIC54X-Env:: Environment Settings 14552 * TIC54X-Constants:: Constants Syntax 14553 * TIC54X-Subsyms:: String Substitution 14554 * TIC54X-Locals:: Local Label Syntax 14555 * TIC54X-Builtins:: Builtin Assembler Math Functions 14556 * TIC54X-Ext:: Extended Addressing Support 14557 * TIC54X-Directives:: Directives 14558 * TIC54X-Macros:: Macro Features 14559 * TIC54X-MMRegs:: Memory-mapped Registers 14560 14561 14562 File: as.info, Node: TIC54X-Opts, Next: TIC54X-Block, Up: TIC54X-Dependent 14563 14564 9.31.1 Options 14565 -------------- 14566 14567 The TMS320C54X version of `as' has a few machine-dependent options. 14568 14569 You can use the `-mfar-mode' option to enable extended addressing 14570 mode. All addresses will be assumed to be > 16 bits, and the 14571 appropriate relocation types will be used. This option is equivalent 14572 to using the `.far_mode' directive in the assembly code. If you do not 14573 use the `-mfar-mode' option, all references will be assumed to be 16 14574 bits. This option may be abbreviated to `-mf'. 14575 14576 You can use the `-mcpu' option to specify a particular CPU. This 14577 option is equivalent to using the `.version' directive in the assembly 14578 code. For recognized CPU codes, see *Note `.version': 14579 TIC54X-Directives. The default CPU version is `542'. 14580 14581 You can use the `-merrors-to-file' option to redirect error output 14582 to a file (this provided for those deficient environments which don't 14583 provide adequate output redirection). This option may be abbreviated to 14584 `-me'. 14585 14586 14587 File: as.info, Node: TIC54X-Block, Next: TIC54X-Env, Prev: TIC54X-Opts, Up: TIC54X-Dependent 14588 14589 9.31.2 Blocking 14590 --------------- 14591 14592 A blocked section or memory block is guaranteed not to cross the 14593 blocking boundary (usually a page, or 128 words) if it is smaller than 14594 the blocking size, or to start on a page boundary if it is larger than 14595 the blocking size. 14596 14597 14598 File: as.info, Node: TIC54X-Env, Next: TIC54X-Constants, Prev: TIC54X-Block, Up: TIC54X-Dependent 14599 14600 9.31.3 Environment Settings 14601 --------------------------- 14602 14603 `C54XDSP_DIR' and `A_DIR' are semicolon-separated paths which are added 14604 to the list of directories normally searched for source and include 14605 files. `C54XDSP_DIR' will override `A_DIR'. 14606 14607 14608 File: as.info, Node: TIC54X-Constants, Next: TIC54X-Subsyms, Prev: TIC54X-Env, Up: TIC54X-Dependent 14609 14610 9.31.4 Constants Syntax 14611 ----------------------- 14612 14613 The TIC54X version of `as' allows the following additional constant 14614 formats, using a suffix to indicate the radix: 14615 14616 Binary `000000B, 011000b' 14617 Octal `10Q, 224q' 14618 Hexadecimal `45h, 0FH' 14619 14620 14621 File: as.info, Node: TIC54X-Subsyms, Next: TIC54X-Locals, Prev: TIC54X-Constants, Up: TIC54X-Dependent 14622 14623 9.31.5 String Substitution 14624 -------------------------- 14625 14626 A subset of allowable symbols (which we'll call subsyms) may be assigned 14627 arbitrary string values. This is roughly equivalent to C preprocessor 14628 #define macros. When `as' encounters one of these symbols, the symbol 14629 is replaced in the input stream by its string value. Subsym names 14630 *must* begin with a letter. 14631 14632 Subsyms may be defined using the `.asg' and `.eval' directives 14633 (*Note `.asg': TIC54X-Directives, *Note `.eval': TIC54X-Directives. 14634 14635 Expansion is recursive until a previously encountered symbol is 14636 seen, at which point substitution stops. 14637 14638 In this example, x is replaced with SYM2; SYM2 is replaced with 14639 SYM1, and SYM1 is replaced with x. At this point, x has already been 14640 encountered and the substitution stops. 14641 14642 .asg "x",SYM1 14643 .asg "SYM1",SYM2 14644 .asg "SYM2",x 14645 add x,a ; final code assembled is "add x, a" 14646 14647 Macro parameters are converted to subsyms; a side effect of this is 14648 the normal `as' '\ARG' dereferencing syntax is unnecessary. Subsyms 14649 defined within a macro will have global scope, unless the `.var' 14650 directive is used to identify the subsym as a local macro variable 14651 *note `.var': TIC54X-Directives. 14652 14653 Substitution may be forced in situations where replacement might be 14654 ambiguous by placing colons on either side of the subsym. The following 14655 code: 14656 14657 .eval "10",x 14658 LAB:X: add #x, a 14659 14660 When assembled becomes: 14661 14662 LAB10 add #10, a 14663 14664 Smaller parts of the string assigned to a subsym may be accessed with 14665 the following syntax: 14666 14667 ``:SYMBOL(CHAR_INDEX):'' 14668 Evaluates to a single-character string, the character at 14669 CHAR_INDEX. 14670 14671 ``:SYMBOL(START,LENGTH):'' 14672 Evaluates to a substring of SYMBOL beginning at START with length 14673 LENGTH. 14674 14675 14676 File: as.info, Node: TIC54X-Locals, Next: TIC54X-Builtins, Prev: TIC54X-Subsyms, Up: TIC54X-Dependent 14677 14678 9.31.6 Local Labels 14679 ------------------- 14680 14681 Local labels may be defined in two ways: 14682 14683 * $N, where N is a decimal number between 0 and 9 14684 14685 * LABEL?, where LABEL is any legal symbol name. 14686 14687 Local labels thus defined may be redefined or automatically 14688 generated. The scope of a local label is based on when it may be 14689 undefined or reset. This happens when one of the following situations 14690 is encountered: 14691 14692 * .newblock directive *note `.newblock': TIC54X-Directives. 14693 14694 * The current section is changed (.sect, .text, or .data) 14695 14696 * Entering or leaving an included file 14697 14698 * The macro scope where the label was defined is exited 14699 14700 14701 File: as.info, Node: TIC54X-Builtins, Next: TIC54X-Ext, Prev: TIC54X-Locals, Up: TIC54X-Dependent 14702 14703 9.31.7 Math Builtins 14704 -------------------- 14705 14706 The following built-in functions may be used to generate a 14707 floating-point value. All return a floating-point value except `$cvi', 14708 `$int', and `$sgn', which return an integer value. 14709 14710 ``$acos(EXPR)'' 14711 Returns the floating point arccosine of EXPR. 14712 14713 ``$asin(EXPR)'' 14714 Returns the floating point arcsine of EXPR. 14715 14716 ``$atan(EXPR)'' 14717 Returns the floating point arctangent of EXPR. 14718 14719 ``$atan2(EXPR1,EXPR2)'' 14720 Returns the floating point arctangent of EXPR1 / EXPR2. 14721 14722 ``$ceil(EXPR)'' 14723 Returns the smallest integer not less than EXPR as floating point. 14724 14725 ``$cosh(EXPR)'' 14726 Returns the floating point hyperbolic cosine of EXPR. 14727 14728 ``$cos(EXPR)'' 14729 Returns the floating point cosine of EXPR. 14730 14731 ``$cvf(EXPR)'' 14732 Returns the integer value EXPR converted to floating-point. 14733 14734 ``$cvi(EXPR)'' 14735 Returns the floating point value EXPR converted to integer. 14736 14737 ``$exp(EXPR)'' 14738 Returns the floating point value e ^ EXPR. 14739 14740 ``$fabs(EXPR)'' 14741 Returns the floating point absolute value of EXPR. 14742 14743 ``$floor(EXPR)'' 14744 Returns the largest integer that is not greater than EXPR as 14745 floating point. 14746 14747 ``$fmod(EXPR1,EXPR2)'' 14748 Returns the floating point remainder of EXPR1 / EXPR2. 14749 14750 ``$int(EXPR)'' 14751 Returns 1 if EXPR evaluates to an integer, zero otherwise. 14752 14753 ``$ldexp(EXPR1,EXPR2)'' 14754 Returns the floating point value EXPR1 * 2 ^ EXPR2. 14755 14756 ``$log10(EXPR)'' 14757 Returns the base 10 logarithm of EXPR. 14758 14759 ``$log(EXPR)'' 14760 Returns the natural logarithm of EXPR. 14761 14762 ``$max(EXPR1,EXPR2)'' 14763 Returns the floating point maximum of EXPR1 and EXPR2. 14764 14765 ``$min(EXPR1,EXPR2)'' 14766 Returns the floating point minimum of EXPR1 and EXPR2. 14767 14768 ``$pow(EXPR1,EXPR2)'' 14769 Returns the floating point value EXPR1 ^ EXPR2. 14770 14771 ``$round(EXPR)'' 14772 Returns the nearest integer to EXPR as a floating point number. 14773 14774 ``$sgn(EXPR)'' 14775 Returns -1, 0, or 1 based on the sign of EXPR. 14776 14777 ``$sin(EXPR)'' 14778 Returns the floating point sine of EXPR. 14779 14780 ``$sinh(EXPR)'' 14781 Returns the floating point hyperbolic sine of EXPR. 14782 14783 ``$sqrt(EXPR)'' 14784 Returns the floating point square root of EXPR. 14785 14786 ``$tan(EXPR)'' 14787 Returns the floating point tangent of EXPR. 14788 14789 ``$tanh(EXPR)'' 14790 Returns the floating point hyperbolic tangent of EXPR. 14791 14792 ``$trunc(EXPR)'' 14793 Returns the integer value of EXPR truncated towards zero as 14794 floating point. 14795 14796 14797 14798 File: as.info, Node: TIC54X-Ext, Next: TIC54X-Directives, Prev: TIC54X-Builtins, Up: TIC54X-Dependent 14799 14800 9.31.8 Extended Addressing 14801 -------------------------- 14802 14803 The `LDX' pseudo-op is provided for loading the extended addressing bits 14804 of a label or address. For example, if an address `_label' resides in 14805 extended program memory, the value of `_label' may be loaded as follows: 14806 ldx #_label,16,a ; loads extended bits of _label 14807 or #_label,a ; loads lower 16 bits of _label 14808 bacc a ; full address is in accumulator A 14809 14810 14811 File: as.info, Node: TIC54X-Directives, Next: TIC54X-Macros, Prev: TIC54X-Ext, Up: TIC54X-Dependent 14812 14813 9.31.9 Directives 14814 ----------------- 14815 14816 `.align [SIZE]' 14817 `.even' 14818 Align the section program counter on the next boundary, based on 14819 SIZE. SIZE may be any power of 2. `.even' is equivalent to 14820 `.align' with a SIZE of 2. 14821 `1' 14822 Align SPC to word boundary 14823 14824 `2' 14825 Align SPC to longword boundary (same as .even) 14826 14827 `128' 14828 Align SPC to page boundary 14829 14830 `.asg STRING, NAME' 14831 Assign NAME the string STRING. String replacement is performed on 14832 STRING before assignment. 14833 14834 `.eval STRING, NAME' 14835 Evaluate the contents of string STRING and assign the result as a 14836 string to the subsym NAME. String replacement is performed on 14837 STRING before assignment. 14838 14839 `.bss SYMBOL, SIZE [, [BLOCKING_FLAG] [,ALIGNMENT_FLAG]]' 14840 Reserve space for SYMBOL in the .bss section. SIZE is in words. 14841 If present, BLOCKING_FLAG indicates the allocated space should be 14842 aligned on a page boundary if it would otherwise cross a page 14843 boundary. If present, ALIGNMENT_FLAG causes the assembler to 14844 allocate SIZE on a long word boundary. 14845 14846 `.byte VALUE [,...,VALUE_N]' 14847 `.ubyte VALUE [,...,VALUE_N]' 14848 `.char VALUE [,...,VALUE_N]' 14849 `.uchar VALUE [,...,VALUE_N]' 14850 Place one or more bytes into consecutive words of the current 14851 section. The upper 8 bits of each word is zero-filled. If a 14852 label is used, it points to the word allocated for the first byte 14853 encountered. 14854 14855 `.clink ["SECTION_NAME"]' 14856 Set STYP_CLINK flag for this section, which indicates to the 14857 linker that if no symbols from this section are referenced, the 14858 section should not be included in the link. If SECTION_NAME is 14859 omitted, the current section is used. 14860 14861 `.c_mode' 14862 TBD. 14863 14864 `.copy "FILENAME" | FILENAME' 14865 `.include "FILENAME" | FILENAME' 14866 Read source statements from FILENAME. The normal include search 14867 path is used. Normally .copy will cause statements from the 14868 included file to be printed in the assembly listing and .include 14869 will not, but this distinction is not currently implemented. 14870 14871 `.data' 14872 Begin assembling code into the .data section. 14873 14874 `.double VALUE [,...,VALUE_N]' 14875 `.ldouble VALUE [,...,VALUE_N]' 14876 `.float VALUE [,...,VALUE_N]' 14877 `.xfloat VALUE [,...,VALUE_N]' 14878 Place an IEEE single-precision floating-point representation of 14879 one or more floating-point values into the current section. All 14880 but `.xfloat' align the result on a longword boundary. Values are 14881 stored most-significant word first. 14882 14883 `.drlist' 14884 `.drnolist' 14885 Control printing of directives to the listing file. Ignored. 14886 14887 `.emsg STRING' 14888 `.mmsg STRING' 14889 `.wmsg STRING' 14890 Emit a user-defined error, message, or warning, respectively. 14891 14892 `.far_mode' 14893 Use extended addressing when assembling statements. This should 14894 appear only once per file, and is equivalent to the -mfar-mode 14895 option *note `-mfar-mode': TIC54X-Opts. 14896 14897 `.fclist' 14898 `.fcnolist' 14899 Control printing of false conditional blocks to the listing file. 14900 14901 `.field VALUE [,SIZE]' 14902 Initialize a bitfield of SIZE bits in the current section. If 14903 VALUE is relocatable, then SIZE must be 16. SIZE defaults to 16 14904 bits. If VALUE does not fit into SIZE bits, the value will be 14905 truncated. Successive `.field' directives will pack starting at 14906 the current word, filling the most significant bits first, and 14907 aligning to the start of the next word if the field size does not 14908 fit into the space remaining in the current word. A `.align' 14909 directive with an operand of 1 will force the next `.field' 14910 directive to begin packing into a new word. If a label is used, it 14911 points to the word that contains the specified field. 14912 14913 `.global SYMBOL [,...,SYMBOL_N]' 14914 `.def SYMBOL [,...,SYMBOL_N]' 14915 `.ref SYMBOL [,...,SYMBOL_N]' 14916 `.def' nominally identifies a symbol defined in the current file 14917 and available to other files. `.ref' identifies a symbol used in 14918 the current file but defined elsewhere. Both map to the standard 14919 `.global' directive. 14920 14921 `.half VALUE [,...,VALUE_N]' 14922 `.uhalf VALUE [,...,VALUE_N]' 14923 `.short VALUE [,...,VALUE_N]' 14924 `.ushort VALUE [,...,VALUE_N]' 14925 `.int VALUE [,...,VALUE_N]' 14926 `.uint VALUE [,...,VALUE_N]' 14927 `.word VALUE [,...,VALUE_N]' 14928 `.uword VALUE [,...,VALUE_N]' 14929 Place one or more values into consecutive words of the current 14930 section. If a label is used, it points to the word allocated for 14931 the first value encountered. 14932 14933 `.label SYMBOL' 14934 Define a special SYMBOL to refer to the load time address of the 14935 current section program counter. 14936 14937 `.length' 14938 `.width' 14939 Set the page length and width of the output listing file. Ignored. 14940 14941 `.list' 14942 `.nolist' 14943 Control whether the source listing is printed. Ignored. 14944 14945 `.long VALUE [,...,VALUE_N]' 14946 `.ulong VALUE [,...,VALUE_N]' 14947 `.xlong VALUE [,...,VALUE_N]' 14948 Place one or more 32-bit values into consecutive words in the 14949 current section. The most significant word is stored first. 14950 `.long' and `.ulong' align the result on a longword boundary; 14951 `xlong' does not. 14952 14953 `.loop [COUNT]' 14954 `.break [CONDITION]' 14955 `.endloop' 14956 Repeatedly assemble a block of code. `.loop' begins the block, and 14957 `.endloop' marks its termination. COUNT defaults to 1024, and 14958 indicates the number of times the block should be repeated. 14959 `.break' terminates the loop so that assembly begins after the 14960 `.endloop' directive. The optional CONDITION will cause the loop 14961 to terminate only if it evaluates to zero. 14962 14963 `MACRO_NAME .macro [PARAM1][,...PARAM_N]' 14964 `[.mexit]' 14965 `.endm' 14966 See the section on macros for more explanation (*Note 14967 TIC54X-Macros::. 14968 14969 `.mlib "FILENAME" | FILENAME' 14970 Load the macro library FILENAME. FILENAME must be an archived 14971 library (BFD ar-compatible) of text files, expected to contain 14972 only macro definitions. The standard include search path is used. 14973 14974 `.mlist' 14975 14976 `.mnolist' 14977 Control whether to include macro and loop block expansions in the 14978 listing output. Ignored. 14979 14980 `.mmregs' 14981 Define global symbolic names for the 'c54x registers. Supposedly 14982 equivalent to executing `.set' directives for each register with 14983 its memory-mapped value, but in reality is provided only for 14984 compatibility and does nothing. 14985 14986 `.newblock' 14987 This directive resets any TIC54X local labels currently defined. 14988 Normal `as' local labels are unaffected. 14989 14990 `.option OPTION_LIST' 14991 Set listing options. Ignored. 14992 14993 `.sblock "SECTION_NAME" | SECTION_NAME [,"NAME_N" | NAME_N]' 14994 Designate SECTION_NAME for blocking. Blocking guarantees that a 14995 section will start on a page boundary (128 words) if it would 14996 otherwise cross a page boundary. Only initialized sections may be 14997 designated with this directive. See also *Note TIC54X-Block::. 14998 14999 `.sect "SECTION_NAME"' 15000 Define a named initialized section and make it the current section. 15001 15002 `SYMBOL .set "VALUE"' 15003 `SYMBOL .equ "VALUE"' 15004 Equate a constant VALUE to a SYMBOL, which is placed in the symbol 15005 table. SYMBOL may not be previously defined. 15006 15007 `.space SIZE_IN_BITS' 15008 `.bes SIZE_IN_BITS' 15009 Reserve the given number of bits in the current section and 15010 zero-fill them. If a label is used with `.space', it points to the 15011 *first* word reserved. With `.bes', the label points to the 15012 *last* word reserved. 15013 15014 `.sslist' 15015 `.ssnolist' 15016 Controls the inclusion of subsym replacement in the listing 15017 output. Ignored. 15018 15019 `.string "STRING" [,...,"STRING_N"]' 15020 `.pstring "STRING" [,...,"STRING_N"]' 15021 Place 8-bit characters from STRING into the current section. 15022 `.string' zero-fills the upper 8 bits of each word, while 15023 `.pstring' puts two characters into each word, filling the 15024 most-significant bits first. Unused space is zero-filled. If a 15025 label is used, it points to the first word initialized. 15026 15027 `[STAG] .struct [OFFSET]' 15028 `[NAME_1] element [COUNT_1]' 15029 `[NAME_2] element [COUNT_2]' 15030 `[TNAME] .tag STAGX [TCOUNT]' 15031 `...' 15032 `[NAME_N] element [COUNT_N]' 15033 `[SSIZE] .endstruct' 15034 `LABEL .tag [STAG]' 15035 Assign symbolic offsets to the elements of a structure. STAG 15036 defines a symbol to use to reference the structure. OFFSET 15037 indicates a starting value to use for the first element 15038 encountered; otherwise it defaults to zero. Each element can have 15039 a named offset, NAME, which is a symbol assigned the value of the 15040 element's offset into the structure. If STAG is missing, these 15041 become global symbols. COUNT adjusts the offset that many times, 15042 as if `element' were an array. `element' may be one of `.byte', 15043 `.word', `.long', `.float', or any equivalent of those, and the 15044 structure offset is adjusted accordingly. `.field' and `.string' 15045 are also allowed; the size of `.field' is one bit, and `.string' 15046 is considered to be one word in size. Only element descriptors, 15047 structure/union tags, `.align' and conditional assembly directives 15048 are allowed within `.struct'/`.endstruct'. `.align' aligns member 15049 offsets to word boundaries only. SSIZE, if provided, will always 15050 be assigned the size of the structure. 15051 15052 The `.tag' directive, in addition to being used to define a 15053 structure/union element within a structure, may be used to apply a 15054 structure to a symbol. Once applied to LABEL, the individual 15055 structure elements may be applied to LABEL to produce the desired 15056 offsets using LABEL as the structure base. 15057 15058 `.tab' 15059 Set the tab size in the output listing. Ignored. 15060 15061 `[UTAG] .union' 15062 `[NAME_1] element [COUNT_1]' 15063 `[NAME_2] element [COUNT_2]' 15064 `[TNAME] .tag UTAGX[,TCOUNT]' 15065 `...' 15066 `[NAME_N] element [COUNT_N]' 15067 `[USIZE] .endstruct' 15068 `LABEL .tag [UTAG]' 15069 Similar to `.struct', but the offset after each element is reset to 15070 zero, and the USIZE is set to the maximum of all defined elements. 15071 Starting offset for the union is always zero. 15072 15073 `[SYMBOL] .usect "SECTION_NAME", SIZE, [,[BLOCKING_FLAG] [,ALIGNMENT_FLAG]]' 15074 Reserve space for variables in a named, uninitialized section 15075 (similar to .bss). `.usect' allows definitions sections 15076 independent of .bss. SYMBOL points to the first location reserved 15077 by this allocation. The symbol may be used as a variable name. 15078 SIZE is the allocated size in words. BLOCKING_FLAG indicates 15079 whether to block this section on a page boundary (128 words) 15080 (*note TIC54X-Block::). ALIGNMENT FLAG indicates whether the 15081 section should be longword-aligned. 15082 15083 `.var SYM[,..., SYM_N]' 15084 Define a subsym to be a local variable within a macro. See *Note 15085 TIC54X-Macros::. 15086 15087 `.version VERSION' 15088 Set which processor to build instructions for. Though the 15089 following values are accepted, the op is ignored. 15090 `541' 15091 `542' 15092 `543' 15093 `545' 15094 `545LP' 15095 `546LP' 15096 `548' 15097 `549' 15098 15099 15100 File: as.info, Node: TIC54X-Macros, Next: TIC54X-MMRegs, Prev: TIC54X-Directives, Up: TIC54X-Dependent 15101 15102 9.31.10 Macros 15103 -------------- 15104 15105 Macros do not require explicit dereferencing of arguments (i.e., \ARG). 15106 15107 During macro expansion, the macro parameters are converted to 15108 subsyms. If the number of arguments passed the macro invocation 15109 exceeds the number of parameters defined, the last parameter is 15110 assigned the string equivalent of all remaining arguments. If fewer 15111 arguments are given than parameters, the missing parameters are 15112 assigned empty strings. To include a comma in an argument, you must 15113 enclose the argument in quotes. 15114 15115 The following built-in subsym functions allow examination of the 15116 string value of subsyms (or ordinary strings). The arguments are 15117 strings unless otherwise indicated (subsyms passed as args will be 15118 replaced by the strings they represent). 15119 ``$symlen(STR)'' 15120 Returns the length of STR. 15121 15122 ``$symcmp(STR1,STR2)'' 15123 Returns 0 if STR1 == STR2, non-zero otherwise. 15124 15125 ``$firstch(STR,CH)'' 15126 Returns index of the first occurrence of character constant CH in 15127 STR. 15128 15129 ``$lastch(STR,CH)'' 15130 Returns index of the last occurrence of character constant CH in 15131 STR. 15132 15133 ``$isdefed(SYMBOL)'' 15134 Returns zero if the symbol SYMBOL is not in the symbol table, 15135 non-zero otherwise. 15136 15137 ``$ismember(SYMBOL,LIST)'' 15138 Assign the first member of comma-separated string LIST to SYMBOL; 15139 LIST is reassigned the remainder of the list. Returns zero if 15140 LIST is a null string. Both arguments must be subsyms. 15141 15142 ``$iscons(EXPR)'' 15143 Returns 1 if string EXPR is binary, 2 if octal, 3 if hexadecimal, 15144 4 if a character, 5 if decimal, and zero if not an integer. 15145 15146 ``$isname(NAME)'' 15147 Returns 1 if NAME is a valid symbol name, zero otherwise. 15148 15149 ``$isreg(REG)'' 15150 Returns 1 if REG is a valid predefined register name (AR0-AR7 15151 only). 15152 15153 ``$structsz(STAG)'' 15154 Returns the size of the structure or union represented by STAG. 15155 15156 ``$structacc(STAG)'' 15157 Returns the reference point of the structure or union represented 15158 by STAG. Always returns zero. 15159 15160 15161 15162 File: as.info, Node: TIC54X-MMRegs, Prev: TIC54X-Macros, Up: TIC54X-Dependent 15163 15164 9.31.11 Memory-mapped Registers 15165 ------------------------------- 15166 15167 The following symbols are recognized as memory-mapped registers: 15168 15169 15170 15171 File: as.info, Node: Z80-Dependent, Next: Z8000-Dependent, Prev: Xtensa-Dependent, Up: Machine Dependencies 15172 15173 9.32 Z80 Dependent Features 15174 =========================== 15175 15176 * Menu: 15177 15178 * Z80 Options:: Options 15179 * Z80 Syntax:: Syntax 15180 * Z80 Floating Point:: Floating Point 15181 * Z80 Directives:: Z80 Machine Directives 15182 * Z80 Opcodes:: Opcodes 15183 15184 15185 File: as.info, Node: Z80 Options, Next: Z80 Syntax, Up: Z80-Dependent 15186 15187 9.32.1 Options 15188 -------------- 15189 15190 The Zilog Z80 and Ascii R800 version of `as' have a few machine 15191 dependent options. 15192 `-z80' 15193 Produce code for the Z80 processor. There are additional options to 15194 request warnings and error messages for undocumented instructions. 15195 15196 `-ignore-undocumented-instructions' 15197 `-Wnud' 15198 Silently assemble undocumented Z80-instructions that have been 15199 adopted as documented R800-instructions. 15200 15201 `-ignore-unportable-instructions' 15202 `-Wnup' 15203 Silently assemble all undocumented Z80-instructions. 15204 15205 `-warn-undocumented-instructions' 15206 `-Wud' 15207 Issue warnings for undocumented Z80-instructions that work on 15208 R800, do not assemble other undocumented instructions without 15209 warning. 15210 15211 `-warn-unportable-instructions' 15212 `-Wup' 15213 Issue warnings for other undocumented Z80-instructions, do not 15214 treat any undocumented instructions as errors. 15215 15216 `-forbid-undocumented-instructions' 15217 `-Fud' 15218 Treat all undocumented z80-instructions as errors. 15219 15220 `-forbid-unportable-instructions' 15221 `-Fup' 15222 Treat undocumented z80-instructions that do not work on R800 as 15223 errors. 15224 15225 `-r800' 15226 Produce code for the R800 processor. The assembler does not support 15227 undocumented instructions for the R800. In line with common 15228 practice, `as' uses Z80 instruction names for the R800 processor, 15229 as far as they exist. 15230 15231 15232 File: as.info, Node: Z80 Syntax, Next: Z80 Floating Point, Prev: Z80 Options, Up: Z80-Dependent 15233 15234 9.32.2 Syntax 15235 ------------- 15236 15237 The assembler syntax closely follows the 'Z80 family CPU User Manual' by 15238 Zilog. In expressions a single `=' may be used as "is equal to" 15239 comparison operator. 15240 15241 Suffices can be used to indicate the radix of integer constants; `H' 15242 or `h' for hexadecimal, `D' or `d' for decimal, `Q', `O', `q' or `o' 15243 for octal, and `B' for binary. 15244 15245 The suffix `b' denotes a backreference to local label. 15246 15247 * Menu: 15248 15249 * Z80-Chars:: Special Characters 15250 * Z80-Regs:: Register Names 15251 * Z80-Case:: Case Sensitivity 15252 15253 15254 File: as.info, Node: Z80-Chars, Next: Z80-Regs, Up: Z80 Syntax 15255 15256 9.32.2.1 Special Characters 15257 ........................... 15258 15259 The semicolon `;' is the line comment character; 15260 15261 The dollar sign `$' can be used as a prefix for hexadecimal numbers 15262 and as a symbol denoting the current location counter. 15263 15264 A backslash `\' is an ordinary character for the Z80 assembler. 15265 15266 The single quote `'' must be followed by a closing quote. If there 15267 is one character in between, it is a character constant, otherwise it is 15268 a string constant. 15269 15270 15271 File: as.info, Node: Z80-Regs, Next: Z80-Case, Prev: Z80-Chars, Up: Z80 Syntax 15272 15273 9.32.2.2 Register Names 15274 ....................... 15275 15276 The registers are referred to with the letters assigned to them by 15277 Zilog. In addition `as' recognizes `ixl' and `ixh' as the least and 15278 most significant octet in `ix', and similarly `iyl' and `iyh' as parts 15279 of `iy'. 15280 15281 15282 File: as.info, Node: Z80-Case, Prev: Z80-Regs, Up: Z80 Syntax 15283 15284 9.32.2.3 Case Sensitivity 15285 ......................... 15286 15287 Upper and lower case are equivalent in register names, opcodes, 15288 condition codes and assembler directives. The case of letters is 15289 significant in labels and symbol names. The case is also important to 15290 distinguish the suffix `b' for a backward reference to a local label 15291 from the suffix `B' for a number in binary notation. 15292 15293 15294 File: as.info, Node: Z80 Floating Point, Next: Z80 Directives, Prev: Z80 Syntax, Up: Z80-Dependent 15295 15296 9.32.3 Floating Point 15297 --------------------- 15298 15299 Floating-point numbers are not supported. 15300 15301 15302 File: as.info, Node: Z80 Directives, Next: Z80 Opcodes, Prev: Z80 Floating Point, Up: Z80-Dependent 15303 15304 9.32.4 Z80 Assembler Directives 15305 ------------------------------- 15306 15307 `as' for the Z80 supports some additional directives for compatibility 15308 with other assemblers. 15309 15310 These are the additional directives in `as' for the Z80: 15311 15312 `db EXPRESSION|STRING[,EXPRESSION|STRING...]' 15313 `defb EXPRESSION|STRING[,EXPRESSION|STRING...]' 15314 For each STRING the characters are copied to the object file, for 15315 each other EXPRESSION the value is stored in one byte. A warning 15316 is issued in case of an overflow. 15317 15318 `dw EXPRESSION[,EXPRESSION...]' 15319 `defw EXPRESSION[,EXPRESSION...]' 15320 For each EXPRESSION the value is stored in two bytes, ignoring 15321 overflow. 15322 15323 `d24 EXPRESSION[,EXPRESSION...]' 15324 `def24 EXPRESSION[,EXPRESSION...]' 15325 For each EXPRESSION the value is stored in three bytes, ignoring 15326 overflow. 15327 15328 `d32 EXPRESSION[,EXPRESSION...]' 15329 `def32 EXPRESSION[,EXPRESSION...]' 15330 For each EXPRESSION the value is stored in four bytes, ignoring 15331 overflow. 15332 15333 `ds COUNT[, VALUE]' 15334 `defs COUNT[, VALUE]' 15335 Fill COUNT bytes in the object file with VALUE, if VALUE is 15336 omitted it defaults to zero. 15337 15338 `SYMBOL equ EXPRESSION' 15339 `SYMBOL defl EXPRESSION' 15340 These directives set the value of SYMBOL to EXPRESSION. If `equ' 15341 is used, it is an error if SYMBOL is already defined. Symbols 15342 defined with `equ' are not protected from redefinition. 15343 15344 `set' 15345 This is a normal instruction on Z80, and not an assembler 15346 directive. 15347 15348 `psect NAME' 15349 A synonym for *Note Section::, no second argument should be given. 15350 15351 15352 15353 File: as.info, Node: Z80 Opcodes, Prev: Z80 Directives, Up: Z80-Dependent 15354 15355 9.32.5 Opcodes 15356 -------------- 15357 15358 In line with common practice, Z80 mnemonics are used for both the Z80 15359 and the R800. 15360 15361 In many instructions it is possible to use one of the half index 15362 registers (`ixl',`ixh',`iyl',`iyh') in stead of an 8-bit general 15363 purpose register. This yields instructions that are documented on the 15364 R800 and undocumented on the Z80. Similarly `in f,(c)' is documented 15365 on the R800 and undocumented on the Z80. 15366 15367 The assembler also supports the following undocumented 15368 Z80-instructions, that have not been adopted in the R800 instruction 15369 set: 15370 `out (c),0' 15371 Sends zero to the port pointed to by register c. 15372 15373 `sli M' 15374 Equivalent to `M = (M<<1)+1', the operand M can be any operand 15375 that is valid for `sla'. One can use `sll' as a synonym for `sli'. 15376 15377 `OP (ix+D), R' 15378 This is equivalent to 15379 15380 ld R, (ix+D) 15381 OPC R 15382 ld (ix+D), R 15383 15384 The operation `OPC' may be any of `res B,', `set B,', `rl', `rlc', 15385 `rr', `rrc', `sla', `sli', `sra' and `srl', and the register `R' 15386 may be any of `a', `b', `c', `d', `e', `h' and `l'. 15387 15388 `OPC (iy+D), R' 15389 As above, but with `iy' instead of `ix'. 15390 15391 The web site at `http://www.z80.info' is a good starting place to 15392 find more information on programming the Z80. 15393 15394 15395 File: as.info, Node: Z8000-Dependent, Next: Vax-Dependent, Prev: Z80-Dependent, Up: Machine Dependencies 15396 15397 9.33 Z8000 Dependent Features 15398 ============================= 15399 15400 The Z8000 as supports both members of the Z8000 family: the 15401 unsegmented Z8002, with 16 bit addresses, and the segmented Z8001 with 15402 24 bit addresses. 15403 15404 When the assembler is in unsegmented mode (specified with the 15405 `unsegm' directive), an address takes up one word (16 bit) sized 15406 register. When the assembler is in segmented mode (specified with the 15407 `segm' directive), a 24-bit address takes up a long (32 bit) register. 15408 *Note Assembler Directives for the Z8000: Z8000 Directives, for a list 15409 of other Z8000 specific assembler directives. 15410 15411 * Menu: 15412 15413 * Z8000 Options:: Command-line options for the Z8000 15414 * Z8000 Syntax:: Assembler syntax for the Z8000 15415 * Z8000 Directives:: Special directives for the Z8000 15416 * Z8000 Opcodes:: Opcodes 15417 15418 15419 File: as.info, Node: Z8000 Options, Next: Z8000 Syntax, Up: Z8000-Dependent 15420 15421 9.33.1 Options 15422 -------------- 15423 15424 `-z8001' 15425 Generate segmented code by default. 15426 15427 `-z8002' 15428 Generate unsegmented code by default. 15429 15430 15431 File: as.info, Node: Z8000 Syntax, Next: Z8000 Directives, Prev: Z8000 Options, Up: Z8000-Dependent 15432 15433 9.33.2 Syntax 15434 ------------- 15435 15436 * Menu: 15437 15438 * Z8000-Chars:: Special Characters 15439 * Z8000-Regs:: Register Names 15440 * Z8000-Addressing:: Addressing Modes 15441 15442 15443 File: as.info, Node: Z8000-Chars, Next: Z8000-Regs, Up: Z8000 Syntax 15444 15445 9.33.2.1 Special Characters 15446 ........................... 15447 15448 `!' is the line comment character. 15449 15450 You can use `;' instead of a newline to separate statements. 15451 15452 15453 File: as.info, Node: Z8000-Regs, Next: Z8000-Addressing, Prev: Z8000-Chars, Up: Z8000 Syntax 15454 15455 9.33.2.2 Register Names 15456 ....................... 15457 15458 The Z8000 has sixteen 16 bit registers, numbered 0 to 15. You can refer 15459 to different sized groups of registers by register number, with the 15460 prefix `r' for 16 bit registers, `rr' for 32 bit registers and `rq' for 15461 64 bit registers. You can also refer to the contents of the first 15462 eight (of the sixteen 16 bit registers) by bytes. They are named `rlN' 15463 and `rhN'. 15464 15465 _byte registers_ 15466 rl0 rh0 rl1 rh1 rl2 rh2 rl3 rh3 15467 rl4 rh4 rl5 rh5 rl6 rh6 rl7 rh7 15468 15469 _word registers_ 15470 r0 r1 r2 r3 r4 r5 r6 r7 r8 r9 r10 r11 r12 r13 r14 r15 15471 15472 _long word registers_ 15473 rr0 rr2 rr4 rr6 rr8 rr10 rr12 rr14 15474 15475 _quad word registers_ 15476 rq0 rq4 rq8 rq12 15477 15478 15479 File: as.info, Node: Z8000-Addressing, Prev: Z8000-Regs, Up: Z8000 Syntax 15480 15481 9.33.2.3 Addressing Modes 15482 ......................... 15483 15484 as understands the following addressing modes for the Z8000: 15485 15486 `rlN' 15487 `rhN' 15488 `rN' 15489 `rrN' 15490 `rqN' 15491 Register direct: 8bit, 16bit, 32bit, and 64bit registers. 15492 15493 `@rN' 15494 `@rrN' 15495 Indirect register: @rrN in segmented mode, @rN in unsegmented 15496 mode. 15497 15498 `ADDR' 15499 Direct: the 16 bit or 24 bit address (depending on whether the 15500 assembler is in segmented or unsegmented mode) of the operand is 15501 in the instruction. 15502 15503 `address(rN)' 15504 Indexed: the 16 or 24 bit address is added to the 16 bit register 15505 to produce the final address in memory of the operand. 15506 15507 `rN(#IMM)' 15508 `rrN(#IMM)' 15509 Base Address: the 16 or 24 bit register is added to the 16 bit sign 15510 extended immediate displacement to produce the final address in 15511 memory of the operand. 15512 15513 `rN(rM)' 15514 `rrN(rM)' 15515 Base Index: the 16 or 24 bit register rN or rrN is added to the 15516 sign extended 16 bit index register rM to produce the final 15517 address in memory of the operand. 15518 15519 `#XX' 15520 Immediate data XX. 15521 15522 15523 File: as.info, Node: Z8000 Directives, Next: Z8000 Opcodes, Prev: Z8000 Syntax, Up: Z8000-Dependent 15524 15525 9.33.3 Assembler Directives for the Z8000 15526 ----------------------------------------- 15527 15528 The Z8000 port of as includes additional assembler directives, for 15529 compatibility with other Z8000 assemblers. These do not begin with `.' 15530 (unlike the ordinary as directives). 15531 15532 `segm' 15533 `.z8001' 15534 Generate code for the segmented Z8001. 15535 15536 `unsegm' 15537 `.z8002' 15538 Generate code for the unsegmented Z8002. 15539 15540 `name' 15541 Synonym for `.file' 15542 15543 `global' 15544 Synonym for `.global' 15545 15546 `wval' 15547 Synonym for `.word' 15548 15549 `lval' 15550 Synonym for `.long' 15551 15552 `bval' 15553 Synonym for `.byte' 15554 15555 `sval' 15556 Assemble a string. `sval' expects one string literal, delimited by 15557 single quotes. It assembles each byte of the string into 15558 consecutive addresses. You can use the escape sequence `%XX' 15559 (where XX represents a two-digit hexadecimal number) to represent 15560 the character whose ASCII value is XX. Use this feature to 15561 describe single quote and other characters that may not appear in 15562 string literals as themselves. For example, the C statement 15563 `char *a = "he said \"it's 50% off\"";' is represented in Z8000 15564 assembly language (shown with the assembler output in hex at the 15565 left) as 15566 15567 68652073 sval 'he said %22it%27s 50%25 off%22%00' 15568 61696420 15569 22697427 15570 73203530 15571 25206F66 15572 662200 15573 15574 `rsect' 15575 synonym for `.section' 15576 15577 `block' 15578 synonym for `.space' 15579 15580 `even' 15581 special case of `.align'; aligns output to even byte boundary. 15582 15583 15584 File: as.info, Node: Z8000 Opcodes, Prev: Z8000 Directives, Up: Z8000-Dependent 15585 15586 9.33.4 Opcodes 15587 -------------- 15588 15589 For detailed information on the Z8000 machine instruction set, see 15590 `Z8000 Technical Manual'. 15591 15592 The following table summarizes the opcodes and their arguments: 15593 15594 rs 16 bit source register 15595 rd 16 bit destination register 15596 rbs 8 bit source register 15597 rbd 8 bit destination register 15598 rrs 32 bit source register 15599 rrd 32 bit destination register 15600 rqs 64 bit source register 15601 rqd 64 bit destination register 15602 addr 16/24 bit address 15603 imm immediate data 15604 15605 adc rd,rs clrb addr cpsir @rd,@rs,rr,cc 15606 adcb rbd,rbs clrb addr(rd) cpsirb @rd,@rs,rr,cc 15607 add rd,@rs clrb rbd dab rbd 15608 add rd,addr com @rd dbjnz rbd,disp7 15609 add rd,addr(rs) com addr dec @rd,imm4m1 15610 add rd,imm16 com addr(rd) dec addr(rd),imm4m1 15611 add rd,rs com rd dec addr,imm4m1 15612 addb rbd,@rs comb @rd dec rd,imm4m1 15613 addb rbd,addr comb addr decb @rd,imm4m1 15614 addb rbd,addr(rs) comb addr(rd) decb addr(rd),imm4m1 15615 addb rbd,imm8 comb rbd decb addr,imm4m1 15616 addb rbd,rbs comflg flags decb rbd,imm4m1 15617 addl rrd,@rs cp @rd,imm16 di i2 15618 addl rrd,addr cp addr(rd),imm16 div rrd,@rs 15619 addl rrd,addr(rs) cp addr,imm16 div rrd,addr 15620 addl rrd,imm32 cp rd,@rs div rrd,addr(rs) 15621 addl rrd,rrs cp rd,addr div rrd,imm16 15622 and rd,@rs cp rd,addr(rs) div rrd,rs 15623 and rd,addr cp rd,imm16 divl rqd,@rs 15624 and rd,addr(rs) cp rd,rs divl rqd,addr 15625 and rd,imm16 cpb @rd,imm8 divl rqd,addr(rs) 15626 and rd,rs cpb addr(rd),imm8 divl rqd,imm32 15627 andb rbd,@rs cpb addr,imm8 divl rqd,rrs 15628 andb rbd,addr cpb rbd,@rs djnz rd,disp7 15629 andb rbd,addr(rs) cpb rbd,addr ei i2 15630 andb rbd,imm8 cpb rbd,addr(rs) ex rd,@rs 15631 andb rbd,rbs cpb rbd,imm8 ex rd,addr 15632 bit @rd,imm4 cpb rbd,rbs ex rd,addr(rs) 15633 bit addr(rd),imm4 cpd rd,@rs,rr,cc ex rd,rs 15634 bit addr,imm4 cpdb rbd,@rs,rr,cc exb rbd,@rs 15635 bit rd,imm4 cpdr rd,@rs,rr,cc exb rbd,addr 15636 bit rd,rs cpdrb rbd,@rs,rr,cc exb rbd,addr(rs) 15637 bitb @rd,imm4 cpi rd,@rs,rr,cc exb rbd,rbs 15638 bitb addr(rd),imm4 cpib rbd,@rs,rr,cc ext0e imm8 15639 bitb addr,imm4 cpir rd,@rs,rr,cc ext0f imm8 15640 bitb rbd,imm4 cpirb rbd,@rs,rr,cc ext8e imm8 15641 bitb rbd,rs cpl rrd,@rs ext8f imm8 15642 bpt cpl rrd,addr exts rrd 15643 call @rd cpl rrd,addr(rs) extsb rd 15644 call addr cpl rrd,imm32 extsl rqd 15645 call addr(rd) cpl rrd,rrs halt 15646 calr disp12 cpsd @rd,@rs,rr,cc in rd,@rs 15647 clr @rd cpsdb @rd,@rs,rr,cc in rd,imm16 15648 clr addr cpsdr @rd,@rs,rr,cc inb rbd,@rs 15649 clr addr(rd) cpsdrb @rd,@rs,rr,cc inb rbd,imm16 15650 clr rd cpsi @rd,@rs,rr,cc inc @rd,imm4m1 15651 clrb @rd cpsib @rd,@rs,rr,cc inc addr(rd),imm4m1 15652 inc addr,imm4m1 ldb rbd,rs(rx) mult rrd,addr(rs) 15653 inc rd,imm4m1 ldb rd(imm16),rbs mult rrd,imm16 15654 incb @rd,imm4m1 ldb rd(rx),rbs mult rrd,rs 15655 incb addr(rd),imm4m1 ldctl ctrl,rs multl rqd,@rs 15656 incb addr,imm4m1 ldctl rd,ctrl multl rqd,addr 15657 incb rbd,imm4m1 ldd @rs,@rd,rr multl rqd,addr(rs) 15658 ind @rd,@rs,ra lddb @rs,@rd,rr multl rqd,imm32 15659 indb @rd,@rs,rba lddr @rs,@rd,rr multl rqd,rrs 15660 inib @rd,@rs,ra lddrb @rs,@rd,rr neg @rd 15661 inibr @rd,@rs,ra ldi @rd,@rs,rr neg addr 15662 iret ldib @rd,@rs,rr neg addr(rd) 15663 jp cc,@rd ldir @rd,@rs,rr neg rd 15664 jp cc,addr ldirb @rd,@rs,rr negb @rd 15665 jp cc,addr(rd) ldk rd,imm4 negb addr 15666 jr cc,disp8 ldl @rd,rrs negb addr(rd) 15667 ld @rd,imm16 ldl addr(rd),rrs negb rbd 15668 ld @rd,rs ldl addr,rrs nop 15669 ld addr(rd),imm16 ldl rd(imm16),rrs or rd,@rs 15670 ld addr(rd),rs ldl rd(rx),rrs or rd,addr 15671 ld addr,imm16 ldl rrd,@rs or rd,addr(rs) 15672 ld addr,rs ldl rrd,addr or rd,imm16 15673 ld rd(imm16),rs ldl rrd,addr(rs) or rd,rs 15674 ld rd(rx),rs ldl rrd,imm32 orb rbd,@rs 15675 ld rd,@rs ldl rrd,rrs orb rbd,addr 15676 ld rd,addr ldl rrd,rs(imm16) orb rbd,addr(rs) 15677 ld rd,addr(rs) ldl rrd,rs(rx) orb rbd,imm8 15678 ld rd,imm16 ldm @rd,rs,n orb rbd,rbs 15679 ld rd,rs ldm addr(rd),rs,n out @rd,rs 15680 ld rd,rs(imm16) ldm addr,rs,n out imm16,rs 15681 ld rd,rs(rx) ldm rd,@rs,n outb @rd,rbs 15682 lda rd,addr ldm rd,addr(rs),n outb imm16,rbs 15683 lda rd,addr(rs) ldm rd,addr,n outd @rd,@rs,ra 15684 lda rd,rs(imm16) ldps @rs outdb @rd,@rs,rba 15685 lda rd,rs(rx) ldps addr outib @rd,@rs,ra 15686 ldar rd,disp16 ldps addr(rs) outibr @rd,@rs,ra 15687 ldb @rd,imm8 ldr disp16,rs pop @rd,@rs 15688 ldb @rd,rbs ldr rd,disp16 pop addr(rd),@rs 15689 ldb addr(rd),imm8 ldrb disp16,rbs pop addr,@rs 15690 ldb addr(rd),rbs ldrb rbd,disp16 pop rd,@rs 15691 ldb addr,imm8 ldrl disp16,rrs popl @rd,@rs 15692 ldb addr,rbs ldrl rrd,disp16 popl addr(rd),@rs 15693 ldb rbd,@rs mbit popl addr,@rs 15694 ldb rbd,addr mreq rd popl rrd,@rs 15695 ldb rbd,addr(rs) mres push @rd,@rs 15696 ldb rbd,imm8 mset push @rd,addr 15697 ldb rbd,rbs mult rrd,@rs push @rd,addr(rs) 15698 ldb rbd,rs(imm16) mult rrd,addr push @rd,imm16 15699 push @rd,rs set addr,imm4 subl rrd,imm32 15700 pushl @rd,@rs set rd,imm4 subl rrd,rrs 15701 pushl @rd,addr set rd,rs tcc cc,rd 15702 pushl @rd,addr(rs) setb @rd,imm4 tccb cc,rbd 15703 pushl @rd,rrs setb addr(rd),imm4 test @rd 15704 res @rd,imm4 setb addr,imm4 test addr 15705 res addr(rd),imm4 setb rbd,imm4 test addr(rd) 15706 res addr,imm4 setb rbd,rs test rd 15707 res rd,imm4 setflg imm4 testb @rd 15708 res rd,rs sinb rbd,imm16 testb addr 15709 resb @rd,imm4 sinb rd,imm16 testb addr(rd) 15710 resb addr(rd),imm4 sind @rd,@rs,ra testb rbd 15711 resb addr,imm4 sindb @rd,@rs,rba testl @rd 15712 resb rbd,imm4 sinib @rd,@rs,ra testl addr 15713 resb rbd,rs sinibr @rd,@rs,ra testl addr(rd) 15714 resflg imm4 sla rd,imm8 testl rrd 15715 ret cc slab rbd,imm8 trdb @rd,@rs,rba 15716 rl rd,imm1or2 slal rrd,imm8 trdrb @rd,@rs,rba 15717 rlb rbd,imm1or2 sll rd,imm8 trib @rd,@rs,rbr 15718 rlc rd,imm1or2 sllb rbd,imm8 trirb @rd,@rs,rbr 15719 rlcb rbd,imm1or2 slll rrd,imm8 trtdrb @ra,@rb,rbr 15720 rldb rbb,rba sout imm16,rs trtib @ra,@rb,rr 15721 rr rd,imm1or2 soutb imm16,rbs trtirb @ra,@rb,rbr 15722 rrb rbd,imm1or2 soutd @rd,@rs,ra trtrb @ra,@rb,rbr 15723 rrc rd,imm1or2 soutdb @rd,@rs,rba tset @rd 15724 rrcb rbd,imm1or2 soutib @rd,@rs,ra tset addr 15725 rrdb rbb,rba soutibr @rd,@rs,ra tset addr(rd) 15726 rsvd36 sra rd,imm8 tset rd 15727 rsvd38 srab rbd,imm8 tsetb @rd 15728 rsvd78 sral rrd,imm8 tsetb addr 15729 rsvd7e srl rd,imm8 tsetb addr(rd) 15730 rsvd9d srlb rbd,imm8 tsetb rbd 15731 rsvd9f srll rrd,imm8 xor rd,@rs 15732 rsvdb9 sub rd,@rs xor rd,addr 15733 rsvdbf sub rd,addr xor rd,addr(rs) 15734 sbc rd,rs sub rd,addr(rs) xor rd,imm16 15735 sbcb rbd,rbs sub rd,imm16 xor rd,rs 15736 sc imm8 sub rd,rs xorb rbd,@rs 15737 sda rd,rs subb rbd,@rs xorb rbd,addr 15738 sdab rbd,rs subb rbd,addr xorb rbd,addr(rs) 15739 sdal rrd,rs subb rbd,addr(rs) xorb rbd,imm8 15740 sdl rd,rs subb rbd,imm8 xorb rbd,rbs 15741 sdlb rbd,rs subb rbd,rbs xorb rbd,rbs 15742 sdll rrd,rs subl rrd,@rs 15743 set @rd,imm4 subl rrd,addr 15744 set addr(rd),imm4 subl rrd,addr(rs) 15745 15746 15747 File: as.info, Node: Vax-Dependent, Prev: Z8000-Dependent, Up: Machine Dependencies 15748 15749 9.34 VAX Dependent Features 15750 =========================== 15751 15752 * Menu: 15753 15754 * VAX-Opts:: VAX Command-Line Options 15755 * VAX-float:: VAX Floating Point 15756 * VAX-directives:: Vax Machine Directives 15757 * VAX-opcodes:: VAX Opcodes 15758 * VAX-branch:: VAX Branch Improvement 15759 * VAX-operands:: VAX Operands 15760 * VAX-no:: Not Supported on VAX 15761 15762 15763 File: as.info, Node: VAX-Opts, Next: VAX-float, Up: Vax-Dependent 15764 15765 9.34.1 VAX Command-Line Options 15766 ------------------------------- 15767 15768 The Vax version of `as' accepts any of the following options, gives a 15769 warning message that the option was ignored and proceeds. These 15770 options are for compatibility with scripts designed for other people's 15771 assemblers. 15772 15773 ``-D' (Debug)' 15774 ``-S' (Symbol Table)' 15775 ``-T' (Token Trace)' 15776 These are obsolete options used to debug old assemblers. 15777 15778 ``-d' (Displacement size for JUMPs)' 15779 This option expects a number following the `-d'. Like options 15780 that expect filenames, the number may immediately follow the `-d' 15781 (old standard) or constitute the whole of the command line 15782 argument that follows `-d' (GNU standard). 15783 15784 ``-V' (Virtualize Interpass Temporary File)' 15785 Some other assemblers use a temporary file. This option commanded 15786 them to keep the information in active memory rather than in a 15787 disk file. `as' always does this, so this option is redundant. 15788 15789 ``-J' (JUMPify Longer Branches)' 15790 Many 32-bit computers permit a variety of branch instructions to 15791 do the same job. Some of these instructions are short (and fast) 15792 but have a limited range; others are long (and slow) but can 15793 branch anywhere in virtual memory. Often there are 3 flavors of 15794 branch: short, medium and long. Some other assemblers would emit 15795 short and medium branches, unless told by this option to emit 15796 short and long branches. 15797 15798 ``-t' (Temporary File Directory)' 15799 Some other assemblers may use a temporary file, and this option 15800 takes a filename being the directory to site the temporary file. 15801 Since `as' does not use a temporary disk file, this option makes 15802 no difference. `-t' needs exactly one filename. 15803 15804 The Vax version of the assembler accepts additional options when 15805 compiled for VMS: 15806 15807 `-h N' 15808 External symbol or section (used for global variables) names are 15809 not case sensitive on VAX/VMS and always mapped to upper case. 15810 This is contrary to the C language definition which explicitly 15811 distinguishes upper and lower case. To implement a standard 15812 conforming C compiler, names must be changed (mapped) to preserve 15813 the case information. The default mapping is to convert all lower 15814 case characters to uppercase and adding an underscore followed by 15815 a 6 digit hex value, representing a 24 digit binary value. The 15816 one digits in the binary value represent which characters are 15817 uppercase in the original symbol name. 15818 15819 The `-h N' option determines how we map names. This takes several 15820 values. No `-h' switch at all allows case hacking as described 15821 above. A value of zero (`-h0') implies names should be upper 15822 case, and inhibits the case hack. A value of 2 (`-h2') implies 15823 names should be all lower case, with no case hack. A value of 3 15824 (`-h3') implies that case should be preserved. The value 1 is 15825 unused. The `-H' option directs `as' to display every mapped 15826 symbol during assembly. 15827 15828 Symbols whose names include a dollar sign `$' are exceptions to the 15829 general name mapping. These symbols are normally only used to 15830 reference VMS library names. Such symbols are always mapped to 15831 upper case. 15832 15833 `-+' 15834 The `-+' option causes `as' to truncate any symbol name larger 15835 than 31 characters. The `-+' option also prevents some code 15836 following the `_main' symbol normally added to make the object 15837 file compatible with Vax-11 "C". 15838 15839 `-1' 15840 This option is ignored for backward compatibility with `as' 15841 version 1.x. 15842 15843 `-H' 15844 The `-H' option causes `as' to print every symbol which was 15845 changed by case mapping. 15846 15847 15848 File: as.info, Node: VAX-float, Next: VAX-directives, Prev: VAX-Opts, Up: Vax-Dependent 15849 15850 9.34.2 VAX Floating Point 15851 ------------------------- 15852 15853 Conversion of flonums to floating point is correct, and compatible with 15854 previous assemblers. Rounding is towards zero if the remainder is 15855 exactly half the least significant bit. 15856 15857 `D', `F', `G' and `H' floating point formats are understood. 15858 15859 Immediate floating literals (_e.g._ `S`$6.9') are rendered 15860 correctly. Again, rounding is towards zero in the boundary case. 15861 15862 The `.float' directive produces `f' format numbers. The `.double' 15863 directive produces `d' format numbers. 15864 15865 15866 File: as.info, Node: VAX-directives, Next: VAX-opcodes, Prev: VAX-float, Up: Vax-Dependent 15867 15868 9.34.3 Vax Machine Directives 15869 ----------------------------- 15870 15871 The Vax version of the assembler supports four directives for 15872 generating Vax floating point constants. They are described in the 15873 table below. 15874 15875 `.dfloat' 15876 This expects zero or more flonums, separated by commas, and 15877 assembles Vax `d' format 64-bit floating point constants. 15878 15879 `.ffloat' 15880 This expects zero or more flonums, separated by commas, and 15881 assembles Vax `f' format 32-bit floating point constants. 15882 15883 `.gfloat' 15884 This expects zero or more flonums, separated by commas, and 15885 assembles Vax `g' format 64-bit floating point constants. 15886 15887 `.hfloat' 15888 This expects zero or more flonums, separated by commas, and 15889 assembles Vax `h' format 128-bit floating point constants. 15890 15891 15892 15893 File: as.info, Node: VAX-opcodes, Next: VAX-branch, Prev: VAX-directives, Up: Vax-Dependent 15894 15895 9.34.4 VAX Opcodes 15896 ------------------ 15897 15898 All DEC mnemonics are supported. Beware that `case...' instructions 15899 have exactly 3 operands. The dispatch table that follows the `case...' 15900 instruction should be made with `.word' statements. This is compatible 15901 with all unix assemblers we know of. 15902 15903 15904 File: as.info, Node: VAX-branch, Next: VAX-operands, Prev: VAX-opcodes, Up: Vax-Dependent 15905 15906 9.34.5 VAX Branch Improvement 15907 ----------------------------- 15908 15909 Certain pseudo opcodes are permitted. They are for branch 15910 instructions. They expand to the shortest branch instruction that 15911 reaches the target. Generally these mnemonics are made by substituting 15912 `j' for `b' at the start of a DEC mnemonic. This feature is included 15913 both for compatibility and to help compilers. If you do not need this 15914 feature, avoid these opcodes. Here are the mnemonics, and the code 15915 they can expand into. 15916 15917 `jbsb' 15918 `Jsb' is already an instruction mnemonic, so we chose `jbsb'. 15919 (byte displacement) 15920 `bsbb ...' 15921 15922 (word displacement) 15923 `bsbw ...' 15924 15925 (long displacement) 15926 `jsb ...' 15927 15928 `jbr' 15929 `jr' 15930 Unconditional branch. 15931 (byte displacement) 15932 `brb ...' 15933 15934 (word displacement) 15935 `brw ...' 15936 15937 (long displacement) 15938 `jmp ...' 15939 15940 `jCOND' 15941 COND may be any one of the conditional branches `neq', `nequ', 15942 `eql', `eqlu', `gtr', `geq', `lss', `gtru', `lequ', `vc', `vs', 15943 `gequ', `cc', `lssu', `cs'. COND may also be one of the bit tests 15944 `bs', `bc', `bss', `bcs', `bsc', `bcc', `bssi', `bcci', `lbs', 15945 `lbc'. NOTCOND is the opposite condition to COND. 15946 (byte displacement) 15947 `bCOND ...' 15948 15949 (word displacement) 15950 `bNOTCOND foo ; brw ... ; foo:' 15951 15952 (long displacement) 15953 `bNOTCOND foo ; jmp ... ; foo:' 15954 15955 `jacbX' 15956 X may be one of `b d f g h l w'. 15957 (word displacement) 15958 `OPCODE ...' 15959 15960 (long displacement) 15961 OPCODE ..., foo ; 15962 brb bar ; 15963 foo: jmp ... ; 15964 bar: 15965 15966 `jaobYYY' 15967 YYY may be one of `lss leq'. 15968 15969 `jsobZZZ' 15970 ZZZ may be one of `geq gtr'. 15971 (byte displacement) 15972 `OPCODE ...' 15973 15974 (word displacement) 15975 OPCODE ..., foo ; 15976 brb bar ; 15977 foo: brw DESTINATION ; 15978 bar: 15979 15980 (long displacement) 15981 OPCODE ..., foo ; 15982 brb bar ; 15983 foo: jmp DESTINATION ; 15984 bar: 15985 15986 `aobleq' 15987 `aoblss' 15988 `sobgeq' 15989 `sobgtr' 15990 15991 (byte displacement) 15992 `OPCODE ...' 15993 15994 (word displacement) 15995 OPCODE ..., foo ; 15996 brb bar ; 15997 foo: brw DESTINATION ; 15998 bar: 15999 16000 (long displacement) 16001 OPCODE ..., foo ; 16002 brb bar ; 16003 foo: jmp DESTINATION ; 16004 bar: 16005 16006 16007 File: as.info, Node: VAX-operands, Next: VAX-no, Prev: VAX-branch, Up: Vax-Dependent 16008 16009 9.34.6 VAX Operands 16010 ------------------- 16011 16012 The immediate character is `$' for Unix compatibility, not `#' as DEC 16013 writes it. 16014 16015 The indirect character is `*' for Unix compatibility, not `@' as DEC 16016 writes it. 16017 16018 The displacement sizing character is ``' (an accent grave) for Unix 16019 compatibility, not `^' as DEC writes it. The letter preceding ``' may 16020 have either case. `G' is not understood, but all other letters (`b i l 16021 s w') are understood. 16022 16023 Register names understood are `r0 r1 r2 ... r15 ap fp sp pc'. Upper 16024 and lower case letters are equivalent. 16025 16026 For instance 16027 tstb *w`$4(r5) 16028 16029 Any expression is permitted in an operand. Operands are comma 16030 separated. 16031 16032 16033 File: as.info, Node: VAX-no, Prev: VAX-operands, Up: Vax-Dependent 16034 16035 9.34.7 Not Supported on VAX 16036 --------------------------- 16037 16038 Vax bit fields can not be assembled with `as'. Someone can add the 16039 required code if they really need it. 16040 16041 16042 File: as.info, Node: V850-Dependent, Next: Xtensa-Dependent, Prev: TIC54X-Dependent, Up: Machine Dependencies 16043 16044 9.35 v850 Dependent Features 16045 ============================ 16046 16047 * Menu: 16048 16049 * V850 Options:: Options 16050 * V850 Syntax:: Syntax 16051 * V850 Floating Point:: Floating Point 16052 * V850 Directives:: V850 Machine Directives 16053 * V850 Opcodes:: Opcodes 16054 16055 16056 File: as.info, Node: V850 Options, Next: V850 Syntax, Up: V850-Dependent 16057 16058 9.35.1 Options 16059 -------------- 16060 16061 `as' supports the following additional command-line options for the 16062 V850 processor family: 16063 16064 `-wsigned_overflow' 16065 Causes warnings to be produced when signed immediate values 16066 overflow the space available for then within their opcodes. By 16067 default this option is disabled as it is possible to receive 16068 spurious warnings due to using exact bit patterns as immediate 16069 constants. 16070 16071 `-wunsigned_overflow' 16072 Causes warnings to be produced when unsigned immediate values 16073 overflow the space available for then within their opcodes. By 16074 default this option is disabled as it is possible to receive 16075 spurious warnings due to using exact bit patterns as immediate 16076 constants. 16077 16078 `-mv850' 16079 Specifies that the assembled code should be marked as being 16080 targeted at the V850 processor. This allows the linker to detect 16081 attempts to link such code with code assembled for other 16082 processors. 16083 16084 `-mv850e' 16085 Specifies that the assembled code should be marked as being 16086 targeted at the V850E processor. This allows the linker to detect 16087 attempts to link such code with code assembled for other 16088 processors. 16089 16090 `-mv850e1' 16091 Specifies that the assembled code should be marked as being 16092 targeted at the V850E1 processor. This allows the linker to 16093 detect attempts to link such code with code assembled for other 16094 processors. 16095 16096 `-mv850any' 16097 Specifies that the assembled code should be marked as being 16098 targeted at the V850 processor but support instructions that are 16099 specific to the extended variants of the process. This allows the 16100 production of binaries that contain target specific code, but 16101 which are also intended to be used in a generic fashion. For 16102 example libgcc.a contains generic routines used by the code 16103 produced by GCC for all versions of the v850 architecture, 16104 together with support routines only used by the V850E architecture. 16105 16106 `-mrelax' 16107 Enables relaxation. This allows the .longcall and .longjump pseudo 16108 ops to be used in the assembler source code. These ops label 16109 sections of code which are either a long function call or a long 16110 branch. The assembler will then flag these sections of code and 16111 the linker will attempt to relax them. 16112 16113 16114 16115 File: as.info, Node: V850 Syntax, Next: V850 Floating Point, Prev: V850 Options, Up: V850-Dependent 16116 16117 9.35.2 Syntax 16118 ------------- 16119 16120 * Menu: 16121 16122 * V850-Chars:: Special Characters 16123 * V850-Regs:: Register Names 16124 16125 16126 File: as.info, Node: V850-Chars, Next: V850-Regs, Up: V850 Syntax 16127 16128 9.35.2.1 Special Characters 16129 ........................... 16130 16131 `#' is the line comment character. 16132 16133 16134 File: as.info, Node: V850-Regs, Prev: V850-Chars, Up: V850 Syntax 16135 16136 9.35.2.2 Register Names 16137 ....................... 16138 16139 `as' supports the following names for registers: 16140 `general register 0' 16141 r0, zero 16142 16143 `general register 1' 16144 r1 16145 16146 `general register 2' 16147 r2, hp 16148 16149 `general register 3' 16150 r3, sp 16151 16152 `general register 4' 16153 r4, gp 16154 16155 `general register 5' 16156 r5, tp 16157 16158 `general register 6' 16159 r6 16160 16161 `general register 7' 16162 r7 16163 16164 `general register 8' 16165 r8 16166 16167 `general register 9' 16168 r9 16169 16170 `general register 10' 16171 r10 16172 16173 `general register 11' 16174 r11 16175 16176 `general register 12' 16177 r12 16178 16179 `general register 13' 16180 r13 16181 16182 `general register 14' 16183 r14 16184 16185 `general register 15' 16186 r15 16187 16188 `general register 16' 16189 r16 16190 16191 `general register 17' 16192 r17 16193 16194 `general register 18' 16195 r18 16196 16197 `general register 19' 16198 r19 16199 16200 `general register 20' 16201 r20 16202 16203 `general register 21' 16204 r21 16205 16206 `general register 22' 16207 r22 16208 16209 `general register 23' 16210 r23 16211 16212 `general register 24' 16213 r24 16214 16215 `general register 25' 16216 r25 16217 16218 `general register 26' 16219 r26 16220 16221 `general register 27' 16222 r27 16223 16224 `general register 28' 16225 r28 16226 16227 `general register 29' 16228 r29 16229 16230 `general register 30' 16231 r30, ep 16232 16233 `general register 31' 16234 r31, lp 16235 16236 `system register 0' 16237 eipc 16238 16239 `system register 1' 16240 eipsw 16241 16242 `system register 2' 16243 fepc 16244 16245 `system register 3' 16246 fepsw 16247 16248 `system register 4' 16249 ecr 16250 16251 `system register 5' 16252 psw 16253 16254 `system register 16' 16255 ctpc 16256 16257 `system register 17' 16258 ctpsw 16259 16260 `system register 18' 16261 dbpc 16262 16263 `system register 19' 16264 dbpsw 16265 16266 `system register 20' 16267 ctbp 16268 16269 16270 File: as.info, Node: V850 Floating Point, Next: V850 Directives, Prev: V850 Syntax, Up: V850-Dependent 16271 16272 9.35.3 Floating Point 16273 --------------------- 16274 16275 The V850 family uses IEEE floating-point numbers. 16276 16277 16278 File: as.info, Node: V850 Directives, Next: V850 Opcodes, Prev: V850 Floating Point, Up: V850-Dependent 16279 16280 9.35.4 V850 Machine Directives 16281 ------------------------------ 16282 16283 `.offset <EXPRESSION>' 16284 Moves the offset into the current section to the specified amount. 16285 16286 `.section "name", <type>' 16287 This is an extension to the standard .section directive. It sets 16288 the current section to be <type> and creates an alias for this 16289 section called "name". 16290 16291 `.v850' 16292 Specifies that the assembled code should be marked as being 16293 targeted at the V850 processor. This allows the linker to detect 16294 attempts to link such code with code assembled for other 16295 processors. 16296 16297 `.v850e' 16298 Specifies that the assembled code should be marked as being 16299 targeted at the V850E processor. This allows the linker to detect 16300 attempts to link such code with code assembled for other 16301 processors. 16302 16303 `.v850e1' 16304 Specifies that the assembled code should be marked as being 16305 targeted at the V850E1 processor. This allows the linker to 16306 detect attempts to link such code with code assembled for other 16307 processors. 16308 16309 16310 16311 File: as.info, Node: V850 Opcodes, Prev: V850 Directives, Up: V850-Dependent 16312 16313 9.35.5 Opcodes 16314 -------------- 16315 16316 `as' implements all the standard V850 opcodes. 16317 16318 `as' also implements the following pseudo ops: 16319 16320 `hi0()' 16321 Computes the higher 16 bits of the given expression and stores it 16322 into the immediate operand field of the given instruction. For 16323 example: 16324 16325 `mulhi hi0(here - there), r5, r6' 16326 16327 computes the difference between the address of labels 'here' and 16328 'there', takes the upper 16 bits of this difference, shifts it 16329 down 16 bits and then multiplies it by the lower 16 bits in 16330 register 5, putting the result into register 6. 16331 16332 `lo()' 16333 Computes the lower 16 bits of the given expression and stores it 16334 into the immediate operand field of the given instruction. For 16335 example: 16336 16337 `addi lo(here - there), r5, r6' 16338 16339 computes the difference between the address of labels 'here' and 16340 'there', takes the lower 16 bits of this difference and adds it to 16341 register 5, putting the result into register 6. 16342 16343 `hi()' 16344 Computes the higher 16 bits of the given expression and then adds 16345 the value of the most significant bit of the lower 16 bits of the 16346 expression and stores the result into the immediate operand field 16347 of the given instruction. For example the following code can be 16348 used to compute the address of the label 'here' and store it into 16349 register 6: 16350 16351 `movhi hi(here), r0, r6' `movea lo(here), r6, r6' 16352 16353 The reason for this special behaviour is that movea performs a sign 16354 extension on its immediate operand. So for example if the address 16355 of 'here' was 0xFFFFFFFF then without the special behaviour of the 16356 hi() pseudo-op the movhi instruction would put 0xFFFF0000 into r6, 16357 then the movea instruction would takes its immediate operand, 16358 0xFFFF, sign extend it to 32 bits, 0xFFFFFFFF, and then add it 16359 into r6 giving 0xFFFEFFFF which is wrong (the fifth nibble is E). 16360 With the hi() pseudo op adding in the top bit of the lo() pseudo 16361 op, the movhi instruction actually stores 0 into r6 (0xFFFF + 1 = 16362 0x0000), so that the movea instruction stores 0xFFFFFFFF into r6 - 16363 the right value. 16364 16365 `hilo()' 16366 Computes the 32 bit value of the given expression and stores it 16367 into the immediate operand field of the given instruction (which 16368 must be a mov instruction). For example: 16369 16370 `mov hilo(here), r6' 16371 16372 computes the absolute address of label 'here' and puts the result 16373 into register 6. 16374 16375 `sdaoff()' 16376 Computes the offset of the named variable from the start of the 16377 Small Data Area (whoes address is held in register 4, the GP 16378 register) and stores the result as a 16 bit signed value in the 16379 immediate operand field of the given instruction. For example: 16380 16381 `ld.w sdaoff(_a_variable)[gp],r6' 16382 16383 loads the contents of the location pointed to by the label 16384 '_a_variable' into register 6, provided that the label is located 16385 somewhere within +/- 32K of the address held in the GP register. 16386 [Note the linker assumes that the GP register contains a fixed 16387 address set to the address of the label called '__gp'. This can 16388 either be set up automatically by the linker, or specifically set 16389 by using the `--defsym __gp=<value>' command line option]. 16390 16391 `tdaoff()' 16392 Computes the offset of the named variable from the start of the 16393 Tiny Data Area (whoes address is held in register 30, the EP 16394 register) and stores the result as a 4,5, 7 or 8 bit unsigned 16395 value in the immediate operand field of the given instruction. 16396 For example: 16397 16398 `sld.w tdaoff(_a_variable)[ep],r6' 16399 16400 loads the contents of the location pointed to by the label 16401 '_a_variable' into register 6, provided that the label is located 16402 somewhere within +256 bytes of the address held in the EP 16403 register. [Note the linker assumes that the EP register contains 16404 a fixed address set to the address of the label called '__ep'. 16405 This can either be set up automatically by the linker, or 16406 specifically set by using the `--defsym __ep=<value>' command line 16407 option]. 16408 16409 `zdaoff()' 16410 Computes the offset of the named variable from address 0 and 16411 stores the result as a 16 bit signed value in the immediate 16412 operand field of the given instruction. For example: 16413 16414 `movea zdaoff(_a_variable),zero,r6' 16415 16416 puts the address of the label '_a_variable' into register 6, 16417 assuming that the label is somewhere within the first 32K of 16418 memory. (Strictly speaking it also possible to access the last 16419 32K of memory as well, as the offsets are signed). 16420 16421 `ctoff()' 16422 Computes the offset of the named variable from the start of the 16423 Call Table Area (whoes address is helg in system register 20, the 16424 CTBP register) and stores the result a 6 or 16 bit unsigned value 16425 in the immediate field of then given instruction or piece of data. 16426 For example: 16427 16428 `callt ctoff(table_func1)' 16429 16430 will put the call the function whoes address is held in the call 16431 table at the location labeled 'table_func1'. 16432 16433 `.longcall `name'' 16434 Indicates that the following sequence of instructions is a long 16435 call to function `name'. The linker will attempt to shorten this 16436 call sequence if `name' is within a 22bit offset of the call. Only 16437 valid if the `-mrelax' command line switch has been enabled. 16438 16439 `.longjump `name'' 16440 Indicates that the following sequence of instructions is a long 16441 jump to label `name'. The linker will attempt to shorten this code 16442 sequence if `name' is within a 22bit offset of the jump. Only 16443 valid if the `-mrelax' command line switch has been enabled. 16444 16445 16446 For information on the V850 instruction set, see `V850 Family 16447 32-/16-Bit single-Chip Microcontroller Architecture Manual' from NEC. 16448 Ltd. 16449 16450 16451 File: as.info, Node: Xtensa-Dependent, Next: Z80-Dependent, Prev: V850-Dependent, Up: Machine Dependencies 16452 16453 9.36 Xtensa Dependent Features 16454 ============================== 16455 16456 This chapter covers features of the GNU assembler that are specific 16457 to the Xtensa architecture. For details about the Xtensa instruction 16458 set, please consult the `Xtensa Instruction Set Architecture (ISA) 16459 Reference Manual'. 16460 16461 * Menu: 16462 16463 * Xtensa Options:: Command-line Options. 16464 * Xtensa Syntax:: Assembler Syntax for Xtensa Processors. 16465 * Xtensa Optimizations:: Assembler Optimizations. 16466 * Xtensa Relaxation:: Other Automatic Transformations. 16467 * Xtensa Directives:: Directives for Xtensa Processors. 16468 16469 16470 File: as.info, Node: Xtensa Options, Next: Xtensa Syntax, Up: Xtensa-Dependent 16471 16472 9.36.1 Command Line Options 16473 --------------------------- 16474 16475 The Xtensa version of the GNU assembler supports these special options: 16476 16477 `--text-section-literals | --no-text-section-literals' 16478 Control the treatment of literal pools. The default is 16479 `--no-text-section-literals', which places literals in separate 16480 sections in the output file. This allows the literal pool to be 16481 placed in a data RAM/ROM. With `--text-section-literals', the 16482 literals are interspersed in the text section in order to keep 16483 them as close as possible to their references. This may be 16484 necessary for large assembly files, where the literals would 16485 otherwise be out of range of the `L32R' instructions in the text 16486 section. These options only affect literals referenced via 16487 PC-relative `L32R' instructions; literals for absolute mode `L32R' 16488 instructions are handled separately. *Note literal: Literal 16489 Directive. 16490 16491 `--absolute-literals | --no-absolute-literals' 16492 Indicate to the assembler whether `L32R' instructions use absolute 16493 or PC-relative addressing. If the processor includes the absolute 16494 addressing option, the default is to use absolute `L32R' 16495 relocations. Otherwise, only the PC-relative `L32R' relocations 16496 can be used. 16497 16498 `--target-align | --no-target-align' 16499 Enable or disable automatic alignment to reduce branch penalties 16500 at some expense in code size. *Note Automatic Instruction 16501 Alignment: Xtensa Automatic Alignment. This optimization is 16502 enabled by default. Note that the assembler will always align 16503 instructions like `LOOP' that have fixed alignment requirements. 16504 16505 `--longcalls | --no-longcalls' 16506 Enable or disable transformation of call instructions to allow 16507 calls across a greater range of addresses. *Note Function Call 16508 Relaxation: Xtensa Call Relaxation. This option should be used 16509 when call targets can potentially be out of range. It may degrade 16510 both code size and performance, but the linker can generally 16511 optimize away the unnecessary overhead when a call ends up within 16512 range. The default is `--no-longcalls'. 16513 16514 `--transform | --no-transform' 16515 Enable or disable all assembler transformations of Xtensa 16516 instructions, including both relaxation and optimization. The 16517 default is `--transform'; `--no-transform' should only be used in 16518 the rare cases when the instructions must be exactly as specified 16519 in the assembly source. Using `--no-transform' causes out of range 16520 instruction operands to be errors. 16521 16522 `--rename-section OLDNAME=NEWNAME' 16523 Rename the OLDNAME section to NEWNAME. This option can be used 16524 multiple times to rename multiple sections. 16525 16526 16527 File: as.info, Node: Xtensa Syntax, Next: Xtensa Optimizations, Prev: Xtensa Options, Up: Xtensa-Dependent 16528 16529 9.36.2 Assembler Syntax 16530 ----------------------- 16531 16532 Block comments are delimited by `/*' and `*/'. End of line comments 16533 may be introduced with either `#' or `//'. 16534 16535 Instructions consist of a leading opcode or macro name followed by 16536 whitespace and an optional comma-separated list of operands: 16537 16538 OPCODE [OPERAND, ...] 16539 16540 Instructions must be separated by a newline or semicolon. 16541 16542 FLIX instructions, which bundle multiple opcodes together in a single 16543 instruction, are specified by enclosing the bundled opcodes inside 16544 braces: 16545 16546 { 16547 [FORMAT] 16548 OPCODE0 [OPERANDS] 16549 OPCODE1 [OPERANDS] 16550 OPCODE2 [OPERANDS] 16551 ... 16552 } 16553 16554 The opcodes in a FLIX instruction are listed in the same order as the 16555 corresponding instruction slots in the TIE format declaration. 16556 Directives and labels are not allowed inside the braces of a FLIX 16557 instruction. A particular TIE format name can optionally be specified 16558 immediately after the opening brace, but this is usually unnecessary. 16559 The assembler will automatically search for a format that can encode the 16560 specified opcodes, so the format name need only be specified in rare 16561 cases where there is more than one applicable format and where it 16562 matters which of those formats is used. A FLIX instruction can also be 16563 specified on a single line by separating the opcodes with semicolons: 16564 16565 { [FORMAT;] OPCODE0 [OPERANDS]; OPCODE1 [OPERANDS]; OPCODE2 [OPERANDS]; ... } 16566 16567 If an opcode can only be encoded in a FLIX instruction but is not 16568 specified as part of a FLIX bundle, the assembler will choose the 16569 smallest format where the opcode can be encoded and will fill unused 16570 instruction slots with no-ops. 16571 16572 * Menu: 16573 16574 * Xtensa Opcodes:: Opcode Naming Conventions. 16575 * Xtensa Registers:: Register Naming. 16576 16577 16578 File: as.info, Node: Xtensa Opcodes, Next: Xtensa Registers, Up: Xtensa Syntax 16579 16580 9.36.2.1 Opcode Names 16581 ..................... 16582 16583 See the `Xtensa Instruction Set Architecture (ISA) Reference Manual' 16584 for a complete list of opcodes and descriptions of their semantics. 16585 16586 If an opcode name is prefixed with an underscore character (`_'), 16587 `as' will not transform that instruction in any way. The underscore 16588 prefix disables both optimization (*note Xtensa Optimizations: Xtensa 16589 Optimizations.) and relaxation (*note Xtensa Relaxation: Xtensa 16590 Relaxation.) for that particular instruction. Only use the underscore 16591 prefix when it is essential to select the exact opcode produced by the 16592 assembler. Using this feature unnecessarily makes the code less 16593 efficient by disabling assembler optimization and less flexible by 16594 disabling relaxation. 16595 16596 Note that this special handling of underscore prefixes only applies 16597 to Xtensa opcodes, not to either built-in macros or user-defined macros. 16598 When an underscore prefix is used with a macro (e.g., `_MOV'), it 16599 refers to a different macro. The assembler generally provides built-in 16600 macros both with and without the underscore prefix, where the underscore 16601 versions behave as if the underscore carries through to the instructions 16602 in the macros. For example, `_MOV' may expand to `_MOV.N'. 16603 16604 The underscore prefix only applies to individual instructions, not to 16605 series of instructions. For example, if a series of instructions have 16606 underscore prefixes, the assembler will not transform the individual 16607 instructions, but it may insert other instructions between them (e.g., 16608 to align a `LOOP' instruction). To prevent the assembler from 16609 modifying a series of instructions as a whole, use the `no-transform' 16610 directive. *Note transform: Transform Directive. 16611 16612 16613 File: as.info, Node: Xtensa Registers, Prev: Xtensa Opcodes, Up: Xtensa Syntax 16614 16615 9.36.2.2 Register Names 16616 ....................... 16617 16618 The assembly syntax for a register file entry is the "short" name for a 16619 TIE register file followed by the index into that register file. For 16620 example, the general-purpose `AR' register file has a short name of 16621 `a', so these registers are named `a0'...`a15'. As a special feature, 16622 `sp' is also supported as a synonym for `a1'. Additional registers may 16623 be added by processor configuration options and by designer-defined TIE 16624 extensions. An initial `$' character is optional in all register names. 16625 16626 16627 File: as.info, Node: Xtensa Optimizations, Next: Xtensa Relaxation, Prev: Xtensa Syntax, Up: Xtensa-Dependent 16628 16629 9.36.3 Xtensa Optimizations 16630 --------------------------- 16631 16632 The optimizations currently supported by `as' are generation of density 16633 instructions where appropriate and automatic branch target alignment. 16634 16635 * Menu: 16636 16637 * Density Instructions:: Using Density Instructions. 16638 * Xtensa Automatic Alignment:: Automatic Instruction Alignment. 16639 16640 16641 File: as.info, Node: Density Instructions, Next: Xtensa Automatic Alignment, Up: Xtensa Optimizations 16642 16643 9.36.3.1 Using Density Instructions 16644 ................................... 16645 16646 The Xtensa instruction set has a code density option that provides 16647 16-bit versions of some of the most commonly used opcodes. Use of these 16648 opcodes can significantly reduce code size. When possible, the 16649 assembler automatically translates instructions from the core Xtensa 16650 instruction set into equivalent instructions from the Xtensa code 16651 density option. This translation can be disabled by using underscore 16652 prefixes (*note Opcode Names: Xtensa Opcodes.), by using the 16653 `--no-transform' command-line option (*note Command Line Options: 16654 Xtensa Options.), or by using the `no-transform' directive (*note 16655 transform: Transform Directive.). 16656 16657 It is a good idea _not_ to use the density instructions directly. 16658 The assembler will automatically select dense instructions where 16659 possible. If you later need to use an Xtensa processor without the code 16660 density option, the same assembly code will then work without 16661 modification. 16662 16663 16664 File: as.info, Node: Xtensa Automatic Alignment, Prev: Density Instructions, Up: Xtensa Optimizations 16665 16666 9.36.3.2 Automatic Instruction Alignment 16667 ........................................ 16668 16669 The Xtensa assembler will automatically align certain instructions, both 16670 to optimize performance and to satisfy architectural requirements. 16671 16672 As an optimization to improve performance, the assembler attempts to 16673 align branch targets so they do not cross instruction fetch boundaries. 16674 (Xtensa processors can be configured with either 32-bit or 64-bit 16675 instruction fetch widths.) An instruction immediately following a call 16676 is treated as a branch target in this context, because it will be the 16677 target of a return from the call. This alignment has the potential to 16678 reduce branch penalties at some expense in code size. This 16679 optimization is enabled by default. You can disable it with the 16680 `--no-target-align' command-line option (*note Command Line Options: 16681 Xtensa Options.). 16682 16683 The target alignment optimization is done without adding instructions 16684 that could increase the execution time of the program. If there are 16685 density instructions in the code preceding a target, the assembler can 16686 change the target alignment by widening some of those instructions to 16687 the equivalent 24-bit instructions. Extra bytes of padding can be 16688 inserted immediately following unconditional jump and return 16689 instructions. This approach is usually successful in aligning many, 16690 but not all, branch targets. 16691 16692 The `LOOP' family of instructions must be aligned such that the 16693 first instruction in the loop body does not cross an instruction fetch 16694 boundary (e.g., with a 32-bit fetch width, a `LOOP' instruction must be 16695 on either a 1 or 2 mod 4 byte boundary). The assembler knows about 16696 this restriction and inserts the minimal number of 2 or 3 byte no-op 16697 instructions to satisfy it. When no-op instructions are added, any 16698 label immediately preceding the original loop will be moved in order to 16699 refer to the loop instruction, not the newly generated no-op 16700 instruction. To preserve binary compatibility across processors with 16701 different fetch widths, the assembler conservatively assumes a 32-bit 16702 fetch width when aligning `LOOP' instructions (except if the first 16703 instruction in the loop is a 64-bit instruction). 16704 16705 Previous versions of the assembler automatically aligned `ENTRY' 16706 instructions to 4-byte boundaries, but that alignment is now the 16707 programmer's responsibility. 16708 16709 16710 File: as.info, Node: Xtensa Relaxation, Next: Xtensa Directives, Prev: Xtensa Optimizations, Up: Xtensa-Dependent 16711 16712 9.36.4 Xtensa Relaxation 16713 ------------------------ 16714 16715 When an instruction operand is outside the range allowed for that 16716 particular instruction field, `as' can transform the code to use a 16717 functionally-equivalent instruction or sequence of instructions. This 16718 process is known as "relaxation". This is typically done for branch 16719 instructions because the distance of the branch targets is not known 16720 until assembly-time. The Xtensa assembler offers branch relaxation and 16721 also extends this concept to function calls, `MOVI' instructions and 16722 other instructions with immediate fields. 16723 16724 * Menu: 16725 16726 * Xtensa Branch Relaxation:: Relaxation of Branches. 16727 * Xtensa Call Relaxation:: Relaxation of Function Calls. 16728 * Xtensa Immediate Relaxation:: Relaxation of other Immediate Fields. 16729 16730 16731 File: as.info, Node: Xtensa Branch Relaxation, Next: Xtensa Call Relaxation, Up: Xtensa Relaxation 16732 16733 9.36.4.1 Conditional Branch Relaxation 16734 ...................................... 16735 16736 When the target of a branch is too far away from the branch itself, 16737 i.e., when the offset from the branch to the target is too large to fit 16738 in the immediate field of the branch instruction, it may be necessary to 16739 replace the branch with a branch around a jump. For example, 16740 16741 beqz a2, L 16742 16743 may result in: 16744 16745 bnez.n a2, M 16746 j L 16747 M: 16748 16749 (The `BNEZ.N' instruction would be used in this example only if the 16750 density option is available. Otherwise, `BNEZ' would be used.) 16751 16752 This relaxation works well because the unconditional jump instruction 16753 has a much larger offset range than the various conditional branches. 16754 However, an error will occur if a branch target is beyond the range of a 16755 jump instruction. `as' cannot relax unconditional jumps. Similarly, 16756 an error will occur if the original input contains an unconditional 16757 jump to a target that is out of range. 16758 16759 Branch relaxation is enabled by default. It can be disabled by using 16760 underscore prefixes (*note Opcode Names: Xtensa Opcodes.), the 16761 `--no-transform' command-line option (*note Command Line Options: 16762 Xtensa Options.), or the `no-transform' directive (*note transform: 16763 Transform Directive.). 16764 16765 16766 File: as.info, Node: Xtensa Call Relaxation, Next: Xtensa Immediate Relaxation, Prev: Xtensa Branch Relaxation, Up: Xtensa Relaxation 16767 16768 9.36.4.2 Function Call Relaxation 16769 ................................. 16770 16771 Function calls may require relaxation because the Xtensa immediate call 16772 instructions (`CALL0', `CALL4', `CALL8' and `CALL12') provide a 16773 PC-relative offset of only 512 Kbytes in either direction. For larger 16774 programs, it may be necessary to use indirect calls (`CALLX0', 16775 `CALLX4', `CALLX8' and `CALLX12') where the target address is specified 16776 in a register. The Xtensa assembler can automatically relax immediate 16777 call instructions into indirect call instructions. This relaxation is 16778 done by loading the address of the called function into the callee's 16779 return address register and then using a `CALLX' instruction. So, for 16780 example: 16781 16782 call8 func 16783 16784 might be relaxed to: 16785 16786 .literal .L1, func 16787 l32r a8, .L1 16788 callx8 a8 16789 16790 Because the addresses of targets of function calls are not generally 16791 known until link-time, the assembler must assume the worst and relax all 16792 the calls to functions in other source files, not just those that really 16793 will be out of range. The linker can recognize calls that were 16794 unnecessarily relaxed, and it will remove the overhead introduced by the 16795 assembler for those cases where direct calls are sufficient. 16796 16797 Call relaxation is disabled by default because it can have a negative 16798 effect on both code size and performance, although the linker can 16799 usually eliminate the unnecessary overhead. If a program is too large 16800 and some of the calls are out of range, function call relaxation can be 16801 enabled using the `--longcalls' command-line option or the `longcalls' 16802 directive (*note longcalls: Longcalls Directive.). 16803 16804 16805 File: as.info, Node: Xtensa Immediate Relaxation, Prev: Xtensa Call Relaxation, Up: Xtensa Relaxation 16806 16807 9.36.4.3 Other Immediate Field Relaxation 16808 ......................................... 16809 16810 The assembler normally performs the following other relaxations. They 16811 can be disabled by using underscore prefixes (*note Opcode Names: 16812 Xtensa Opcodes.), the `--no-transform' command-line option (*note 16813 Command Line Options: Xtensa Options.), or the `no-transform' directive 16814 (*note transform: Transform Directive.). 16815 16816 The `MOVI' machine instruction can only materialize values in the 16817 range from -2048 to 2047. Values outside this range are best 16818 materialized with `L32R' instructions. Thus: 16819 16820 movi a0, 100000 16821 16822 is assembled into the following machine code: 16823 16824 .literal .L1, 100000 16825 l32r a0, .L1 16826 16827 The `L8UI' machine instruction can only be used with immediate 16828 offsets in the range from 0 to 255. The `L16SI' and `L16UI' machine 16829 instructions can only be used with offsets from 0 to 510. The `L32I' 16830 machine instruction can only be used with offsets from 0 to 1020. A 16831 load offset outside these ranges can be materialized with an `L32R' 16832 instruction if the destination register of the load is different than 16833 the source address register. For example: 16834 16835 l32i a1, a0, 2040 16836 16837 is translated to: 16838 16839 .literal .L1, 2040 16840 l32r a1, .L1 16841 add a1, a0, a1 16842 l32i a1, a1, 0 16843 16844 If the load destination and source address register are the same, an 16845 out-of-range offset causes an error. 16846 16847 The Xtensa `ADDI' instruction only allows immediate operands in the 16848 range from -128 to 127. There are a number of alternate instruction 16849 sequences for the `ADDI' operation. First, if the immediate is 0, the 16850 `ADDI' will be turned into a `MOV.N' instruction (or the equivalent 16851 `OR' instruction if the code density option is not available). If the 16852 `ADDI' immediate is outside of the range -128 to 127, but inside the 16853 range -32896 to 32639, an `ADDMI' instruction or `ADDMI'/`ADDI' 16854 sequence will be used. Finally, if the immediate is outside of this 16855 range and a free register is available, an `L32R'/`ADD' sequence will 16856 be used with a literal allocated from the literal pool. 16857 16858 For example: 16859 16860 addi a5, a6, 0 16861 addi a5, a6, 512 16862 addi a5, a6, 513 16863 addi a5, a6, 50000 16864 16865 is assembled into the following: 16866 16867 .literal .L1, 50000 16868 mov.n a5, a6 16869 addmi a5, a6, 0x200 16870 addmi a5, a6, 0x200 16871 addi a5, a5, 1 16872 l32r a5, .L1 16873 add a5, a6, a5 16874 16875 16876 File: as.info, Node: Xtensa Directives, Prev: Xtensa Relaxation, Up: Xtensa-Dependent 16877 16878 9.36.5 Directives 16879 ----------------- 16880 16881 The Xtensa assembler supports a region-based directive syntax: 16882 16883 .begin DIRECTIVE [OPTIONS] 16884 ... 16885 .end DIRECTIVE 16886 16887 All the Xtensa-specific directives that apply to a region of code use 16888 this syntax. 16889 16890 The directive applies to code between the `.begin' and the `.end'. 16891 The state of the option after the `.end' reverts to what it was before 16892 the `.begin'. A nested `.begin'/`.end' region can further change the 16893 state of the directive without having to be aware of its outer state. 16894 For example, consider: 16895 16896 .begin no-transform 16897 L: add a0, a1, a2 16898 .begin transform 16899 M: add a0, a1, a2 16900 .end transform 16901 N: add a0, a1, a2 16902 .end no-transform 16903 16904 The `ADD' opcodes at `L' and `N' in the outer `no-transform' region 16905 both result in `ADD' machine instructions, but the assembler selects an 16906 `ADD.N' instruction for the `ADD' at `M' in the inner `transform' 16907 region. 16908 16909 The advantage of this style is that it works well inside macros 16910 which can preserve the context of their callers. 16911 16912 The following directives are available: 16913 16914 * Menu: 16915 16916 * Schedule Directive:: Enable instruction scheduling. 16917 * Longcalls Directive:: Use Indirect Calls for Greater Range. 16918 * Transform Directive:: Disable All Assembler Transformations. 16919 * Literal Directive:: Intermix Literals with Instructions. 16920 * Literal Position Directive:: Specify Inline Literal Pool Locations. 16921 * Literal Prefix Directive:: Specify Literal Section Name Prefix. 16922 * Absolute Literals Directive:: Control PC-Relative vs. Absolute Literals. 16923 16924 16925 File: as.info, Node: Schedule Directive, Next: Longcalls Directive, Up: Xtensa Directives 16926 16927 9.36.5.1 schedule 16928 ................. 16929 16930 The `schedule' directive is recognized only for compatibility with 16931 Tensilica's assembler. 16932 16933 .begin [no-]schedule 16934 .end [no-]schedule 16935 16936 This directive is ignored and has no effect on `as'. 16937 16938 16939 File: as.info, Node: Longcalls Directive, Next: Transform Directive, Prev: Schedule Directive, Up: Xtensa Directives 16940 16941 9.36.5.2 longcalls 16942 .................. 16943 16944 The `longcalls' directive enables or disables function call relaxation. 16945 *Note Function Call Relaxation: Xtensa Call Relaxation. 16946 16947 .begin [no-]longcalls 16948 .end [no-]longcalls 16949 16950 Call relaxation is disabled by default unless the `--longcalls' 16951 command-line option is specified. The `longcalls' directive overrides 16952 the default determined by the command-line options. 16953 16954 16955 File: as.info, Node: Transform Directive, Next: Literal Directive, Prev: Longcalls Directive, Up: Xtensa Directives 16956 16957 9.36.5.3 transform 16958 .................. 16959 16960 This directive enables or disables all assembler transformation, 16961 including relaxation (*note Xtensa Relaxation: Xtensa Relaxation.) and 16962 optimization (*note Xtensa Optimizations: Xtensa Optimizations.). 16963 16964 .begin [no-]transform 16965 .end [no-]transform 16966 16967 Transformations are enabled by default unless the `--no-transform' 16968 option is used. The `transform' directive overrides the default 16969 determined by the command-line options. An underscore opcode prefix, 16970 disabling transformation of that opcode, always takes precedence over 16971 both directives and command-line flags. 16972 16973 16974 File: as.info, Node: Literal Directive, Next: Literal Position Directive, Prev: Transform Directive, Up: Xtensa Directives 16975 16976 9.36.5.4 literal 16977 ................ 16978 16979 The `.literal' directive is used to define literal pool data, i.e., 16980 read-only 32-bit data accessed via `L32R' instructions. 16981 16982 .literal LABEL, VALUE[, VALUE...] 16983 16984 This directive is similar to the standard `.word' directive, except 16985 that the actual location of the literal data is determined by the 16986 assembler and linker, not by the position of the `.literal' directive. 16987 Using this directive gives the assembler freedom to locate the literal 16988 data in the most appropriate place and possibly to combine identical 16989 literals. For example, the code: 16990 16991 entry sp, 40 16992 .literal .L1, sym 16993 l32r a4, .L1 16994 16995 can be used to load a pointer to the symbol `sym' into register 16996 `a4'. The value of `sym' will not be placed between the `ENTRY' and 16997 `L32R' instructions; instead, the assembler puts the data in a literal 16998 pool. 16999 17000 Literal pools are placed by default in separate literal sections; 17001 however, when using the `--text-section-literals' option (*note Command 17002 Line Options: Xtensa Options.), the literal pools for PC-relative mode 17003 `L32R' instructions are placed in the current section.(1) These text 17004 section literal pools are created automatically before `ENTRY' 17005 instructions and manually after `.literal_position' directives (*note 17006 literal_position: Literal Position Directive.). If there are no 17007 preceding `ENTRY' instructions, explicit `.literal_position' directives 17008 must be used to place the text section literal pools; otherwise, `as' 17009 will report an error. 17010 17011 When literals are placed in separate sections, the literal section 17012 names are derived from the names of the sections where the literals are 17013 defined. The base literal section names are `.literal' for PC-relative 17014 mode `L32R' instructions and `.lit4' for absolute mode `L32R' 17015 instructions (*note absolute-literals: Absolute Literals Directive.). 17016 These base names are used for literals defined in the default `.text' 17017 section. For literals defined in other sections or within the scope of 17018 a `literal_prefix' directive (*note literal_prefix: Literal Prefix 17019 Directive.), the following rules determine the literal section name: 17020 17021 1. If the current section is a member of a section group, the literal 17022 section name includes the group name as a suffix to the base 17023 `.literal' or `.lit4' name, with a period to separate the base 17024 name and group name. The literal section is also made a member of 17025 the group. 17026 17027 2. If the current section name (or `literal_prefix' value) begins with 17028 "`.gnu.linkonce.KIND.'", the literal section name is formed by 17029 replacing "`.KIND'" with the base `.literal' or `.lit4' name. For 17030 example, for literals defined in a section named 17031 `.gnu.linkonce.t.func', the literal section will be 17032 `.gnu.linkonce.literal.func' or `.gnu.linkonce.lit4.func'. 17033 17034 3. If the current section name (or `literal_prefix' value) ends with 17035 `.text', the literal section name is formed by replacing that 17036 suffix with the base `.literal' or `.lit4' name. For example, for 17037 literals defined in a section named `.iram0.text', the literal 17038 section will be `.iram0.literal' or `.iram0.lit4'. 17039 17040 4. If none of the preceding conditions apply, the literal section 17041 name is formed by adding the base `.literal' or `.lit4' name as a 17042 suffix to the current section name (or `literal_prefix' value). 17043 17044 ---------- Footnotes ---------- 17045 17046 (1) Literals for the `.init' and `.fini' sections are always placed 17047 in separate sections, even when `--text-section-literals' is enabled. 17048 17049 17050 File: as.info, Node: Literal Position Directive, Next: Literal Prefix Directive, Prev: Literal Directive, Up: Xtensa Directives 17051 17052 9.36.5.5 literal_position 17053 ......................... 17054 17055 When using `--text-section-literals' to place literals inline in the 17056 section being assembled, the `.literal_position' directive can be used 17057 to mark a potential location for a literal pool. 17058 17059 .literal_position 17060 17061 The `.literal_position' directive is ignored when the 17062 `--text-section-literals' option is not used or when `L32R' 17063 instructions use the absolute addressing mode. 17064 17065 The assembler will automatically place text section literal pools 17066 before `ENTRY' instructions, so the `.literal_position' directive is 17067 only needed to specify some other location for a literal pool. You may 17068 need to add an explicit jump instruction to skip over an inline literal 17069 pool. 17070 17071 For example, an interrupt vector does not begin with an `ENTRY' 17072 instruction so the assembler will be unable to automatically find a good 17073 place to put a literal pool. Moreover, the code for the interrupt 17074 vector must be at a specific starting address, so the literal pool 17075 cannot come before the start of the code. The literal pool for the 17076 vector must be explicitly positioned in the middle of the vector (before 17077 any uses of the literals, due to the negative offsets used by 17078 PC-relative `L32R' instructions). The `.literal_position' directive 17079 can be used to do this. In the following code, the literal for `M' 17080 will automatically be aligned correctly and is placed after the 17081 unconditional jump. 17082 17083 .global M 17084 code_start: 17085 j continue 17086 .literal_position 17087 .align 4 17088 continue: 17089 movi a4, M 17090 17091 17092 File: as.info, Node: Literal Prefix Directive, Next: Absolute Literals Directive, Prev: Literal Position Directive, Up: Xtensa Directives 17093 17094 9.36.5.6 literal_prefix 17095 ....................... 17096 17097 The `literal_prefix' directive allows you to override the default 17098 literal section names, which are derived from the names of the sections 17099 where the literals are defined. 17100 17101 .begin literal_prefix [NAME] 17102 .end literal_prefix 17103 17104 For literals defined within the delimited region, the literal section 17105 names are derived from the NAME argument instead of the name of the 17106 current section. The rules used to derive the literal section names do 17107 not change. *Note literal: Literal Directive. If the NAME argument is 17108 omitted, the literal sections revert to the defaults. This directive 17109 has no effect when using the `--text-section-literals' option (*note 17110 Command Line Options: Xtensa Options.). 17111 17112 17113 File: as.info, Node: Absolute Literals Directive, Prev: Literal Prefix Directive, Up: Xtensa Directives 17114 17115 9.36.5.7 absolute-literals 17116 .......................... 17117 17118 The `absolute-literals' and `no-absolute-literals' directives control 17119 the absolute vs. PC-relative mode for `L32R' instructions. These are 17120 relevant only for Xtensa configurations that include the absolute 17121 addressing option for `L32R' instructions. 17122 17123 .begin [no-]absolute-literals 17124 .end [no-]absolute-literals 17125 17126 These directives do not change the `L32R' mode--they only cause the 17127 assembler to emit the appropriate kind of relocation for `L32R' 17128 instructions and to place the literal values in the appropriate section. 17129 To change the `L32R' mode, the program must write the `LITBASE' special 17130 register. It is the programmer's responsibility to keep track of the 17131 mode and indicate to the assembler which mode is used in each region of 17132 code. 17133 17134 If the Xtensa configuration includes the absolute `L32R' addressing 17135 option, the default is to assume absolute `L32R' addressing unless the 17136 `--no-absolute-literals' command-line option is specified. Otherwise, 17137 the default is to assume PC-relative `L32R' addressing. The 17138 `absolute-literals' directive can then be used to override the default 17139 determined by the command-line options. 17140 17141 17142 File: as.info, Node: Reporting Bugs, Next: Acknowledgements, Prev: Machine Dependencies, Up: Top 17143 17144 10 Reporting Bugs 17145 ***************** 17146 17147 Your bug reports play an essential role in making `as' reliable. 17148 17149 Reporting a bug may help you by bringing a solution to your problem, 17150 or it may not. But in any case the principal function of a bug report 17151 is to help the entire community by making the next version of `as' work 17152 better. Bug reports are your contribution to the maintenance of `as'. 17153 17154 In order for a bug report to serve its purpose, you must include the 17155 information that enables us to fix the bug. 17156 17157 * Menu: 17158 17159 * Bug Criteria:: Have you found a bug? 17160 * Bug Reporting:: How to report bugs 17161 17162 17163 File: as.info, Node: Bug Criteria, Next: Bug Reporting, Up: Reporting Bugs 17164 17165 10.1 Have You Found a Bug? 17166 ========================== 17167 17168 If you are not sure whether you have found a bug, here are some 17169 guidelines: 17170 17171 * If the assembler gets a fatal signal, for any input whatever, that 17172 is a `as' bug. Reliable assemblers never crash. 17173 17174 * If `as' produces an error message for valid input, that is a bug. 17175 17176 * If `as' does not produce an error message for invalid input, that 17177 is a bug. However, you should note that your idea of "invalid 17178 input" might be our idea of "an extension" or "support for 17179 traditional practice". 17180 17181 * If you are an experienced user of assemblers, your suggestions for 17182 improvement of `as' are welcome in any case. 17183 17184 17185 File: as.info, Node: Bug Reporting, Prev: Bug Criteria, Up: Reporting Bugs 17186 17187 10.2 How to Report Bugs 17188 ======================= 17189 17190 A number of companies and individuals offer support for GNU products. 17191 If you obtained `as' from a support organization, we recommend you 17192 contact that organization first. 17193 17194 You can find contact information for many support companies and 17195 individuals in the file `etc/SERVICE' in the GNU Emacs distribution. 17196 17197 In any event, we also recommend that you send bug reports for `as' 17198 to `http://www.sourceware.org/bugzilla/'. 17199 17200 The fundamental principle of reporting bugs usefully is this: 17201 *report all the facts*. If you are not sure whether to state a fact or 17202 leave it out, state it! 17203 17204 Often people omit facts because they think they know what causes the 17205 problem and assume that some details do not matter. Thus, you might 17206 assume that the name of a symbol you use in an example does not matter. 17207 Well, probably it does not, but one cannot be sure. Perhaps the bug 17208 is a stray memory reference which happens to fetch from the location 17209 where that name is stored in memory; perhaps, if the name were 17210 different, the contents of that location would fool the assembler into 17211 doing the right thing despite the bug. Play it safe and give a 17212 specific, complete example. That is the easiest thing for you to do, 17213 and the most helpful. 17214 17215 Keep in mind that the purpose of a bug report is to enable us to fix 17216 the bug if it is new to us. Therefore, always write your bug reports 17217 on the assumption that the bug has not been reported previously. 17218 17219 Sometimes people give a few sketchy facts and ask, "Does this ring a 17220 bell?" This cannot help us fix a bug, so it is basically useless. We 17221 respond by asking for enough details to enable us to investigate. You 17222 might as well expedite matters by sending them to begin with. 17223 17224 To enable us to fix the bug, you should include all these things: 17225 17226 * The version of `as'. `as' announces it if you start it with the 17227 `--version' argument. 17228 17229 Without this, we will not know whether there is any point in 17230 looking for the bug in the current version of `as'. 17231 17232 * Any patches you may have applied to the `as' source. 17233 17234 * The type of machine you are using, and the operating system name 17235 and version number. 17236 17237 * What compiler (and its version) was used to compile `as'--e.g. 17238 "`gcc-2.7'". 17239 17240 * The command arguments you gave the assembler to assemble your 17241 example and observe the bug. To guarantee you will not omit 17242 something important, list them all. A copy of the Makefile (or 17243 the output from make) is sufficient. 17244 17245 If we were to try to guess the arguments, we would probably guess 17246 wrong and then we might not encounter the bug. 17247 17248 * A complete input file that will reproduce the bug. If the bug is 17249 observed when the assembler is invoked via a compiler, send the 17250 assembler source, not the high level language source. Most 17251 compilers will produce the assembler source when run with the `-S' 17252 option. If you are using `gcc', use the options `-v 17253 --save-temps'; this will save the assembler source in a file with 17254 an extension of `.s', and also show you exactly how `as' is being 17255 run. 17256 17257 * A description of what behavior you observe that you believe is 17258 incorrect. For example, "It gets a fatal signal." 17259 17260 Of course, if the bug is that `as' gets a fatal signal, then we 17261 will certainly notice it. But if the bug is incorrect output, we 17262 might not notice unless it is glaringly wrong. You might as well 17263 not give us a chance to make a mistake. 17264 17265 Even if the problem you experience is a fatal signal, you should 17266 still say so explicitly. Suppose something strange is going on, 17267 such as, your copy of `as' is out of sync, or you have encountered 17268 a bug in the C library on your system. (This has happened!) Your 17269 copy might crash and ours would not. If you told us to expect a 17270 crash, then when ours fails to crash, we would know that the bug 17271 was not happening for us. If you had not told us to expect a 17272 crash, then we would not be able to draw any conclusion from our 17273 observations. 17274 17275 * If you wish to suggest changes to the `as' source, send us context 17276 diffs, as generated by `diff' with the `-u', `-c', or `-p' option. 17277 Always send diffs from the old file to the new file. If you even 17278 discuss something in the `as' source, refer to it by context, not 17279 by line number. 17280 17281 The line numbers in our development sources will not match those 17282 in your sources. Your line numbers would convey no useful 17283 information to us. 17284 17285 Here are some things that are not necessary: 17286 17287 * A description of the envelope of the bug. 17288 17289 Often people who encounter a bug spend a lot of time investigating 17290 which changes to the input file will make the bug go away and which 17291 changes will not affect it. 17292 17293 This is often time consuming and not very useful, because the way 17294 we will find the bug is by running a single example under the 17295 debugger with breakpoints, not by pure deduction from a series of 17296 examples. We recommend that you save your time for something else. 17297 17298 Of course, if you can find a simpler example to report _instead_ 17299 of the original one, that is a convenience for us. Errors in the 17300 output will be easier to spot, running under the debugger will take 17301 less time, and so on. 17302 17303 However, simplification is not vital; if you do not want to do 17304 this, report the bug anyway and send us the entire test case you 17305 used. 17306 17307 * A patch for the bug. 17308 17309 A patch for the bug does help us if it is a good one. But do not 17310 omit the necessary information, such as the test case, on the 17311 assumption that a patch is all we need. We might see problems 17312 with your patch and decide to fix the problem another way, or we 17313 might not understand it at all. 17314 17315 Sometimes with a program as complicated as `as' it is very hard to 17316 construct an example that will make the program follow a certain 17317 path through the code. If you do not send us the example, we will 17318 not be able to construct one, so we will not be able to verify 17319 that the bug is fixed. 17320 17321 And if we cannot understand what bug you are trying to fix, or why 17322 your patch should be an improvement, we will not install it. A 17323 test case will help us to understand. 17324 17325 * A guess about what the bug is or what it depends on. 17326 17327 Such guesses are usually wrong. Even we cannot guess right about 17328 such things without first using the debugger to find the facts. 17329 17330 17331 File: as.info, Node: Acknowledgements, Next: GNU Free Documentation License, Prev: Reporting Bugs, Up: Top 17332 17333 11 Acknowledgements 17334 ******************* 17335 17336 If you have contributed to GAS and your name isn't listed here, it is 17337 not meant as a slight. We just don't know about it. Send mail to the 17338 maintainer, and we'll correct the situation. Currently the maintainer 17339 is Ken Raeburn (email address `raeburn (a] cygnus.com'). 17340 17341 Dean Elsner wrote the original GNU assembler for the VAX.(1) 17342 17343 Jay Fenlason maintained GAS for a while, adding support for 17344 GDB-specific debug information and the 68k series machines, most of the 17345 preprocessing pass, and extensive changes in `messages.c', 17346 `input-file.c', `write.c'. 17347 17348 K. Richard Pixley maintained GAS for a while, adding various 17349 enhancements and many bug fixes, including merging support for several 17350 processors, breaking GAS up to handle multiple object file format back 17351 ends (including heavy rewrite, testing, an integration of the coff and 17352 b.out back ends), adding configuration including heavy testing and 17353 verification of cross assemblers and file splits and renaming, 17354 converted GAS to strictly ANSI C including full prototypes, added 17355 support for m680[34]0 and cpu32, did considerable work on i960 17356 including a COFF port (including considerable amounts of reverse 17357 engineering), a SPARC opcode file rewrite, DECstation, rs6000, and 17358 hp300hpux host ports, updated "know" assertions and made them work, 17359 much other reorganization, cleanup, and lint. 17360 17361 Ken Raeburn wrote the high-level BFD interface code to replace most 17362 of the code in format-specific I/O modules. 17363 17364 The original VMS support was contributed by David L. Kashtan. Eric 17365 Youngdale has done much work with it since. 17366 17367 The Intel 80386 machine description was written by Eliot Dresselhaus. 17368 17369 Minh Tran-Le at IntelliCorp contributed some AIX 386 support. 17370 17371 The Motorola 88k machine description was contributed by Devon Bowen 17372 of Buffalo University and Torbjorn Granlund of the Swedish Institute of 17373 Computer Science. 17374 17375 Keith Knowles at the Open Software Foundation wrote the original 17376 MIPS back end (`tc-mips.c', `tc-mips.h'), and contributed Rose format 17377 support (which hasn't been merged in yet). Ralph Campbell worked with 17378 the MIPS code to support a.out format. 17379 17380 Support for the Zilog Z8k and Renesas H8/300 processors (tc-z8k, 17381 tc-h8300), and IEEE 695 object file format (obj-ieee), was written by 17382 Steve Chamberlain of Cygnus Support. Steve also modified the COFF back 17383 end to use BFD for some low-level operations, for use with the H8/300 17384 and AMD 29k targets. 17385 17386 John Gilmore built the AMD 29000 support, added `.include' support, 17387 and simplified the configuration of which versions accept which 17388 directives. He updated the 68k machine description so that Motorola's 17389 opcodes always produced fixed-size instructions (e.g., `jsr'), while 17390 synthetic instructions remained shrinkable (`jbsr'). John fixed many 17391 bugs, including true tested cross-compilation support, and one bug in 17392 relaxation that took a week and required the proverbial one-bit fix. 17393 17394 Ian Lance Taylor of Cygnus Support merged the Motorola and MIT 17395 syntax for the 68k, completed support for some COFF targets (68k, i386 17396 SVR3, and SCO Unix), added support for MIPS ECOFF and ELF targets, 17397 wrote the initial RS/6000 and PowerPC assembler, and made a few other 17398 minor patches. 17399 17400 Steve Chamberlain made GAS able to generate listings. 17401 17402 Hewlett-Packard contributed support for the HP9000/300. 17403 17404 Jeff Law wrote GAS and BFD support for the native HPPA object format 17405 (SOM) along with a fairly extensive HPPA testsuite (for both SOM and 17406 ELF object formats). This work was supported by both the Center for 17407 Software Science at the University of Utah and Cygnus Support. 17408 17409 Support for ELF format files has been worked on by Mark Eichin of 17410 Cygnus Support (original, incomplete implementation for SPARC), Pete 17411 Hoogenboom and Jeff Law at the University of Utah (HPPA mainly), 17412 Michael Meissner of the Open Software Foundation (i386 mainly), and Ken 17413 Raeburn of Cygnus Support (sparc, and some initial 64-bit support). 17414 17415 Linas Vepstas added GAS support for the ESA/390 "IBM 370" 17416 architecture. 17417 17418 Richard Henderson rewrote the Alpha assembler. Klaus Kaempf wrote 17419 GAS and BFD support for openVMS/Alpha. 17420 17421 Timothy Wall, Michael Hayes, and Greg Smart contributed to the 17422 various tic* flavors. 17423 17424 David Heine, Sterling Augustine, Bob Wilson and John Ruttenberg from 17425 Tensilica, Inc. added support for Xtensa processors. 17426 17427 Several engineers at Cygnus Support have also provided many small 17428 bug fixes and configuration enhancements. 17429 17430 Many others have contributed large or small bugfixes and 17431 enhancements. If you have contributed significant work and are not 17432 mentioned on this list, and want to be, let us know. Some of the 17433 history has been lost; we are not intentionally leaving anyone out. 17434 17435 ---------- Footnotes ---------- 17436 17437 (1) Any more details? 17438 17439 17440 File: as.info, Node: GNU Free Documentation License, Next: AS Index, Prev: Acknowledgements, Up: Top 17441 17442 Appendix A GNU Free Documentation License 17443 ***************************************** 17444 17445 Version 1.1, March 2000 17446 17447 Copyright (C) 2000, 2003 Free Software Foundation, Inc. 17448 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA 17449 17450 Everyone is permitted to copy and distribute verbatim copies 17451 of this license document, but changing it is not allowed. 17452 17453 17454 0. PREAMBLE 17455 17456 The purpose of this License is to make a manual, textbook, or other 17457 written document "free" in the sense of freedom: to assure everyone 17458 the effective freedom to copy and redistribute it, with or without 17459 modifying it, either commercially or noncommercially. Secondarily, 17460 this License preserves for the author and publisher a way to get 17461 credit for their work, while not being considered responsible for 17462 modifications made by others. 17463 17464 This License is a kind of "copyleft", which means that derivative 17465 works of the document must themselves be free in the same sense. 17466 It complements the GNU General Public License, which is a copyleft 17467 license designed for free software. 17468 17469 We have designed this License in order to use it for manuals for 17470 free software, because free software needs free documentation: a 17471 free program should come with manuals providing the same freedoms 17472 that the software does. But this License is not limited to 17473 software manuals; it can be used for any textual work, regardless 17474 of subject matter or whether it is published as a printed book. 17475 We recommend this License principally for works whose purpose is 17476 instruction or reference. 17477 17478 17479 1. APPLICABILITY AND DEFINITIONS 17480 17481 This License applies to any manual or other work that contains a 17482 notice placed by the copyright holder saying it can be distributed 17483 under the terms of this License. The "Document", below, refers to 17484 any such manual or work. Any member of the public is a licensee, 17485 and is addressed as "you." 17486 17487 A "Modified Version" of the Document means any work containing the 17488 Document or a portion of it, either copied verbatim, or with 17489 modifications and/or translated into another language. 17490 17491 A "Secondary Section" is a named appendix or a front-matter 17492 section of the Document that deals exclusively with the 17493 relationship of the publishers or authors of the Document to the 17494 Document's overall subject (or to related matters) and contains 17495 nothing that could fall directly within that overall subject. 17496 (For example, if the Document is in part a textbook of 17497 mathematics, a Secondary Section may not explain any mathematics.) 17498 The relationship could be a matter of historical connection with 17499 the subject or with related matters, or of legal, commercial, 17500 philosophical, ethical or political position regarding them. 17501 17502 The "Invariant Sections" are certain Secondary Sections whose 17503 titles are designated, as being those of Invariant Sections, in 17504 the notice that says that the Document is released under this 17505 License. 17506 17507 The "Cover Texts" are certain short passages of text that are 17508 listed, as Front-Cover Texts or Back-Cover Texts, in the notice 17509 that says that the Document is released under this License. 17510 17511 A "Transparent" copy of the Document means a machine-readable copy, 17512 represented in a format whose specification is available to the 17513 general public, whose contents can be viewed and edited directly 17514 and straightforwardly with generic text editors or (for images 17515 composed of pixels) generic paint programs or (for drawings) some 17516 widely available drawing editor, and that is suitable for input to 17517 text formatters or for automatic translation to a variety of 17518 formats suitable for input to text formatters. A copy made in an 17519 otherwise Transparent file format whose markup has been designed 17520 to thwart or discourage subsequent modification by readers is not 17521 Transparent. A copy that is not "Transparent" is called "Opaque." 17522 17523 Examples of suitable formats for Transparent copies include plain 17524 ASCII without markup, Texinfo input format, LaTeX input format, 17525 SGML or XML using a publicly available DTD, and 17526 standard-conforming simple HTML designed for human modification. 17527 Opaque formats include PostScript, PDF, proprietary formats that 17528 can be read and edited only by proprietary word processors, SGML 17529 or XML for which the DTD and/or processing tools are not generally 17530 available, and the machine-generated HTML produced by some word 17531 processors for output purposes only. 17532 17533 The "Title Page" means, for a printed book, the title page itself, 17534 plus such following pages as are needed to hold, legibly, the 17535 material this License requires to appear in the title page. For 17536 works in formats which do not have any title page as such, "Title 17537 Page" means the text near the most prominent appearance of the 17538 work's title, preceding the beginning of the body of the text. 17539 17540 2. VERBATIM COPYING 17541 17542 You may copy and distribute the Document in any medium, either 17543 commercially or noncommercially, provided that this License, the 17544 copyright notices, and the license notice saying this License 17545 applies to the Document are reproduced in all copies, and that you 17546 add no other conditions whatsoever to those of this License. You 17547 may not use technical measures to obstruct or control the reading 17548 or further copying of the copies you make or distribute. However, 17549 you may accept compensation in exchange for copies. If you 17550 distribute a large enough number of copies you must also follow 17551 the conditions in section 3. 17552 17553 You may also lend copies, under the same conditions stated above, 17554 and you may publicly display copies. 17555 17556 3. COPYING IN QUANTITY 17557 17558 If you publish printed copies of the Document numbering more than 17559 100, and the Document's license notice requires Cover Texts, you 17560 must enclose the copies in covers that carry, clearly and legibly, 17561 all these Cover Texts: Front-Cover Texts on the front cover, and 17562 Back-Cover Texts on the back cover. Both covers must also clearly 17563 and legibly identify you as the publisher of these copies. The 17564 front cover must present the full title with all words of the 17565 title equally prominent and visible. You may add other material 17566 on the covers in addition. Copying with changes limited to the 17567 covers, as long as they preserve the title of the Document and 17568 satisfy these conditions, can be treated as verbatim copying in 17569 other respects. 17570 17571 If the required texts for either cover are too voluminous to fit 17572 legibly, you should put the first ones listed (as many as fit 17573 reasonably) on the actual cover, and continue the rest onto 17574 adjacent pages. 17575 17576 If you publish or distribute Opaque copies of the Document 17577 numbering more than 100, you must either include a 17578 machine-readable Transparent copy along with each Opaque copy, or 17579 state in or with each Opaque copy a publicly-accessible 17580 computer-network location containing a complete Transparent copy 17581 of the Document, free of added material, which the general 17582 network-using public has access to download anonymously at no 17583 charge using public-standard network protocols. If you use the 17584 latter option, you must take reasonably prudent steps, when you 17585 begin distribution of Opaque copies in quantity, to ensure that 17586 this Transparent copy will remain thus accessible at the stated 17587 location until at least one year after the last time you 17588 distribute an Opaque copy (directly or through your agents or 17589 retailers) of that edition to the public. 17590 17591 It is requested, but not required, that you contact the authors of 17592 the Document well before redistributing any large number of 17593 copies, to give them a chance to provide you with an updated 17594 version of the Document. 17595 17596 4. MODIFICATIONS 17597 17598 You may copy and distribute a Modified Version of the Document 17599 under the conditions of sections 2 and 3 above, provided that you 17600 release the Modified Version under precisely this License, with 17601 the Modified Version filling the role of the Document, thus 17602 licensing distribution and modification of the Modified Version to 17603 whoever possesses a copy of it. In addition, you must do these 17604 things in the Modified Version: 17605 17606 A. Use in the Title Page (and on the covers, if any) a title 17607 distinct from that of the Document, and from those of previous 17608 versions (which should, if there were any, be listed in the 17609 History section of the Document). You may use the same title 17610 as a previous version if the original publisher of that version 17611 gives permission. 17612 B. List on the Title Page, as authors, one or more persons or 17613 entities responsible for authorship of the modifications in the 17614 Modified Version, together with at least five of the principal 17615 authors of the Document (all of its principal authors, if it 17616 has less than five). 17617 C. State on the Title page the name of the publisher of the 17618 Modified Version, as the publisher. 17619 D. Preserve all the copyright notices of the Document. 17620 E. Add an appropriate copyright notice for your modifications 17621 adjacent to the other copyright notices. 17622 F. Include, immediately after the copyright notices, a license 17623 notice giving the public permission to use the Modified Version 17624 under the terms of this License, in the form shown in the 17625 Addendum below. 17626 G. Preserve in that license notice the full lists of Invariant 17627 Sections and required Cover Texts given in the Document's 17628 license notice. 17629 H. Include an unaltered copy of this License. 17630 I. Preserve the section entitled "History", and its title, and add 17631 to it an item stating at least the title, year, new authors, and 17632 publisher of the Modified Version as given on the Title Page. 17633 If there is no section entitled "History" in the Document, 17634 create one stating the title, year, authors, and publisher of 17635 the Document as given on its Title Page, then add an item 17636 describing the Modified Version as stated in the previous 17637 sentence. 17638 J. Preserve the network location, if any, given in the Document for 17639 public access to a Transparent copy of the Document, and 17640 likewise the network locations given in the Document for 17641 previous versions it was based on. These may be placed in the 17642 "History" section. You may omit a network location for a work 17643 that was published at least four years before the Document 17644 itself, or if the original publisher of the version it refers 17645 to gives permission. 17646 K. In any section entitled "Acknowledgements" or "Dedications", 17647 preserve the section's title, and preserve in the section all the 17648 substance and tone of each of the contributor acknowledgements 17649 and/or dedications given therein. 17650 L. Preserve all the Invariant Sections of the Document, 17651 unaltered in their text and in their titles. Section numbers 17652 or the equivalent are not considered part of the section titles. 17653 M. Delete any section entitled "Endorsements." Such a section 17654 may not be included in the Modified Version. 17655 N. Do not retitle any existing section as "Endorsements" or to 17656 conflict in title with any Invariant Section. 17657 17658 If the Modified Version includes new front-matter sections or 17659 appendices that qualify as Secondary Sections and contain no 17660 material copied from the Document, you may at your option 17661 designate some or all of these sections as invariant. To do this, 17662 add their titles to the list of Invariant Sections in the Modified 17663 Version's license notice. These titles must be distinct from any 17664 other section titles. 17665 17666 You may add a section entitled "Endorsements", provided it contains 17667 nothing but endorsements of your Modified Version by various 17668 parties-for example, statements of peer review or that the text has 17669 been approved by an organization as the authoritative definition 17670 of a standard. 17671 17672 You may add a passage of up to five words as a Front-Cover Text, 17673 and a passage of up to 25 words as a Back-Cover Text, to the end 17674 of the list of Cover Texts in the Modified Version. Only one 17675 passage of Front-Cover Text and one of Back-Cover Text may be 17676 added by (or through arrangements made by) any one entity. If the 17677 Document already includes a cover text for the same cover, 17678 previously added by you or by arrangement made by the same entity 17679 you are acting on behalf of, you may not add another; but you may 17680 replace the old one, on explicit permission from the previous 17681 publisher that added the old one. 17682 17683 The author(s) and publisher(s) of the Document do not by this 17684 License give permission to use their names for publicity for or to 17685 assert or imply endorsement of any Modified Version. 17686 17687 5. COMBINING DOCUMENTS 17688 17689 You may combine the Document with other documents released under 17690 this License, under the terms defined in section 4 above for 17691 modified versions, provided that you include in the combination 17692 all of the Invariant Sections of all of the original documents, 17693 unmodified, and list them all as Invariant Sections of your 17694 combined work in its license notice. 17695 17696 The combined work need only contain one copy of this License, and 17697 multiple identical Invariant Sections may be replaced with a single 17698 copy. If there are multiple Invariant Sections with the same name 17699 but different contents, make the title of each such section unique 17700 by adding at the end of it, in parentheses, the name of the 17701 original author or publisher of that section if known, or else a 17702 unique number. Make the same adjustment to the section titles in 17703 the list of Invariant Sections in the license notice of the 17704 combined work. 17705 17706 In the combination, you must combine any sections entitled 17707 "History" in the various original documents, forming one section 17708 entitled "History"; likewise combine any sections entitled 17709 "Acknowledgements", and any sections entitled "Dedications." You 17710 must delete all sections entitled "Endorsements." 17711 17712 6. COLLECTIONS OF DOCUMENTS 17713 17714 You may make a collection consisting of the Document and other 17715 documents released under this License, and replace the individual 17716 copies of this License in the various documents with a single copy 17717 that is included in the collection, provided that you follow the 17718 rules of this License for verbatim copying of each of the 17719 documents in all other respects. 17720 17721 You may extract a single document from such a collection, and 17722 distribute it individually under this License, provided you insert 17723 a copy of this License into the extracted document, and follow 17724 this License in all other respects regarding verbatim copying of 17725 that document. 17726 17727 7. AGGREGATION WITH INDEPENDENT WORKS 17728 17729 A compilation of the Document or its derivatives with other 17730 separate and independent documents or works, in or on a volume of 17731 a storage or distribution medium, does not as a whole count as a 17732 Modified Version of the Document, provided no compilation 17733 copyright is claimed for the compilation. Such a compilation is 17734 called an "aggregate", and this License does not apply to the 17735 other self-contained works thus compiled with the Document, on 17736 account of their being thus compiled, if they are not themselves 17737 derivative works of the Document. 17738 17739 If the Cover Text requirement of section 3 is applicable to these 17740 copies of the Document, then if the Document is less than one 17741 quarter of the entire aggregate, the Document's Cover Texts may be 17742 placed on covers that surround only the Document within the 17743 aggregate. Otherwise they must appear on covers around the whole 17744 aggregate. 17745 17746 8. TRANSLATION 17747 17748 Translation is considered a kind of modification, so you may 17749 distribute translations of the Document under the terms of section 17750 4. Replacing Invariant Sections with translations requires special 17751 permission from their copyright holders, but you may include 17752 translations of some or all Invariant Sections in addition to the 17753 original versions of these Invariant Sections. You may include a 17754 translation of this License provided that you also include the 17755 original English version of this License. In case of a 17756 disagreement between the translation and the original English 17757 version of this License, the original English version will prevail. 17758 17759 9. TERMINATION 17760 17761 You may not copy, modify, sublicense, or distribute the Document 17762 except as expressly provided for under this License. Any other 17763 attempt to copy, modify, sublicense or distribute the Document is 17764 void, and will automatically terminate your rights under this 17765 License. However, parties who have received copies, or rights, 17766 from you under this License will not have their licenses 17767 terminated so long as such parties remain in full compliance. 17768 17769 10. FUTURE REVISIONS OF THIS LICENSE 17770 17771 The Free Software Foundation may publish new, revised versions of 17772 the GNU Free Documentation License from time to time. Such new 17773 versions will be similar in spirit to the present version, but may 17774 differ in detail to address new problems or concerns. See 17775 http://www.gnu.org/copyleft/. 17776 17777 Each version of the License is given a distinguishing version 17778 number. If the Document specifies that a particular numbered 17779 version of this License "or any later version" applies to it, you 17780 have the option of following the terms and conditions either of 17781 that specified version or of any later version that has been 17782 published (not as a draft) by the Free Software Foundation. If 17783 the Document does not specify a version number of this License, 17784 you may choose any version ever published (not as a draft) by the 17785 Free Software Foundation. 17786 17787 17788 ADDENDUM: How to use this License for your documents 17789 ==================================================== 17790 17791 To use this License in a document you have written, include a copy of 17792 the License in the document and put the following copyright and license 17793 notices just after the title page: 17794 17795 Copyright (C) YEAR YOUR NAME. 17796 Permission is granted to copy, distribute and/or modify this document 17797 under the terms of the GNU Free Documentation License, Version 1.1 17798 or any later version published by the Free Software Foundation; 17799 with the Invariant Sections being LIST THEIR TITLES, with the 17800 Front-Cover Texts being LIST, and with the Back-Cover Texts being LIST. 17801 A copy of the license is included in the section entitled "GNU 17802 Free Documentation License." 17803 17804 If you have no Invariant Sections, write "with no Invariant Sections" 17805 instead of saying which ones are invariant. If you have no Front-Cover 17806 Texts, write "no Front-Cover Texts" instead of "Front-Cover Texts being 17807 LIST"; likewise for Back-Cover Texts. 17808 17809 If your document contains nontrivial examples of program code, we 17810 recommend releasing these examples in parallel under your choice of 17811 free software license, such as the GNU General Public License, to 17812 permit their use in free software. 17813 17814 17815 File: as.info, Node: AS Index, Prev: GNU Free Documentation License, Up: Top 17816 17817 AS Index 17818 ******** 17819 17820 [index] 17821 * Menu: 17822 17823 * #: Comments. (line 38) 17824 * #APP: Preprocessing. (line 27) 17825 * #NO_APP: Preprocessing. (line 27) 17826 * $ in symbol names <1>: SH64-Chars. (line 10) 17827 * $ in symbol names <2>: SH-Chars. (line 10) 17828 * $ in symbol names <3>: D30V-Chars. (line 63) 17829 * $ in symbol names: D10V-Chars. (line 46) 17830 * $a: ARM Mapping Symbols. (line 9) 17831 * $acos math builtin, TIC54X: TIC54X-Builtins. (line 10) 17832 * $asin math builtin, TIC54X: TIC54X-Builtins. (line 13) 17833 * $atan math builtin, TIC54X: TIC54X-Builtins. (line 16) 17834 * $atan2 math builtin, TIC54X: TIC54X-Builtins. (line 19) 17835 * $ceil math builtin, TIC54X: TIC54X-Builtins. (line 22) 17836 * $cos math builtin, TIC54X: TIC54X-Builtins. (line 28) 17837 * $cosh math builtin, TIC54X: TIC54X-Builtins. (line 25) 17838 * $cvf math builtin, TIC54X: TIC54X-Builtins. (line 31) 17839 * $cvi math builtin, TIC54X: TIC54X-Builtins. (line 34) 17840 * $d: ARM Mapping Symbols. (line 15) 17841 * $exp math builtin, TIC54X: TIC54X-Builtins. (line 37) 17842 * $fabs math builtin, TIC54X: TIC54X-Builtins. (line 40) 17843 * $firstch subsym builtin, TIC54X: TIC54X-Macros. (line 26) 17844 * $floor math builtin, TIC54X: TIC54X-Builtins. (line 43) 17845 * $fmod math builtin, TIC54X: TIC54X-Builtins. (line 47) 17846 * $int math builtin, TIC54X: TIC54X-Builtins. (line 50) 17847 * $iscons subsym builtin, TIC54X: TIC54X-Macros. (line 43) 17848 * $isdefed subsym builtin, TIC54X: TIC54X-Macros. (line 34) 17849 * $ismember subsym builtin, TIC54X: TIC54X-Macros. (line 38) 17850 * $isname subsym builtin, TIC54X: TIC54X-Macros. (line 47) 17851 * $isreg subsym builtin, TIC54X: TIC54X-Macros. (line 50) 17852 * $lastch subsym builtin, TIC54X: TIC54X-Macros. (line 30) 17853 * $ldexp math builtin, TIC54X: TIC54X-Builtins. (line 53) 17854 * $log math builtin, TIC54X: TIC54X-Builtins. (line 59) 17855 * $log10 math builtin, TIC54X: TIC54X-Builtins. (line 56) 17856 * $max math builtin, TIC54X: TIC54X-Builtins. (line 62) 17857 * $min math builtin, TIC54X: TIC54X-Builtins. (line 65) 17858 * $pow math builtin, TIC54X: TIC54X-Builtins. (line 68) 17859 * $round math builtin, TIC54X: TIC54X-Builtins. (line 71) 17860 * $sgn math builtin, TIC54X: TIC54X-Builtins. (line 74) 17861 * $sin math builtin, TIC54X: TIC54X-Builtins. (line 77) 17862 * $sinh math builtin, TIC54X: TIC54X-Builtins. (line 80) 17863 * $sqrt math builtin, TIC54X: TIC54X-Builtins. (line 83) 17864 * $structacc subsym builtin, TIC54X: TIC54X-Macros. (line 57) 17865 * $structsz subsym builtin, TIC54X: TIC54X-Macros. (line 54) 17866 * $symcmp subsym builtin, TIC54X: TIC54X-Macros. (line 23) 17867 * $symlen subsym builtin, TIC54X: TIC54X-Macros. (line 20) 17868 * $t: ARM Mapping Symbols. (line 12) 17869 * $tan math builtin, TIC54X: TIC54X-Builtins. (line 86) 17870 * $tanh math builtin, TIC54X: TIC54X-Builtins. (line 89) 17871 * $trunc math builtin, TIC54X: TIC54X-Builtins. (line 92) 17872 * -+ option, VAX/VMS: VAX-Opts. (line 71) 17873 * --: Command Line. (line 10) 17874 * --32 option, i386: i386-Options. (line 8) 17875 * --32 option, x86-64: i386-Options. (line 8) 17876 * --64 option, i386: i386-Options. (line 8) 17877 * --64 option, x86-64: i386-Options. (line 8) 17878 * --absolute-literals: Xtensa Options. (line 23) 17879 * --allow-reg-prefix: SH Options. (line 9) 17880 * --alternate: alternate. (line 6) 17881 * --base-size-default-16: M68K-Opts. (line 71) 17882 * --base-size-default-32: M68K-Opts. (line 71) 17883 * --big: SH Options. (line 9) 17884 * --bitwise-or option, M680x0: M68K-Opts. (line 64) 17885 * --disp-size-default-16: M68K-Opts. (line 80) 17886 * --disp-size-default-32: M68K-Opts. (line 80) 17887 * --divide option, i386: i386-Options. (line 24) 17888 * --dsp: SH Options. (line 9) 17889 * --emulation=crisaout command line option, CRIS: CRIS-Opts. (line 9) 17890 * --emulation=criself command line option, CRIS: CRIS-Opts. (line 9) 17891 * --enforce-aligned-data: Sparc-Aligned-Data. (line 11) 17892 * --fatal-warnings: W. (line 16) 17893 * --fix-v4bx command line option, ARM: ARM Options. (line 126) 17894 * --fixed-special-register-names command line option, MMIX: MMIX-Opts. 17895 (line 8) 17896 * --force-long-branches: M68HC11-Opts. (line 69) 17897 * --generate-example: M68HC11-Opts. (line 86) 17898 * --globalize-symbols command line option, MMIX: MMIX-Opts. (line 12) 17899 * --gnu-syntax command line option, MMIX: MMIX-Opts. (line 16) 17900 * --hash-size=NUMBER: Overview. (line 314) 17901 * --linker-allocated-gregs command line option, MMIX: MMIX-Opts. 17902 (line 67) 17903 * --listing-cont-lines: listing. (line 34) 17904 * --listing-lhs-width: listing. (line 16) 17905 * --listing-lhs-width2: listing. (line 21) 17906 * --listing-rhs-width: listing. (line 28) 17907 * --little: SH Options. (line 9) 17908 * --longcalls: Xtensa Options. (line 37) 17909 * --march=ARCHITECTURE command line option, CRIS: CRIS-Opts. (line 33) 17910 * --MD: MD. (line 6) 17911 * --mul-bug-abort command line option, CRIS: CRIS-Opts. (line 61) 17912 * --no-absolute-literals: Xtensa Options. (line 23) 17913 * --no-expand command line option, MMIX: MMIX-Opts. (line 31) 17914 * --no-longcalls: Xtensa Options. (line 37) 17915 * --no-merge-gregs command line option, MMIX: MMIX-Opts. (line 36) 17916 * --no-mul-bug-abort command line option, CRIS: CRIS-Opts. (line 61) 17917 * --no-predefined-syms command line option, MMIX: MMIX-Opts. (line 22) 17918 * --no-pushj-stubs command line option, MMIX: MMIX-Opts. (line 54) 17919 * --no-stubs command line option, MMIX: MMIX-Opts. (line 54) 17920 * --no-target-align: Xtensa Options. (line 30) 17921 * --no-text-section-literals: Xtensa Options. (line 9) 17922 * --no-transform: Xtensa Options. (line 46) 17923 * --no-underscore command line option, CRIS: CRIS-Opts. (line 15) 17924 * --no-warn: W. (line 11) 17925 * --pcrel: M68K-Opts. (line 92) 17926 * --pic command line option, CRIS: CRIS-Opts. (line 27) 17927 * --print-insn-syntax: M68HC11-Opts. (line 75) 17928 * --print-opcodes: M68HC11-Opts. (line 79) 17929 * --register-prefix-optional option, M680x0: M68K-Opts. (line 51) 17930 * --relax: SH Options. (line 9) 17931 * --relax command line option, MMIX: MMIX-Opts. (line 19) 17932 * --rename-section: Xtensa Options. (line 54) 17933 * --renesas: SH Options. (line 9) 17934 * --short-branches: M68HC11-Opts. (line 54) 17935 * --small: SH Options. (line 9) 17936 * --statistics: statistics. (line 6) 17937 * --strict-direct-mode: M68HC11-Opts. (line 44) 17938 * --target-align: Xtensa Options. (line 30) 17939 * --text-section-literals: Xtensa Options. (line 9) 17940 * --traditional-format: traditional-format. (line 6) 17941 * --transform: Xtensa Options. (line 46) 17942 * --underscore command line option, CRIS: CRIS-Opts. (line 15) 17943 * --warn: W. (line 19) 17944 * -1 option, VAX/VMS: VAX-Opts. (line 77) 17945 * -32addr command line option, Alpha: Alpha Options. (line 50) 17946 * -a: a. (line 6) 17947 * -A options, i960: Options-i960. (line 6) 17948 * -ac: a. (line 6) 17949 * -ad: a. (line 6) 17950 * -ag: a. (line 6) 17951 * -ah: a. (line 6) 17952 * -al: a. (line 6) 17953 * -an: a. (line 6) 17954 * -as: a. (line 6) 17955 * -Asparclet: Sparc-Opts. (line 25) 17956 * -Asparclite: Sparc-Opts. (line 25) 17957 * -Av6: Sparc-Opts. (line 25) 17958 * -Av8: Sparc-Opts. (line 25) 17959 * -Av9: Sparc-Opts. (line 25) 17960 * -Av9a: Sparc-Opts. (line 25) 17961 * -b option, i960: Options-i960. (line 22) 17962 * -big option, M32R: M32R-Opts. (line 35) 17963 * -D: D. (line 6) 17964 * -D, ignored on VAX: VAX-Opts. (line 11) 17965 * -d, VAX option: VAX-Opts. (line 16) 17966 * -eabi= command line option, ARM: ARM Options. (line 109) 17967 * -EB command line option, ARC: ARC Options. (line 31) 17968 * -EB command line option, ARM: ARM Options. (line 114) 17969 * -EB option (MIPS): MIPS Opts. (line 13) 17970 * -EB option, M32R: M32R-Opts. (line 39) 17971 * -EL command line option, ARC: ARC Options. (line 35) 17972 * -EL command line option, ARM: ARM Options. (line 118) 17973 * -EL option (MIPS): MIPS Opts. (line 13) 17974 * -EL option, M32R: M32R-Opts. (line 32) 17975 * -f: f. (line 6) 17976 * -F command line option, Alpha: Alpha Options. (line 50) 17977 * -g command line option, Alpha: Alpha Options. (line 40) 17978 * -G command line option, Alpha: Alpha Options. (line 46) 17979 * -G option (MIPS): MIPS Opts. (line 8) 17980 * -h option, VAX/VMS: VAX-Opts. (line 45) 17981 * -H option, VAX/VMS: VAX-Opts. (line 81) 17982 * -I PATH: I. (line 6) 17983 * -ignore-parallel-conflicts option, M32RX: M32R-Opts. (line 87) 17984 * -Ip option, M32RX: M32R-Opts. (line 97) 17985 * -J, ignored on VAX: VAX-Opts. (line 27) 17986 * -K: K. (line 6) 17987 * -k command line option, ARM: ARM Options. (line 122) 17988 * -KPIC option, M32R: M32R-Opts. (line 42) 17989 * -KPIC option, MIPS: MIPS Opts. (line 21) 17990 * -L: L. (line 6) 17991 * -l option, M680x0: M68K-Opts. (line 39) 17992 * -little option, M32R: M32R-Opts. (line 27) 17993 * -M: M. (line 6) 17994 * -m11/03: PDP-11-Options. (line 140) 17995 * -m11/04: PDP-11-Options. (line 143) 17996 * -m11/05: PDP-11-Options. (line 146) 17997 * -m11/10: PDP-11-Options. (line 146) 17998 * -m11/15: PDP-11-Options. (line 149) 17999 * -m11/20: PDP-11-Options. (line 149) 18000 * -m11/21: PDP-11-Options. (line 152) 18001 * -m11/23: PDP-11-Options. (line 155) 18002 * -m11/24: PDP-11-Options. (line 155) 18003 * -m11/34: PDP-11-Options. (line 158) 18004 * -m11/34a: PDP-11-Options. (line 161) 18005 * -m11/35: PDP-11-Options. (line 164) 18006 * -m11/40: PDP-11-Options. (line 164) 18007 * -m11/44: PDP-11-Options. (line 167) 18008 * -m11/45: PDP-11-Options. (line 170) 18009 * -m11/50: PDP-11-Options. (line 170) 18010 * -m11/53: PDP-11-Options. (line 173) 18011 * -m11/55: PDP-11-Options. (line 170) 18012 * -m11/60: PDP-11-Options. (line 176) 18013 * -m11/70: PDP-11-Options. (line 170) 18014 * -m11/73: PDP-11-Options. (line 173) 18015 * -m11/83: PDP-11-Options. (line 173) 18016 * -m11/84: PDP-11-Options. (line 173) 18017 * -m11/93: PDP-11-Options. (line 173) 18018 * -m11/94: PDP-11-Options. (line 173) 18019 * -m16c option, M16C: M32C-Opts. (line 12) 18020 * -m32c option, M32C: M32C-Opts. (line 9) 18021 * -m32r option, M32R: M32R-Opts. (line 21) 18022 * -m32rx option, M32R2: M32R-Opts. (line 17) 18023 * -m32rx option, M32RX: M32R-Opts. (line 9) 18024 * -m68000 and related options: M68K-Opts. (line 104) 18025 * -m68hc11: M68HC11-Opts. (line 9) 18026 * -m68hc12: M68HC11-Opts. (line 14) 18027 * -m68hcs12: M68HC11-Opts. (line 21) 18028 * -m[no-]68851 command line option, M680x0: M68K-Opts. (line 21) 18029 * -m[no-]68881 command line option, M680x0: M68K-Opts. (line 21) 18030 * -m[no-]div command line option, M680x0: M68K-Opts. (line 21) 18031 * -m[no-]emac command line option, M680x0: M68K-Opts. (line 21) 18032 * -m[no-]float command line option, M680x0: M68K-Opts. (line 21) 18033 * -m[no-]mac command line option, M680x0: M68K-Opts. (line 21) 18034 * -m[no-]usp command line option, M680x0: M68K-Opts. (line 21) 18035 * -mall: PDP-11-Options. (line 26) 18036 * -mall-extensions: PDP-11-Options. (line 26) 18037 * -mall-opcodes command line option, AVR: AVR Options. (line 56) 18038 * -mapcs command line option, ARM: ARM Options. (line 82) 18039 * -mapcs-float command line option, ARM: ARM Options. (line 95) 18040 * -mapcs-reentrant command line option, ARM: ARM Options. (line 100) 18041 * -marc[5|6|7|8] command line option, ARC: ARC Options. (line 6) 18042 * -march= command line option, ARM: ARM Options. (line 39) 18043 * -march= command line option, M680x0: M68K-Opts. (line 8) 18044 * -march= option, i386: i386-Options. (line 31) 18045 * -march= option, x86-64: i386-Options. (line 31) 18046 * -matpcs command line option, ARM: ARM Options. (line 87) 18047 * -mcis: PDP-11-Options. (line 32) 18048 * -mconstant-gp command line option, IA-64: IA-64 Options. (line 6) 18049 * -mCPU command line option, Alpha: Alpha Options. (line 6) 18050 * -mcpu option, cpu: TIC54X-Opts. (line 15) 18051 * -mcpu= command line option, ARM: ARM Options. (line 6) 18052 * -mcpu= command line option, M680x0: M68K-Opts. (line 14) 18053 * -mcsm: PDP-11-Options. (line 43) 18054 * -mdebug command line option, Alpha: Alpha Options. (line 25) 18055 * -me option, stderr redirect: TIC54X-Opts. (line 20) 18056 * -meis: PDP-11-Options. (line 46) 18057 * -merrors-to-file option, stderr redirect: TIC54X-Opts. (line 20) 18058 * -mf option, far-mode: TIC54X-Opts. (line 8) 18059 * -mf11: PDP-11-Options. (line 122) 18060 * -mfar-mode option, far-mode: TIC54X-Opts. (line 8) 18061 * -mfis: PDP-11-Options. (line 51) 18062 * -mfloat-abi= command line option, ARM: ARM Options. (line 104) 18063 * -mfp-11: PDP-11-Options. (line 56) 18064 * -mfpp: PDP-11-Options. (line 56) 18065 * -mfpu: PDP-11-Options. (line 56) 18066 * -mfpu= command line option, ARM: ARM Options. (line 54) 18067 * -mip2022 option, IP2K: IP2K-Opts. (line 14) 18068 * -mip2022ext option, IP2022: IP2K-Opts. (line 9) 18069 * -mj11: PDP-11-Options. (line 126) 18070 * -mka11: PDP-11-Options. (line 92) 18071 * -mkb11: PDP-11-Options. (line 95) 18072 * -mkd11a: PDP-11-Options. (line 98) 18073 * -mkd11b: PDP-11-Options. (line 101) 18074 * -mkd11d: PDP-11-Options. (line 104) 18075 * -mkd11e: PDP-11-Options. (line 107) 18076 * -mkd11f: PDP-11-Options. (line 110) 18077 * -mkd11h: PDP-11-Options. (line 110) 18078 * -mkd11k: PDP-11-Options. (line 114) 18079 * -mkd11q: PDP-11-Options. (line 110) 18080 * -mkd11z: PDP-11-Options. (line 118) 18081 * -mkev11: PDP-11-Options. (line 51) 18082 * -mlimited-eis: PDP-11-Options. (line 64) 18083 * -mlong: M68HC11-Opts. (line 32) 18084 * -mlong-double: M68HC11-Opts. (line 40) 18085 * -mmcu= command line option, AVR: AVR Options. (line 6) 18086 * -mmfpt: PDP-11-Options. (line 70) 18087 * -mmicrocode: PDP-11-Options. (line 83) 18088 * -mmnemonic= option, i386: i386-Options. (line 76) 18089 * -mmnemonic= option, x86-64: i386-Options. (line 76) 18090 * -mmutiproc: PDP-11-Options. (line 73) 18091 * -mmxps: PDP-11-Options. (line 77) 18092 * -mnaked-reg option, i386: i386-Options. (line 90) 18093 * -mnaked-reg option, x86-64: i386-Options. (line 90) 18094 * -mno-cis: PDP-11-Options. (line 32) 18095 * -mno-csm: PDP-11-Options. (line 43) 18096 * -mno-eis: PDP-11-Options. (line 46) 18097 * -mno-extensions: PDP-11-Options. (line 29) 18098 * -mno-fis: PDP-11-Options. (line 51) 18099 * -mno-fp-11: PDP-11-Options. (line 56) 18100 * -mno-fpp: PDP-11-Options. (line 56) 18101 * -mno-fpu: PDP-11-Options. (line 56) 18102 * -mno-kev11: PDP-11-Options. (line 51) 18103 * -mno-limited-eis: PDP-11-Options. (line 64) 18104 * -mno-mfpt: PDP-11-Options. (line 70) 18105 * -mno-microcode: PDP-11-Options. (line 83) 18106 * -mno-mutiproc: PDP-11-Options. (line 73) 18107 * -mno-mxps: PDP-11-Options. (line 77) 18108 * -mno-pic: PDP-11-Options. (line 11) 18109 * -mno-skip-bug command line option, AVR: AVR Options. (line 59) 18110 * -mno-spl: PDP-11-Options. (line 80) 18111 * -mno-sym32: MIPS Opts. (line 184) 18112 * -mno-wrap command line option, AVR: AVR Options. (line 62) 18113 * -mpic: PDP-11-Options. (line 11) 18114 * -mrelax command line option, V850: V850 Options. (line 51) 18115 * -mshort: M68HC11-Opts. (line 27) 18116 * -mshort-double: M68HC11-Opts. (line 36) 18117 * -mspl: PDP-11-Options. (line 80) 18118 * -msse-check= option, i386: i386-Options. (line 64) 18119 * -msse-check= option, x86-64: i386-Options. (line 64) 18120 * -msse2avx option, i386: i386-Options. (line 60) 18121 * -msse2avx option, x86-64: i386-Options. (line 60) 18122 * -msym32: MIPS Opts. (line 184) 18123 * -msyntax= option, i386: i386-Options. (line 83) 18124 * -msyntax= option, x86-64: i386-Options. (line 83) 18125 * -mt11: PDP-11-Options. (line 130) 18126 * -mthumb command line option, ARM: ARM Options. (line 73) 18127 * -mthumb-interwork command line option, ARM: ARM Options. (line 78) 18128 * -mtune= option, i386: i386-Options. (line 52) 18129 * -mtune= option, x86-64: i386-Options. (line 52) 18130 * -mv850 command line option, V850: V850 Options. (line 23) 18131 * -mv850any command line option, V850: V850 Options. (line 41) 18132 * -mv850e command line option, V850: V850 Options. (line 29) 18133 * -mv850e1 command line option, V850: V850 Options. (line 35) 18134 * -mvxworks-pic option, MIPS: MIPS Opts. (line 26) 18135 * -N command line option, CRIS: CRIS-Opts. (line 57) 18136 * -nIp option, M32RX: M32R-Opts. (line 101) 18137 * -no-bitinst, M32R2: M32R-Opts. (line 54) 18138 * -no-ignore-parallel-conflicts option, M32RX: M32R-Opts. (line 93) 18139 * -no-mdebug command line option, Alpha: Alpha Options. (line 25) 18140 * -no-parallel option, M32RX: M32R-Opts. (line 51) 18141 * -no-relax option, i960: Options-i960. (line 66) 18142 * -no-warn-explicit-parallel-conflicts option, M32RX: M32R-Opts. 18143 (line 79) 18144 * -no-warn-unmatched-high option, M32R: M32R-Opts. (line 111) 18145 * -nocpp ignored (MIPS): MIPS Opts. (line 187) 18146 * -o: o. (line 6) 18147 * -O option, M32RX: M32R-Opts. (line 59) 18148 * -parallel option, M32RX: M32R-Opts. (line 46) 18149 * -R: R. (line 6) 18150 * -r800 command line option, Z80: Z80 Options. (line 41) 18151 * -relax command line option, Alpha: Alpha Options. (line 32) 18152 * -S, ignored on VAX: VAX-Opts. (line 11) 18153 * -t, ignored on VAX: VAX-Opts. (line 36) 18154 * -T, ignored on VAX: VAX-Opts. (line 11) 18155 * -v: v. (line 6) 18156 * -V, redundant on VAX: VAX-Opts. (line 22) 18157 * -version: v. (line 6) 18158 * -W: W. (line 11) 18159 * -warn-explicit-parallel-conflicts option, M32RX: M32R-Opts. (line 65) 18160 * -warn-unmatched-high option, M32R: M32R-Opts. (line 105) 18161 * -Wnp option, M32RX: M32R-Opts. (line 83) 18162 * -Wnuh option, M32RX: M32R-Opts. (line 117) 18163 * -Wp option, M32RX: M32R-Opts. (line 75) 18164 * -wsigned_overflow command line option, V850: V850 Options. (line 9) 18165 * -Wuh option, M32RX: M32R-Opts. (line 114) 18166 * -wunsigned_overflow command line option, V850: V850 Options. 18167 (line 16) 18168 * -x command line option, MMIX: MMIX-Opts. (line 44) 18169 * -z80 command line option, Z80: Z80 Options. (line 8) 18170 * -z8001 command line option, Z8000: Z8000 Options. (line 6) 18171 * -z8002 command line option, Z8000: Z8000 Options. (line 9) 18172 * . (symbol): Dot. (line 6) 18173 * .arch directive, ARM: ARM Directives. (line 210) 18174 * .big directive, M32RX: M32R-Directives. (line 88) 18175 * .cantunwind directive, ARM: ARM Directives. (line 114) 18176 * .cpu directive, ARM: ARM Directives. (line 206) 18177 * .eabi_attribute directive, ARM: ARM Directives. (line 224) 18178 * .fnend directive, ARM: ARM Directives. (line 105) 18179 * .fnstart directive, ARM: ARM Directives. (line 102) 18180 * .fpu directive, ARM: ARM Directives. (line 220) 18181 * .handlerdata directive, ARM: ARM Directives. (line 125) 18182 * .insn: MIPS insn. (line 6) 18183 * .little directive, M32RX: M32R-Directives. (line 82) 18184 * .ltorg directive, ARM: ARM Directives. (line 85) 18185 * .m32r directive, M32R: M32R-Directives. (line 66) 18186 * .m32r2 directive, M32R2: M32R-Directives. (line 77) 18187 * .m32rx directive, M32RX: M32R-Directives. (line 72) 18188 * .movsp directive, ARM: ARM Directives. (line 180) 18189 * .o: Object. (line 6) 18190 * .object_arch directive, ARM: ARM Directives. (line 214) 18191 * .pad directive, ARM: ARM Directives. (line 175) 18192 * .param on HPPA: HPPA Directives. (line 19) 18193 * .personality directive, ARM: ARM Directives. (line 118) 18194 * .personalityindex directive, ARM: ARM Directives. (line 121) 18195 * .pool directive, ARM: ARM Directives. (line 99) 18196 * .save directive, ARM: ARM Directives. (line 134) 18197 * .set arch=CPU: MIPS ISA. (line 18) 18198 * .set autoextend: MIPS autoextend. (line 6) 18199 * .set dsp: MIPS ASE instruction generation overrides. 18200 (line 21) 18201 * .set dspr2: MIPS ASE instruction generation overrides. 18202 (line 26) 18203 * .set hardfloat: MIPS floating-point. (line 12) 18204 * .set mdmx: MIPS ASE instruction generation overrides. 18205 (line 16) 18206 * .set mips3d: MIPS ASE instruction generation overrides. 18207 (line 6) 18208 * .set mipsN: MIPS ISA. (line 6) 18209 * .set mt: MIPS ASE instruction generation overrides. 18210 (line 32) 18211 * .set noautoextend: MIPS autoextend. (line 6) 18212 * .set nodsp: MIPS ASE instruction generation overrides. 18213 (line 21) 18214 * .set nodspr2: MIPS ASE instruction generation overrides. 18215 (line 26) 18216 * .set nomdmx: MIPS ASE instruction generation overrides. 18217 (line 16) 18218 * .set nomips3d: MIPS ASE instruction generation overrides. 18219 (line 6) 18220 * .set nomt: MIPS ASE instruction generation overrides. 18221 (line 32) 18222 * .set nosmartmips: MIPS ASE instruction generation overrides. 18223 (line 11) 18224 * .set nosym32: MIPS symbol sizes. (line 6) 18225 * .set pop: MIPS option stack. (line 6) 18226 * .set push: MIPS option stack. (line 6) 18227 * .set smartmips: MIPS ASE instruction generation overrides. 18228 (line 11) 18229 * .set softfloat: MIPS floating-point. (line 12) 18230 * .set sym32: MIPS symbol sizes. (line 6) 18231 * .setfp directive, ARM: ARM Directives. (line 185) 18232 * .unwind_raw directive, ARM: ARM Directives. (line 199) 18233 * .v850 directive, V850: V850 Directives. (line 14) 18234 * .v850e directive, V850: V850 Directives. (line 20) 18235 * .v850e1 directive, V850: V850 Directives. (line 26) 18236 * .vsave directive, ARM: ARM Directives. (line 158) 18237 * .z8001: Z8000 Directives. (line 11) 18238 * .z8002: Z8000 Directives. (line 15) 18239 * 16-bit code, i386: i386-16bit. (line 6) 18240 * 2byte directive, ARC: ARC Directives. (line 9) 18241 * 3byte directive, ARC: ARC Directives. (line 12) 18242 * 3DNow!, i386: i386-SIMD. (line 6) 18243 * 3DNow!, x86-64: i386-SIMD. (line 6) 18244 * 430 support: MSP430-Dependent. (line 6) 18245 * 4byte directive, ARC: ARC Directives. (line 15) 18246 * : (label): Statements. (line 30) 18247 * @word modifier, D10V: D10V-Word. (line 6) 18248 * \" (doublequote character): Strings. (line 43) 18249 * \\ (\ character): Strings. (line 40) 18250 * \b (backspace character): Strings. (line 15) 18251 * \DDD (octal character code): Strings. (line 30) 18252 * \f (formfeed character): Strings. (line 18) 18253 * \n (newline character): Strings. (line 21) 18254 * \r (carriage return character): Strings. (line 24) 18255 * \t (tab): Strings. (line 27) 18256 * \XD... (hex character code): Strings. (line 36) 18257 * _ opcode prefix: Xtensa Opcodes. (line 9) 18258 * a.out: Object. (line 6) 18259 * a.out symbol attributes: a.out Symbols. (line 6) 18260 * A_DIR environment variable, TIC54X: TIC54X-Env. (line 6) 18261 * ABI options, SH64: SH64 Options. (line 29) 18262 * abort directive: Abort. (line 6) 18263 * ABORT directive: ABORT (COFF). (line 6) 18264 * absolute section: Ld Sections. (line 29) 18265 * absolute-literals directive: Absolute Literals Directive. 18266 (line 6) 18267 * ADDI instructions, relaxation: Xtensa Immediate Relaxation. 18268 (line 43) 18269 * addition, permitted arguments: Infix Ops. (line 44) 18270 * addresses: Expressions. (line 6) 18271 * addresses, format of: Secs Background. (line 68) 18272 * addressing modes, D10V: D10V-Addressing. (line 6) 18273 * addressing modes, D30V: D30V-Addressing. (line 6) 18274 * addressing modes, H8/300: H8/300-Addressing. (line 6) 18275 * addressing modes, M680x0: M68K-Syntax. (line 21) 18276 * addressing modes, M68HC11: M68HC11-Syntax. (line 17) 18277 * addressing modes, SH: SH-Addressing. (line 6) 18278 * addressing modes, SH64: SH64-Addressing. (line 6) 18279 * addressing modes, Z8000: Z8000-Addressing. (line 6) 18280 * ADR reg,<label> pseudo op, ARM: ARM Opcodes. (line 25) 18281 * ADRL reg,<label> pseudo op, ARM: ARM Opcodes. (line 35) 18282 * advancing location counter: Org. (line 6) 18283 * align directive: Align. (line 6) 18284 * align directive, ARM: ARM Directives. (line 6) 18285 * align directive, SPARC: Sparc-Directives. (line 9) 18286 * align directive, TIC54X: TIC54X-Directives. (line 6) 18287 * alignment of branch targets: Xtensa Automatic Alignment. 18288 (line 6) 18289 * alignment of LOOP instructions: Xtensa Automatic Alignment. 18290 (line 6) 18291 * Alpha floating point (IEEE): Alpha Floating Point. 18292 (line 6) 18293 * Alpha line comment character: Alpha-Chars. (line 6) 18294 * Alpha line separator: Alpha-Chars. (line 8) 18295 * Alpha notes: Alpha Notes. (line 6) 18296 * Alpha options: Alpha Options. (line 6) 18297 * Alpha registers: Alpha-Regs. (line 6) 18298 * Alpha relocations: Alpha-Relocs. (line 6) 18299 * Alpha support: Alpha-Dependent. (line 6) 18300 * Alpha Syntax: Alpha Options. (line 54) 18301 * Alpha-only directives: Alpha Directives. (line 10) 18302 * altered difference tables: Word. (line 12) 18303 * alternate syntax for the 680x0: M68K-Moto-Syntax. (line 6) 18304 * ARC floating point (IEEE): ARC Floating Point. (line 6) 18305 * ARC machine directives: ARC Directives. (line 6) 18306 * ARC opcodes: ARC Opcodes. (line 6) 18307 * ARC options (none): ARC Options. (line 6) 18308 * ARC register names: ARC-Regs. (line 6) 18309 * ARC special characters: ARC-Chars. (line 6) 18310 * ARC support: ARC-Dependent. (line 6) 18311 * arc5 arc5, ARC: ARC Options. (line 10) 18312 * arc6 arc6, ARC: ARC Options. (line 13) 18313 * arc7 arc7, ARC: ARC Options. (line 21) 18314 * arc8 arc8, ARC: ARC Options. (line 24) 18315 * arch directive, i386: i386-Arch. (line 6) 18316 * arch directive, M680x0: M68K-Directives. (line 22) 18317 * arch directive, x86-64: i386-Arch. (line 6) 18318 * architecture options, i960: Options-i960. (line 6) 18319 * architecture options, IP2022: IP2K-Opts. (line 9) 18320 * architecture options, IP2K: IP2K-Opts. (line 14) 18321 * architecture options, M16C: M32C-Opts. (line 12) 18322 * architecture options, M32C: M32C-Opts. (line 9) 18323 * architecture options, M32R: M32R-Opts. (line 21) 18324 * architecture options, M32R2: M32R-Opts. (line 17) 18325 * architecture options, M32RX: M32R-Opts. (line 9) 18326 * architecture options, M680x0: M68K-Opts. (line 104) 18327 * Architecture variant option, CRIS: CRIS-Opts. (line 33) 18328 * architectures, PowerPC: PowerPC-Opts. (line 6) 18329 * architectures, SPARC: Sparc-Opts. (line 6) 18330 * arguments for addition: Infix Ops. (line 44) 18331 * arguments for subtraction: Infix Ops. (line 49) 18332 * arguments in expressions: Arguments. (line 6) 18333 * arithmetic functions: Operators. (line 6) 18334 * arithmetic operands: Arguments. (line 6) 18335 * ARM data relocations: ARM-Relocations. (line 6) 18336 * arm directive, ARM: ARM Directives. (line 60) 18337 * ARM floating point (IEEE): ARM Floating Point. (line 6) 18338 * ARM identifiers: ARM-Chars. (line 15) 18339 * ARM immediate character: ARM-Chars. (line 13) 18340 * ARM line comment character: ARM-Chars. (line 6) 18341 * ARM line separator: ARM-Chars. (line 10) 18342 * ARM machine directives: ARM Directives. (line 6) 18343 * ARM opcodes: ARM Opcodes. (line 6) 18344 * ARM options (none): ARM Options. (line 6) 18345 * ARM register names: ARM-Regs. (line 6) 18346 * ARM support: ARM-Dependent. (line 6) 18347 * ascii directive: Ascii. (line 6) 18348 * asciz directive: Asciz. (line 6) 18349 * asg directive, TIC54X: TIC54X-Directives. (line 20) 18350 * assembler bugs, reporting: Bug Reporting. (line 6) 18351 * assembler crash: Bug Criteria. (line 9) 18352 * assembler directive .arch, CRIS: CRIS-Pseudos. (line 45) 18353 * assembler directive .dword, CRIS: CRIS-Pseudos. (line 12) 18354 * assembler directive .far, M68HC11: M68HC11-Directives. (line 20) 18355 * assembler directive .interrupt, M68HC11: M68HC11-Directives. 18356 (line 26) 18357 * assembler directive .mode, M68HC11: M68HC11-Directives. (line 16) 18358 * assembler directive .relax, M68HC11: M68HC11-Directives. (line 10) 18359 * assembler directive .syntax, CRIS: CRIS-Pseudos. (line 17) 18360 * assembler directive .xrefb, M68HC11: M68HC11-Directives. (line 31) 18361 * assembler directive BSPEC, MMIX: MMIX-Pseudos. (line 131) 18362 * assembler directive BYTE, MMIX: MMIX-Pseudos. (line 97) 18363 * assembler directive ESPEC, MMIX: MMIX-Pseudos. (line 131) 18364 * assembler directive GREG, MMIX: MMIX-Pseudos. (line 50) 18365 * assembler directive IS, MMIX: MMIX-Pseudos. (line 42) 18366 * assembler directive LOC, MMIX: MMIX-Pseudos. (line 7) 18367 * assembler directive LOCAL, MMIX: MMIX-Pseudos. (line 28) 18368 * assembler directive OCTA, MMIX: MMIX-Pseudos. (line 108) 18369 * assembler directive PREFIX, MMIX: MMIX-Pseudos. (line 120) 18370 * assembler directive TETRA, MMIX: MMIX-Pseudos. (line 108) 18371 * assembler directive WYDE, MMIX: MMIX-Pseudos. (line 108) 18372 * assembler directives, CRIS: CRIS-Pseudos. (line 6) 18373 * assembler directives, M68HC11: M68HC11-Directives. (line 6) 18374 * assembler directives, M68HC12: M68HC11-Directives. (line 6) 18375 * assembler directives, MMIX: MMIX-Pseudos. (line 6) 18376 * assembler internal logic error: As Sections. (line 13) 18377 * assembler version: v. (line 6) 18378 * assembler, and linker: Secs Background. (line 10) 18379 * assembly listings, enabling: a. (line 6) 18380 * assigning values to symbols <1>: Equ. (line 6) 18381 * assigning values to symbols: Setting Symbols. (line 6) 18382 * atmp directive, i860: Directives-i860. (line 16) 18383 * att_syntax pseudo op, i386: i386-Syntax. (line 6) 18384 * att_syntax pseudo op, x86-64: i386-Syntax. (line 6) 18385 * attributes, symbol: Symbol Attributes. (line 6) 18386 * auxiliary attributes, COFF symbols: COFF Symbols. (line 19) 18387 * auxiliary symbol information, COFF: Dim. (line 6) 18388 * Av7: Sparc-Opts. (line 25) 18389 * AVR line comment character: AVR-Chars. (line 6) 18390 * AVR line separator: AVR-Chars. (line 10) 18391 * AVR modifiers: AVR-Modifiers. (line 6) 18392 * AVR opcode summary: AVR Opcodes. (line 6) 18393 * AVR options (none): AVR Options. (line 6) 18394 * AVR register names: AVR-Regs. (line 6) 18395 * AVR support: AVR-Dependent. (line 6) 18396 * backslash (\\): Strings. (line 40) 18397 * backspace (\b): Strings. (line 15) 18398 * balign directive: Balign. (line 6) 18399 * balignl directive: Balign. (line 27) 18400 * balignw directive: Balign. (line 27) 18401 * bes directive, TIC54X: TIC54X-Directives. (line 197) 18402 * BFIN directives: BFIN Directives. (line 6) 18403 * BFIN syntax: BFIN Syntax. (line 6) 18404 * big endian output, MIPS: Overview. (line 629) 18405 * big endian output, PJ: Overview. (line 536) 18406 * big-endian output, MIPS: MIPS Opts. (line 13) 18407 * bignums: Bignums. (line 6) 18408 * binary constants, TIC54X: TIC54X-Constants. (line 8) 18409 * binary files, including: Incbin. (line 6) 18410 * binary integers: Integers. (line 6) 18411 * bit names, IA-64: IA-64-Bits. (line 6) 18412 * bitfields, not supported on VAX: VAX-no. (line 6) 18413 * Blackfin support: BFIN-Dependent. (line 6) 18414 * block: Z8000 Directives. (line 55) 18415 * branch improvement, M680x0: M68K-Branch. (line 6) 18416 * branch improvement, M68HC11: M68HC11-Branch. (line 6) 18417 * branch improvement, VAX: VAX-branch. (line 6) 18418 * branch instructions, relaxation: Xtensa Branch Relaxation. 18419 (line 6) 18420 * branch recording, i960: Options-i960. (line 22) 18421 * branch statistics table, i960: Options-i960. (line 40) 18422 * branch target alignment: Xtensa Automatic Alignment. 18423 (line 6) 18424 * break directive, TIC54X: TIC54X-Directives. (line 143) 18425 * BSD syntax: PDP-11-Syntax. (line 6) 18426 * bss directive, i960: Directives-i960. (line 6) 18427 * bss directive, TIC54X: TIC54X-Directives. (line 29) 18428 * bss section <1>: Ld Sections. (line 20) 18429 * bss section: bss. (line 6) 18430 * bug criteria: Bug Criteria. (line 6) 18431 * bug reports: Bug Reporting. (line 6) 18432 * bugs in assembler: Reporting Bugs. (line 6) 18433 * Built-in symbols, CRIS: CRIS-Symbols. (line 6) 18434 * builtin math functions, TIC54X: TIC54X-Builtins. (line 6) 18435 * builtin subsym functions, TIC54X: TIC54X-Macros. (line 16) 18436 * bus lock prefixes, i386: i386-Prefixes. (line 36) 18437 * bval: Z8000 Directives. (line 30) 18438 * byte directive: Byte. (line 6) 18439 * byte directive, TIC54X: TIC54X-Directives. (line 36) 18440 * C54XDSP_DIR environment variable, TIC54X: TIC54X-Env. (line 6) 18441 * c_mode directive, TIC54X: TIC54X-Directives. (line 51) 18442 * call instructions, i386: i386-Mnemonics. (line 51) 18443 * call instructions, relaxation: Xtensa Call Relaxation. 18444 (line 6) 18445 * call instructions, x86-64: i386-Mnemonics. (line 51) 18446 * callj, i960 pseudo-opcode: callj-i960. (line 6) 18447 * carriage return (\r): Strings. (line 24) 18448 * case sensitivity, Z80: Z80-Case. (line 6) 18449 * cfi_endproc directive: CFI directives. (line 16) 18450 * cfi_startproc directive: CFI directives. (line 6) 18451 * char directive, TIC54X: TIC54X-Directives. (line 36) 18452 * character constant, Z80: Z80-Chars. (line 13) 18453 * character constants: Characters. (line 6) 18454 * character escape codes: Strings. (line 15) 18455 * character escapes, Z80: Z80-Chars. (line 11) 18456 * character, single: Chars. (line 6) 18457 * characters used in symbols: Symbol Intro. (line 6) 18458 * clink directive, TIC54X: TIC54X-Directives. (line 45) 18459 * code directive, ARM: ARM Directives. (line 53) 18460 * code16 directive, i386: i386-16bit. (line 6) 18461 * code16gcc directive, i386: i386-16bit. (line 6) 18462 * code32 directive, i386: i386-16bit. (line 6) 18463 * code64 directive, i386: i386-16bit. (line 6) 18464 * code64 directive, x86-64: i386-16bit. (line 6) 18465 * COFF auxiliary symbol information: Dim. (line 6) 18466 * COFF structure debugging: Tag. (line 6) 18467 * COFF symbol attributes: COFF Symbols. (line 6) 18468 * COFF symbol descriptor: Desc. (line 6) 18469 * COFF symbol storage class: Scl. (line 6) 18470 * COFF symbol type: Type. (line 11) 18471 * COFF symbols, debugging: Def. (line 6) 18472 * COFF value attribute: Val. (line 6) 18473 * COMDAT: Linkonce. (line 6) 18474 * comm directive: Comm. (line 6) 18475 * command line conventions: Command Line. (line 6) 18476 * command line options, V850: V850 Options. (line 9) 18477 * command-line options ignored, VAX: VAX-Opts. (line 6) 18478 * comments: Comments. (line 6) 18479 * comments, M680x0: M68K-Chars. (line 6) 18480 * comments, removed by preprocessor: Preprocessing. (line 11) 18481 * common directive, SPARC: Sparc-Directives. (line 12) 18482 * common sections: Linkonce. (line 6) 18483 * common variable storage: bss. (line 6) 18484 * compare and jump expansions, i960: Compare-and-branch-i960. 18485 (line 13) 18486 * compare/branch instructions, i960: Compare-and-branch-i960. 18487 (line 6) 18488 * comparison expressions: Infix Ops. (line 55) 18489 * conditional assembly: If. (line 6) 18490 * constant, single character: Chars. (line 6) 18491 * constants: Constants. (line 6) 18492 * constants, bignum: Bignums. (line 6) 18493 * constants, character: Characters. (line 6) 18494 * constants, converted by preprocessor: Preprocessing. (line 14) 18495 * constants, floating point: Flonums. (line 6) 18496 * constants, integer: Integers. (line 6) 18497 * constants, number: Numbers. (line 6) 18498 * constants, Sparc: Sparc-Constants. (line 6) 18499 * constants, string: Strings. (line 6) 18500 * constants, TIC54X: TIC54X-Constants. (line 6) 18501 * conversion instructions, i386: i386-Mnemonics. (line 32) 18502 * conversion instructions, x86-64: i386-Mnemonics. (line 32) 18503 * coprocessor wait, i386: i386-Prefixes. (line 40) 18504 * copy directive, TIC54X: TIC54X-Directives. (line 54) 18505 * cpu directive, M680x0: M68K-Directives. (line 30) 18506 * CR16 Operand Qualifiers: CR16 Operand Qualifiers. 18507 (line 6) 18508 * CR16 support: CR16-Dependent. (line 6) 18509 * crash of assembler: Bug Criteria. (line 9) 18510 * CRIS --emulation=crisaout command line option: CRIS-Opts. (line 9) 18511 * CRIS --emulation=criself command line option: CRIS-Opts. (line 9) 18512 * CRIS --march=ARCHITECTURE command line option: CRIS-Opts. (line 33) 18513 * CRIS --mul-bug-abort command line option: CRIS-Opts. (line 61) 18514 * CRIS --no-mul-bug-abort command line option: CRIS-Opts. (line 61) 18515 * CRIS --no-underscore command line option: CRIS-Opts. (line 15) 18516 * CRIS --pic command line option: CRIS-Opts. (line 27) 18517 * CRIS --underscore command line option: CRIS-Opts. (line 15) 18518 * CRIS -N command line option: CRIS-Opts. (line 57) 18519 * CRIS architecture variant option: CRIS-Opts. (line 33) 18520 * CRIS assembler directive .arch: CRIS-Pseudos. (line 45) 18521 * CRIS assembler directive .dword: CRIS-Pseudos. (line 12) 18522 * CRIS assembler directive .syntax: CRIS-Pseudos. (line 17) 18523 * CRIS assembler directives: CRIS-Pseudos. (line 6) 18524 * CRIS built-in symbols: CRIS-Symbols. (line 6) 18525 * CRIS instruction expansion: CRIS-Expand. (line 6) 18526 * CRIS line comment characters: CRIS-Chars. (line 6) 18527 * CRIS options: CRIS-Opts. (line 6) 18528 * CRIS position-independent code: CRIS-Opts. (line 27) 18529 * CRIS pseudo-op .arch: CRIS-Pseudos. (line 45) 18530 * CRIS pseudo-op .dword: CRIS-Pseudos. (line 12) 18531 * CRIS pseudo-op .syntax: CRIS-Pseudos. (line 17) 18532 * CRIS pseudo-ops: CRIS-Pseudos. (line 6) 18533 * CRIS register names: CRIS-Regs. (line 6) 18534 * CRIS support: CRIS-Dependent. (line 6) 18535 * CRIS symbols in position-independent code: CRIS-Pic. (line 6) 18536 * ctbp register, V850: V850-Regs. (line 131) 18537 * ctoff pseudo-op, V850: V850 Opcodes. (line 111) 18538 * ctpc register, V850: V850-Regs. (line 119) 18539 * ctpsw register, V850: V850-Regs. (line 122) 18540 * current address: Dot. (line 6) 18541 * current address, advancing: Org. (line 6) 18542 * D10V @word modifier: D10V-Word. (line 6) 18543 * D10V addressing modes: D10V-Addressing. (line 6) 18544 * D10V floating point: D10V-Float. (line 6) 18545 * D10V line comment character: D10V-Chars. (line 6) 18546 * D10V opcode summary: D10V-Opcodes. (line 6) 18547 * D10V optimization: Overview. (line 408) 18548 * D10V options: D10V-Opts. (line 6) 18549 * D10V registers: D10V-Regs. (line 6) 18550 * D10V size modifiers: D10V-Size. (line 6) 18551 * D10V sub-instruction ordering: D10V-Chars. (line 6) 18552 * D10V sub-instructions: D10V-Subs. (line 6) 18553 * D10V support: D10V-Dependent. (line 6) 18554 * D10V syntax: D10V-Syntax. (line 6) 18555 * D30V addressing modes: D30V-Addressing. (line 6) 18556 * D30V floating point: D30V-Float. (line 6) 18557 * D30V Guarded Execution: D30V-Guarded. (line 6) 18558 * D30V line comment character: D30V-Chars. (line 6) 18559 * D30V nops: Overview. (line 416) 18560 * D30V nops after 32-bit multiply: Overview. (line 419) 18561 * D30V opcode summary: D30V-Opcodes. (line 6) 18562 * D30V optimization: Overview. (line 413) 18563 * D30V options: D30V-Opts. (line 6) 18564 * D30V registers: D30V-Regs. (line 6) 18565 * D30V size modifiers: D30V-Size. (line 6) 18566 * D30V sub-instruction ordering: D30V-Chars. (line 6) 18567 * D30V sub-instructions: D30V-Subs. (line 6) 18568 * D30V support: D30V-Dependent. (line 6) 18569 * D30V syntax: D30V-Syntax. (line 6) 18570 * data alignment on SPARC: Sparc-Aligned-Data. (line 6) 18571 * data and text sections, joining: R. (line 6) 18572 * data directive: Data. (line 6) 18573 * data directive, TIC54X: TIC54X-Directives. (line 61) 18574 * data relocations, ARM: ARM-Relocations. (line 6) 18575 * data section: Ld Sections. (line 9) 18576 * data1 directive, M680x0: M68K-Directives. (line 9) 18577 * data2 directive, M680x0: M68K-Directives. (line 12) 18578 * datalabel, SH64: SH64-Addressing. (line 16) 18579 * dbpc register, V850: V850-Regs. (line 125) 18580 * dbpsw register, V850: V850-Regs. (line 128) 18581 * debuggers, and symbol order: Symbols. (line 10) 18582 * debugging COFF symbols: Def. (line 6) 18583 * DEC syntax: PDP-11-Syntax. (line 6) 18584 * decimal integers: Integers. (line 12) 18585 * def directive: Def. (line 6) 18586 * def directive, TIC54X: TIC54X-Directives. (line 103) 18587 * density instructions: Density Instructions. 18588 (line 6) 18589 * dependency tracking: MD. (line 6) 18590 * deprecated directives: Deprecated. (line 6) 18591 * desc directive: Desc. (line 6) 18592 * descriptor, of a.out symbol: Symbol Desc. (line 6) 18593 * dfloat directive, VAX: VAX-directives. (line 10) 18594 * difference tables altered: Word. (line 12) 18595 * difference tables, warning: K. (line 6) 18596 * differences, mmixal: MMIX-mmixal. (line 6) 18597 * dim directive: Dim. (line 6) 18598 * directives and instructions: Statements. (line 19) 18599 * directives for PowerPC: PowerPC-Pseudo. (line 6) 18600 * directives, BFIN: BFIN Directives. (line 6) 18601 * directives, M32R: M32R-Directives. (line 6) 18602 * directives, M680x0: M68K-Directives. (line 6) 18603 * directives, machine independent: Pseudo Ops. (line 6) 18604 * directives, Xtensa: Xtensa Directives. (line 6) 18605 * directives, Z8000: Z8000 Directives. (line 6) 18606 * Disable floating-point instructions: MIPS floating-point. (line 6) 18607 * Disable single-precision floating-point operations: MIPS floating-point. 18608 (line 12) 18609 * displacement sizing character, VAX: VAX-operands. (line 12) 18610 * dn and qn directives, ARM: ARM Directives. (line 29) 18611 * dollar local symbols: Symbol Names. (line 105) 18612 * dot (symbol): Dot. (line 6) 18613 * double directive: Double. (line 6) 18614 * double directive, i386: i386-Float. (line 14) 18615 * double directive, M680x0: M68K-Float. (line 14) 18616 * double directive, M68HC11: M68HC11-Float. (line 14) 18617 * double directive, TIC54X: TIC54X-Directives. (line 64) 18618 * double directive, VAX: VAX-float. (line 15) 18619 * double directive, x86-64: i386-Float. (line 14) 18620 * doublequote (\"): Strings. (line 43) 18621 * drlist directive, TIC54X: TIC54X-Directives. (line 73) 18622 * drnolist directive, TIC54X: TIC54X-Directives. (line 73) 18623 * dual directive, i860: Directives-i860. (line 6) 18624 * ECOFF sections: MIPS Object. (line 6) 18625 * ecr register, V850: V850-Regs. (line 113) 18626 * eight-byte integer: Quad. (line 9) 18627 * eipc register, V850: V850-Regs. (line 101) 18628 * eipsw register, V850: V850-Regs. (line 104) 18629 * eject directive: Eject. (line 6) 18630 * ELF symbol type: Type. (line 22) 18631 * else directive: Else. (line 6) 18632 * elseif directive: Elseif. (line 6) 18633 * empty expressions: Empty Exprs. (line 6) 18634 * emsg directive, TIC54X: TIC54X-Directives. (line 77) 18635 * emulation: Overview. (line 732) 18636 * end directive: End. (line 6) 18637 * enddual directive, i860: Directives-i860. (line 11) 18638 * endef directive: Endef. (line 6) 18639 * endfunc directive: Endfunc. (line 6) 18640 * endianness, MIPS: Overview. (line 629) 18641 * endianness, PJ: Overview. (line 536) 18642 * endif directive: Endif. (line 6) 18643 * endloop directive, TIC54X: TIC54X-Directives. (line 143) 18644 * endm directive: Macro. (line 138) 18645 * endm directive, TIC54X: TIC54X-Directives. (line 153) 18646 * endstruct directive, TIC54X: TIC54X-Directives. (line 217) 18647 * endunion directive, TIC54X: TIC54X-Directives. (line 251) 18648 * environment settings, TIC54X: TIC54X-Env. (line 6) 18649 * EOF, newline must precede: Statements. (line 13) 18650 * ep register, V850: V850-Regs. (line 95) 18651 * equ directive: Equ. (line 6) 18652 * equ directive, TIC54X: TIC54X-Directives. (line 192) 18653 * equiv directive: Equiv. (line 6) 18654 * eqv directive: Eqv. (line 6) 18655 * err directive: Err. (line 6) 18656 * error directive: Error. (line 6) 18657 * error messages: Errors. (line 6) 18658 * error on valid input: Bug Criteria. (line 12) 18659 * errors, caused by warnings: W. (line 16) 18660 * errors, continuing after: Z. (line 6) 18661 * ESA/390 floating point (IEEE): ESA/390 Floating Point. 18662 (line 6) 18663 * ESA/390 support: ESA/390-Dependent. (line 6) 18664 * ESA/390 Syntax: ESA/390 Options. (line 8) 18665 * ESA/390-only directives: ESA/390 Directives. (line 12) 18666 * escape codes, character: Strings. (line 15) 18667 * eval directive, TIC54X: TIC54X-Directives. (line 24) 18668 * even: Z8000 Directives. (line 58) 18669 * even directive, M680x0: M68K-Directives. (line 15) 18670 * even directive, TIC54X: TIC54X-Directives. (line 6) 18671 * exitm directive: Macro. (line 141) 18672 * expr (internal section): As Sections. (line 17) 18673 * expression arguments: Arguments. (line 6) 18674 * expressions: Expressions. (line 6) 18675 * expressions, comparison: Infix Ops. (line 55) 18676 * expressions, empty: Empty Exprs. (line 6) 18677 * expressions, integer: Integer Exprs. (line 6) 18678 * extAuxRegister directive, ARC: ARC Directives. (line 18) 18679 * extCondCode directive, ARC: ARC Directives. (line 41) 18680 * extCoreRegister directive, ARC: ARC Directives. (line 53) 18681 * extend directive M680x0: M68K-Float. (line 17) 18682 * extend directive M68HC11: M68HC11-Float. (line 17) 18683 * extended directive, i960: Directives-i960. (line 13) 18684 * extern directive: Extern. (line 6) 18685 * extInstruction directive, ARC: ARC Directives. (line 78) 18686 * fail directive: Fail. (line 6) 18687 * far_mode directive, TIC54X: TIC54X-Directives. (line 82) 18688 * faster processing (-f): f. (line 6) 18689 * fatal signal: Bug Criteria. (line 9) 18690 * fclist directive, TIC54X: TIC54X-Directives. (line 87) 18691 * fcnolist directive, TIC54X: TIC54X-Directives. (line 87) 18692 * fepc register, V850: V850-Regs. (line 107) 18693 * fepsw register, V850: V850-Regs. (line 110) 18694 * ffloat directive, VAX: VAX-directives. (line 14) 18695 * field directive, TIC54X: TIC54X-Directives. (line 91) 18696 * file directive <1>: LNS directives. (line 6) 18697 * file directive: File. (line 6) 18698 * file directive, MSP 430: MSP430 Directives. (line 6) 18699 * file name, logical: File. (line 6) 18700 * files, including: Include. (line 6) 18701 * files, input: Input Files. (line 6) 18702 * fill directive: Fill. (line 6) 18703 * filling memory <1>: Skip. (line 6) 18704 * filling memory: Space. (line 6) 18705 * FLIX syntax: Xtensa Syntax. (line 6) 18706 * float directive: Float. (line 6) 18707 * float directive, i386: i386-Float. (line 14) 18708 * float directive, M680x0: M68K-Float. (line 11) 18709 * float directive, M68HC11: M68HC11-Float. (line 11) 18710 * float directive, TIC54X: TIC54X-Directives. (line 64) 18711 * float directive, VAX: VAX-float. (line 15) 18712 * float directive, x86-64: i386-Float. (line 14) 18713 * floating point numbers: Flonums. (line 6) 18714 * floating point numbers (double): Double. (line 6) 18715 * floating point numbers (single) <1>: Float. (line 6) 18716 * floating point numbers (single): Single. (line 6) 18717 * floating point, Alpha (IEEE): Alpha Floating Point. 18718 (line 6) 18719 * floating point, ARC (IEEE): ARC Floating Point. (line 6) 18720 * floating point, ARM (IEEE): ARM Floating Point. (line 6) 18721 * floating point, D10V: D10V-Float. (line 6) 18722 * floating point, D30V: D30V-Float. (line 6) 18723 * floating point, ESA/390 (IEEE): ESA/390 Floating Point. 18724 (line 6) 18725 * floating point, H8/300 (IEEE): H8/300 Floating Point. 18726 (line 6) 18727 * floating point, HPPA (IEEE): HPPA Floating Point. (line 6) 18728 * floating point, i386: i386-Float. (line 6) 18729 * floating point, i960 (IEEE): Floating Point-i960. (line 6) 18730 * floating point, M680x0: M68K-Float. (line 6) 18731 * floating point, M68HC11: M68HC11-Float. (line 6) 18732 * floating point, MSP 430 (IEEE): MSP430 Floating Point. 18733 (line 6) 18734 * floating point, SH (IEEE): SH Floating Point. (line 6) 18735 * floating point, SPARC (IEEE): Sparc-Float. (line 6) 18736 * floating point, V850 (IEEE): V850 Floating Point. (line 6) 18737 * floating point, VAX: VAX-float. (line 6) 18738 * floating point, x86-64: i386-Float. (line 6) 18739 * floating point, Z80: Z80 Floating Point. (line 6) 18740 * flonums: Flonums. (line 6) 18741 * force_thumb directive, ARM: ARM Directives. (line 63) 18742 * format of error messages: Errors. (line 24) 18743 * format of warning messages: Errors. (line 12) 18744 * formfeed (\f): Strings. (line 18) 18745 * func directive: Func. (line 6) 18746 * functions, in expressions: Operators. (line 6) 18747 * gbr960, i960 postprocessor: Options-i960. (line 40) 18748 * gfloat directive, VAX: VAX-directives. (line 18) 18749 * global: Z8000 Directives. (line 21) 18750 * global directive: Global. (line 6) 18751 * global directive, TIC54X: TIC54X-Directives. (line 103) 18752 * gp register, MIPS: MIPS Object. (line 11) 18753 * gp register, V850: V850-Regs. (line 17) 18754 * grouping data: Sub-Sections. (line 6) 18755 * H8/300 addressing modes: H8/300-Addressing. (line 6) 18756 * H8/300 floating point (IEEE): H8/300 Floating Point. 18757 (line 6) 18758 * H8/300 line comment character: H8/300-Chars. (line 6) 18759 * H8/300 line separator: H8/300-Chars. (line 8) 18760 * H8/300 machine directives (none): H8/300 Directives. (line 6) 18761 * H8/300 opcode summary: H8/300 Opcodes. (line 6) 18762 * H8/300 options: H8/300 Options. (line 6) 18763 * H8/300 registers: H8/300-Regs. (line 6) 18764 * H8/300 size suffixes: H8/300 Opcodes. (line 163) 18765 * H8/300 support: H8/300-Dependent. (line 6) 18766 * H8/300H, assembling for: H8/300 Directives. (line 8) 18767 * half directive, ARC: ARC Directives. (line 156) 18768 * half directive, SPARC: Sparc-Directives. (line 17) 18769 * half directive, TIC54X: TIC54X-Directives. (line 111) 18770 * hex character code (\XD...): Strings. (line 36) 18771 * hexadecimal integers: Integers. (line 15) 18772 * hexadecimal prefix, Z80: Z80-Chars. (line 8) 18773 * hfloat directive, VAX: VAX-directives. (line 22) 18774 * hi pseudo-op, V850: V850 Opcodes. (line 33) 18775 * hi0 pseudo-op, V850: V850 Opcodes. (line 10) 18776 * hidden directive: Hidden. (line 6) 18777 * high directive, M32R: M32R-Directives. (line 18) 18778 * hilo pseudo-op, V850: V850 Opcodes. (line 55) 18779 * HPPA directives not supported: HPPA Directives. (line 11) 18780 * HPPA floating point (IEEE): HPPA Floating Point. (line 6) 18781 * HPPA Syntax: HPPA Options. (line 8) 18782 * HPPA-only directives: HPPA Directives. (line 24) 18783 * hword directive: hword. (line 6) 18784 * i370 support: ESA/390-Dependent. (line 6) 18785 * i386 16-bit code: i386-16bit. (line 6) 18786 * i386 arch directive: i386-Arch. (line 6) 18787 * i386 att_syntax pseudo op: i386-Syntax. (line 6) 18788 * i386 conversion instructions: i386-Mnemonics. (line 32) 18789 * i386 floating point: i386-Float. (line 6) 18790 * i386 immediate operands: i386-Syntax. (line 15) 18791 * i386 instruction naming: i386-Mnemonics. (line 6) 18792 * i386 instruction prefixes: i386-Prefixes. (line 6) 18793 * i386 intel_syntax pseudo op: i386-Syntax. (line 6) 18794 * i386 jump optimization: i386-Jumps. (line 6) 18795 * i386 jump, call, return: i386-Syntax. (line 38) 18796 * i386 jump/call operands: i386-Syntax. (line 15) 18797 * i386 memory references: i386-Memory. (line 6) 18798 * i386 mnemonic compatibility: i386-Mnemonics. (line 57) 18799 * i386 mul, imul instructions: i386-Notes. (line 6) 18800 * i386 options: i386-Options. (line 6) 18801 * i386 register operands: i386-Syntax. (line 15) 18802 * i386 registers: i386-Regs. (line 6) 18803 * i386 sections: i386-Syntax. (line 44) 18804 * i386 size suffixes: i386-Syntax. (line 29) 18805 * i386 source, destination operands: i386-Syntax. (line 22) 18806 * i386 support: i386-Dependent. (line 6) 18807 * i386 syntax compatibility: i386-Syntax. (line 6) 18808 * i80306 support: i386-Dependent. (line 6) 18809 * i860 machine directives: Directives-i860. (line 6) 18810 * i860 opcodes: Opcodes for i860. (line 6) 18811 * i860 support: i860-Dependent. (line 6) 18812 * i960 architecture options: Options-i960. (line 6) 18813 * i960 branch recording: Options-i960. (line 22) 18814 * i960 callj pseudo-opcode: callj-i960. (line 6) 18815 * i960 compare and jump expansions: Compare-and-branch-i960. 18816 (line 13) 18817 * i960 compare/branch instructions: Compare-and-branch-i960. 18818 (line 6) 18819 * i960 floating point (IEEE): Floating Point-i960. (line 6) 18820 * i960 machine directives: Directives-i960. (line 6) 18821 * i960 opcodes: Opcodes for i960. (line 6) 18822 * i960 options: Options-i960. (line 6) 18823 * i960 support: i960-Dependent. (line 6) 18824 * IA-64 line comment character: IA-64-Chars. (line 6) 18825 * IA-64 line separator: IA-64-Chars. (line 8) 18826 * IA-64 options: IA-64 Options. (line 6) 18827 * IA-64 Processor-status-Register bit names: IA-64-Bits. (line 6) 18828 * IA-64 registers: IA-64-Regs. (line 6) 18829 * IA-64 support: IA-64-Dependent. (line 6) 18830 * IA-64 Syntax: IA-64 Options. (line 96) 18831 * ident directive: Ident. (line 6) 18832 * identifiers, ARM: ARM-Chars. (line 15) 18833 * identifiers, MSP 430: MSP430-Chars. (line 8) 18834 * if directive: If. (line 6) 18835 * ifb directive: If. (line 21) 18836 * ifc directive: If. (line 25) 18837 * ifdef directive: If. (line 16) 18838 * ifeq directive: If. (line 33) 18839 * ifeqs directive: If. (line 36) 18840 * ifge directive: If. (line 40) 18841 * ifgt directive: If. (line 44) 18842 * ifle directive: If. (line 48) 18843 * iflt directive: If. (line 52) 18844 * ifnb directive: If. (line 56) 18845 * ifnc directive: If. (line 61) 18846 * ifndef directive: If. (line 65) 18847 * ifne directive: If. (line 72) 18848 * ifnes directive: If. (line 76) 18849 * ifnotdef directive: If. (line 65) 18850 * immediate character, ARM: ARM-Chars. (line 13) 18851 * immediate character, M680x0: M68K-Chars. (line 6) 18852 * immediate character, VAX: VAX-operands. (line 6) 18853 * immediate fields, relaxation: Xtensa Immediate Relaxation. 18854 (line 6) 18855 * immediate operands, i386: i386-Syntax. (line 15) 18856 * immediate operands, x86-64: i386-Syntax. (line 15) 18857 * imul instruction, i386: i386-Notes. (line 6) 18858 * imul instruction, x86-64: i386-Notes. (line 6) 18859 * incbin directive: Incbin. (line 6) 18860 * include directive: Include. (line 6) 18861 * include directive search path: I. (line 6) 18862 * indirect character, VAX: VAX-operands. (line 9) 18863 * infix operators: Infix Ops. (line 6) 18864 * inhibiting interrupts, i386: i386-Prefixes. (line 36) 18865 * input: Input Files. (line 6) 18866 * input file linenumbers: Input Files. (line 35) 18867 * instruction expansion, CRIS: CRIS-Expand. (line 6) 18868 * instruction expansion, MMIX: MMIX-Expand. (line 6) 18869 * instruction naming, i386: i386-Mnemonics. (line 6) 18870 * instruction naming, x86-64: i386-Mnemonics. (line 6) 18871 * instruction prefixes, i386: i386-Prefixes. (line 6) 18872 * instruction set, M680x0: M68K-opcodes. (line 6) 18873 * instruction set, M68HC11: M68HC11-opcodes. (line 6) 18874 * instruction summary, AVR: AVR Opcodes. (line 6) 18875 * instruction summary, D10V: D10V-Opcodes. (line 6) 18876 * instruction summary, D30V: D30V-Opcodes. (line 6) 18877 * instruction summary, H8/300: H8/300 Opcodes. (line 6) 18878 * instruction summary, SH: SH Opcodes. (line 6) 18879 * instruction summary, SH64: SH64 Opcodes. (line 6) 18880 * instruction summary, Z8000: Z8000 Opcodes. (line 6) 18881 * instructions and directives: Statements. (line 19) 18882 * int directive: Int. (line 6) 18883 * int directive, H8/300: H8/300 Directives. (line 6) 18884 * int directive, i386: i386-Float. (line 21) 18885 * int directive, TIC54X: TIC54X-Directives. (line 111) 18886 * int directive, x86-64: i386-Float. (line 21) 18887 * integer expressions: Integer Exprs. (line 6) 18888 * integer, 16-byte: Octa. (line 6) 18889 * integer, 8-byte: Quad. (line 9) 18890 * integers: Integers. (line 6) 18891 * integers, 16-bit: hword. (line 6) 18892 * integers, 32-bit: Int. (line 6) 18893 * integers, binary: Integers. (line 6) 18894 * integers, decimal: Integers. (line 12) 18895 * integers, hexadecimal: Integers. (line 15) 18896 * integers, octal: Integers. (line 9) 18897 * integers, one byte: Byte. (line 6) 18898 * intel_syntax pseudo op, i386: i386-Syntax. (line 6) 18899 * intel_syntax pseudo op, x86-64: i386-Syntax. (line 6) 18900 * internal assembler sections: As Sections. (line 6) 18901 * internal directive: Internal. (line 6) 18902 * invalid input: Bug Criteria. (line 14) 18903 * invocation summary: Overview. (line 6) 18904 * IP2K architecture options: IP2K-Opts. (line 9) 18905 * IP2K options: IP2K-Opts. (line 6) 18906 * IP2K support: IP2K-Dependent. (line 6) 18907 * irp directive: Irp. (line 6) 18908 * irpc directive: Irpc. (line 6) 18909 * ISA options, SH64: SH64 Options. (line 6) 18910 * joining text and data sections: R. (line 6) 18911 * jump instructions, i386: i386-Mnemonics. (line 51) 18912 * jump instructions, x86-64: i386-Mnemonics. (line 51) 18913 * jump optimization, i386: i386-Jumps. (line 6) 18914 * jump optimization, x86-64: i386-Jumps. (line 6) 18915 * jump/call operands, i386: i386-Syntax. (line 15) 18916 * jump/call operands, x86-64: i386-Syntax. (line 15) 18917 * L16SI instructions, relaxation: Xtensa Immediate Relaxation. 18918 (line 23) 18919 * L16UI instructions, relaxation: Xtensa Immediate Relaxation. 18920 (line 23) 18921 * L32I instructions, relaxation: Xtensa Immediate Relaxation. 18922 (line 23) 18923 * L8UI instructions, relaxation: Xtensa Immediate Relaxation. 18924 (line 23) 18925 * label (:): Statements. (line 30) 18926 * label directive, TIC54X: TIC54X-Directives. (line 123) 18927 * labels: Labels. (line 6) 18928 * lcomm directive: Lcomm. (line 6) 18929 * lcomm directive, COFF: i386-Directives. (line 6) 18930 * ld: Object. (line 15) 18931 * ldouble directive M680x0: M68K-Float. (line 17) 18932 * ldouble directive M68HC11: M68HC11-Float. (line 17) 18933 * ldouble directive, TIC54X: TIC54X-Directives. (line 64) 18934 * LDR reg,=<label> pseudo op, ARM: ARM Opcodes. (line 15) 18935 * leafproc directive, i960: Directives-i960. (line 18) 18936 * length directive, TIC54X: TIC54X-Directives. (line 127) 18937 * length of symbols: Symbol Intro. (line 14) 18938 * lflags directive (ignored): Lflags. (line 6) 18939 * line comment character: Comments. (line 19) 18940 * line comment character, Alpha: Alpha-Chars. (line 6) 18941 * line comment character, ARM: ARM-Chars. (line 6) 18942 * line comment character, AVR: AVR-Chars. (line 6) 18943 * line comment character, D10V: D10V-Chars. (line 6) 18944 * line comment character, D30V: D30V-Chars. (line 6) 18945 * line comment character, H8/300: H8/300-Chars. (line 6) 18946 * line comment character, IA-64: IA-64-Chars. (line 6) 18947 * line comment character, M680x0: M68K-Chars. (line 6) 18948 * line comment character, MSP 430: MSP430-Chars. (line 6) 18949 * line comment character, SH: SH-Chars. (line 6) 18950 * line comment character, SH64: SH64-Chars. (line 6) 18951 * line comment character, Sparc: Sparc-Chars. (line 6) 18952 * line comment character, V850: V850-Chars. (line 6) 18953 * line comment character, Z80: Z80-Chars. (line 6) 18954 * line comment character, Z8000: Z8000-Chars. (line 6) 18955 * line comment characters, CRIS: CRIS-Chars. (line 6) 18956 * line comment characters, MMIX: MMIX-Chars. (line 6) 18957 * line directive: Line. (line 6) 18958 * line directive, MSP 430: MSP430 Directives. (line 14) 18959 * line numbers, in input files: Input Files. (line 35) 18960 * line numbers, in warnings/errors: Errors. (line 16) 18961 * line separator character: Statements. (line 6) 18962 * line separator, Alpha: Alpha-Chars. (line 8) 18963 * line separator, ARM: ARM-Chars. (line 10) 18964 * line separator, AVR: AVR-Chars. (line 10) 18965 * line separator, H8/300: H8/300-Chars. (line 8) 18966 * line separator, IA-64: IA-64-Chars. (line 8) 18967 * line separator, SH: SH-Chars. (line 8) 18968 * line separator, SH64: SH64-Chars. (line 8) 18969 * line separator, Sparc: Sparc-Chars. (line 8) 18970 * line separator, Z8000: Z8000-Chars. (line 8) 18971 * lines starting with #: Comments. (line 38) 18972 * linker: Object. (line 15) 18973 * linker, and assembler: Secs Background. (line 10) 18974 * linkonce directive: Linkonce. (line 6) 18975 * list directive: List. (line 6) 18976 * list directive, TIC54X: TIC54X-Directives. (line 131) 18977 * listing control, turning off: Nolist. (line 6) 18978 * listing control, turning on: List. (line 6) 18979 * listing control: new page: Eject. (line 6) 18980 * listing control: paper size: Psize. (line 6) 18981 * listing control: subtitle: Sbttl. (line 6) 18982 * listing control: title line: Title. (line 6) 18983 * listings, enabling: a. (line 6) 18984 * literal directive: Literal Directive. (line 6) 18985 * literal_position directive: Literal Position Directive. 18986 (line 6) 18987 * literal_prefix directive: Literal Prefix Directive. 18988 (line 6) 18989 * little endian output, MIPS: Overview. (line 632) 18990 * little endian output, PJ: Overview. (line 539) 18991 * little-endian output, MIPS: MIPS Opts. (line 13) 18992 * ln directive: Ln. (line 6) 18993 * lo pseudo-op, V850: V850 Opcodes. (line 22) 18994 * loc directive: LNS directives. (line 19) 18995 * loc_mark_labels directive: LNS directives. (line 50) 18996 * local common symbols: Lcomm. (line 6) 18997 * local labels: Symbol Names. (line 35) 18998 * local symbol names: Symbol Names. (line 22) 18999 * local symbols, retaining in output: L. (line 6) 19000 * location counter: Dot. (line 6) 19001 * location counter, advancing: Org. (line 6) 19002 * location counter, Z80: Z80-Chars. (line 8) 19003 * logical file name: File. (line 6) 19004 * logical line number: Line. (line 6) 19005 * logical line numbers: Comments. (line 38) 19006 * long directive: Long. (line 6) 19007 * long directive, ARC: ARC Directives. (line 159) 19008 * long directive, i386: i386-Float. (line 21) 19009 * long directive, TIC54X: TIC54X-Directives. (line 135) 19010 * long directive, x86-64: i386-Float. (line 21) 19011 * longcall pseudo-op, V850: V850 Opcodes. (line 123) 19012 * longcalls directive: Longcalls Directive. (line 6) 19013 * longjump pseudo-op, V850: V850 Opcodes. (line 129) 19014 * loop directive, TIC54X: TIC54X-Directives. (line 143) 19015 * LOOP instructions, alignment: Xtensa Automatic Alignment. 19016 (line 6) 19017 * low directive, M32R: M32R-Directives. (line 9) 19018 * lp register, V850: V850-Regs. (line 98) 19019 * lval: Z8000 Directives. (line 27) 19020 * M16C architecture option: M32C-Opts. (line 12) 19021 * M32C architecture option: M32C-Opts. (line 9) 19022 * M32C modifiers: M32C-Modifiers. (line 6) 19023 * M32C options: M32C-Opts. (line 6) 19024 * M32C support: M32C-Dependent. (line 6) 19025 * M32R architecture options: M32R-Opts. (line 9) 19026 * M32R directives: M32R-Directives. (line 6) 19027 * M32R options: M32R-Opts. (line 6) 19028 * M32R support: M32R-Dependent. (line 6) 19029 * M32R warnings: M32R-Warnings. (line 6) 19030 * M680x0 addressing modes: M68K-Syntax. (line 21) 19031 * M680x0 architecture options: M68K-Opts. (line 104) 19032 * M680x0 branch improvement: M68K-Branch. (line 6) 19033 * M680x0 directives: M68K-Directives. (line 6) 19034 * M680x0 floating point: M68K-Float. (line 6) 19035 * M680x0 immediate character: M68K-Chars. (line 6) 19036 * M680x0 line comment character: M68K-Chars. (line 6) 19037 * M680x0 opcodes: M68K-opcodes. (line 6) 19038 * M680x0 options: M68K-Opts. (line 6) 19039 * M680x0 pseudo-opcodes: M68K-Branch. (line 6) 19040 * M680x0 size modifiers: M68K-Syntax. (line 8) 19041 * M680x0 support: M68K-Dependent. (line 6) 19042 * M680x0 syntax: M68K-Syntax. (line 8) 19043 * M68HC11 addressing modes: M68HC11-Syntax. (line 17) 19044 * M68HC11 and M68HC12 support: M68HC11-Dependent. (line 6) 19045 * M68HC11 assembler directive .far: M68HC11-Directives. (line 20) 19046 * M68HC11 assembler directive .interrupt: M68HC11-Directives. (line 26) 19047 * M68HC11 assembler directive .mode: M68HC11-Directives. (line 16) 19048 * M68HC11 assembler directive .relax: M68HC11-Directives. (line 10) 19049 * M68HC11 assembler directive .xrefb: M68HC11-Directives. (line 31) 19050 * M68HC11 assembler directives: M68HC11-Directives. (line 6) 19051 * M68HC11 branch improvement: M68HC11-Branch. (line 6) 19052 * M68HC11 floating point: M68HC11-Float. (line 6) 19053 * M68HC11 modifiers: M68HC11-Modifiers. (line 6) 19054 * M68HC11 opcodes: M68HC11-opcodes. (line 6) 19055 * M68HC11 options: M68HC11-Opts. (line 6) 19056 * M68HC11 pseudo-opcodes: M68HC11-Branch. (line 6) 19057 * M68HC11 syntax: M68HC11-Syntax. (line 6) 19058 * M68HC12 assembler directives: M68HC11-Directives. (line 6) 19059 * machine dependencies: Machine Dependencies. 19060 (line 6) 19061 * machine directives, ARC: ARC Directives. (line 6) 19062 * machine directives, ARM: ARM Directives. (line 6) 19063 * machine directives, H8/300 (none): H8/300 Directives. (line 6) 19064 * machine directives, i860: Directives-i860. (line 6) 19065 * machine directives, i960: Directives-i960. (line 6) 19066 * machine directives, MSP 430: MSP430 Directives. (line 6) 19067 * machine directives, SH: SH Directives. (line 6) 19068 * machine directives, SH64: SH64 Directives. (line 9) 19069 * machine directives, SPARC: Sparc-Directives. (line 6) 19070 * machine directives, TIC54X: TIC54X-Directives. (line 6) 19071 * machine directives, V850: V850 Directives. (line 6) 19072 * machine directives, VAX: VAX-directives. (line 6) 19073 * machine directives, x86: i386-Directives. (line 6) 19074 * machine independent directives: Pseudo Ops. (line 6) 19075 * machine instructions (not covered): Manual. (line 14) 19076 * machine-independent syntax: Syntax. (line 6) 19077 * macro directive: Macro. (line 28) 19078 * macro directive, TIC54X: TIC54X-Directives. (line 153) 19079 * macros: Macro. (line 6) 19080 * macros, count executed: Macro. (line 143) 19081 * Macros, MSP 430: MSP430-Macros. (line 6) 19082 * macros, TIC54X: TIC54X-Macros. (line 6) 19083 * make rules: MD. (line 6) 19084 * manual, structure and purpose: Manual. (line 6) 19085 * math builtins, TIC54X: TIC54X-Builtins. (line 6) 19086 * Maximum number of continuation lines: listing. (line 34) 19087 * memory references, i386: i386-Memory. (line 6) 19088 * memory references, x86-64: i386-Memory. (line 6) 19089 * memory-mapped registers, TIC54X: TIC54X-MMRegs. (line 6) 19090 * merging text and data sections: R. (line 6) 19091 * messages from assembler: Errors. (line 6) 19092 * minus, permitted arguments: Infix Ops. (line 49) 19093 * MIPS architecture options: MIPS Opts. (line 29) 19094 * MIPS big-endian output: MIPS Opts. (line 13) 19095 * MIPS CPU override: MIPS ISA. (line 18) 19096 * MIPS debugging directives: MIPS Stabs. (line 6) 19097 * MIPS DSP Release 1 instruction generation override: MIPS ASE instruction generation overrides. 19098 (line 21) 19099 * MIPS DSP Release 2 instruction generation override: MIPS ASE instruction generation overrides. 19100 (line 26) 19101 * MIPS ECOFF sections: MIPS Object. (line 6) 19102 * MIPS endianness: Overview. (line 629) 19103 * MIPS ISA: Overview. (line 635) 19104 * MIPS ISA override: MIPS ISA. (line 6) 19105 * MIPS little-endian output: MIPS Opts. (line 13) 19106 * MIPS MDMX instruction generation override: MIPS ASE instruction generation overrides. 19107 (line 16) 19108 * MIPS MIPS-3D instruction generation override: MIPS ASE instruction generation overrides. 19109 (line 6) 19110 * MIPS MT instruction generation override: MIPS ASE instruction generation overrides. 19111 (line 32) 19112 * MIPS option stack: MIPS option stack. (line 6) 19113 * MIPS processor: MIPS-Dependent. (line 6) 19114 * MIT: M68K-Syntax. (line 6) 19115 * mlib directive, TIC54X: TIC54X-Directives. (line 159) 19116 * mlist directive, TIC54X: TIC54X-Directives. (line 164) 19117 * MMIX assembler directive BSPEC: MMIX-Pseudos. (line 131) 19118 * MMIX assembler directive BYTE: MMIX-Pseudos. (line 97) 19119 * MMIX assembler directive ESPEC: MMIX-Pseudos. (line 131) 19120 * MMIX assembler directive GREG: MMIX-Pseudos. (line 50) 19121 * MMIX assembler directive IS: MMIX-Pseudos. (line 42) 19122 * MMIX assembler directive LOC: MMIX-Pseudos. (line 7) 19123 * MMIX assembler directive LOCAL: MMIX-Pseudos. (line 28) 19124 * MMIX assembler directive OCTA: MMIX-Pseudos. (line 108) 19125 * MMIX assembler directive PREFIX: MMIX-Pseudos. (line 120) 19126 * MMIX assembler directive TETRA: MMIX-Pseudos. (line 108) 19127 * MMIX assembler directive WYDE: MMIX-Pseudos. (line 108) 19128 * MMIX assembler directives: MMIX-Pseudos. (line 6) 19129 * MMIX line comment characters: MMIX-Chars. (line 6) 19130 * MMIX options: MMIX-Opts. (line 6) 19131 * MMIX pseudo-op BSPEC: MMIX-Pseudos. (line 131) 19132 * MMIX pseudo-op BYTE: MMIX-Pseudos. (line 97) 19133 * MMIX pseudo-op ESPEC: MMIX-Pseudos. (line 131) 19134 * MMIX pseudo-op GREG: MMIX-Pseudos. (line 50) 19135 * MMIX pseudo-op IS: MMIX-Pseudos. (line 42) 19136 * MMIX pseudo-op LOC: MMIX-Pseudos. (line 7) 19137 * MMIX pseudo-op LOCAL: MMIX-Pseudos. (line 28) 19138 * MMIX pseudo-op OCTA: MMIX-Pseudos. (line 108) 19139 * MMIX pseudo-op PREFIX: MMIX-Pseudos. (line 120) 19140 * MMIX pseudo-op TETRA: MMIX-Pseudos. (line 108) 19141 * MMIX pseudo-op WYDE: MMIX-Pseudos. (line 108) 19142 * MMIX pseudo-ops: MMIX-Pseudos. (line 6) 19143 * MMIX register names: MMIX-Regs. (line 6) 19144 * MMIX support: MMIX-Dependent. (line 6) 19145 * mmixal differences: MMIX-mmixal. (line 6) 19146 * mmregs directive, TIC54X: TIC54X-Directives. (line 170) 19147 * mmsg directive, TIC54X: TIC54X-Directives. (line 77) 19148 * MMX, i386: i386-SIMD. (line 6) 19149 * MMX, x86-64: i386-SIMD. (line 6) 19150 * mnemonic compatibility, i386: i386-Mnemonics. (line 57) 19151 * mnemonic suffixes, i386: i386-Syntax. (line 29) 19152 * mnemonic suffixes, x86-64: i386-Syntax. (line 29) 19153 * mnemonics for opcodes, VAX: VAX-opcodes. (line 6) 19154 * mnemonics, AVR: AVR Opcodes. (line 6) 19155 * mnemonics, D10V: D10V-Opcodes. (line 6) 19156 * mnemonics, D30V: D30V-Opcodes. (line 6) 19157 * mnemonics, H8/300: H8/300 Opcodes. (line 6) 19158 * mnemonics, SH: SH Opcodes. (line 6) 19159 * mnemonics, SH64: SH64 Opcodes. (line 6) 19160 * mnemonics, Z8000: Z8000 Opcodes. (line 6) 19161 * mnolist directive, TIC54X: TIC54X-Directives. (line 164) 19162 * Motorola syntax for the 680x0: M68K-Moto-Syntax. (line 6) 19163 * MOVI instructions, relaxation: Xtensa Immediate Relaxation. 19164 (line 12) 19165 * MOVW and MOVT relocations, ARM: ARM-Relocations. (line 20) 19166 * MRI compatibility mode: M. (line 6) 19167 * mri directive: MRI. (line 6) 19168 * MRI mode, temporarily: MRI. (line 6) 19169 * MSP 430 floating point (IEEE): MSP430 Floating Point. 19170 (line 6) 19171 * MSP 430 identifiers: MSP430-Chars. (line 8) 19172 * MSP 430 line comment character: MSP430-Chars. (line 6) 19173 * MSP 430 machine directives: MSP430 Directives. (line 6) 19174 * MSP 430 macros: MSP430-Macros. (line 6) 19175 * MSP 430 opcodes: MSP430 Opcodes. (line 6) 19176 * MSP 430 options (none): MSP430 Options. (line 6) 19177 * MSP 430 profiling capability: MSP430 Profiling Capability. 19178 (line 6) 19179 * MSP 430 register names: MSP430-Regs. (line 6) 19180 * MSP 430 support: MSP430-Dependent. (line 6) 19181 * MSP430 Assembler Extensions: MSP430-Ext. (line 6) 19182 * mul instruction, i386: i386-Notes. (line 6) 19183 * mul instruction, x86-64: i386-Notes. (line 6) 19184 * name: Z8000 Directives. (line 18) 19185 * named section: Section. (line 6) 19186 * named sections: Ld Sections. (line 8) 19187 * names, symbol: Symbol Names. (line 6) 19188 * naming object file: o. (line 6) 19189 * new page, in listings: Eject. (line 6) 19190 * newblock directive, TIC54X: TIC54X-Directives. (line 176) 19191 * newline (\n): Strings. (line 21) 19192 * newline, required at file end: Statements. (line 13) 19193 * no-absolute-literals directive: Absolute Literals Directive. 19194 (line 6) 19195 * no-longcalls directive: Longcalls Directive. (line 6) 19196 * no-schedule directive: Schedule Directive. (line 6) 19197 * no-transform directive: Transform Directive. (line 6) 19198 * nolist directive: Nolist. (line 6) 19199 * nolist directive, TIC54X: TIC54X-Directives. (line 131) 19200 * NOP pseudo op, ARM: ARM Opcodes. (line 9) 19201 * notes for Alpha: Alpha Notes. (line 6) 19202 * null-terminated strings: Asciz. (line 6) 19203 * number constants: Numbers. (line 6) 19204 * number of macros executed: Macro. (line 143) 19205 * numbered subsections: Sub-Sections. (line 6) 19206 * numbers, 16-bit: hword. (line 6) 19207 * numeric values: Expressions. (line 6) 19208 * nword directive, SPARC: Sparc-Directives. (line 20) 19209 * object attributes: Object Attributes. (line 6) 19210 * object file: Object. (line 6) 19211 * object file format: Object Formats. (line 6) 19212 * object file name: o. (line 6) 19213 * object file, after errors: Z. (line 6) 19214 * obsolescent directives: Deprecated. (line 6) 19215 * octa directive: Octa. (line 6) 19216 * octal character code (\DDD): Strings. (line 30) 19217 * octal integers: Integers. (line 9) 19218 * offset directive, V850: V850 Directives. (line 6) 19219 * opcode mnemonics, VAX: VAX-opcodes. (line 6) 19220 * opcode names, Xtensa: Xtensa Opcodes. (line 6) 19221 * opcode summary, AVR: AVR Opcodes. (line 6) 19222 * opcode summary, D10V: D10V-Opcodes. (line 6) 19223 * opcode summary, D30V: D30V-Opcodes. (line 6) 19224 * opcode summary, H8/300: H8/300 Opcodes. (line 6) 19225 * opcode summary, SH: SH Opcodes. (line 6) 19226 * opcode summary, SH64: SH64 Opcodes. (line 6) 19227 * opcode summary, Z8000: Z8000 Opcodes. (line 6) 19228 * opcodes for ARC: ARC Opcodes. (line 6) 19229 * opcodes for ARM: ARM Opcodes. (line 6) 19230 * opcodes for MSP 430: MSP430 Opcodes. (line 6) 19231 * opcodes for V850: V850 Opcodes. (line 6) 19232 * opcodes, i860: Opcodes for i860. (line 6) 19233 * opcodes, i960: Opcodes for i960. (line 6) 19234 * opcodes, M680x0: M68K-opcodes. (line 6) 19235 * opcodes, M68HC11: M68HC11-opcodes. (line 6) 19236 * operand delimiters, i386: i386-Syntax. (line 15) 19237 * operand delimiters, x86-64: i386-Syntax. (line 15) 19238 * operand notation, VAX: VAX-operands. (line 6) 19239 * operands in expressions: Arguments. (line 6) 19240 * operator precedence: Infix Ops. (line 11) 19241 * operators, in expressions: Operators. (line 6) 19242 * operators, permitted arguments: Infix Ops. (line 6) 19243 * optimization, D10V: Overview. (line 408) 19244 * optimization, D30V: Overview. (line 413) 19245 * optimizations: Xtensa Optimizations. 19246 (line 6) 19247 * option directive, ARC: ARC Directives. (line 162) 19248 * option directive, TIC54X: TIC54X-Directives. (line 180) 19249 * option summary: Overview. (line 6) 19250 * options for Alpha: Alpha Options. (line 6) 19251 * options for ARC (none): ARC Options. (line 6) 19252 * options for ARM (none): ARM Options. (line 6) 19253 * options for AVR (none): AVR Options. (line 6) 19254 * options for i386: i386-Options. (line 6) 19255 * options for IA-64: IA-64 Options. (line 6) 19256 * options for MSP430 (none): MSP430 Options. (line 6) 19257 * options for PDP-11: PDP-11-Options. (line 6) 19258 * options for PowerPC: PowerPC-Opts. (line 6) 19259 * options for SPARC: Sparc-Opts. (line 6) 19260 * options for V850 (none): V850 Options. (line 6) 19261 * options for VAX/VMS: VAX-Opts. (line 42) 19262 * options for x86-64: i386-Options. (line 6) 19263 * options for Z80: Z80 Options. (line 6) 19264 * options, all versions of assembler: Invoking. (line 6) 19265 * options, command line: Command Line. (line 13) 19266 * options, CRIS: CRIS-Opts. (line 6) 19267 * options, D10V: D10V-Opts. (line 6) 19268 * options, D30V: D30V-Opts. (line 6) 19269 * options, H8/300: H8/300 Options. (line 6) 19270 * options, i960: Options-i960. (line 6) 19271 * options, IP2K: IP2K-Opts. (line 6) 19272 * options, M32C: M32C-Opts. (line 6) 19273 * options, M32R: M32R-Opts. (line 6) 19274 * options, M680x0: M68K-Opts. (line 6) 19275 * options, M68HC11: M68HC11-Opts. (line 6) 19276 * options, MMIX: MMIX-Opts. (line 6) 19277 * options, PJ: PJ Options. (line 6) 19278 * options, SH: SH Options. (line 6) 19279 * options, SH64: SH64 Options. (line 6) 19280 * options, TIC54X: TIC54X-Opts. (line 6) 19281 * options, Z8000: Z8000 Options. (line 6) 19282 * org directive: Org. (line 6) 19283 * other attribute, of a.out symbol: Symbol Other. (line 6) 19284 * output file: Object. (line 6) 19285 * p2align directive: P2align. (line 6) 19286 * p2alignl directive: P2align. (line 28) 19287 * p2alignw directive: P2align. (line 28) 19288 * padding the location counter: Align. (line 6) 19289 * padding the location counter given a power of two: P2align. (line 6) 19290 * padding the location counter given number of bytes: Balign. (line 6) 19291 * page, in listings: Eject. (line 6) 19292 * paper size, for listings: Psize. (line 6) 19293 * paths for .include: I. (line 6) 19294 * patterns, writing in memory: Fill. (line 6) 19295 * PDP-11 comments: PDP-11-Syntax. (line 16) 19296 * PDP-11 floating-point register syntax: PDP-11-Syntax. (line 13) 19297 * PDP-11 general-purpose register syntax: PDP-11-Syntax. (line 10) 19298 * PDP-11 instruction naming: PDP-11-Mnemonics. (line 6) 19299 * PDP-11 support: PDP-11-Dependent. (line 6) 19300 * PDP-11 syntax: PDP-11-Syntax. (line 6) 19301 * PIC code generation for ARM: ARM Options. (line 122) 19302 * PIC code generation for M32R: M32R-Opts. (line 42) 19303 * PIC selection, MIPS: MIPS Opts. (line 21) 19304 * PJ endianness: Overview. (line 536) 19305 * PJ options: PJ Options. (line 6) 19306 * PJ support: PJ-Dependent. (line 6) 19307 * plus, permitted arguments: Infix Ops. (line 44) 19308 * popsection directive: PopSection. (line 6) 19309 * Position-independent code, CRIS: CRIS-Opts. (line 27) 19310 * Position-independent code, symbols in, CRIS: CRIS-Pic. (line 6) 19311 * PowerPC architectures: PowerPC-Opts. (line 6) 19312 * PowerPC directives: PowerPC-Pseudo. (line 6) 19313 * PowerPC options: PowerPC-Opts. (line 6) 19314 * PowerPC support: PPC-Dependent. (line 6) 19315 * precedence of operators: Infix Ops. (line 11) 19316 * precision, floating point: Flonums. (line 6) 19317 * prefix operators: Prefix Ops. (line 6) 19318 * prefixes, i386: i386-Prefixes. (line 6) 19319 * preprocessing: Preprocessing. (line 6) 19320 * preprocessing, turning on and off: Preprocessing. (line 27) 19321 * previous directive: Previous. (line 6) 19322 * primary attributes, COFF symbols: COFF Symbols. (line 13) 19323 * print directive: Print. (line 6) 19324 * proc directive, SPARC: Sparc-Directives. (line 25) 19325 * profiler directive, MSP 430: MSP430 Directives. (line 22) 19326 * profiling capability for MSP 430: MSP430 Profiling Capability. 19327 (line 6) 19328 * protected directive: Protected. (line 6) 19329 * pseudo-op .arch, CRIS: CRIS-Pseudos. (line 45) 19330 * pseudo-op .dword, CRIS: CRIS-Pseudos. (line 12) 19331 * pseudo-op .syntax, CRIS: CRIS-Pseudos. (line 17) 19332 * pseudo-op BSPEC, MMIX: MMIX-Pseudos. (line 131) 19333 * pseudo-op BYTE, MMIX: MMIX-Pseudos. (line 97) 19334 * pseudo-op ESPEC, MMIX: MMIX-Pseudos. (line 131) 19335 * pseudo-op GREG, MMIX: MMIX-Pseudos. (line 50) 19336 * pseudo-op IS, MMIX: MMIX-Pseudos. (line 42) 19337 * pseudo-op LOC, MMIX: MMIX-Pseudos. (line 7) 19338 * pseudo-op LOCAL, MMIX: MMIX-Pseudos. (line 28) 19339 * pseudo-op OCTA, MMIX: MMIX-Pseudos. (line 108) 19340 * pseudo-op PREFIX, MMIX: MMIX-Pseudos. (line 120) 19341 * pseudo-op TETRA, MMIX: MMIX-Pseudos. (line 108) 19342 * pseudo-op WYDE, MMIX: MMIX-Pseudos. (line 108) 19343 * pseudo-opcodes, M680x0: M68K-Branch. (line 6) 19344 * pseudo-opcodes, M68HC11: M68HC11-Branch. (line 6) 19345 * pseudo-ops for branch, VAX: VAX-branch. (line 6) 19346 * pseudo-ops, CRIS: CRIS-Pseudos. (line 6) 19347 * pseudo-ops, machine independent: Pseudo Ops. (line 6) 19348 * pseudo-ops, MMIX: MMIX-Pseudos. (line 6) 19349 * psize directive: Psize. (line 6) 19350 * PSR bits: IA-64-Bits. (line 6) 19351 * pstring directive, TIC54X: TIC54X-Directives. (line 209) 19352 * psw register, V850: V850-Regs. (line 116) 19353 * purgem directive: Purgem. (line 6) 19354 * purpose of GNU assembler: GNU Assembler. (line 12) 19355 * pushsection directive: PushSection. (line 6) 19356 * quad directive: Quad. (line 6) 19357 * quad directive, i386: i386-Float. (line 21) 19358 * quad directive, x86-64: i386-Float. (line 21) 19359 * real-mode code, i386: i386-16bit. (line 6) 19360 * ref directive, TIC54X: TIC54X-Directives. (line 103) 19361 * register directive, SPARC: Sparc-Directives. (line 29) 19362 * register names, Alpha: Alpha-Regs. (line 6) 19363 * register names, ARC: ARC-Regs. (line 6) 19364 * register names, ARM: ARM-Regs. (line 6) 19365 * register names, AVR: AVR-Regs. (line 6) 19366 * register names, CRIS: CRIS-Regs. (line 6) 19367 * register names, H8/300: H8/300-Regs. (line 6) 19368 * register names, IA-64: IA-64-Regs. (line 6) 19369 * register names, MMIX: MMIX-Regs. (line 6) 19370 * register names, MSP 430: MSP430-Regs. (line 6) 19371 * register names, Sparc: Sparc-Regs. (line 6) 19372 * register names, V850: V850-Regs. (line 6) 19373 * register names, VAX: VAX-operands. (line 17) 19374 * register names, Xtensa: Xtensa Registers. (line 6) 19375 * register names, Z80: Z80-Regs. (line 6) 19376 * register operands, i386: i386-Syntax. (line 15) 19377 * register operands, x86-64: i386-Syntax. (line 15) 19378 * registers, D10V: D10V-Regs. (line 6) 19379 * registers, D30V: D30V-Regs. (line 6) 19380 * registers, i386: i386-Regs. (line 6) 19381 * registers, SH: SH-Regs. (line 6) 19382 * registers, SH64: SH64-Regs. (line 6) 19383 * registers, TIC54X memory-mapped: TIC54X-MMRegs. (line 6) 19384 * registers, x86-64: i386-Regs. (line 6) 19385 * registers, Z8000: Z8000-Regs. (line 6) 19386 * relaxation: Xtensa Relaxation. (line 6) 19387 * relaxation of ADDI instructions: Xtensa Immediate Relaxation. 19388 (line 43) 19389 * relaxation of branch instructions: Xtensa Branch Relaxation. 19390 (line 6) 19391 * relaxation of call instructions: Xtensa Call Relaxation. 19392 (line 6) 19393 * relaxation of immediate fields: Xtensa Immediate Relaxation. 19394 (line 6) 19395 * relaxation of L16SI instructions: Xtensa Immediate Relaxation. 19396 (line 23) 19397 * relaxation of L16UI instructions: Xtensa Immediate Relaxation. 19398 (line 23) 19399 * relaxation of L32I instructions: Xtensa Immediate Relaxation. 19400 (line 23) 19401 * relaxation of L8UI instructions: Xtensa Immediate Relaxation. 19402 (line 23) 19403 * relaxation of MOVI instructions: Xtensa Immediate Relaxation. 19404 (line 12) 19405 * reloc directive: Reloc. (line 6) 19406 * relocation: Sections. (line 6) 19407 * relocation example: Ld Sections. (line 40) 19408 * relocations, Alpha: Alpha-Relocs. (line 6) 19409 * relocations, Sparc: Sparc-Relocs. (line 6) 19410 * repeat prefixes, i386: i386-Prefixes. (line 44) 19411 * reporting bugs in assembler: Reporting Bugs. (line 6) 19412 * rept directive: Rept. (line 6) 19413 * req directive, ARM: ARM Directives. (line 13) 19414 * reserve directive, SPARC: Sparc-Directives. (line 39) 19415 * return instructions, i386: i386-Syntax. (line 38) 19416 * return instructions, x86-64: i386-Syntax. (line 38) 19417 * REX prefixes, i386: i386-Prefixes. (line 46) 19418 * rsect: Z8000 Directives. (line 52) 19419 * sblock directive, TIC54X: TIC54X-Directives. (line 183) 19420 * sbttl directive: Sbttl. (line 6) 19421 * schedule directive: Schedule Directive. (line 6) 19422 * scl directive: Scl. (line 6) 19423 * sdaoff pseudo-op, V850: V850 Opcodes. (line 65) 19424 * search path for .include: I. (line 6) 19425 * sect directive, MSP 430: MSP430 Directives. (line 18) 19426 * sect directive, TIC54X: TIC54X-Directives. (line 189) 19427 * section directive (COFF version): Section. (line 16) 19428 * section directive (ELF version): Section. (line 67) 19429 * section directive, V850: V850 Directives. (line 9) 19430 * section override prefixes, i386: i386-Prefixes. (line 23) 19431 * Section Stack <1>: Previous. (line 6) 19432 * Section Stack <2>: PopSection. (line 6) 19433 * Section Stack <3>: PushSection. (line 6) 19434 * Section Stack <4>: SubSection. (line 6) 19435 * Section Stack: Section. (line 62) 19436 * section-relative addressing: Secs Background. (line 68) 19437 * sections: Sections. (line 6) 19438 * sections in messages, internal: As Sections. (line 6) 19439 * sections, i386: i386-Syntax. (line 44) 19440 * sections, named: Ld Sections. (line 8) 19441 * sections, x86-64: i386-Syntax. (line 44) 19442 * seg directive, SPARC: Sparc-Directives. (line 44) 19443 * segm: Z8000 Directives. (line 10) 19444 * set directive: Set. (line 6) 19445 * set directive, TIC54X: TIC54X-Directives. (line 192) 19446 * SH addressing modes: SH-Addressing. (line 6) 19447 * SH floating point (IEEE): SH Floating Point. (line 6) 19448 * SH line comment character: SH-Chars. (line 6) 19449 * SH line separator: SH-Chars. (line 8) 19450 * SH machine directives: SH Directives. (line 6) 19451 * SH opcode summary: SH Opcodes. (line 6) 19452 * SH options: SH Options. (line 6) 19453 * SH registers: SH-Regs. (line 6) 19454 * SH support: SH-Dependent. (line 6) 19455 * SH64 ABI options: SH64 Options. (line 29) 19456 * SH64 addressing modes: SH64-Addressing. (line 6) 19457 * SH64 ISA options: SH64 Options. (line 6) 19458 * SH64 line comment character: SH64-Chars. (line 6) 19459 * SH64 line separator: SH64-Chars. (line 8) 19460 * SH64 machine directives: SH64 Directives. (line 9) 19461 * SH64 opcode summary: SH64 Opcodes. (line 6) 19462 * SH64 options: SH64 Options. (line 6) 19463 * SH64 registers: SH64-Regs. (line 6) 19464 * SH64 support: SH64-Dependent. (line 6) 19465 * shigh directive, M32R: M32R-Directives. (line 26) 19466 * short directive: Short. (line 6) 19467 * short directive, ARC: ARC Directives. (line 171) 19468 * short directive, TIC54X: TIC54X-Directives. (line 111) 19469 * SIMD, i386: i386-SIMD. (line 6) 19470 * SIMD, x86-64: i386-SIMD. (line 6) 19471 * single character constant: Chars. (line 6) 19472 * single directive: Single. (line 6) 19473 * single directive, i386: i386-Float. (line 14) 19474 * single directive, x86-64: i386-Float. (line 14) 19475 * single quote, Z80: Z80-Chars. (line 13) 19476 * sixteen bit integers: hword. (line 6) 19477 * sixteen byte integer: Octa. (line 6) 19478 * size directive (COFF version): Size. (line 11) 19479 * size directive (ELF version): Size. (line 19) 19480 * size modifiers, D10V: D10V-Size. (line 6) 19481 * size modifiers, D30V: D30V-Size. (line 6) 19482 * size modifiers, M680x0: M68K-Syntax. (line 8) 19483 * size prefixes, i386: i386-Prefixes. (line 27) 19484 * size suffixes, H8/300: H8/300 Opcodes. (line 163) 19485 * size, translations, Sparc: Sparc-Size-Translations. 19486 (line 6) 19487 * sizes operands, i386: i386-Syntax. (line 29) 19488 * sizes operands, x86-64: i386-Syntax. (line 29) 19489 * skip directive: Skip. (line 6) 19490 * skip directive, M680x0: M68K-Directives. (line 19) 19491 * skip directive, SPARC: Sparc-Directives. (line 48) 19492 * sleb128 directive: Sleb128. (line 6) 19493 * small objects, MIPS ECOFF: MIPS Object. (line 11) 19494 * SmartMIPS instruction generation override: MIPS ASE instruction generation overrides. 19495 (line 11) 19496 * SOM symbol attributes: SOM Symbols. (line 6) 19497 * source program: Input Files. (line 6) 19498 * source, destination operands; i386: i386-Syntax. (line 22) 19499 * source, destination operands; x86-64: i386-Syntax. (line 22) 19500 * sp register: Xtensa Registers. (line 6) 19501 * sp register, V850: V850-Regs. (line 14) 19502 * space directive: Space. (line 6) 19503 * space directive, TIC54X: TIC54X-Directives. (line 197) 19504 * space used, maximum for assembly: statistics. (line 6) 19505 * SPARC architectures: Sparc-Opts. (line 6) 19506 * Sparc constants: Sparc-Constants. (line 6) 19507 * SPARC data alignment: Sparc-Aligned-Data. (line 6) 19508 * SPARC floating point (IEEE): Sparc-Float. (line 6) 19509 * Sparc line comment character: Sparc-Chars. (line 6) 19510 * Sparc line separator: Sparc-Chars. (line 8) 19511 * SPARC machine directives: Sparc-Directives. (line 6) 19512 * SPARC options: Sparc-Opts. (line 6) 19513 * Sparc registers: Sparc-Regs. (line 6) 19514 * Sparc relocations: Sparc-Relocs. (line 6) 19515 * Sparc size translations: Sparc-Size-Translations. 19516 (line 6) 19517 * SPARC support: Sparc-Dependent. (line 6) 19518 * SPARC syntax: Sparc-Aligned-Data. (line 21) 19519 * special characters, ARC: ARC-Chars. (line 6) 19520 * special characters, M680x0: M68K-Chars. (line 6) 19521 * special purpose registers, MSP 430: MSP430-Regs. (line 11) 19522 * sslist directive, TIC54X: TIC54X-Directives. (line 204) 19523 * ssnolist directive, TIC54X: TIC54X-Directives. (line 204) 19524 * stabd directive: Stab. (line 38) 19525 * stabn directive: Stab. (line 48) 19526 * stabs directive: Stab. (line 51) 19527 * stabX directives: Stab. (line 6) 19528 * standard assembler sections: Secs Background. (line 27) 19529 * standard input, as input file: Command Line. (line 10) 19530 * statement separator character: Statements. (line 6) 19531 * statement separator, Alpha: Alpha-Chars. (line 8) 19532 * statement separator, ARM: ARM-Chars. (line 10) 19533 * statement separator, AVR: AVR-Chars. (line 10) 19534 * statement separator, H8/300: H8/300-Chars. (line 8) 19535 * statement separator, IA-64: IA-64-Chars. (line 8) 19536 * statement separator, SH: SH-Chars. (line 8) 19537 * statement separator, SH64: SH64-Chars. (line 8) 19538 * statement separator, Sparc: Sparc-Chars. (line 8) 19539 * statement separator, Z8000: Z8000-Chars. (line 8) 19540 * statements, structure of: Statements. (line 6) 19541 * statistics, about assembly: statistics. (line 6) 19542 * stopping the assembly: Abort. (line 6) 19543 * string constants: Strings. (line 6) 19544 * string directive: String. (line 8) 19545 * string directive on HPPA: HPPA Directives. (line 137) 19546 * string directive, TIC54X: TIC54X-Directives. (line 209) 19547 * string literals: Ascii. (line 6) 19548 * string, copying to object file: String. (line 8) 19549 * string16 directive: String. (line 8) 19550 * string16, copying to object file: String. (line 8) 19551 * string32 directive: String. (line 8) 19552 * string32, copying to object file: String. (line 8) 19553 * string64 directive: String. (line 8) 19554 * string64, copying to object file: String. (line 8) 19555 * string8 directive: String. (line 8) 19556 * string8, copying to object file: String. (line 8) 19557 * struct directive: Struct. (line 6) 19558 * struct directive, TIC54X: TIC54X-Directives. (line 217) 19559 * structure debugging, COFF: Tag. (line 6) 19560 * sub-instruction ordering, D10V: D10V-Chars. (line 6) 19561 * sub-instruction ordering, D30V: D30V-Chars. (line 6) 19562 * sub-instructions, D10V: D10V-Subs. (line 6) 19563 * sub-instructions, D30V: D30V-Subs. (line 6) 19564 * subexpressions: Arguments. (line 24) 19565 * subsection directive: SubSection. (line 6) 19566 * subsym builtins, TIC54X: TIC54X-Macros. (line 16) 19567 * subtitles for listings: Sbttl. (line 6) 19568 * subtraction, permitted arguments: Infix Ops. (line 49) 19569 * summary of options: Overview. (line 6) 19570 * support: HPPA-Dependent. (line 6) 19571 * supporting files, including: Include. (line 6) 19572 * suppressing warnings: W. (line 11) 19573 * sval: Z8000 Directives. (line 33) 19574 * symbol attributes: Symbol Attributes. (line 6) 19575 * symbol attributes, a.out: a.out Symbols. (line 6) 19576 * symbol attributes, COFF: COFF Symbols. (line 6) 19577 * symbol attributes, SOM: SOM Symbols. (line 6) 19578 * symbol descriptor, COFF: Desc. (line 6) 19579 * symbol modifiers <1>: M68HC11-Modifiers. (line 12) 19580 * symbol modifiers <2>: AVR-Modifiers. (line 12) 19581 * symbol modifiers: M32C-Modifiers. (line 11) 19582 * symbol names: Symbol Names. (line 6) 19583 * symbol names, $ in <1>: SH64-Chars. (line 10) 19584 * symbol names, $ in <2>: D30V-Chars. (line 63) 19585 * symbol names, $ in <3>: D10V-Chars. (line 46) 19586 * symbol names, $ in: SH-Chars. (line 10) 19587 * symbol names, local: Symbol Names. (line 22) 19588 * symbol names, temporary: Symbol Names. (line 35) 19589 * symbol storage class (COFF): Scl. (line 6) 19590 * symbol type: Symbol Type. (line 6) 19591 * symbol type, COFF: Type. (line 11) 19592 * symbol type, ELF: Type. (line 22) 19593 * symbol value: Symbol Value. (line 6) 19594 * symbol value, setting: Set. (line 6) 19595 * symbol values, assigning: Setting Symbols. (line 6) 19596 * symbol versioning: Symver. (line 6) 19597 * symbol, common: Comm. (line 6) 19598 * symbol, making visible to linker: Global. (line 6) 19599 * symbolic debuggers, information for: Stab. (line 6) 19600 * symbols: Symbols. (line 6) 19601 * Symbols in position-independent code, CRIS: CRIS-Pic. (line 6) 19602 * symbols with uppercase, VAX/VMS: VAX-Opts. (line 42) 19603 * symbols, assigning values to: Equ. (line 6) 19604 * Symbols, built-in, CRIS: CRIS-Symbols. (line 6) 19605 * Symbols, CRIS, built-in: CRIS-Symbols. (line 6) 19606 * symbols, local common: Lcomm. (line 6) 19607 * symver directive: Symver. (line 6) 19608 * syntax compatibility, i386: i386-Syntax. (line 6) 19609 * syntax compatibility, x86-64: i386-Syntax. (line 6) 19610 * syntax, AVR: AVR-Modifiers. (line 6) 19611 * syntax, BFIN: BFIN Syntax. (line 6) 19612 * syntax, D10V: D10V-Syntax. (line 6) 19613 * syntax, D30V: D30V-Syntax. (line 6) 19614 * syntax, M32C: M32C-Modifiers. (line 6) 19615 * syntax, M680x0: M68K-Syntax. (line 8) 19616 * syntax, M68HC11 <1>: M68HC11-Modifiers. (line 6) 19617 * syntax, M68HC11: M68HC11-Syntax. (line 6) 19618 * syntax, machine-independent: Syntax. (line 6) 19619 * syntax, SPARC: Sparc-Aligned-Data. (line 21) 19620 * syntax, Xtensa assembler: Xtensa Syntax. (line 6) 19621 * sysproc directive, i960: Directives-i960. (line 37) 19622 * tab (\t): Strings. (line 27) 19623 * tab directive, TIC54X: TIC54X-Directives. (line 248) 19624 * tag directive: Tag. (line 6) 19625 * tag directive, TIC54X: TIC54X-Directives. (line 251) 19626 * tdaoff pseudo-op, V850: V850 Opcodes. (line 81) 19627 * temporary symbol names: Symbol Names. (line 35) 19628 * text and data sections, joining: R. (line 6) 19629 * text directive: Text. (line 6) 19630 * text section: Ld Sections. (line 9) 19631 * tfloat directive, i386: i386-Float. (line 14) 19632 * tfloat directive, x86-64: i386-Float. (line 14) 19633 * thumb directive, ARM: ARM Directives. (line 57) 19634 * Thumb support: ARM-Dependent. (line 6) 19635 * thumb_func directive, ARM: ARM Directives. (line 67) 19636 * thumb_set directive, ARM: ARM Directives. (line 78) 19637 * TIC54X builtin math functions: TIC54X-Builtins. (line 6) 19638 * TIC54X machine directives: TIC54X-Directives. (line 6) 19639 * TIC54X memory-mapped registers: TIC54X-MMRegs. (line 6) 19640 * TIC54X options: TIC54X-Opts. (line 6) 19641 * TIC54X subsym builtins: TIC54X-Macros. (line 16) 19642 * TIC54X support: TIC54X-Dependent. (line 6) 19643 * TIC54X-specific macros: TIC54X-Macros. (line 6) 19644 * time, total for assembly: statistics. (line 6) 19645 * title directive: Title. (line 6) 19646 * tp register, V850: V850-Regs. (line 20) 19647 * transform directive: Transform Directive. (line 6) 19648 * trusted compiler: f. (line 6) 19649 * turning preprocessing on and off: Preprocessing. (line 27) 19650 * type directive (COFF version): Type. (line 11) 19651 * type directive (ELF version): Type. (line 22) 19652 * type of a symbol: Symbol Type. (line 6) 19653 * ualong directive, SH: SH Directives. (line 6) 19654 * uaword directive, SH: SH Directives. (line 6) 19655 * ubyte directive, TIC54X: TIC54X-Directives. (line 36) 19656 * uchar directive, TIC54X: TIC54X-Directives. (line 36) 19657 * uhalf directive, TIC54X: TIC54X-Directives. (line 111) 19658 * uint directive, TIC54X: TIC54X-Directives. (line 111) 19659 * uleb128 directive: Uleb128. (line 6) 19660 * ulong directive, TIC54X: TIC54X-Directives. (line 135) 19661 * undefined section: Ld Sections. (line 36) 19662 * union directive, TIC54X: TIC54X-Directives. (line 251) 19663 * unreq directive, ARM: ARM Directives. (line 18) 19664 * unsegm: Z8000 Directives. (line 14) 19665 * usect directive, TIC54X: TIC54X-Directives. (line 263) 19666 * ushort directive, TIC54X: TIC54X-Directives. (line 111) 19667 * uword directive, TIC54X: TIC54X-Directives. (line 111) 19668 * V850 command line options: V850 Options. (line 9) 19669 * V850 floating point (IEEE): V850 Floating Point. (line 6) 19670 * V850 line comment character: V850-Chars. (line 6) 19671 * V850 machine directives: V850 Directives. (line 6) 19672 * V850 opcodes: V850 Opcodes. (line 6) 19673 * V850 options (none): V850 Options. (line 6) 19674 * V850 register names: V850-Regs. (line 6) 19675 * V850 support: V850-Dependent. (line 6) 19676 * val directive: Val. (line 6) 19677 * value attribute, COFF: Val. (line 6) 19678 * value of a symbol: Symbol Value. (line 6) 19679 * var directive, TIC54X: TIC54X-Directives. (line 273) 19680 * VAX bitfields not supported: VAX-no. (line 6) 19681 * VAX branch improvement: VAX-branch. (line 6) 19682 * VAX command-line options ignored: VAX-Opts. (line 6) 19683 * VAX displacement sizing character: VAX-operands. (line 12) 19684 * VAX floating point: VAX-float. (line 6) 19685 * VAX immediate character: VAX-operands. (line 6) 19686 * VAX indirect character: VAX-operands. (line 9) 19687 * VAX machine directives: VAX-directives. (line 6) 19688 * VAX opcode mnemonics: VAX-opcodes. (line 6) 19689 * VAX operand notation: VAX-operands. (line 6) 19690 * VAX register names: VAX-operands. (line 17) 19691 * VAX support: Vax-Dependent. (line 6) 19692 * Vax-11 C compatibility: VAX-Opts. (line 42) 19693 * VAX/VMS options: VAX-Opts. (line 42) 19694 * version directive: Version. (line 6) 19695 * version directive, TIC54X: TIC54X-Directives. (line 277) 19696 * version of assembler: v. (line 6) 19697 * versions of symbols: Symver. (line 6) 19698 * visibility <1>: Protected. (line 6) 19699 * visibility <2>: Hidden. (line 6) 19700 * visibility: Internal. (line 6) 19701 * VMS (VAX) options: VAX-Opts. (line 42) 19702 * vtable_entry directive: VTableEntry. (line 6) 19703 * vtable_inherit directive: VTableInherit. (line 6) 19704 * warning directive: Warning. (line 6) 19705 * warning for altered difference tables: K. (line 6) 19706 * warning messages: Errors. (line 6) 19707 * warnings, causing error: W. (line 16) 19708 * warnings, M32R: M32R-Warnings. (line 6) 19709 * warnings, suppressing: W. (line 11) 19710 * warnings, switching on: W. (line 19) 19711 * weak directive: Weak. (line 6) 19712 * weakref directive: Weakref. (line 6) 19713 * whitespace: Whitespace. (line 6) 19714 * whitespace, removed by preprocessor: Preprocessing. (line 7) 19715 * wide floating point directives, VAX: VAX-directives. (line 10) 19716 * width directive, TIC54X: TIC54X-Directives. (line 127) 19717 * Width of continuation lines of disassembly output: listing. (line 21) 19718 * Width of first line disassembly output: listing. (line 16) 19719 * Width of source line output: listing. (line 28) 19720 * wmsg directive, TIC54X: TIC54X-Directives. (line 77) 19721 * word directive: Word. (line 6) 19722 * word directive, ARC: ARC Directives. (line 174) 19723 * word directive, H8/300: H8/300 Directives. (line 6) 19724 * word directive, i386: i386-Float. (line 21) 19725 * word directive, SPARC: Sparc-Directives. (line 51) 19726 * word directive, TIC54X: TIC54X-Directives. (line 111) 19727 * word directive, x86-64: i386-Float. (line 21) 19728 * writing patterns in memory: Fill. (line 6) 19729 * wval: Z8000 Directives. (line 24) 19730 * x86 machine directives: i386-Directives. (line 6) 19731 * x86-64 arch directive: i386-Arch. (line 6) 19732 * x86-64 att_syntax pseudo op: i386-Syntax. (line 6) 19733 * x86-64 conversion instructions: i386-Mnemonics. (line 32) 19734 * x86-64 floating point: i386-Float. (line 6) 19735 * x86-64 immediate operands: i386-Syntax. (line 15) 19736 * x86-64 instruction naming: i386-Mnemonics. (line 6) 19737 * x86-64 intel_syntax pseudo op: i386-Syntax. (line 6) 19738 * x86-64 jump optimization: i386-Jumps. (line 6) 19739 * x86-64 jump, call, return: i386-Syntax. (line 38) 19740 * x86-64 jump/call operands: i386-Syntax. (line 15) 19741 * x86-64 memory references: i386-Memory. (line 6) 19742 * x86-64 options: i386-Options. (line 6) 19743 * x86-64 register operands: i386-Syntax. (line 15) 19744 * x86-64 registers: i386-Regs. (line 6) 19745 * x86-64 sections: i386-Syntax. (line 44) 19746 * x86-64 size suffixes: i386-Syntax. (line 29) 19747 * x86-64 source, destination operands: i386-Syntax. (line 22) 19748 * x86-64 support: i386-Dependent. (line 6) 19749 * x86-64 syntax compatibility: i386-Syntax. (line 6) 19750 * xfloat directive, TIC54X: TIC54X-Directives. (line 64) 19751 * xlong directive, TIC54X: TIC54X-Directives. (line 135) 19752 * Xtensa architecture: Xtensa-Dependent. (line 6) 19753 * Xtensa assembler syntax: Xtensa Syntax. (line 6) 19754 * Xtensa directives: Xtensa Directives. (line 6) 19755 * Xtensa opcode names: Xtensa Opcodes. (line 6) 19756 * Xtensa register names: Xtensa Registers. (line 6) 19757 * xword directive, SPARC: Sparc-Directives. (line 55) 19758 * Z80 $: Z80-Chars. (line 8) 19759 * Z80 ': Z80-Chars. (line 13) 19760 * Z80 floating point: Z80 Floating Point. (line 6) 19761 * Z80 line comment character: Z80-Chars. (line 6) 19762 * Z80 options: Z80 Options. (line 6) 19763 * Z80 registers: Z80-Regs. (line 6) 19764 * Z80 support: Z80-Dependent. (line 6) 19765 * Z80 Syntax: Z80 Options. (line 47) 19766 * Z80, \: Z80-Chars. (line 11) 19767 * Z80, case sensitivity: Z80-Case. (line 6) 19768 * Z80-only directives: Z80 Directives. (line 9) 19769 * Z800 addressing modes: Z8000-Addressing. (line 6) 19770 * Z8000 directives: Z8000 Directives. (line 6) 19771 * Z8000 line comment character: Z8000-Chars. (line 6) 19772 * Z8000 line separator: Z8000-Chars. (line 8) 19773 * Z8000 opcode summary: Z8000 Opcodes. (line 6) 19774 * Z8000 options: Z8000 Options. (line 6) 19775 * Z8000 registers: Z8000-Regs. (line 6) 19776 * Z8000 support: Z8000-Dependent. (line 6) 19777 * zdaoff pseudo-op, V850: V850 Opcodes. (line 99) 19778 * zero register, V850: V850-Regs. (line 7) 19779 * zero-terminated strings: Asciz. (line 6) 19780 19781 19782 19783 Tag Table: 19784 Node: Top840 19785 Node: Overview1826 19786 Node: Manual29717 19787 Node: GNU Assembler30661 19788 Node: Object Formats31832 19789 Node: Command Line32284 19790 Node: Input Files33371 19791 Node: Object35352 19792 Node: Errors36248 19793 Node: Invoking37443 19794 Node: a39398 19795 Node: alternate41309 19796 Node: D41481 19797 Node: f41714 19798 Node: I42222 19799 Node: K42766 19800 Node: L43070 19801 Node: listing43809 19802 Node: M45468 19803 Node: MD49869 19804 Node: o50295 19805 Node: R50750 19806 Node: statistics51780 19807 Node: traditional-format52187 19808 Node: v52660 19809 Node: W52935 19810 Node: Z53842 19811 Node: Syntax54364 19812 Node: Preprocessing54955 19813 Node: Whitespace56518 19814 Node: Comments56914 19815 Node: Symbol Intro59067 19816 Node: Statements59757 19817 Node: Constants61678 19818 Node: Characters62309 19819 Node: Strings62811 19820 Node: Chars64977 19821 Node: Numbers65731 19822 Node: Integers66271 19823 Node: Bignums66927 19824 Node: Flonums67283 19825 Node: Sections69030 19826 Node: Secs Background69408 19827 Node: Ld Sections74447 19828 Node: As Sections76831 19829 Node: Sub-Sections77741 19830 Node: bss80886 19831 Node: Symbols81836 19832 Node: Labels82484 19833 Node: Setting Symbols83215 19834 Node: Symbol Names83711 19835 Node: Dot88774 19836 Node: Symbol Attributes89221 19837 Node: Symbol Value89958 19838 Node: Symbol Type91003 19839 Node: a.out Symbols91391 19840 Node: Symbol Desc91653 19841 Node: Symbol Other91948 19842 Node: COFF Symbols92117 19843 Node: SOM Symbols92790 19844 Node: Expressions93232 19845 Node: Empty Exprs93981 19846 Node: Integer Exprs94328 19847 Node: Arguments94723 19848 Node: Operators95829 19849 Node: Prefix Ops96164 19850 Node: Infix Ops96492 19851 Node: Pseudo Ops98882 19852 Node: Abort104288 19853 Node: ABORT (COFF)104700 19854 Node: Align104908 19855 Node: Ascii107190 19856 Node: Asciz107499 19857 Node: Balign107744 19858 Node: Byte109607 19859 Node: Comm109845 19860 Node: CFI directives111219 19861 Node: LNS directives116414 19862 Node: Data118489 19863 Node: Def118816 19864 Node: Desc119048 19865 Node: Dim119548 19866 Node: Double119805 19867 Node: Eject120143 19868 Node: Else120318 19869 Node: Elseif120618 19870 Node: End120912 19871 Node: Endef121127 19872 Node: Endfunc121304 19873 Node: Endif121479 19874 Node: Equ121740 19875 Node: Equiv122254 19876 Node: Eqv122810 19877 Node: Err123174 19878 Node: Error123485 19879 Node: Exitm123930 19880 Node: Extern124099 19881 Node: Fail124360 19882 Node: File124805 19883 Node: Fill125282 19884 Node: Float126246 19885 Node: Func126588 19886 Node: Global127178 19887 Node: Gnu_attribute127935 19888 Node: Hidden128160 19889 Node: hword128746 19890 Node: Ident129074 19891 Node: If129648 19892 Node: Incbin132707 19893 Node: Include133402 19894 Node: Int133953 19895 Node: Internal134334 19896 Node: Irp134982 19897 Node: Irpc135861 19898 Node: Lcomm136778 19899 Node: Lflags137526 19900 Node: Line137720 19901 Node: Linkonce138639 19902 Node: Ln139868 19903 Node: MRI140029 19904 Node: List140367 19905 Node: Long140975 19906 Node: Macro141162 19907 Node: Altmacro147084 19908 Node: Noaltmacro148415 19909 Node: Nolist148584 19910 Node: Octa149014 19911 Node: Org149348 19912 Node: P2align150631 19913 Node: Previous152559 19914 Node: PopSection153972 19915 Node: Print154480 19916 Node: Protected154709 19917 Node: Psize155356 19918 Node: Purgem156040 19919 Node: PushSection156261 19920 Node: Quad157004 19921 Node: Reloc157460 19922 Node: Rept158221 19923 Node: Sbttl158635 19924 Node: Scl159000 19925 Node: Section159341 19926 Node: Set164478 19927 Node: Short165115 19928 Node: Single165436 19929 Node: Size165781 19930 Node: Sleb128166453 19931 Node: Skip166777 19932 Node: Space167101 19933 Node: Stab167742 19934 Node: String169746 19935 Node: Struct170740 19936 Node: SubSection171465 19937 Node: Symver172028 19938 Node: Tag174421 19939 Node: Text174803 19940 Node: Title175124 19941 Node: Type175505 19942 Node: Uleb128177228 19943 Node: Val177552 19944 Node: Version177802 19945 Node: VTableEntry178077 19946 Node: VTableInherit178367 19947 Node: Warning178817 19948 Node: Weak179051 19949 Node: Weakref179720 19950 Node: Word180685 19951 Node: Deprecated182531 19952 Node: Object Attributes182766 19953 Node: GNU Object Attributes184486 19954 Node: Defining New Object Attributes187039 19955 Node: Machine Dependencies187836 19956 Node: Alpha-Dependent190720 19957 Node: Alpha Notes191134 19958 Node: Alpha Options191415 19959 Node: Alpha Syntax193613 19960 Node: Alpha-Chars194082 19961 Node: Alpha-Regs194313 19962 Node: Alpha-Relocs194700 19963 Node: Alpha Floating Point200958 19964 Node: Alpha Directives201180 19965 Node: Alpha Opcodes206703 19966 Node: ARC-Dependent206998 19967 Node: ARC Options207381 19968 Node: ARC Syntax208450 19969 Node: ARC-Chars208682 19970 Node: ARC-Regs208814 19971 Node: ARC Floating Point208938 19972 Node: ARC Directives209249 19973 Node: ARC Opcodes215221 19974 Node: ARM-Dependent215447 19975 Node: ARM Options215912 19976 Node: ARM Syntax222045 19977 Node: ARM-Chars222314 19978 Node: ARM-Regs222838 19979 Node: ARM Floating Point223047 19980 Node: ARM-Relocations223246 19981 Node: ARM Directives224211 19982 Ref: arm_fnstart228226 19983 Ref: arm_fnend228301 19984 Ref: arm_save229318 19985 Ref: arm_pad230648 19986 Ref: arm_movsp230854 19987 Ref: arm_setfp231032 19988 Node: ARM Opcodes232583 19989 Node: ARM Mapping Symbols234671 19990 Node: ARM Unwinding Tutorial235481 19991 Node: AVR-Dependent241683 19992 Node: AVR Options241969 19993 Node: AVR Syntax244800 19994 Node: AVR-Chars245087 19995 Node: AVR-Regs245493 19996 Node: AVR-Modifiers246072 19997 Node: AVR Opcodes248132 19998 Node: BFIN-Dependent253378 19999 Node: BFIN Syntax253632 20000 Node: BFIN Directives259328 20001 Node: CR16-Dependent259735 20002 Node: CR16 Operand Qualifiers259979 20003 Node: CRIS-Dependent261745 20004 Node: CRIS-Opts262091 20005 Ref: march-option263709 20006 Node: CRIS-Expand265526 20007 Node: CRIS-Symbols266709 20008 Node: CRIS-Syntax267878 20009 Node: CRIS-Chars268214 20010 Node: CRIS-Pic268765 20011 Ref: crispic268961 20012 Node: CRIS-Regs272501 20013 Node: CRIS-Pseudos272918 20014 Ref: crisnous273694 20015 Node: D10V-Dependent274976 20016 Node: D10V-Opts275327 20017 Node: D10V-Syntax276290 20018 Node: D10V-Size276819 20019 Node: D10V-Subs277792 20020 Node: D10V-Chars278827 20021 Node: D10V-Regs280431 20022 Node: D10V-Addressing281476 20023 Node: D10V-Word282162 20024 Node: D10V-Float282677 20025 Node: D10V-Opcodes282988 20026 Node: D30V-Dependent283381 20027 Node: D30V-Opts283734 20028 Node: D30V-Syntax284409 20029 Node: D30V-Size284941 20030 Node: D30V-Subs285912 20031 Node: D30V-Chars286947 20032 Node: D30V-Guarded289245 20033 Node: D30V-Regs289925 20034 Node: D30V-Addressing291064 20035 Node: D30V-Float291732 20036 Node: D30V-Opcodes292043 20037 Node: H8/300-Dependent292436 20038 Node: H8/300 Options292848 20039 Node: H8/300 Syntax293115 20040 Node: H8/300-Chars293416 20041 Node: H8/300-Regs293715 20042 Node: H8/300-Addressing294634 20043 Node: H8/300 Floating Point295675 20044 Node: H8/300 Directives296002 20045 Node: H8/300 Opcodes297130 20046 Node: HPPA-Dependent305452 20047 Node: HPPA Notes305887 20048 Node: HPPA Options306645 20049 Node: HPPA Syntax306840 20050 Node: HPPA Floating Point308110 20051 Node: HPPA Directives308316 20052 Node: HPPA Opcodes317002 20053 Node: ESA/390-Dependent317261 20054 Node: ESA/390 Notes317721 20055 Node: ESA/390 Options318512 20056 Node: ESA/390 Syntax318722 20057 Node: ESA/390 Floating Point320895 20058 Node: ESA/390 Directives321174 20059 Node: ESA/390 Opcodes324463 20060 Node: i386-Dependent324725 20061 Node: i386-Options325849 20062 Node: i386-Directives329551 20063 Node: i386-Syntax330289 20064 Node: i386-Mnemonics332722 20065 Node: i386-Regs335790 20066 Node: i386-Prefixes337835 20067 Node: i386-Memory340595 20068 Node: i386-Jumps343532 20069 Node: i386-Float344653 20070 Node: i386-SIMD346484 20071 Node: i386-16bit347595 20072 Node: i386-Bugs349635 20073 Node: i386-Arch350389 20074 Node: i386-Notes352894 20075 Node: i860-Dependent353752 20076 Node: Notes-i860354148 20077 Node: Options-i860355053 20078 Node: Directives-i860356416 20079 Node: Opcodes for i860357485 20080 Node: i960-Dependent359652 20081 Node: Options-i960360055 20082 Node: Floating Point-i960363940 20083 Node: Directives-i960364208 20084 Node: Opcodes for i960366242 20085 Node: callj-i960366859 20086 Node: Compare-and-branch-i960367348 20087 Node: IA-64-Dependent369252 20088 Node: IA-64 Options369553 20089 Node: IA-64 Syntax372713 20090 Node: IA-64-Chars373076 20091 Node: IA-64-Regs373306 20092 Node: IA-64-Bits374232 20093 Node: IA-64 Opcodes374741 20094 Node: IP2K-Dependent375013 20095 Node: IP2K-Opts375241 20096 Node: M32C-Dependent375721 20097 Node: M32C-Opts376245 20098 Node: M32C-Modifiers376668 20099 Node: M32R-Dependent378455 20100 Node: M32R-Opts378776 20101 Node: M32R-Directives382943 20102 Node: M32R-Warnings386918 20103 Node: M68K-Dependent389924 20104 Node: M68K-Opts390391 20105 Node: M68K-Syntax397783 20106 Node: M68K-Moto-Syntax399623 20107 Node: M68K-Float402213 20108 Node: M68K-Directives402733 20109 Node: M68K-opcodes404061 20110 Node: M68K-Branch404287 20111 Node: M68K-Chars408485 20112 Node: M68HC11-Dependent408898 20113 Node: M68HC11-Opts409429 20114 Node: M68HC11-Syntax413250 20115 Node: M68HC11-Modifiers415464 20116 Node: M68HC11-Directives417292 20117 Node: M68HC11-Float418668 20118 Node: M68HC11-opcodes419196 20119 Node: M68HC11-Branch419378 20120 Node: MIPS-Dependent421827 20121 Node: MIPS Opts422987 20122 Node: MIPS Object432573 20123 Node: MIPS Stabs434139 20124 Node: MIPS symbol sizes434861 20125 Node: MIPS ISA436530 20126 Node: MIPS autoextend438004 20127 Node: MIPS insn438734 20128 Node: MIPS option stack439231 20129 Node: MIPS ASE instruction generation overrides440005 20130 Node: MIPS floating-point441819 20131 Node: MMIX-Dependent442705 20132 Node: MMIX-Opts443085 20133 Node: MMIX-Expand446689 20134 Node: MMIX-Syntax448004 20135 Ref: mmixsite448361 20136 Node: MMIX-Chars449202 20137 Node: MMIX-Symbols449856 20138 Node: MMIX-Regs451924 20139 Node: MMIX-Pseudos452949 20140 Ref: MMIX-loc453090 20141 Ref: MMIX-local454170 20142 Ref: MMIX-is454702 20143 Ref: MMIX-greg454973 20144 Ref: GREG-base455892 20145 Ref: MMIX-byte457209 20146 Ref: MMIX-constants457680 20147 Ref: MMIX-prefix458326 20148 Ref: MMIX-spec458700 20149 Node: MMIX-mmixal459034 20150 Node: MSP430-Dependent462532 20151 Node: MSP430 Options462998 20152 Node: MSP430 Syntax463284 20153 Node: MSP430-Macros463600 20154 Node: MSP430-Chars464331 20155 Node: MSP430-Regs464644 20156 Node: MSP430-Ext465204 20157 Node: MSP430 Floating Point467025 20158 Node: MSP430 Directives467249 20159 Node: MSP430 Opcodes468040 20160 Node: MSP430 Profiling Capability468435 20161 Node: PDP-11-Dependent470764 20162 Node: PDP-11-Options471153 20163 Node: PDP-11-Pseudos476224 20164 Node: PDP-11-Syntax476569 20165 Node: PDP-11-Mnemonics477321 20166 Node: PDP-11-Synthetic477623 20167 Node: PJ-Dependent477841 20168 Node: PJ Options478066 20169 Node: PPC-Dependent478343 20170 Node: PowerPC-Opts478630 20171 Node: PowerPC-Pseudo481149 20172 Node: SH-Dependent481748 20173 Node: SH Options482160 20174 Node: SH Syntax483168 20175 Node: SH-Chars483441 20176 Node: SH-Regs483735 20177 Node: SH-Addressing484349 20178 Node: SH Floating Point485258 20179 Node: SH Directives486352 20180 Node: SH Opcodes486722 20181 Node: SH64-Dependent491044 20182 Node: SH64 Options491407 20183 Node: SH64 Syntax493204 20184 Node: SH64-Chars493487 20185 Node: SH64-Regs493787 20186 Node: SH64-Addressing494883 20187 Node: SH64 Directives496066 20188 Node: SH64 Opcodes497176 20189 Node: Sparc-Dependent497892 20190 Node: Sparc-Opts498302 20191 Node: Sparc-Aligned-Data500559 20192 Node: Sparc-Syntax501391 20193 Node: Sparc-Chars501965 20194 Node: Sparc-Regs502198 20195 Node: Sparc-Constants507309 20196 Node: Sparc-Relocs512069 20197 Node: Sparc-Size-Translations516749 20198 Node: Sparc-Float518398 20199 Node: Sparc-Directives518593 20200 Node: TIC54X-Dependent520553 20201 Node: TIC54X-Opts521279 20202 Node: TIC54X-Block522322 20203 Node: TIC54X-Env522682 20204 Node: TIC54X-Constants523030 20205 Node: TIC54X-Subsyms523432 20206 Node: TIC54X-Locals525341 20207 Node: TIC54X-Builtins526085 20208 Node: TIC54X-Ext528556 20209 Node: TIC54X-Directives529127 20210 Node: TIC54X-Macros540029 20211 Node: TIC54X-MMRegs542140 20212 Node: Z80-Dependent542356 20213 Node: Z80 Options542744 20214 Node: Z80 Syntax544167 20215 Node: Z80-Chars544839 20216 Node: Z80-Regs545373 20217 Node: Z80-Case545725 20218 Node: Z80 Floating Point546170 20219 Node: Z80 Directives546364 20220 Node: Z80 Opcodes547989 20221 Node: Z8000-Dependent549333 20222 Node: Z8000 Options550294 20223 Node: Z8000 Syntax550511 20224 Node: Z8000-Chars550801 20225 Node: Z8000-Regs551034 20226 Node: Z8000-Addressing551824 20227 Node: Z8000 Directives552941 20228 Node: Z8000 Opcodes554550 20229 Node: Vax-Dependent564492 20230 Node: VAX-Opts565009 20231 Node: VAX-float568744 20232 Node: VAX-directives569376 20233 Node: VAX-opcodes570237 20234 Node: VAX-branch570626 20235 Node: VAX-operands573133 20236 Node: VAX-no573896 20237 Node: V850-Dependent574133 20238 Node: V850 Options574531 20239 Node: V850 Syntax576920 20240 Node: V850-Chars577160 20241 Node: V850-Regs577325 20242 Node: V850 Floating Point578893 20243 Node: V850 Directives579099 20244 Node: V850 Opcodes580242 20245 Node: Xtensa-Dependent586134 20246 Node: Xtensa Options586863 20247 Node: Xtensa Syntax589673 20248 Node: Xtensa Opcodes591562 20249 Node: Xtensa Registers593356 20250 Node: Xtensa Optimizations593989 20251 Node: Density Instructions594441 20252 Node: Xtensa Automatic Alignment595543 20253 Node: Xtensa Relaxation597990 20254 Node: Xtensa Branch Relaxation598898 20255 Node: Xtensa Call Relaxation600270 20256 Node: Xtensa Immediate Relaxation602056 20257 Node: Xtensa Directives604630 20258 Node: Schedule Directive606339 20259 Node: Longcalls Directive606679 20260 Node: Transform Directive607223 20261 Node: Literal Directive607965 20262 Ref: Literal Directive-Footnote-1611504 20263 Node: Literal Position Directive611646 20264 Node: Literal Prefix Directive613345 20265 Node: Absolute Literals Directive614243 20266 Node: Reporting Bugs615550 20267 Node: Bug Criteria616276 20268 Node: Bug Reporting617043 20269 Node: Acknowledgements623692 20270 Ref: Acknowledgements-Footnote-1628590 20271 Node: GNU Free Documentation License628616 20272 Node: AS Index648346 20273 20274 End Tag Table 20275
