libz.so.1 __gmon_start__ _Jv_RegisterClasses inflate inflateReset inflateInit_ inflateEnd libc.so.6 _IO_stdin_used mkdtemp fflush strcpy __rawmemchr __printf_chk fnmatch _IO_putc strncmp optind strrchr __strdup __isoc99_sscanf dcgettext mmap64 ftell strncpy __stack_chk_fail unlink realloc abort _exit strpbrk chmod sbrk __assert_fail strtod strtol calloc strlen memset warn strstr strcspn __errno_location fseek memcmp __fxstat64 __fprintf_chk ctime stdout fputc frexp fseeko64 fputs memcpy fclose __vsnprintf_chk strtoul malloc strcat umask strcasecmp ftello64 getgid __lxstat64 __xstat64 getenv optarg stderr __snprintf_chk getuid getopt_long strncasecmp strncat __realpath_chk fileno fwrite fread mkstemp64 mkstemps64 __memcpy_chk strchr fprintf __vfprintf_chk fdopen qsort bsearch fcntl __sprintf_chk memmove fopen64 bindtextdomain access strcmp strerror __asprintf_chk __libc_start_main ferror ldexp free __environ GLIBC_2.2.3 GLIBC_2.4 GLIBC_2.11 GLIBC_2.8 GLIBC_2.2 GLIBC_2.7 GLIBC_2.3.4 GLIBC_2.1 GLIBC_2.0
Usage: %s Display information from object . At least one of the following switches must be given: -a, --archive-headers Display archive header information -f, --file-headers Display the contents of the overall file header -p, --private-headers Display object format specific file header contents -h, --[section-]headers Display the contents of the section headers -x, --all-headers Display the contents of all headers -d, --disassemble Display assembler contents of executable sections -D, --disassemble-all Display assembler contents of all sections -S, --source Intermix source code with disassembly -s, --full-contents Display the full contents of all sections requested -g, --debugging Display debug information in object file -e, --debugging-tags Display debug information using ctags style -G, --stabs Display (in raw form) any STABS info in the file -W[lLiaprmfFsoR] or --dwarf[=rawline,=decodedline,=info,=abbrev,=pubnames,=aranges,=macro,=frames,=str,=loc,=Ranges] Display DWARF info in the file -t, --syms Display the contents of the symbol table(s) -T, --dynamic-syms Display the contents of the dynamic symbol table -r, --reloc Display the relocation entries in the file -R, --dynamic-reloc Display the dynamic relocation entries in the file @ Read options from -v, --version Display this program's version number -i, --info List object formats and architectures supported -H, --help Display this information The following switches are optional: -b, --target=BFDNAME Specify the target object format as BFDNAME -m, --architecture=MACHINE Specify the target architecture as MACHINE -j, --section=NAME Only display information for section NAME -M, --disassembler-options=OPT Pass text OPT on to the disassembler -EB --endian=big Assume big endian format when disassembling -EL --endian=little Assume little endian format when disassembling --file-start-context Include context from start of file (with -S) -I, --include=DIR Add DIR to search list for source files -l, --line-numbers Include line numbers and filenames in output -F, --file-offsets Include file offsets when displaying information -C, --demangle[=STYLE] Decode mangled/processed symbol names The STYLE, if specified, can be `auto', `gnu', `lucid', `arm', `hp', `edg', `gnu-v3', `java' or `gnat' -w, --wide Format output for more than 80 columns -z, --disassemble-zeroes Do not skip blocks of zeroes when disassembling --start-address=ADDR Only process data whose address is >= ADDR --stop-address=ADDR Only process data whose address is <= ADDR --prefix-addresses Print complete address alongside disassembly --[no-]show-raw-insn Display hex alongside symbolic disassembly --insn-width=WIDTH Display WIDTH bytes on a signle line for -d --adjust-vma=OFFSET Add OFFSET to all displayed section addresses --special-syms Include special symbols in symbol dumps --prefix=PREFIX Add PREFIX to absolute paths for -S --prefix-strip=LEVEL Strip initial directory names for -S Unrecognized form: %lu (not inlined) (inlined) (ANSI C) (non-ANSI C) (Ada) (C++) (Cobol 74) (Cobol 85) (FORTRAN 77) (Fortran 90) (ANSI Pascal) (Modula 2) (Java) (ANSI C99) (ADA 95) (Fortran 95) (PLI) (Objective C) (Objective C++) (Unified Parallel C) (D) (MIPS assembler) (implementation defined: %lx) (Unknown: %lx) (void) (machine address) (boolean) (complex float) (float) (signed) (signed char) (unsigned) (unsigned char) (imaginary float) (decimal float) (packed_decimal) (numeric_string) (edited) (signed_fixed) (unsigned_fixed) (HP_float80) (HP_complex_float80) (HP_float128) (HP_complex_float128) (HP_floathpintel) (HP_imaginary_float80) (HP_imaginary_float128) (user defined type) (unknown type) (public) (protected) (private) (unknown accessibility) (local) (exported) (qualified) (unknown visibility) (none) (virtual) (pure_virtual) (unknown virtuality) (case_sensitive) (up_case) (down_case) (case_insensitive) (unknown case) (normal) (program) (nocall) (user defined) (unknown convention) (undefined) (row major) (column major) (location list) [without DW_AT_frame_base] [Abbrev Number: %ld No comp units in %s section ? Unable to locate %s section! 64-bit 32-bit Length: 0x%lx (%s) Version: %d Abbrev Offset: %ld Pointer Size: %d <%2lx> %-18s: Offset Begin End (base address) %8.8lx (start == end) (start > end) Offset Name %-6lx %s Opcodes: Opcode %d has %d args The Directory Table: %s The File Name Table: Entry Dir Time Size Name %lu Line Number Statements: and Line by %d to %d Extended opcode %d: End of Sequence set Address to 0x%lx %d %s set Discriminator to %lu DW_LNE_HP_push_context DW_LNE_HP_pop_context DW_LNE_HP_set_routine_name DW_LNE_HP_set_sequence DW_LNE_HP_define_proc user defined: length %d Copy Advance PC by %lu to 0x%lx Advance Line by %d to %d Set column to %lu Set is_stmt to %d Set basic block Set prologue_end to true Set epilogue_begin to true Address Length %-*s CFA ra %-5s %0*lx %s%+d %-8s c%+d v%+d .eh_frame bad register: Contents of the %s section: %08lx ZERO terminator eh %08lx %08lx %08lx CIE Version: %d Code alignment factor: %u Data alignment factor: %d Return address column: %d Augmentation data: %02x DW_CFA_restore: %s%s DW_CFA_set_loc: %08lx DW_CFA_undefined: %s%s DW_CFA_same_value: %s%s DW_CFA_register: %s%s in DW_CFA_remember_state DW_CFA_restore_state DW_CFA_def_cfa: %s ofs %d DW_CFA_def_cfa_offset: %d DW_CFA_nop DW_CFA_def_cfa_expression ( DW_CFA_expression: %s%s ( DW_CFA_GNU_window_save DW_CFA_GNU_args_size: %ld .debug_abbrev .zdebug_abbrev .debug_aranges .zdebug_aranges .debug_frame .zdebug_frame .zdebug_info .debug_line .zdebug_line .debug_pubnames .zdebug_pubnames .debug_macinfo .zdebug_macinfo .debug_str .zdebug_str .debug_loc .zdebug_loc .debug_pubtypes .zdebug_pubtypes .debug_ranges .zdebug_ranges .debug_static_func .zdebug_static_func .debug_static_vars .zdebug_static_vars .debug_types .zdebug_types .debug_weaknames .zdebug_weaknames LOC Ranges frames frames-interp rawline decodedline macro eax ecx edx ebx esp ebp esi edi eip eflags st0 st1 st2 st3 st5 st6 st7 xmm0 xmm1 xmm2 xmm3 xmm4 xmm5 xmm6 xmm7 fcw fsw mxcsr fs ldtr rax rdx rcx rbx rsi rdi rbp rsp xmm8 xmm9 xmm10 xmm11 xmm12 xmm13 xmm14 xmm15 rflags fs.base gs.base . ` . P @ 0 n = W b G , t Y > # S 8 j O 4 q q q q q q q q q q q q q q q q q q q q q q q q q q q q q q q q C f 5 c H - s X = " * H* p, P, , + + + + + H* H* @+ @/ . . . . . x/ . . . . . h/ . . . . . . . . . . . . . . X/ . . . . J/ . . / . . / / . / / . / / 1 H2 P2 `2 2 1 1 1 1 2 3 3 3 3 2 2 2 3 L4 5 L4 L4 L4 H5 p5 L4 L4 L4 L4 5 5 5 6 7 6 5 H5 p5 L4 7 @7 Z4 15 Z4 (: : 5 15 8 9 9 8 5 5 5 #6 5 q9 9 9 9 8 9 4 4 4 b: 4 4 4 4 4 4 8> 4 4 4 4 4 4 4 4 4 = 4 4 4 h= = b: 4 4 4 4 4 4 > 4 : 4 4 4 4 4 4 4 b: 4 4 4 4 : 4 4 h> 4 4 4 < 4 b: 4 4 4 4 4 < 4 X: 4 < 4 4 4 b: 4 b: 4 b: 4 P< b: : : : : 4 4 7 4 4 4 4 4 4 4 4 4 4 4 4 4 4 X8 4 4 4 4 4 4 4 7 4 4 4 4 4 4 4 4 4 4 4 4 4 4 4 4 7 4 4 4 4 4 4 4 4 4 4 4 4 4 7 4 4 4 4 4 4 4 7 4 4 4 4 4 7 4 7 4 7 4 4 7 4 4 4 4 4 4 4 x8 A A ~A eA LA 3A A A @ @ @ @ @ k@ R@ 9@ < < < < < < < < < < < < < < < < < < < < < < < < < < < < < < < < < < < < < < < < < < < < < < < < < < < < < < < < < < < < < < < < < < < < < < < < < < < < < < < < < < < < < < < < < < < < < < < < < < < < < < < < < < < < < < < < @ @ ? ? ? ? ? xm `m (m l l Pl k k Pk j 8l j n m Rq s /r q m m m m m m m m m m m m q t t t t {t bt It 0t m m m m m m 3q x 8 0 ( @ @ x x X g g X g x x x x x x H x x x x x x x x x x x x x x x x g x x x x x x x x x x x x x x x x x x x x x x x x x x x x x x x x x x x x x x x x x x x x x x x x x x x x x x x x x x x x x x x x x x x x x x x x x x x x x x x x x x x x x x x x x x x x x x x x x x x x x x x x x x x x x x x x x x x x x x x x x x x x x x x x x x x x x x x x x x x x x x x x ( ` @ h p ` 0 H ` ` p @ ` ( G ( d ( ( ( ( ( ( ( ( , ( ( ( ( 2 6 : > B F J N R V ] a e i m q u y ~ z b f V o z z z z z z z z q y ~ ] a e i m q u z b f V o !_TAG_FILE_FORMAT 2 /extended format/ !_TAG_FILE_SORTED 0 /0=unsorted, 1=sorted/ !_TAG_PROGRAM_AUTHOR Ian Lance Taylor, Salvador E. Tropea and others // !_TAG_PROGRAM_NAME objdump /From GNU binutils/ /* file %s line %lu addr %s */ %s %s 0;" kind:v type:const double value:%g %s %s 0;" kind:v type:const int value:%s /tmp/android-build-bb7e003d31d08f72cabc269a652912b7/src/build/../binutils/binutils-2.20.1/binutils/prdbg.c %s %s 0;" kind:v type:const %s value:%s info->stack->visibility != DEBUG_VISIBILITY_IGNORE ((struct pr_handle *) p)->stack != ((void *)0) s[0] == ' ' && s[1] == ' ' && s[2] == '\0' info->stack->next != ((void *)0) info->stack->next->method != ((void *)0) %s %s 0;" kind:x type:%s class:%s access:%s %s %s 0;" kind:m type:%s %s:%s access:%s %s %s 0;" kind:g enum:%s value:%s info->stack != ((void *)0) && info->stack->next != ((void *)0) %s %s 0;" kind:p type:%s class:%s access:%s %s %s 0;" kind:p type:%s class:%s } /* %s */ { /* %s */ const double %s = %g; const int %s = %s; info->stack != ((void *)0) const %s %s = %s; %s %s 0;" kind:t type:%s info->indent == 0 info->indent >= 2 static register %s /* %s */; typedef %s; volatile | const | &| %s /* %s */ (*|) *| ::| set { } /* bitstring */ range ( ): |[] |[%s] |[%s:%s] /* string */ private /* ignore */ public t[len - 1] == ' ' const context voffset ; /* bitsize %s::%s union enum union class struct %%anon%u /* id %u */ { /* size vtable self id %u size %u /* undefined */ = %s %s 0;" kind:e type:%s union class union struct %s %s 0;" kind:%c bool%d float float%d complex %sint%d void virtual /* unknown visibility */ /* bitpos %s %s 0;" kind:c type:%s inherits:%s %s %s ;" kind:%c type:%s file: class:%s :: %s %s 0;" kind:v type:%s register: public protected private 0 8 @ H ` 0 P @ P ` p p 0 0 p ` p P ` p @ 0 P @ P P ` p p 0 0 P p P p substitute_type prepend_type append_type pop_type pr_class_static_method_variant pr_fix_visibility pr_class_method_variant pr_class_baseclass pr_end_struct_type pr_start_source pr_start_compilation_unit tg_class_static_method_variant tg_fix_visibility tg_class_method_variant pr_class_start_method tg_class_baseclass append_parent tg_end_struct_type pr_range_type pr_reference_type pr_function_type pr_pointer_type 4 4 4 4 4 4 Last stabs entries before error: n_type n_desc n_value string %s: %s: stab entry %ld is corrupt, strx = 0x%x, type = %d %s: no recognized debugging information %s: %s: %s .debug debug_get_real_type: circular debug information for %s debug_record_label: not implemented debug_end_common_block: not implemented debug_start_common_block: not implemented debug_end_block: no current block debug_end_block: attempt to close top level block debug_end_function: no current function debug_end_function: some blocks were not closed Warning: changing type size from %d to %d debug_find_named_type: no current compilation unit /tmp/android-build-bb7e003d31d08f72cabc269a652912b7/src/build/../binutils/binutils-2.20.1/binutils/debug.c type->kind == DEBUG_KIND_STRUCT || type->kind == DEBUG_KIND_UNION || type->kind == DEBUG_KIND_CLASS || type->kind == DEBUG_KIND_UNION_CLASS name->kind == DEBUG_OBJECT_TAG debug_write_type: illegal type encountered type->u.kclass->id > info->base_id debug_tag_type: no current file debug_tag_type: extra tag attempted debug_make_undefined_type: unsupported kind debug_name_type: no current file debug_record_variable: no current file debug_record_line: no current unit debug_start_block: no current block debug_record_parameter: no current function debug_record_function: no debug_set_filename call debug_start_source: no debug_set_filename call debug_add_to_current_namespace: no current file info->units == ((void *)0) B 0 x x 8 p ` @ P X 0 debug_write_type debug_set_class_id debug_write_class_type debug_set_filename Warning: %s: %s bad mangled name `%s' Bad stab: %s Unrecognized XCOFF type %d stringptr unsigned char unsigned short unsigned long integer boolean short real character logical*1 logical*2 logical*4 logical double complex integer*1 integer*2 integer*4 wchar unsigned long long logical*8 integer*8 numeric overflow bool __float128 unsigned __int128 ... Unexpected demangled varargs NoSuchStrinG__ ::NoSuchStrinG long long int long long unsigned int short unsigned int __wchar_t _vptr$ unnamed $vb type FOO _vb$ unrecognized C++ abbreviation INVALID_CPLUSPLUS_ABBREV member function type missing __ct __dt __%s%s __%s%s%d No mangling for "%s" 01000000000000000000000; 0777777777777777777777; 01777777777777777777777; missing index type N_LBRAC not within function Too many N_RBRACs Undefined N_EXCL eh_throw unknown C++ encoded name gcc2_compiled. gcc_compiled. this Type file number %d out of range Type index number %d out of range Unrecognized demangle component %d Failed to print demangled template Couldn't get demangled builtin type Unrecognized demangled builtin type Unexpected type in v3 arglist demangling unknown virtual character for baseclass unknown visibility character for baseclass unknown visibility character for field const/volatile indicator missing Demangled name is not a function no argument types in mangled string unrecognized cross reference type ] ; / G } ! ! ! ! w! ]! C! )! ! m K ) f 8) ( h& h& ( h& h& h& h& h& h& h& h& h& h& h& h& h& h& h& h& h& & & & & h& h& h& h& & & h& h& h& ' h& X( >* E* q* ' ' ' ' [* * 1 0 0 1 0 0 0 0 0 0 1 0 1 1 0 1 1 0 1 1 0 0 0 0 0 0 0 0 0 0 0 1 0 1 0 1 0 0 0 0 0 0 0 0 0 1 0 1 0 0 0 0 8 7 9 7 7 9 x: 7 7 7 7 7 : 7 : < X< x< 7 `8 7 7 7 7 7 7 7 7 7 7 7 7 7 7 7 7 7 7 7 7 7 7 7 7 7 7 7 < < 7 7 7 7 7 7 7 7 7 7 7 7 7 7 7 7 7 7 7 7 7 7 7 7 7 7 7 7 7 7 7 7 7 7 7 7 7 7 7 7 7 7 7 7 7 7 7 )= )= )= )= )= )= )= )= )= )= 7 7 7 7 7 7 7 7 7 7 7 7 7 = 7 7 7 7 7 7 7 7 7 7 7 7 7 7 7 7 7 7 7 7 7 7 7 < 7 7 (? 0A > 7 @@ 7 7 ? 7 7 @> 7 7 7 7 7 > @ x? 7 = = @ $L K K K $L K K K K K K K K K K K K K K K K $L K O N N N "Z "Z "Z "Z "Z "Z "Z "Z "Z "Z Y Y Y Y Y Y Y Y Y Z Y Y Z Y Y Y Y Y Y Y Y Y Y Z Y Z Y Y Y Y Y Y Y Y Y Y Y Z Y Y Y Y Y Y Y Y Y Y Y Y Y Y Y Y Y Y Y Y Z ,e ^ ^ d ^ d ^ f ^ ^ d ^ ^ d d d d d d d d d d ^ ^ ^ ^ ^ ^ f ^ A` ^ ^ ^ ^ ^ ^ ^ ^ ^ ^ ^ ^ ^ ^ ^ ` b ^ ^ ^ ^ ^ ^ ^ ^ ^ ^ ^ ^ ^ a la ^ ^ o` [c ^ ^ ^ ^ -c ^ ^ ^ ^ ^ ^ c _ ^ _ ^ ^ ^ y Rq Rq -y x Rq Rq Rq Rq Rq Rq Rq Rq nx Rq x | { Rq y{ Rq w ;{ Rq Rq Rq Rq Rq Rq Rq w} Rq | Rq Rq -y Rq Rq Rq Rq Rq w Rq Rq Rq z Rq Zz w y Rq z type_stack != ((void *)0) && info->type_stack->type.classdef != ((void *)0) && info->type_stack->type.classdef->method != ((void *)0) info->type_stack != ((void *)0) && info->type_stack->type.classdef != ((void *)0) && info->type_stack->type.classdef->method == ((void *)0) IEEE unsupported float type size %u IEEE unsupported integer type size %u IEEE string length overflow: %u info->pending_ranges != ((void *)0) info->type_stack != ((void *)0) && info->type_stack->type.classdef != ((void *)0) ! ((&info->vars)->head == ((void *)0)) info->type_stack != ((void *)0) && info->type_stack->type.name != ((void *)0) && info->type_stack->next != ((void *)0) && info->type_stack->next->type.classdef != ((void *)0) && ! ((&info->type_stack->next->type.strdef)->head == ((void *)0)) info->type_stack != ((void *)0) && ! ((&info->type_stack->type.strdef)->head == ((void *)0)) info->type_stack != ((void *)0) && info->type_stack->next != ((void *)0) && ! ((&info->type_stack->next->type.strdef)->head == ((void *)0)) IEEE unsupported complex type size %u unexpected end of debugging information unsupported IEEE expression operator unrecognized C++ reference type C++ reference in class with no fields C++ base class not found in container C++ data member not found in container bad type for C++ method function no type information for C++ method function unrecognized C++ object overhead spec C++ default values not in a function reference parameter is not a pointer Pascal file name not supported h != ((void *)0) __anon%u IEEE numeric overflow: 0x info->filename != ((void *)0) info->block_depth == 1 ts != ((void *)0) unsigned short int unsigned long long double _vb$%s _b$%s localp == nt->type.localp vclass != ((void *)0) __XRYCPP GNU objcopy %s: 0x%lx: %s (0x%x) invalid string length invalid number expression stack overflow unknown section expression stack underflow expression stack mismatch missing required ATN65 bad ATN65 record missing required ASN indx < (60) unknown builtin type QUOTED STRING instruction address BCD float type not supported C++ reference not found C++ reference is not pointer unrecognized C++ misc record undefined C++ object unrecognized C++ object spec unsupported C++ object type C++ base class not defined C++ object has no fields unknown C++ visibility bad C++ field bit pos or size C++ static virtual method undefined C++ vtable unrecognized C++ default type illegal variable index undefined variable in ATN unknown ATN type unsupported ATN11 unsupported ATN12 unexpected string in C++ misc bad misc record unexpected number unexpected record type *global* unknown BB type illegal type index unknown TY code undefined variable in TY unsupported qualifier blocks left on stack at end bfd_make_section bfd_set_section_size bfd_set_section_contents u H V 4 [ @ @ H B g E b 5 Z 8 ] x k & k 7 F ' s % ~ G G G M < 0 ` p P P 0 p @ ` ` @ P @ P @ @ p ieee_lineno ieee_end_function ieee_end_range ieee_function_parameter ieee_pop_type_used ieee_start_function ieee_variable ieee_typedef_type ieee_end_class_type ieee_class_end_method ieee_class_method_var ieee_class_start_method ieee_class_baseclass ieee_class_static_member ieee_start_class_type ieee_end_struct_type ieee_struct_field ieee_start_struct_type ieee_finish_compilation_unit ieee_builtin_type bfd_coff_get_syment failed: %s bfd_coff_get_auxent failed: %s parse_coff_type: Bad type code 0x%x %ld: .bf without preceding function *globals* .bf .ef %ld: unexpected .ef .bb .eb 2 2 2 h2 2 2 3 H2 /2 1 !1 / 0 0 0 0 J0 /tmp/android-build-bb7e003d31d08f72cabc269a652912b7/src/build/../binutils/binutils-2.20.1/binutils/bucomm.c (GNU Binutils) 2.20.1.20100303 Warning: could not locate '%s'. reason: %s Warning: '%s' is not an ordinary file can't set BFD default target to `%s': %s abfd != ((void *)0) %s(%s) %.12s %.4s %s %ld/%ld %6ld %s Supported architectures: %s: supported architectures: Supported targets: %s: supported targets: %s: Matching formats: BFD header file version %s %s (header %s, data %s) endianness unknown COLUMNS %*s UNKNOWN! %*s %s: '%s': No such file %s: bad number: %s arm-unknown-linux-androideabi :%s[%s] big endian little endian bfd_get_archive_filename Ra ]a Copyright 2009 Free Software Foundation, Inc. This program is free software; you may redistribute it under the terms of the GNU General Public License version 3 or (at your option) any later version. This program has absolutely no warranty. GNU %s %s , rrx , %s #%d , , %s %s [pc , #%d] ], #%d ], #%s%d ], %s opcodes reg-names-%s %*c%s %% , #%d]%s , {%d} {d%d} {d%d-} {d%d-d%d} d%ld q%ld #%s f%ld -%c%d , %c%d , #%s%d]%s [%s], %c%s , lsl #%d [%s, %c%s INVALID ; 0x%lx %s ; unpredictable #%ld .byte 0x%02lx .short 0x%04lx .word 0x%08lx %sd%d d%d-d%d }, [%s , :%d %sd%d[%d] %sd%d[] d%d[]-d%d[] , : #%ld ; 0x%.4lx #%ld ; 0x%.2lx #%.7g ; 0x%.8lx #%ld ; 0x%.8lx {d%d- #0x%.8lx%.8lx , lsl #%u , lsr #%u , asr #%u , ror #%u , ] ]! , #%c%u ], {%u} sb #%u, #%u sy un unst ish ishst osh oshst %cPSR_ %cPSR [pc, #%d] ; ], %s%s ; IMB ; IMBRange %01lx #%lu, #%lu (invalid: %lu:%lu) reg-names- no-force-thumb raw Select raw register names gcc lr std apcs a3 v1 v8 special-atpcs WR SL FP pli%c %a dbg%c #%0-3d dmb%c %U dsb%c %U isb%c %U sdiv%c %8-11r, %16-19r, %0-3r udiv%c %8-11r, %16-19r, %0-3r nop%c.w yield%c.w wfe%c.w wfi%c.w sev%c.w nop%c.w {%0-7d} clrex%c cpsie.w %7'a%6'i%5'f%X cpsid.w %7'a%6'i%5'f%X bxj%c %16-19r%x rfedb%c %16-19r%21'! rfeia%c %16-19r%21'! mrs%c %8-11r, %D cps #%0-4d%X tbb%c [%16-19r, %0-3r]%x cpsie %7'a%6'i%5'f, #%0-4d%X cpsid %7'a%6'i%5'f, #%0-4d%X subs%c pc, lr, #%0-7d msr%c %C, %16-19r ldrex%c %12-15r, [%16-19r] srsdb%c %16-19r%21'!, #%0-4d srsia%c %16-19r%21'!, #%0-4d sxth%c.w %8-11r, %0-3r%R uxth%c.w %8-11r, %0-3r%R sxtb16%c %8-11r, %0-3r%R uxtb16%c %8-11r, %0-3r%R sxtb%c.w %8-11r, %0-3r%R uxtb%c.w %8-11r, %0-3r%R qadd%c %8-11r, %16-19r, %0-3r qsub%c %8-11r, %16-19r, %0-3r rev%c.w %8-11r, %16-19r rev16%c.w %8-11r, %16-19r rbit%c %8-11r, %16-19r revsh%c.w %8-11r, %16-19r sel%c %8-11r, %16-19r, %0-3r clz%c %8-11r, %16-19r bfc%c %8-11r, %E tst%c.w %16-19r, %S teq%c %16-19r, %S cmn%c.w %16-19r, %S cmp%c.w %16-19r, %S tst%c.w %16-19r, %M teq%c %16-19r, %M cmn%c.w %16-19r, %M cmp%c.w %16-19r, %M mov%20's%c.w %8-11r, %S mvn%20's%c.w %8-11r, %S smc%c %K mov%20's%c.w %8-11r, %M mvn%20's%c.w %8-11r, %M pld%c %a pkhbt%c %8-11r, %16-19r, %S pkhtb%c %8-11r, %16-19r, %S sbfx%c %8-11r, %16-19r, %F ubfx%c %8-11r, %16-19r, %F str%wt%c %12-15r, %a bfi%c %8-11r, %16-19r, %E ldr%wt%c %12-15r, %a addw%c %8-11r, %16-19r, %I movw%c %8-11r, %J subw%c %8-11r, %16-19r, %I movt%c %8-11r, %J stmia%c.w %16-19r%21'!, %m ldmia%c.w %16-19r%21'!, %m stmdb%c %16-19r%21'!, %m ldmdb%c %16-19r%21'!, %m str%w%c.w %12-15r, %a ldr%w%c.w %12-15r, %a undefined (bcc, cond=0xF) undefined (bcc, cond=0xE) b%22-25c.w %b%X b%c.w %B%x blx%c %B%x bl%c %B%x undefined instruction %0-31x vs vc hi mia%c acc0, %0-3r, %12-15r miaph%c acc0, %0-3r, %12-15r mar%c acc0, %12-15r, %16-19r mra%c %12-15r, %16-19r, acc0 tandc%22-23w%c %12-15r tbcst%6-7w%c %16-19g, %12-15r tmcr%c %16-19G, %12-15r tmia%c %5-8g, %0-3r, %12-15r tmrc%c %12-15r, %16-19G torc%22-23w%c %12-15r torvsc%22-23w%c %12-15r wldrd %12-15g, %r wldrw %12-15G, %A wldr%L%c %12-15g, %l wor%c %12-15g, %16-19g, %0-3g wstrd %12-15g, %r wstrw %12-15G, %A wstr%L%c %12-15g, %l mvf%c%P%R %12-14f, %0-3f mnf%c%P%R %12-14f, %0-3f abs%c%P%R %12-14f, %0-3f rnd%c%P%R %12-14f, %0-3f sqt%c%P%R %12-14f, %0-3f log%c%P%R %12-14f, %0-3f lgn%c%P%R %12-14f, %0-3f exp%c%P%R %12-14f, %0-3f sin%c%P%R %12-14f, %0-3f cos%c%P%R %12-14f, %0-3f tan%c%P%R %12-14f, %0-3f asn%c%P%R %12-14f, %0-3f acs%c%P%R %12-14f, %0-3f atn%c%P%R %12-14f, %0-3f urd%c%P%R %12-14f, %0-3f nrm%c%P%R %12-14f, %0-3f flt%c%P%R %16-18f, %12-15r fix%c%R %12-15r, %0-2f wfs%c %12-15r rfs%c %12-15r wfc%c %12-15r rfc%c %12-15r cmf%c %16-18f, %0-3f cnf%c %16-18f, %0-3f cmfe%c %16-18f, %0-3f cnfe%c %16-18f, %0-3f stf%c%Q %12-14f, %A ldf%c%Q %12-14f, %A vpush%c %B vstmdb%c %16-19r!, %B vldmdb%c %16-19r!, %B vstmia%c %16-19r%21'!, %B vpop%c %B vldmia%c %16-19r%21'!, %B vstr%c %12-15,22D, %C vldr%c %12-15,22D, %C vpush%c %y3 vstmdb%c %16-19r!, %y3 vldmdb%c %16-19r!, %y3 vstmia%c %16-19r%21'!, %y3 vpop%c %y3 vldmia%c %16-19r%21'!, %y3 vstr%c %y1, %A vldr%c %y1, %A vdup%c.32 %16-19,7D, %12-15r vdup%c.16 %16-19,7D, %12-15r vdup%c.32 %16-19,7Q, %12-15r vdup%c.16 %16-19,7Q, %12-15r vdup%c.8 %16-19,7D, %12-15r vdup%c.8 %16-19,7Q, %12-15r vcvt%7?tb%c.f32.f16 %y1, %y0 vcvt%7?tb%c.f16.f32 %y1, %y0 vmsr%c fpsid, %12-15r vmsr%c fpscr, %12-15r vmsr%c mvfr1, %12-15r vmsr%c mvfr0, %12-15r vmsr%c fpexc, %12-15r vmrs%c %12-15r, fpsid vmrs%c APSR_nzcv, fpscr vmrs%c %12-15r, fpscr vmrs%c %12-15r, mvfr1 vmrs%c %12-15r, mvfr0 vmrs%c %12-15r, fpexc vmov%c.32 %z2[%21d], %12-15r vmov%c.32 %12-15r, %z2[%21d] vmov%c %y2, %12-15r vmov%c %12-15r, %y2 vcmp%7'e%c.f32 %y1, #0.0 vcmp%7'e%c.f64 %z1, #0.0 vmov%c.f32 %y1, %y0 vabs%c.f32 %y1, %y0 vmov%c.f64 %z1, %z0 vabs%c.f64 %z1, %z0 vneg%c.f32 %y1, %y0 vsqrt%c.f32 %y1, %y0 vneg%c.f64 %z1, %z0 vsqrt%c.f64 %z1, %z0 vcvt%c.f64.f32 %z1, %y0 vcvt%c.f32.f64 %y1, %z0 vcvt%c.f32.%7?su32 %y1, %y0 vcvt%c.f64.%7?su32 %z1, %y0 vcmp%7'e%c.f32 %y1, %y0 vcmp%7'e%c.f64 %z1, %z0 vmov%c %12-15r, %16-19r, %z0 vmov%c.f32 %y1, #%0-3,16-19d vmov%c.f64 %z1, #%0-3,16-19d vmov%c %y4, %12-15r, %16-19r vmov%c %z0, %12-15r, %16-19r vmov%c %12-15r, %16-19r, %y4 vmla%c.f32 %y1, %y2, %y0 vmls%c.f32 %y1, %y2, %y0 vmla%c.f64 %z1, %z2, %z0 vmls%c.f64 %z1, %z2, %z0 vnmls%c.f32 %y1, %y2, %y0 vnmla%c.f32 %y1, %y2, %y0 vnmls%c.f64 %z1, %z2, %z0 vnmla%c.f64 %z1, %z2, %z0 vmul%c.f32 %y1, %y2, %y0 vnmul%c.f32 %y1, %y2, %y0 vmul%c.f64 %z1, %z2, %z0 vnmul%c.f64 %z1, %z2, %z0 vadd%c.f32 %y1, %y2, %y0 vsub%c.f32 %y1, %y2, %y0 vadd%c.f64 %z1, %z2, %z0 vsub%c.f64 %z1, %z2, %z0 vdiv%c.f32 %y1, %y2, %y0 vdiv%c.f64 %z1, %z2, %z0 cfldrs%c mvf%12-15d, %A cfldrd%c mvd%12-15d, %A cfldr32%c mvfx%12-15d, %A cfldr64%c mvdx%12-15d, %A cfstrs%c mvf%12-15d, %A cfstrd%c mvd%12-15d, %A cfstr32%c mvfx%12-15d, %A cfstr64%c mvdx%12-15d, %A cfmvsr%c mvf%16-19d, %12-15r cfmvrs%c %12-15r, mvf%16-19d cfmvdlr%c mvd%16-19d, %12-15r cfmvrdl%c %12-15r, mvd%16-19d cfmvdhr%c mvd%16-19d, %12-15r cfmvrdh%c %12-15r, mvd%16-19d cfmvsc32%c dspsc, mvdx%12-15d cfmv32sc%c mvdx%12-15d, dspsc 1.0 2.0 3.0 4.0 5.0 0.5 10.0 bus bc hus hc hss wus wc wss dus dc dss wr0 wr1 wr2 wr3 wr4 wr5 wr6 wr7 wr8 wr9 wr10 wr11 wr12 wr13 wr14 wr15 wcid wcon wcssf wcasf reserved wcgr0 wcgr1 wcgr2 wcgr3 vcnt%c.8 %12-15,22R, %0-3,5R vmvn%c %12-15,22R, %0-3,5R vswp%c %12-15,22R, %0-3,5R vmov%c.i8 %12-15,22R, %E vmov%c.i64 %12-15,22R, %E vmov%c.f32 %12-15,22R, %E vmov%c.i16 %12-15,22R, %E vmvn%c.i16 %12-15,22R, %E vorr%c.i16 %12-15,22R, %E vbic%c.i16 %12-15,22R, %E vmov%c.i32 %12-15,22R, %E vmvn%c.i32 %12-15,22R, %E vorr%c.i32 %12-15,22R, %E vbic%c.i32 %12-15,22R, %E vld4%c.32 %C vld1%c.%6-7S2 %C vld2%c.%6-7S2 %C vld3%c.%6-7S2 %C vld4%c.%6-7S2 %C v%21?ls%21?dt1%c.%6-7S3 %A v%21?ls%21?dt2%c.%6-7S2 %A v%21?ls%21?dt3%c.%6-7S2 %A v%21?ls%21?dt4%c.%6-7S2 %A v%21?ls%21?dt1%c.%10-11S2 %B v%21?ls%21?dt2%c.%10-11S2 %B v%21?ls%21?dt3%c.%10-11S2 %B v%21?ls%21?dt4%c.%10-11S2 %B nop%c yield%c wfe%c wfi%c sev%c nop%c {%4-7d} cbnz %0-2r, %b%X cbz %0-2r, %b%X it%I%X cpsie %2'a%1'i%0'f%X cpsid %2'a%1'i%0'f%X mov%c %0-2r, %3-5r rev%c %0-2r, %3-5r rev16%c %0-2r, %3-5r revsh%c %0-2r, %3-5r setend %3?ble%X sxth%c %0-2r, %3-5r sxtb%c %0-2r, %3-5r uxth%c %0-2r, %3-5r uxtb%c %0-2r, %3-5r bkpt %0-7x blx%c %3-6r%x nop%c ; (mov r8, r8) and%C %0-2r, %3-5r eor%C %0-2r, %3-5r lsl%C %0-2r, %3-5r lsr%C %0-2r, %3-5r asr%C %0-2r, %3-5r adc%C %0-2r, %3-5r sbc%C %0-2r, %3-5r ror%C %0-2r, %3-5r tst%c %0-2r, %3-5r neg%C %0-2r, %3-5r cmp%c %0-2r, %3-5r cmn%c %0-2r, %3-5r orr%C %0-2r, %3-5r mul%C %0-2r, %3-5r bic%C %0-2r, %3-5r mvn%C %0-2r, %3-5r add%c sp, #%0-6W sub%c sp, #%0-6W bx%c %S%x add%c %D, %S cmp%c %D, %S mov%c %D, %S push%c %N pop%c %O add%C %0-2r, %3-5r, %6-8r sub%C %0-2r, %3-5r, %6-8r add%C %0-2r, %3-5r, #%6-8d sub%C %0-2r, %3-5r, #%6-8d strh%c %0-2r, [%3-5r, %6-8r] ldrh%c %0-2r, [%3-5r, %6-8r] lsl%C %0-2r, %3-5r, #%6-10d lsr%C %0-2r, %3-5r, %s asr%C %0-2r, %3-5r, %s mov%C %8-10r, #%0-7d cmp%c %8-10r, #%0-7d add%C %8-10r, #%0-7d sub%C %8-10r, #%0-7d str%c %0-2r, [%3-5r, #%6-10W] ldr%c %0-2r, [%3-5r, #%6-10W] str%c %8-10r, [sp, #%0-7W] ldr%c %8-10r, [sp, #%0-7W] add%c %8-10r, sp, #%0-7W stmia%c %8-10r!, %M ldmia%c %8-10r!, %M svc%c %0-7d b%8-11c.n %0-7B%X b%c.n %0-10B%x nop ; (mov r0, r0) bx%c %0-3r pli %P dmb %U dsb %U isb %U bfc%c %12-15r, %E bfi%c %12-15r, %0-3r, %E strht%c %12-15r, %s ldr%6's%5?hbt%c %12-15r, %s movw%c %12-15r, %V movt%c %12-15r, %V rbit%c %12-15r, %0-3r smc%c %e clrex ldrexb%c %12-15r, [%16-19r] ldrexd%c %12-15r, [%16-19r] ldrexh%c %12-15r, [%16-19r] nop%c {%0-7d} cpsie %8'a%7'i%6'f cpsie %8'a%7'i%6'f,#%0-4d cpsid %8'a%7'i%6'f cpsid %8'a%7'i%6'f,#%0-4d cps #%0-4d ldrex%c r%12-15d, [%16-19r] rev%c %12-15r, %0-3r rev16%c %12-15r, %0-3r revsh%c %12-15r, %0-3r rfe%23?id%24?ba %16-19r%21'! sxth%c %12-15r, %0-3r sxth%c %12-15r, %0-3r, ror #8 sxtb16%c %12-15r, %0-3r sxtb%c %12-15r, %0-3r sxtb%c %12-15r, %0-3r, ror #8 uxth%c %12-15r, %0-3r uxth%c %12-15r, %0-3r, ror #8 uxtb16%c %12-15r, %0-3r uxtb%c %12-15r, %0-3r uxtb%c %12-15r, %0-3r, ror #8 sel%c %12-15r, %16-19r, %0-3r setend %9?ble bxj%c %0-3r blx %B blx%c %0-3r clz%c %12-15r, %0-3r ldrd%c %12-15r, %s strd%c %12-15r, %s pld %a str%22'b%t%c %12-15r, %a strb%c %12-15r, %a strh%c %12-15r, %s ldr%6's%5?hb%c %12-15r, %s msr%c %22?SCPSR%C, %o mrs%c %12-15r, %22?SCPSR tst%p%c %16-19r, %o teq%p%c %16-19r, %o cmp%p%c %16-19r, %o cmn%p%c %16-19r, %o mov%20's%c %12-15r, %o mov%20's%c %12-15r, %0-3r lsl%20's%c %12-15r, %q lsr%20's%c %12-15r, %q asr%20's%c %12-15r, %q rrx%20's%c %12-15r, %0-3r ror%20's%c %12-15r, %q mvn%20's%c %12-15r, %o ldr%22'b%t%c %12-15r, %a push%c %m stm%c %16-19r%21'!, %m%22'^ pop%c %m ldm%c %16-19r%21'!, %m%22'^ b%24'l%c %b svc%c %0-23x lsl lsr asr IAPSR EAPSR IPSR IEPSR MSP PSP PRIMASK BASEPRI BASEPRI_MASK FAULTMASK CONTROL The following ARM specific disassembler options are supported for use with the -M switch: force-thumb Assume all insns are Thumb insns no-force-thumb Examine preceeding label to determine an insn's type ; unpredictable branch in IT block Unrecognised register name set: %s Unrecognised disassembler option: %s Select register names used by GCC Select register names used in ARM's ISA documentation Select register names used in the APCS Select register names used in the ATPCS Select special register names used in the ATPCS tbh%c [%16-19r, %0-3r, lsl #1]%x ldrex%4?hb%c %12-15r, [%16-19r] strex%c %8-11r, %12-15r, [%16-19r] ldrexd%c %12-15r, %8-11r, [%16-19r] sadd8%c %8-11r, %16-19r, %0-3r qadd8%c %8-11r, %16-19r, %0-3r shadd8%c %8-11r, %16-19r, %0-3r uadd8%c %8-11r, %16-19r, %0-3r uqadd8%c %8-11r, %16-19r, %0-3r uhadd8%c %8-11r, %16-19r, %0-3r qdadd%c %8-11r, %16-19r, %0-3r qdsub%c %8-11r, %16-19r, %0-3r sadd16%c %8-11r, %16-19r, %0-3r qadd16%c %8-11r, %16-19r, %0-3r shadd16%c %8-11r, %16-19r, %0-3r uadd16%c %8-11r, %16-19r, %0-3r uqadd16%c %8-11r, %16-19r, %0-3r uhadd16%c %8-11r, %16-19r, %0-3r saddsubx%c %8-11r, %16-19r, %0-3r qaddsubx%c %8-11r, %16-19r, %0-3r shaddsubx%c %8-11r, %16-19r, %0-3r uaddsubx%c %8-11r, %16-19r, %0-3r uqaddsubx%c %8-11r, %16-19r, %0-3r uhaddsubx%c %8-11r, %16-19r, %0-3r ssub8%c %8-11r, %16-19r, %0-3r qsub8%c %8-11r, %16-19r, %0-3r shsub8%c %8-11r, %16-19r, %0-3r usub8%c %8-11r, %16-19r, %0-3r uqsub8%c %8-11r, %16-19r, %0-3r uhsub8%c %8-11r, %16-19r, %0-3r ssub16%c %8-11r, %16-19r, %0-3r qsub16%c %8-11r, %16-19r, %0-3r shsub16%c %8-11r, %16-19r, %0-3r usub16%c %8-11r, %16-19r, %0-3r uqsub16%c %8-11r, %16-19r, %0-3r uhsub16%c %8-11r, %16-19r, %0-3r ssubaddx%c %8-11r, %16-19r, %0-3r qsubaddx%c %8-11r, %16-19r, %0-3r shsubaddx%c %8-11r, %16-19r, %0-3r usubaddx%c %8-11r, %16-19r, %0-3r uqsubaddx%c %8-11r, %16-19r, %0-3r uhsubaddx%c %8-11r, %16-19r, %0-3r mul%c.w %8-11r, %16-19r, %0-3r usad8%c %8-11r, %16-19r, %0-3r lsl%20's%c.w %8-11r, %16-19r, %0-3r lsr%20's%c.w %8-11r, %16-19r, %0-3r asr%20's%c.w %8-11r, %16-19r, %0-3r ror%20's%c.w %8-11r, %16-19r, %0-3r strex%4?hb%c %0-3r, %12-15r, [%16-19r] ssat16%c %8-11r, #%0-4d, %16-19r usat16%c %8-11r, #%0-4d, %16-19r smuad%4'x%c %8-11r, %16-19r, %0-3r smulw%4?tb%c %8-11r, %16-19r, %0-3r smusd%4'x%c %8-11r, %16-19r, %0-3r smmul%4'r%c %8-11r, %16-19r, %0-3r sxtah%c %8-11r, %16-19r, %0-3r%R uxtah%c %8-11r, %16-19r, %0-3r%R sxtab16%c %8-11r, %16-19r, %0-3r%R uxtab16%c %8-11r, %16-19r, %0-3r%R sxtab%c %8-11r, %16-19r, %0-3r%R uxtab%c %8-11r, %16-19r, %0-3r%R smul%5?tb%4?tb%c %8-11r, %16-19r, %0-3r strexd%c %0-3r, %12-15r, %8-11r, [%16-19r] mla%c %8-11r, %16-19r, %0-3r, %12-15r mls%c %8-11r, %16-19r, %0-3r, %12-15r usada8%c %8-11r, %16-19r, %0-3r, %12-15r smull%c %12-15r, %8-11r, %16-19r, %0-3r umull%c %12-15r, %8-11r, %16-19r, %0-3r smlal%c %12-15r, %8-11r, %16-19r, %0-3r umlal%c %12-15r, %8-11r, %16-19r, %0-3r umaal%c %12-15r, %8-11r, %16-19r, %0-3r ldrex%c %12-15r, [%16-19r, #%0-7W] smlad%4'x%c %8-11r, %16-19r, %0-3r, %12-15r smlaw%4?tb%c %8-11r, %16-19r, %0-3r, %12-15r smlsd%4'x%c %8-11r, %16-19r, %0-3r, %12-15r smmla%4'r%c %8-11r, %16-19r, %0-3r, %12-15r smmls%4'r%c %8-11r, %16-19r, %0-3r, %12-15r smlald%4'x%c %12-15r, %8-11r, %16-19r, %0-3r smlsld%4'x%c %12-15r, %8-11r, %16-19r, %0-3r smla%5?tb%4?tb%c %8-11r, %16-19r, %0-3r, %12-15r smlal%5?tb%4?tb%c %12-15r, %8-11r, %16-19r, %0-3r ssat%c %8-11r, #%0-4d, %16-19r%s usat%c %8-11r, #%0-4d, %16-19r%s and%20's%c.w %8-11r, %16-19r, %S bic%20's%c.w %8-11r, %16-19r, %S orr%20's%c.w %8-11r, %16-19r, %S orn%20's%c %8-11r, %16-19r, %S eor%20's%c.w %8-11r, %16-19r, %S add%20's%c.w %8-11r, %16-19r, %S adc%20's%c.w %8-11r, %16-19r, %S sbc%20's%c.w %8-11r, %16-19r, %S sub%20's%c.w %8-11r, %16-19r, %S rsb%20's%c %8-11r, %16-19r, %S strex%c %8-11r, %12-15r, [%16-19r, #%0-7W] and%20's%c.w %8-11r, %16-19r, %M bic%20's%c.w %8-11r, %16-19r, %M orr%20's%c.w %8-11r, %16-19r, %M orn%20's%c %8-11r, %16-19r, %M eor%20's%c.w %8-11r, %16-19r, %M add%20's%c.w %8-11r, %16-19r, %M adc%20's%c.w %8-11r, %16-19r, %M sbc%20's%c.w %8-11r, %16-19r, %M sub%20's%c.w %8-11r, %16-19r, %M rsb%20's%c %8-11r, %16-19r, %M strd%c %12-15r, %8-11r, [%16-19r] ldrd%c %12-15r, %8-11r, [%16-19r] strd%c %12-15r, %8-11r, [%16-19r, #%23`-%0-7W]%21'! ldrd%c %12-15r, %8-11r, [%16-19r, #%23`-%0-7W]%21'! strd%c %12-15r, %8-11r, [%16-19r], #%23`-%0-7W ldrd%c %12-15r, %8-11r, [%16-19r], #%23`-%0-7W mia%17'T%17`B%16'T%16`B%c acc0, %0-3r, %12-15r textrc%22-23w%c %12-15r, #%0-2d textrm%3?su%22-23w%c %12-15r, %16-19g, #%0-2d tinsr%6-7w%c %16-19g, %12-15r, #%0-2d tmcrr%c %0-3g, %12-15r, %16-19r tmia%17?tb%16?tb%c %5-8g, %0-3r, %12-15r tmiaph%c %5-8g, %0-3r, %12-15r tmovmsk%22-23w%c %12-15r, %16-19g tmrrc%c %12-15r, %16-19r, %0-3g wabs%22-23w%c %12-15g, %16-19g wacc%22-23w%c %12-15g, %16-19g wadd%20-23w%c %12-15g, %16-19g, %0-3g waddbhus%22?ml%c %12-15g, %16-19g, %0-3g waddsubhx%c %12-15g, %16-19g, %0-3g waligni%c %12-15g, %16-19g, %0-3g, #%20-22d walignr%20-21d%c %12-15g, %16-19g, %0-3g wand%20'n%c %12-15g, %16-19g, %0-3g wavg2%22?hb%20'r%c %12-15g, %16-19g, %0-3g wavg4%20'r%c %12-15g, %16-19g, %0-3g wcmpeq%22-23w%c %12-15g, %16-19g, %0-3g wcmpgt%21?su%22-23w%c %12-15g, %16-19g, %0-3g wmac%21?su%20'z%c %12-15g, %16-19g, %0-3g wmadd%21?su%20'x%c %12-15g, %16-19g, %0-3g wmadd%21?sun%c %12-15g, %16-19g, %0-3g wmax%21?su%22-23w%c %12-15g, %16-19g, %0-3g wmerge%c %12-15g, %16-19g, %0-3g, #%21-23d wmia%21?tb%20?tb%22'n%c %12-15g, %16-19g, %0-3g wmiaw%21?tb%20?tb%22'n%c %12-15g, %16-19g, %0-3g wmin%21?su%22-23w%c %12-15g, %16-19g, %0-3g wmul%21?su%20?ml%23'r%c %12-15g, %16-19g, %0-3g wmul%21?sumr%c %12-15g, %16-19g, %0-3g wmulwsm%20`r%c %12-15g, %16-19g, %0-3g wmulwum%20`r%c %12-15g, %16-19g, %0-3g wmulwl%c %12-15g, %16-19g, %0-3g wqmia%21?tb%20?tb%22'n%c %12-15g, %16-19g, %0-3g wqmulm%21'r%c %12-15g, %16-19g, %0-3g wqmulwm%21'r%c %12-15g, %16-19g, %0-3g wpack%20-23w%c %12-15g, %16-19g, %0-3g wror%22-23w %12-15g, %16-19g, #%i wror%22-23w%c %12-15g, %16-19g, %0-3g wror%22-23wg%c %12-15g, %16-19g, %0-3G wsad%22?hb%20'z%c %12-15g, %16-19g, %0-3g wshufh%c %12-15g, %16-19g, #%Z wsll%22-23w %12-15g, %16-19g, #%i wsll%22-23w%8'g%c %12-15g, %16-19g, %0-3g wsll%22-23w%8'g%c %12-15g, %16-19g, %0-3G wsra%22-23w %12-15g, %16-19g, #%i wsra%22-23w%8'g%c %12-15g, %16-19g, %0-3g wsra%22-23w%8'g%c %12-15g, %16-19g, %0-3G wsrl%22-23w %12-15g, %16-19g, #%i wsrl%22-23w%8'g%c %12-15g, %16-19g, %0-3g wsrl%22-23w%8'g%c %12-15g, %16-19g, %0-3G wsub%20-23w%c %12-15g, %16-19g, %0-3g wsubaddhx%c %12-15g, %16-19g, %0-3g wabsdiff%22-23w%c %12-15g, %16-19g, %0-3g wunpckeh%21?sub%c %12-15g, %16-19g wunpckeh%21?suh%c %12-15g, %16-19g wunpckeh%21?suw%c %12-15g, %16-19g wunpckel%21?su%22-23w%c %12-15g, %16-19g wunpckih%22-23w%c %12-15g, %16-19g, %0-3g wunpckil%22-23w%c %12-15g, %16-19g, %0-3g wxor%c %12-15g, %16-19g, %0-3g adf%c%P%R %12-14f, %16-18f, %0-3f muf%c%P%R %12-14f, %16-18f, %0-3f suf%c%P%R %12-14f, %16-18f, %0-3f rsf%c%P%R %12-14f, %16-18f, %0-3f dvf%c%P%R %12-14f, %16-18f, %0-3f rdf%c%P%R %12-14f, %16-18f, %0-3f pow%c%P%R %12-14f, %16-18f, %0-3f rpw%c%P%R %12-14f, %16-18f, %0-3f rmf%c%P%R %12-14f, %16-18f, %0-3f fml%c%P%R %12-14f, %16-18f, %0-3f fdv%c%P%R %12-14f, %16-18f, %0-3f frd%c%P%R %12-14f, %16-18f, %0-3f pol%c%P%R %12-14f, %16-18f, %0-3f sfm%c %12-14f, %F, %A ; (stc%22'l%c %8-11d, cr%12-15d, %A) lfm%c %12-14f, %F, %A ; (ldc%22'l%c %8-11d, cr%12-15d, %A) fstmdbx%c %16-19r!, %z3 ;@ Deprecated fldmdbx%c %16-19r!, %z3 ;@ Deprecated fstmiax%c %16-19r%21'!, %z3 ;@ Deprecated fldmiax%c %16-19r%21'!, %z3 ;@ Deprecated vmov%c %0-3,5D, %12-15r, %16-19r vmov%c %12-15r, %16-19r, %0-3,5D vmov%c.32 %16-19,7D[%21d], %12-15r vmov%c.32 %12-15r, %16-19,7D[%21d] vmov%c.16 %16-19,7D[%6,21d], %12-15r vmov%c.%23?us16 %12-15r, %16-19,7D[%6,21d] vmov%c.8 %16-19,7D[%5,6,21d], %12-15r vmov%c.%23?us8 %12-15r, %16-19,7D[%5,6,21d] vmsr%c fpinst, %12-15r @ Impl def vmsr%c fpinst2, %12-15r @ Impl def vmrs%c %12-15r, fpinst @ Impl def vmrs%c %12-15r, fpinst2 @ Impl def vmsr%c , %12-15r vmrs%c %12-15r, vcvt%c.f32.%16?us%7?31%7?26 %y1, %y1, #%5,0-3k vcvt%c.f64.%16?us%7?31%7?26 %z1, %z1, #%5,0-3k vcvt%7`r%c.%16?su32.f32 %y1, %y0 vcvt%7`r%c.%16?su32.f64 %y1, %z0 vcvt%c.%16?us%7?31%7?26.f32 %y1, %y1, #%5,0-3k vcvt%c.%16?us%7?31%7?26.f64 %z1, %z1, #%5,0-3k cfmv64lr%c mvdx%16-19d, %12-15r cfmvr64l%c %12-15r, mvdx%16-19d cfmv64hr%c mvdx%16-19d, %12-15r cfmvr64h%c %12-15r, mvdx%16-19d cfmval32%c mvax%12-15d, mvfx%16-19d cfmv32al%c mvfx%12-15d, mvax%16-19d cfmvam32%c mvax%12-15d, mvfx%16-19d cfmv32am%c mvfx%12-15d, mvax%16-19d cfmvah32%c mvax%12-15d, mvfx%16-19d cfmv32ah%c mvfx%12-15d, mvax%16-19d cfmva32%c mvax%12-15d, mvfx%16-19d cfmv32a%c mvfx%12-15d, mvax%16-19d cfmva64%c mvax%12-15d, mvdx%16-19d cfmv64a%c mvdx%12-15d, mvax%16-19d cfcpys%c mvf%12-15d, mvf%16-19d cfcpyd%c mvd%12-15d, mvd%16-19d cfcvtsd%c mvd%12-15d, mvf%16-19d cfcvtds%c mvf%12-15d, mvd%16-19d cfcvt32s%c mvf%12-15d, mvfx%16-19d cfcvt32d%c mvd%12-15d, mvfx%16-19d cfcvt64s%c mvf%12-15d, mvdx%16-19d cfcvt64d%c mvd%12-15d, mvdx%16-19d cfcvts32%c mvfx%12-15d, mvf%16-19d cfcvtd32%c mvfx%12-15d, mvd%16-19d cftruncs32%c mvfx%12-15d, mvf%16-19d cftruncd32%c mvfx%12-15d, mvd%16-19d cfrshl32%c mvfx%16-19d, mvfx%0-3d, %12-15r cfrshl64%c mvdx%16-19d, mvdx%0-3d, %12-15r cfsh32%c mvfx%12-15d, mvfx%16-19d, #%I cfsh64%c mvdx%12-15d, mvdx%16-19d, #%I cfcmps%c %12-15r, mvf%16-19d, mvf%0-3d cfcmpd%c %12-15r, mvd%16-19d, mvd%0-3d cfcmp32%c %12-15r, mvfx%16-19d, mvfx%0-3d cfcmp64%c %12-15r, mvdx%16-19d, mvdx%0-3d cfabss%c mvf%12-15d, mvf%16-19d cfabsd%c mvd%12-15d, mvd%16-19d cfnegs%c mvf%12-15d, mvf%16-19d cfnegd%c mvd%12-15d, mvd%16-19d cfadds%c mvf%12-15d, mvf%16-19d, mvf%0-3d cfaddd%c mvd%12-15d, mvd%16-19d, mvd%0-3d cfsubs%c mvf%12-15d, mvf%16-19d, mvf%0-3d cfsubd%c mvd%12-15d, mvd%16-19d, mvd%0-3d cfmuls%c mvf%12-15d, mvf%16-19d, mvf%0-3d cfmuld%c mvd%12-15d, mvd%16-19d, mvd%0-3d cfabs32%c mvfx%12-15d, mvfx%16-19d cfabs64%c mvdx%12-15d, mvdx%16-19d cfneg32%c mvfx%12-15d, mvfx%16-19d cfneg64%c mvdx%12-15d, mvdx%16-19d cfadd32%c mvfx%12-15d, mvfx%16-19d, mvfx%0-3d cfadd64%c mvdx%12-15d, mvdx%16-19d, mvdx%0-3d cfsub32%c mvfx%12-15d, mvfx%16-19d, mvfx%0-3d cfsub64%c mvdx%12-15d, mvdx%16-19d, mvdx%0-3d cfmul32%c mvfx%12-15d, mvfx%16-19d, mvfx%0-3d cfmul64%c mvdx%12-15d, mvdx%16-19d, mvdx%0-3d cfmac32%c mvfx%12-15d, mvfx%16-19d, mvfx%0-3d cfmsc32%c mvfx%12-15d, mvfx%16-19d, mvfx%0-3d cfmadd32%c mvax%5-7d, mvfx%12-15d, mvfx%16-19d, mvfx%0-3d cfmsub32%c mvax%5-7d, mvfx%12-15d, mvfx%16-19d, mvfx%0-3d cfmadda32%c mvax%5-7d, mvax%12-15d, mvfx%16-19d, mvfx%0-3d cfmsuba32%c mvax%5-7d, mvax%12-15d, mvfx%16-19d, mvfx%0-3d mcrr%c %8-11d, %4-7d, %12-15r, %16-19r, cr%0-3d mrrc%c %8-11d, %4-7d, %12-15r, %16-19r, cr%0-3d cdp%c %8-11d, %20-23d, cr%12-15d, cr%16-19d, cr%0-3d, {%5-7d} mrc%c %8-11d, %21-23d, %12-15r, cr%16-19d, cr%0-3d, {%5-7d} mcr%c %8-11d, %21-23d, %12-15r, cr%16-19d, cr%0-3d, {%5-7d} stc%22'l%c %8-11d, cr%12-15d, %A ldc%22'l%c %8-11d, cr%12-15d, %A mrrc2%c %8-11d, %4-7d, %12-15r, %16-19r, cr%0-3d mcrr2%c %8-11d, %4-7d, %12-15r, %16-19r, cr%0-3d ldc2%22'l%c %8-11d, cr%12-15d, %A stc2%22'l%c %8-11d, cr%12-15d, %A cdp2%c %8-11d, %20-23d, cr%12-15d, cr%16-19d, cr%0-3d, {%5-7d} mcr2%c %8-11d, %21-23d, %12-15r, cr%16-19d, cr%0-3d, {%5-7d} mrc2%c %8-11d, %21-23d, %12-15r, cr%16-19d, cr%0-3d, {%5-7d} vext%c.8 %12-15,22R, %16-19,7R, %0-3,5R, #%8-11d vdup%c.32 %12-15,22R, %0-3,5D[%19d] vdup%c.16 %12-15,22R, %0-3,5D[%18-19d] vdup%c.8 %12-15,22R, %0-3,5D[%17-19d] vtbl%c.8 %12-15,22D, %F, %0-3,5D vtbx%c.8 %12-15,22D, %F, %0-3,5D vcvt%c.f16.f32 %12-15,22D, %0-3,5Q vcvt%c.f32.f16 %12-15,22Q, %0-3,5D vmovl%c.%24?us8 %12-15,22Q, %0-3,5D vmovl%c.%24?us16 %12-15,22Q, %0-3,5D vmovl%c.%24?us32 %12-15,22Q, %0-3,5D vmovn%c.i%18-19T2 %12-15,22D, %0-3,5Q vqmovun%c.s%18-19T2 %12-15,22D, %0-3,5Q vqmovn%c.s%18-19T2 %12-15,22D, %0-3,5Q vqmovn%c.u%18-19T2 %12-15,22D, %0-3,5Q vshll%c.i%18-19S2 %12-15,22Q, %0-3,5D, #%18-19S2 vrecpe%c.%8?fu%18-19S2 %12-15,22R, %0-3,5R vrsqrte%c.%8?fu%18-19S2 %12-15,22R, %0-3,5R vrev64%c.%18-19S2 %12-15,22R, %0-3,5R vrev32%c.%18-19S2 %12-15,22R, %0-3,5R vrev16%c.%18-19S2 %12-15,22R, %0-3,5R vcls%c.s%18-19S2 %12-15,22R, %0-3,5R vclz%c.i%18-19S2 %12-15,22R, %0-3,5R vqabs%c.s%18-19S2 %12-15,22R, %0-3,5R vqneg%c.s%18-19S2 %12-15,22R, %0-3,5R vtrn%c.%18-19S2 %12-15,22R, %0-3,5R vuzp%c.%18-19S2 %12-15,22R, %0-3,5R vzip%c.%18-19S2 %12-15,22R, %0-3,5R vcgt%c.%10?fs%18-19S2 %12-15,22R, %0-3,5R, #0 vcge%c.%10?fs%18-19S2 %12-15,22R, %0-3,5R, #0 vceq%c.%10?fi%18-19S2 %12-15,22R, %0-3,5R, #0 vcle%c.%10?fs%18-19S2 %12-15,22R, %0-3,5R, #0 vclt%c.%10?fs%18-19S2 %12-15,22R, %0-3,5R, #0 vabs%c.%10?fs%18-19S2 %12-15,22R, %0-3,5R vneg%c.%10?fs%18-19S2 %12-15,22R, %0-3,5R vpaddl%c.%7?us%18-19S2 %12-15,22R, %0-3,5R vpadal%c.%7?us%18-19S2 %12-15,22R, %0-3,5R vcvt%c.%7-8?usff%18-19Sa.%7-8?ffus%18-19Sa %12-15,22R, %0-3,5R vand%c %12-15,22R, %16-19,7R, %0-3,5R vbic%c %12-15,22R, %16-19,7R, %0-3,5R vorr%c %12-15,22R, %16-19,7R, %0-3,5R vorn%c %12-15,22R, %16-19,7R, %0-3,5R veor%c %12-15,22R, %16-19,7R, %0-3,5R vbsl%c %12-15,22R, %16-19,7R, %0-3,5R vbit%c %12-15,22R, %16-19,7R, %0-3,5R vbif%c %12-15,22R, %16-19,7R, %0-3,5R vadd%c.f%20U0 %12-15,22R, %16-19,7R, %0-3,5R vmla%c.f%20U0 %12-15,22R, %16-19,7R, %0-3,5R vceq%c.f%20U0 %12-15,22R, %16-19,7R, %0-3,5R vmax%c.f%20U0 %12-15,22R, %16-19,7R, %0-3,5R vrecps%c.f%20U0 %12-15,22R, %16-19,7R, %0-3,5R vsub%c.f%20U0 %12-15,22R, %16-19,7R, %0-3,5R vmls%c.f%20U0 %12-15,22R, %16-19,7R, %0-3,5R vmin%c.f%20U0 %12-15,22R, %16-19,7R, %0-3,5R vrsqrts%c.f%20U0 %12-15,22R, %16-19,7R, %0-3,5R vpadd%c.f%20U0 %12-15,22R, %16-19,7R, %0-3,5R vmul%c.f%20U0 %12-15,22R, %16-19,7R, %0-3,5R vcge%c.f%20U0 %12-15,22R, %16-19,7R, %0-3,5R vacge%c.f%20U0 %12-15,22R, %16-19,7R, %0-3,5R vpmax%c.f%20U0 %12-15,22R, %16-19,7R, %0-3,5R vabd%c.f%20U0 %12-15,22R, %16-19,7R, %0-3,5R vcgt%c.f%20U0 %12-15,22R, %16-19,7R, %0-3,5R vacgt%c.f%20U0 %12-15,22R, %16-19,7R, %0-3,5R vpmin%c.f%20U0 %12-15,22R, %16-19,7R, %0-3,5R vadd%c.i%20-21S3 %12-15,22R, %16-19,7R, %0-3,5R vtst%c.%20-21S2 %12-15,22R, %16-19,7R, %0-3,5R vmla%c.i%20-21S2 %12-15,22R, %16-19,7R, %0-3,5R vqdmulh%c.s%20-21S6 %12-15,22R, %16-19,7R, %0-3,5R vpadd%c.i%20-21S2 %12-15,22R, %16-19,7R, %0-3,5R vsub%c.i%20-21S3 %12-15,22R, %16-19,7R, %0-3,5R vceq%c.i%20-21S2 %12-15,22R, %16-19,7R, %0-3,5R vmls%c.i%20-21S2 %12-15,22R, %16-19,7R, %0-3,5R vqrdmulh%c.s%20-21S6 %12-15,22R, %16-19,7R, %0-3,5R vhadd%c.%24?us%20-21S2 %12-15,22R, %16-19,7R, %0-3,5R vqadd%c.%24?us%20-21S3 %12-15,22R, %16-19,7R, %0-3,5R vrhadd%c.%24?us%20-21S2 %12-15,22R, %16-19,7R, %0-3,5R vhsub%c.%24?us%20-21S2 %12-15,22R, %16-19,7R, %0-3,5R vqsub%c.%24?us%20-21S3 %12-15,22R, %16-19,7R, %0-3,5R vcgt%c.%24?us%20-21S2 %12-15,22R, %16-19,7R, %0-3,5R vcge%c.%24?us%20-21S2 %12-15,22R, %16-19,7R, %0-3,5R vshl%c.%24?us%20-21S3 %12-15,22R, %0-3,5R, %16-19,7R vqshl%c.%24?us%20-21S3 %12-15,22R, %0-3,5R, %16-19,7R vrshl%c.%24?us%20-21S3 %12-15,22R, %0-3,5R, %16-19,7R vqrshl%c.%24?us%20-21S3 %12-15,22R, %0-3,5R, %16-19,7R vmax%c.%24?us%20-21S2 %12-15,22R, %16-19,7R, %0-3,5R vmin%c.%24?us%20-21S2 %12-15,22R, %16-19,7R, %0-3,5R vabd%c.%24?us%20-21S2 %12-15,22R, %16-19,7R, %0-3,5R vaba%c.%24?us%20-21S2 %12-15,22R, %16-19,7R, %0-3,5R vmul%c.%24?pi%20-21S2 %12-15,22R, %16-19,7R, %0-3,5R vpmax%c.%24?us%20-21S2 %12-15,22R, %16-19,7R, %0-3,5R vpmin%c.%24?us%20-21S2 %12-15,22R, %16-19,7R, %0-3,5R vshrn%c.i16 %12-15,22D, %0-3,5Q, #%16-18e vrshrn%c.i16 %12-15,22D, %0-3,5Q, #%16-18e vqshrun%c.s16 %12-15,22D, %0-3,5Q, #%16-18e vqrshrun%c.s16 %12-15,22D, %0-3,5Q, #%16-18e vqshrn%c.%24?us16 %12-15,22D, %0-3,5Q, #%16-18e vqrshrn%c.%24?us16 %12-15,22D, %0-3,5Q, #%16-18e vshll%c.%24?us8 %12-15,22D, %0-3,5Q, #%16-18d vshrn%c.i32 %12-15,22D, %0-3,5Q, #%16-19e vrshrn%c.i32 %12-15,22D, %0-3,5Q, #%16-19e vshl%c.%24?us8 %12-15,22R, %0-3,5R, #%16-18d vsri%c.8 %12-15,22R, %0-3,5R, #%16-18e vsli%c.8 %12-15,22R, %0-3,5R, #%16-18d vqshlu%c.s8 %12-15,22R, %0-3,5R, #%16-18d vqshrun%c.s32 %12-15,22D, %0-3,5Q, #%16-19e vqrshrun%c.s32 %12-15,22D, %0-3,5Q, #%16-19e vqshrn%c.%24?us32 %12-15,22D, %0-3,5Q, #%16-19e vqrshrn%c.%24?us32 %12-15,22D, %0-3,5Q, #%16-19e vshll%c.%24?us16 %12-15,22D, %0-3,5Q, #%16-19d vshr%c.%24?us8 %12-15,22R, %0-3,5R, #%16-18e vsra%c.%24?us8 %12-15,22R, %0-3,5R, #%16-18e vrshr%c.%24?us8 %12-15,22R, %0-3,5R, #%16-18e vrsra%c.%24?us8 %12-15,22R, %0-3,5R, #%16-18e vqshl%c.%24?us8 %12-15,22R, %0-3,5R, #%16-18d vshrn%c.i64 %12-15,22D, %0-3,5Q, #%16-20e vrshrn%c.i64 %12-15,22D, %0-3,5Q, #%16-20e vshl%c.%24?us16 %12-15,22R, %0-3,5R, #%16-19d vsri%c.16 %12-15,22R, %0-3,5R, #%16-19e vsli%c.16 %12-15,22R, %0-3,5R, #%16-19d vqshlu%c.s16 %12-15,22R, %0-3,5R, #%16-19d vshll%c.%24?us32 %12-15,22D, %0-3,5Q, #%16-20d vshr%c.%24?us16 %12-15,22R, %0-3,5R, #%16-19e vsra%c.%24?us16 %12-15,22R, %0-3,5R, #%16-19e vrshr%c.%24?us16 %12-15,22R, %0-3,5R, #%16-19e vrsra%c.%24?us16 %12-15,22R, %0-3,5R, #%16-19e vqshl%c.%24?us16 %12-15,22R, %0-3,5R, #%16-19d vqshrun%c.s64 %12-15,22D, %0-3,5Q, #%16-20e vqrshrun%c.s64 %12-15,22D, %0-3,5Q, #%16-20e vqshrn%c.%24?us64 %12-15,22D, %0-3,5Q, #%16-20e vqrshrn%c.%24?us64 %12-15,22D, %0-3,5Q, #%16-20e vshl%c.%24?us32 %12-15,22R, %0-3,5R, #%16-20d vsri%c.32 %12-15,22R, %0-3,5R, #%16-20e vsli%c.32 %12-15,22R, %0-3,5R, #%16-20d vqshlu%c.s32 %12-15,22R, %0-3,5R, #%16-20d vshr%c.%24?us32 %12-15,22R, %0-3,5R, #%16-20e vsra%c.%24?us32 %12-15,22R, %0-3,5R, #%16-20e vrshr%c.%24?us32 %12-15,22R, %0-3,5R, #%16-20e vrsra%c.%24?us32 %12-15,22R, %0-3,5R, #%16-20e vqshl%c.%24?us32 %12-15,22R, %0-3,5R, #%16-20d vshl%c.%24?us64 %12-15,22R, %0-3,5R, #%16-21d vsri%c.64 %12-15,22R, %0-3,5R, #%16-21e vsli%c.64 %12-15,22R, %0-3,5R, #%16-21d vqshlu%c.s64 %12-15,22R, %0-3,5R, #%16-21d vshr%c.%24?us64 %12-15,22R, %0-3,5R, #%16-21e vsra%c.%24?us64 %12-15,22R, %0-3,5R, #%16-21e vrshr%c.%24?us64 %12-15,22R, %0-3,5R, #%16-21e vrsra%c.%24?us64 %12-15,22R, %0-3,5R, #%16-21e vqshl%c.%24?us64 %12-15,22R, %0-3,5R, #%16-21d vcvt%c.%24,8?usff32.%24,8?ffus32 %12-15,22R, %0-3,5R, #%16-20e vmull%c.p%20S0 %12-15,22Q, %16-19,7D, %0-3,5D vaddhn%c.i%20-21T2 %12-15,22D, %16-19,7Q, %0-3,5Q vsubhn%c.i%20-21T2 %12-15,22D, %16-19,7Q, %0-3,5Q vqdmlal%c.s%20-21S6 %12-15,22Q, %16-19,7D, %0-3,5D vqdmlsl%c.s%20-21S6 %12-15,22Q, %16-19,7D, %0-3,5D vqdmull%c.s%20-21S6 %12-15,22Q, %16-19,7D, %0-3,5D vraddhn%c.i%20-21T2 %12-15,22D, %16-19,7Q, %0-3,5Q vrsubhn%c.i%20-21T2 %12-15,22D, %16-19,7Q, %0-3,5Q vaddl%c.%24?us%20-21S2 %12-15,22Q, %16-19,7D, %0-3,5D vaddw%c.%24?us%20-21S2 %12-15,22Q, %16-19,7Q, %0-3,5D vsubl%c.%24?us%20-21S2 %12-15,22Q, %16-19,7D, %0-3,5D vsubw%c.%24?us%20-21S2 %12-15,22Q, %16-19,7Q, %0-3,5D vabal%c.%24?us%20-21S2 %12-15,22Q, %16-19,7D, %0-3,5D vabdl%c.%24?us%20-21S2 %12-15,22Q, %16-19,7D, %0-3,5D vmlal%c.%24?us%20-21S2 %12-15,22Q, %16-19,7D, %0-3,5D vmlsl%c.%24?us%20-21S2 %12-15,22Q, %16-19,7D, %0-3,5D vmull%c.%24?us%20-21S2 %12-15,22Q, %16-19,7D, %0-3,5D vmla%c.i%20-21S6 %12-15,22D, %16-19,7D, %D vmla%c.f%20-21Sa %12-15,22D, %16-19,7D, %D vqdmlal%c.s%20-21S6 %12-15,22Q, %16-19,7D, %D vmls%c.i%20-21S6 %12-15,22D, %16-19,7D, %D vmls%c.f%20-21S6 %12-15,22D, %16-19,7D, %D vqdmlsl%c.s%20-21S6 %12-15,22Q, %16-19,7D, %D vmul%c.i%20-21S6 %12-15,22D, %16-19,7D, %D vmul%c.f%20-21Sa %12-15,22D, %16-19,7D, %D vqdmull%c.s%20-21S6 %12-15,22Q, %16-19,7D, %D vqdmulh%c.s%20-21S6 %12-15,22D, %16-19,7D, %D vqrdmulh%c.s%20-21S6 %12-15,22D, %16-19,7D, %D vmla%c.i%20-21S6 %12-15,22Q, %16-19,7Q, %D vmla%c.f%20-21Sa %12-15,22Q, %16-19,7Q, %D vmls%c.i%20-21S6 %12-15,22Q, %16-19,7Q, %D vmls%c.f%20-21Sa %12-15,22Q, %16-19,7Q, %D vmul%c.i%20-21S6 %12-15,22Q, %16-19,7Q, %D vmul%c.f%20-21Sa %12-15,22Q, %16-19,7Q, %D vqdmulh%c.s%20-21S6 %12-15,22Q, %16-19,7Q, %D vqrdmulh%c.s%20-21S6 %12-15,22Q, %16-19,7Q, %D vmlal%c.%24?us%20-21S6 %12-15,22Q, %16-19,7D, %D vmlsl%c.%24?us%20-21S6 %12-15,22Q, %16-19,7D, %D vmull%c.%24?us%20-21S6 %12-15,22Q, %16-19,7D, %D ldrs%11?hb%c %0-2r, [%3-5r, %6-8r] str%10'b%c %0-2r, [%3-5r, %6-8r] ldr%10'b%c %0-2r, [%3-5r, %6-8r] ldr%c %8-10r, [pc, #%0-7W] ; (%0-7a) strb%c %0-2r, [%3-5r, #%6-10d] ldrb%c %0-2r, [%3-5r, #%6-10d] strh%c %0-2r, [%3-5r, #%6-10H] ldrh%c %0-2r, [%3-5r, #%6-10H] add%c %8-10r, pc, #%0-7W ; (adr %8-10r, %0-7a) mul%20's%c %16-19r, %0-3r, %8-11r mla%20's%c %16-19r, %0-3r, %8-11r, %12-15r swp%22'b%c %12-15r, %0-3r, [%16-19r] %22?sumull%20's%c %12-15r, %16-19r, %0-3r, %8-11r %22?sumlal%20's%c %12-15r, %16-19r, %0-3r, %8-11r mls%c %16-19r, %0-3r, %8-11r, %12-15r %22?usbfx%c %12-15r, %0-3r, #%7-11d, #%16-20W strexb%c %12-15r, %0-3r, [%16-19r] strexd%c %12-15r, %0-3r, [%16-19r] strexh%c %12-15r, %0-3r, [%16-19r] pkhbt%c %12-15r, %16-19r, %0-3r pkhbt%c %12-15r, %16-19r, %0-3r, lsl #%7-11d pkhtb%c %12-15r, %16-19r, %0-3r, asr #32 pkhtb%c %12-15r, %16-19r, %0-3r, asr #%7-11d qadd16%c %12-15r, %16-19r, %0-3r qadd8%c %12-15r, %16-19r, %0-3r qaddsubx%c %12-15r, %16-19r, %0-3r qsub16%c %12-15r, %16-19r, %0-3r qsub8%c %12-15r, %16-19r, %0-3r qsubaddx%c %12-15r, %16-19r, %0-3r sadd16%c %12-15r, %16-19r, %0-3r sadd8%c %12-15r, %16-19r, %0-3r saddaddx%c %12-15r, %16-19r, %0-3r shadd16%c %12-15r, %16-19r, %0-3r shadd8%c %12-15r, %16-19r, %0-3r shaddsubx%c %12-15r, %16-19r, %0-3r shsub16%c %12-15r, %16-19r, %0-3r shsub8%c %12-15r, %16-19r, %0-3r shsubaddx%c %12-15r, %16-19r, %0-3r ssub16%c %12-15r, %16-19r, %0-3r ssub8%c %12-15r, %16-19r, %0-3r ssubaddx%c %12-15r, %16-19r, %0-3r uadd16%c %12-15r, %16-19r, %0-3r uadd8%c %12-15r, %16-19r, %0-3r uaddsubx%c %12-15r, %16-19r, %0-3r uhadd16%c %12-15r, %16-19r, %0-3r uhadd8%c %12-15r, %16-19r, %0-3r uhaddsubx%c %12-15r, %16-19r, %0-3r uhsub16%c %12-15r, %16-19r, %0-3r uhsub8%c %12-15r, %16-19r, %0-3r uhsubaddx%c %12-15r, %16-19r, %0-3r uqadd16%c %12-15r, %16-19r, %0-3r uqadd8%c %12-15r, %16-19r, %0-3r uqaddsubx%c %12-15r, %16-19r, %0-3r uqsub16%c %12-15r, %16-19r, %0-3r uqsub8%c %12-15r, %16-19r, %0-3r uqsubaddx%c %12-15r, %16-19r, %0-3r usub16%c %12-15r, %16-19r, %0-3r usub8%c %12-15r, %16-19r, %0-3r usubaddx%c %12-15r, %16-19r, %0-3r sxth%c %12-15r, %0-3r, ror #16 sxth%c %12-15r, %0-3r, ror #24 sxtb16%c %12-15r, %0-3r, ror #8 sxtb16%c %12-15r, %0-3r, ror #16 sxtb16%c %12-15r, %0-3r, ror #24 sxtb%c %12-15r, %0-3r, ror #16 sxtb%c %12-15r, %0-3r, ror #24 uxth%c %12-15r, %0-3r, ror #16 uxth%c %12-15r, %0-3r, ror #24 uxtb16%c %12-15r, %0-3r, ror #8 uxtb16%c %12-15r, %0-3r, ror #16 uxtb16%c %12-15r, %0-3r, ror #24 uxtb%c %12-15r, %0-3r, ror #16 uxtb%c %12-15r, %0-3r, ror #24 sxtah%c %12-15r, %16-19r, %0-3r sxtah%c %12-15r, %16-19r, %0-3r, ror #8 sxtah%c %12-15r, %16-19r, %0-3r, ror #16 sxtah%c %12-15r, %16-19r, %0-3r, ror #24 sxtab16%c %12-15r, %16-19r, %0-3r sxtab16%c %12-15r, %16-19r, %0-3r, ror #8 sxtab16%c %12-15r, %16-19r, %0-3r, ror #16 sxtab16%c %12-15r, %16-19r, %0-3r, ror #24 sxtab%c %12-15r, %16-19r, %0-3r sxtab%c %12-15r, %16-19r, %0-3r, ror #8 sxtab%c %12-15r, %16-19r, %0-3r, ror #16 sxtab%c %12-15r, %16-19r, %0-3r, ror #24 uxtah%c %12-15r, %16-19r, %0-3r uxtah%c %12-15r, %16-19r, %0-3r, ror #8 uxtah%c %12-15r, %16-19r, %0-3r, ror #16 uxtah%c %12-15r, %16-19r, %0-3r, ror #24 uxtab16%c %12-15r, %16-19r, %0-3r uxtab16%c %12-15r, %16-19r, %0-3r, ror #8 uxtab16%c %12-15r, %16-19r, %0-3r, ror #16 uxtab16%c %12-15r, %16-19r, %0-3r, ROR #24 uxtab%c %12-15r, %16-19r, %0-3r uxtab%c %12-15r, %16-19r, %0-3r, ror #8 uxtab%c %12-15r, %16-19r, %0-3r, ror #16 uxtab%c %12-15r, %16-19r, %0-3r, ror #24 smuad%5'x%c %16-19r, %0-3r, %8-11r smusd%5'x%c %16-19r, %0-3r, %8-11r smlad%5'x%c %16-19r, %0-3r, %8-11r, %12-15r smlald%5'x%c %12-15r, %16-19r, %0-3r, %8-11r smlsd%5'x%c %16-19r, %0-3r, %8-11r, %12-15r smlsld%5'x%c %12-15r, %16-19r, %0-3r, %8-11r smmul%5'r%c %16-19r, %0-3r, %8-11r smmla%5'r%c %16-19r, %0-3r, %8-11r, %12-15r smmls%5'r%c %16-19r, %0-3r, %8-11r, %12-15r srs%23?id%24?ba %16-19r%21'!, #%0-4d ssat%c %12-15r, #%16-20W, %0-3r ssat%c %12-15r, #%16-20W, %0-3r, lsl #%7-11d ssat%c %12-15r, #%16-20W, %0-3r, asr #%7-11d ssat16%c %12-15r, #%16-19W, %0-3r strex%c %12-15r, %0-3r, [%16-19r] umaal%c %12-15r, %16-19r, %0-3r, %8-11r usad8%c %16-19r, %0-3r, %8-11r usada8%c %16-19r, %0-3r, %8-11r, %12-15r usat%c %12-15r, #%16-20d, %0-3r usat%c %12-15r, #%16-20d, %0-3r, lsl #%7-11d usat%c %12-15r, #%16-20d, %0-3r, asr #%7-11d usat16%c %12-15r, #%16-19d, %0-3r bkpt 0x%16-19X%12-15X%8-11X%0-3X smlabb%c %16-19r, %0-3r, %8-11r, %12-15r smlatb%c %16-19r, %0-3r, %8-11r, %12-15r smlabt%c %16-19r, %0-3r, %8-11r, %12-15r smlatt%c %16-19r, %0-3r, %8-11r, %12-15r smlawb%c %16-19r, %0-3r, %8-11r, %12-15r smlawt%c %16-19r, %0-3r, %8-11r, %12-15r smlalbb%c %12-15r, %16-19r, %0-3r, %8-11r smlaltb%c %12-15r, %16-19r, %0-3r, %8-11r smlalbt%c %12-15r, %16-19r, %0-3r, %8-11r smlaltt%c %12-15r, %16-19r, %0-3r, %8-11r smulbb%c %16-19r, %0-3r, %8-11r smultb%c %16-19r, %0-3r, %8-11r smulbt%c %16-19r, %0-3r, %8-11r smultt%c %16-19r, %0-3r, %8-11r smulwb%c %16-19r, %0-3r, %8-11r smulwt%c %16-19r, %0-3r, %8-11r qadd%c %12-15r, %0-3r, %16-19r qdadd%c %12-15r, %0-3r, %16-19r qsub%c %12-15r, %0-3r, %16-19r qdsub%c %12-15r, %0-3r, %16-19r push%c {%12-15r} ; (str%c %12-15r, %a) and%20's%c %12-15r, %16-19r, %o eor%20's%c %12-15r, %16-19r, %o sub%20's%c %12-15r, %16-19r, %o rsb%20's%c %12-15r, %16-19r, %o add%20's%c %12-15r, %16-19r, %o adc%20's%c %12-15r, %16-19r, %o sbc%20's%c %12-15r, %16-19r, %o rsc%20's%c %12-15r, %16-19r, %o orr%20's%c %12-15r, %16-19r, %o bic%20's%c %12-15r, %16-19r, %o pop%c {%12-15r} ; (ldr%c %12-15r, %a) stm%23?id%24?ba%c %16-19r%21'!, %m%22'^ ldm%23?id%24?ba%c %16-19r%21'!, %m%22'^ ^ [ [ [ [ [ [ [ [ [ [ ` ` ` ` ` ` ` ` ` ` [ [ [ [ [ [ [ (` _ h_ [ [ (b [ [ a [ [ Xa [ [ [ a a a [ [ [ [ [ [ [ ` [ [ [ [ [ [ [ [ ` [ [ [ [ [ @_ [ [ ^ [ [ [ [ [ @^ [ [ [ [ [ [ ^ ^ d yb d `b d e [ [ [ [ [ [ [ [ [ [ [ [ [ [ [ [ [ [ [ [ [ [ [ .e [ [ [ [ e [ [ f [ [ [ [ [ [ [ [ [ f [ [ [ [ [ [ [ [ [ [ [ [ [ [ f [ [ [ zf [ Nf .f [ [ [ f [ [ [ [ [ [ e [ [ [ [ ~e ee 8l [j [j [j [j [j [j [j [j [j [j k k k k k k k k k k [j [j [j [j [j [j [j [j [j Pl k [j [j [j [j k [j [j [j j 8m pj [j [j [j m [j [j [j [j l [j [j [j [j [j [j [j [j [j l l [j [j [j [j [j [j [j [j [j [j [j [j [j [j [j l [j [j [j [j l o [j [j [j [j [j so [j [j [j [j [j [j [j [j [j [j [j [j [j [j To [j [j [j [j [j [j [j [j [j /o [j o n [j [j [j [j [j [j [j [j [j [j [j [j [j n [j [j [j [j [j n x s s s s s s s s s s Xx Xx Xx Xx Xx Xx Xx Xx Xx Xx s s s s s s s @w v t t @t t s s s s s s s s s s s s s s s s s s s s s s s s s s s s t { s s s s s s s s s s s s s s s s s s s s s s s { s s s s xz s s s s s s s s s s s s Uz Kz B{ B{ B{ s s s s s s s s s s 2{ s s s z z s s s s s s s s s s s s z r r r r r r r r r r h ; e n P M x G z u v f S T 8 2 Q Z B j | j X F a ? 7 ~ e L 3 e e t s z z xz |z z z z z z z z z z z e $ t s z z xz |z z z z z d R S C f b f H t s z z xz |z z z z z z z z C f b f h d f r f z ^z z d R S C f b f h d f r f z ^z z z f a 7% 3 f h d f r f z %f f (f +f a 7% 3 p .f 7f P Df @ Mf ` Vf _f }f f f f f f f / f f f g g 0g Eg Vg cg |g g g g P g O $ g h 3h Lh / eh ? ~h O h _ h @ D h @ P ` , h L h l @ P ` 4 i i 7i Ni X | @ P ` hi i 0 P p @ P ` 0 @ T P t ` @ ( P L ` p p @ ` @ @ d 0 @ P @ d 0 @ P < o i i i i i i j j 4j O Hj o `j p d p 4 \ ` P xj O j o j p j 0 $ @ T P ` 0 j 0 j @ j k (k 8 l ` =k Wk lk @ k k k @ 0 ` T t @ ` ( @ H t @ ` $ @ H ` l k k k l @ P P P P ` p p p .l Dl Zl tl l l @ l @ l l " f e l l l ? l l ( m , @ "m P ?m 0 ? \m @ ? sm p ? p 0 4 ` 8 d m @ , m ( 0 0 m P P ? m ? m 0 < 0 \ | L p @ ` 0 ` P P n P n 0n @ H t ` $ ` X , P En @ 0 0 @ 0 0 @ 0 0 H p @ 0 @ 0 H 0 @ 0 8 @ 0 \ H 0 @ 0 @ 0 H 0 @ P cn P un n 0 X 0 | @ 0 @ 0 l @ @ @ @ 0 $ @ @ H @ P l @ ` @ p @ @ @ @ D @ h @ n @ n @ n @ 0 n @ @ o @ P o @ ` 2o @ p Ko @ do @ }o @ o @ o @ o @ o @ o @ p @ ,p @ Gp @ ^p @ 0 lp @ @ zp @ P p @ p @ p @ p @ p @ p @ q - q q 0 5q Kq eq oq 0 q 0 q - q q 0 q q r r 0 0r 0 ?r 0 , T p Nr 0 p kr p r 0 p r p r p r @ P p p P 0 0 < 0 0 P d @ P P @ P r @ P s 4s Js `s vs s s s s s s t , P (t Et t bt vt @ p t @ p t @ t t @ t t @ u u @ 5u Iu ^u vu @ P u @ P u @ P u @ P u @ P @ P @ P @ P @ @ P d @ P P u v 0v @ Mv @ jv P v P v @ P v P v @ P v P w @ P "w P ! ! %-12ld %-8lo %-10ld %-ld: %-ld // ARFILENAMES/ ARFILENAMES/ // __.SYMDEF __.SYMDEF/ / /SYM64/ ` %-7lo bfd /tmp/android-build-bb7e003d31d08f72cabc269a652912b7/src/build/../binutils/binutils-2.20.1/bfd/archive.c Reading archive file mod timestamp Writing updated armap timestamp Warning: writing archive was slow: rewriting timestamp bfd_dont_truncate_arname binary ` ` BFD %s assertion fail %s:%d Please report this bug. coff-go32 pe-i386 pei-i386 pe-x86-64 pei-x86-64 pe-arm-wince-little pei-arm-wince-little mach-o BFD: Error reading %s: %s No error System call error Invalid bfd target File in wrong format Invalid operation Memory exhausted No symbols No more archived files Malformed archive File format not recognized File format is ambiguous Section has no contents Bad value File truncated File too big # BFD %s internal error, aborting at %s line %d in %s BFD %s internal error, aborting at %s line %d /tmp/android-build-bb7e003d31d08f72cabc269a652912b7/src/build/../binutils/binutils-2.20.1/bfd/bfd.c Archive object file in wrong format Archive has no index; run ranlib to add one Nonrepresentable section on output Symbol needs debug section which does not exist E E E E xG E E E G E F "F =F VF G G nF xF F sE F _bfd_set_gp_value _bfd_default_error_handler bfd_set_error /tmp/android-build-bb7e003d31d08f72cabc269a652912b7/src/build/../binutils/binutils-2.20.1/bfd/bfdio.c bfd_stat coff %s %s [%3ld] File endndx %ld %s : %4d : %-5s %s %s %s %B: bad string table size %lu strange .file (sec %2d)(fl 0x%02x)(ty %3x)(scl %3d) (nx %d) 0x AUX scnlen 0x%lx nreloc %d nlnno %d checksum 0x%lx assoc %d comdat %d AUX tagndx %ld ttlsiz 0x%lx lnnos %ld next %ld AUX lnno %d size 0x%x tagndx %ld /tmp/android-build-bb7e003d31d08f72cabc269a652912b7/src/build/../binutils/binutils-2.20.1/bfd/coffgen.c coff_fix_symbol_name invalid core V F J Deprecated %s called at %s line %d in %s %B: compiled for a big endian system and target is little endian %B: compiled for a little endian system and target is big endian /tmp/android-build-bb7e003d31d08f72cabc269a652912b7/src/build/../binutils/binutils-2.20.1/bfd/libbfd.c Deprecated %s called _bfd_generic_get_section_contents_in_window bfd_get_bits bfd_put_bits .gnu_debuglink r+ /tmp/android-build-bb7e003d31d08f72cabc269a652912b7/src/build/../binutils/binutils-2.20.1/bfd/opncls.c 0 w,a Q m jp5 c d 2 y +L | ~ - d jHq A } mQ V l kdz b e O\ l cc= n;^ iL A` rqg jm Zjz ' }D h i]Wb ge q6l knv + Zz J go C ` ~ 8R O g gW ?K6 H + L J 6`z A ` U g n1y iF a f o%6 hR w G "/& U ; ( Z + j \ 1 , [ d & c ju m ?6 g r W J z + {8 |! B hn [& w owG Z pj ; f\ e i b kaE l x T N 9a&g ` MGiI wn>Jj Z f @ ; 7S G 0 0 S $ 6 )W T g #.zf Ja h] +o*7 Z - B C @B `B 0C `C E pC bfd_fdopenr /tmp/android-build-bb7e003d31d08f72cabc269a652912b7/src/build/../binutils/binutils-2.20.1/bfd/section.c *ABS* *COM* *UND* *IND* .%d bfd_map_over_sections bfd_get_unique_section_name Q Q @ Q Q Unsupported .stab relocation %c%c%c%c%c%c%c .data *DEBUG* .drectve .edata .fini .idata .init .pdata .rdata .rodata .sbss .scommon .sdata .text zerovars p b nX t R d R N 8 N R i R e R t R i R t R p R r R r R s R c R g R t d R b GNUTARGET default armeb-*-netbsdelf* arm-*-netbsdelf* arm-*-nto* nto*arm* arm-*-rtems* armeb-*-elf arm*b-*-linux-* strongarm-*-kaos* arm-*-freebsd* arm*-*-linux-* arm*-*-conix* arm*-*-uclinux* arm-*-kfreebsd*-gnu arm*-*-eabi* arm9e-*-elf thumb-*-elf strongarm-*-elf xscale-*-elf S @ S S S S S T @ T T T %T 4T CT QT aT uT T T T T @ X Y @m ] [ `b /tmp/android-build-bb7e003d31d08f72cabc269a652912b7/src/build/../binutils/binutils-2.20.1/bfd/hash.c ! ;A bfd_hash_replace ? ? $$ $$ \%03o .sec%d %-5s %s symbolsrec %B:%d: Unexpected character `%s' in S-record file %B:%d: Bad checksum in S-record file /tmp/android-build-bb7e003d31d08f72cabc269a652912b7/src/build/../binutils/binutils-2.20.1/bfd/srec.c * o o V w 05 p6 8 p4 4 7 3 3 04 05 p6 8 p4 4 7 3 3 04 0; P 0; 0; ; @ ; ; ` ; @3 @3 U < @3 @3 9 @3 @3 @3 @3 @3 p; P; ; ; ; ; 3 ; ; ; ; 0 ; `| a @ 8 ; ; ; 9 ; ; a a 3 3 ; ; p P| p ` p 0 @W PW ` ; ; ; ; ; V w 05 p6 8 p4 4 7 3 3 04 05 p6 8 p4 4 7 3 3 04 0; P 0; 0; ; @ ; ; @ ; @3 @3 U < @3 @3 9 @3 @3 @3 @3 @3 p; P; ; ; ; ; 3 ; ; ; ; 0 ; `| a @ 8 ; ; ; 9 ; ; a a 3 3 ; ; p P| p ` p 0 @W PW ` ; ; ; ; ; 0123456789ABCDEF _binary_%s_%s start D { 05 p6 8 p4 4 7 3 3 04 05 p6 8 p4 4 7 3 3 04 0; 0; 0; ; 0 ; ; ; @3 ; ; @3 @3 U @ < @3 @3 9 @3 @3 @3 @3 @3 p; P; ; ; ; ; 3 ; ; ; ; 0 ; @ P a 3 8 ; ; ; 9 ; ; a a 3 3 ; ; ` P p ` p 0 @W PW ` ; ; ; ; ; /tmp/android-build-bb7e003d31d08f72cabc269a652912b7/src/build/../binutils/binutils-2.20.1/bfd/tekhex.c %0781010 tekhex ] w 05 p6 8 p4 4 7 3 3 04 05 p6 8 p4 4 7 3 3 04 0; 0; 0; ; ; ; 0 ; @3 @3 U < @3 @3 9 @3 @3 @3 @3 @3 p; P; ; ; ; ; 3 ; ; ; ; 0 ; @ ` @ 8 ; ; ; 9 ; ; a a 3 3 ; ; 0 0 p ` p 0 @W PW ` ; ; ; ; ; 0123456789ABCDEF tekhex_write_object_contents out ihex %B:%d: unexpected character `%s' in Intel Hex file /tmp/android-build-bb7e003d31d08f72cabc269a652912b7/src/build/../binutils/binutils-2.20.1/bfd/ihex.c %s: address 0x%s out of range for Intel Hex file %B:%u: bad checksum in Intel Hex file (expected %u, found %u) %B:%u: bad extended address record length in Intel Hex file %B:%u: bad extended start address length in Intel Hex file %B:%u: bad extended linear address record length in Intel Hex file %B:%u: bad extended linear start address length in Intel Hex file %B:%u: unrecognized ihex type %u in Intel Hex file %B: internal error in ihex_read_section %B: bad section length in ihex_read_section _ 05 p6 8 p4 4 7 3 3 04 05 p6 8 p4 4 7 3 3 04 0; 0; 0; ; ; ; ; @3 @3 U ` < @3 @3 9 @3 @3 @3 @3 @3 p; P; ; ; ; ; 3 ; ; ; ; 0 ; p3 p3 a 3 3 ; ; ; ; 9 ; ; ; ; 3 3 ; ; p ` p 0 @W PW ` ; ; ; ; ; 0123456789ABCDEF INDR SETA SETT SETD SETB SETV WARNING GSYM FNAME FUN STSYM LCSYM MAIN ROSYM BNSYM NSYMS NOMAP OBJ OPT M2C DSLINE BSLINE DEFD FLINE ENSYM EHDECL CATCH SSYM ENDM OSO ALIAS LSYM BINCL SOL PSYM EINCL LBRAC SCOPE PATCH RBRAC BCOMM ECOMM ECOML WITH NBTEXT NBDATA NBBSS NBSTS NBLCS LENG d d d $d )d .d 3d ;d @d Fd Jd Pd Vd [d ad 3 gd md sd wd {d d d d d d d d d d d d d d d d d d d [y d 5B d d d d d d e e e e e "e (e /tmp/android-build-bb7e003d31d08f72cabc269a652912b7/src/build/../binutils/binutils-2.20.1/bfd/dwarf2.c Dwarf Error: Can't find %s section. Dwarf Error: unable to decompress %s section. Dwarf Error: Offset (%lu) greater than or equal to %s size (%lu). Dwarf Error: Invalid or unhandled FORM value: %u. Dwarf Error: Could not find abbrev number %u. Dwarf Error: mangled line number section (bad file number). Dwarf Error: mangled line number section. Dwarf Error: found dwarf version '%u', this reader only handles version 2 and 3 information. Dwarf Error: found address size '%u', this reader can not handle sizes greater than '%u'. Dwarf Error: found address size '%u', this reader can only handle address sizes '2', '4' and '8'. Dwarf Error: Bad abbrev number: %u. %s/%s/%s /usr/local/lib/debug P h h @ h x P ( @ find_line read_address scan_unit_for_symbols find_abstract_instance_name ZLIB 1.2.3.3 verilog m w 05 p6 8 p4 4 7 3 3 04 05 p6 8 p4 4 7 3 3 04 0; 0; 0; 0; ; ; ; ; ; ; @3 @3 U 0> < @3 @3 9 @3 @3 @3 @3 @3 p; P; ; ; ; ; 3 ; ; ; ; 0 ; ; ; a 3 3 ; ; ; ; 9 ; ; ; ; 3 3 ; ; P3 ; ; ; 3 ; 3 ; ; ; ; ; ; 3 ; ; ; ; ; ; 0123456789ABCDEF .ARM.exidx .reg .glue_7 .glue_7t .v4_bx .stub .dynamic .note.gnu.arm.ident %08x_%s+%x %08x_%x:%x+%x __vfp11_veneer_%x __vfp11_veneer_%x_r __%s_from_arm __%s_from_thumb .got.plt .dynstr .dynsym .gnu.version .gnu.version_d .gnu.version_r .rela.plt .rel.plt .rela.got .rel.got .rela.bss .rel.bss got-rel .gnu.linkonce.armexidx. __real_%s .tls_vars .dynbss .vfp11_veneer %B: bad symbol index: %d a local symbol private flags = %lx: [interworking enabled] [APCS-26] [APCS-32] [VFP float format] [Maverick float format] [FPA float format] [position independent] [new ABI] [old ABI] [software FP] [Version1 EABI] [sorted symbol table] [unsorted symbol table] [Version2 EABI] [Version3 EABI] [Version4 EABI] [Version5 EABI] [BE8] [LE8] [relocatable executable] [has entry point] $a __bx_r%d .interp /usr/lib/ld.so.1 .rel unnamed __%s_veneer %x:%x out of range unsupported relocation unknown error elf32-bigarm elf32-littlearm elf32-bigarm-vxworks elf32-littlearm-vxworks elf32-bigarm-symbian elf32-littlearm-symbian aeabi .ARM.attributes $t $d R_ARM_NONE R_ARM_PC24 R_ARM_ABS32 R_ARM_REL32 R_ARM_LDR_PC_G0 R_ARM_ABS16 R_ARM_ABS12 R_ARM_THM_ABS5 R_ARM_ABS8 R_ARM_SBREL32 R_ARM_THM_CALL R_ARM_THM_PC8 R_ARM_BREL_ADJ R_ARM_SWI24 R_ARM_SWI8 R_ARM_XPC25 R_ARM_THM_XPC22 R_ARM_TLS_DTPMOD32 R_ARM_TLS_DTPOFF32 R_ARM_TLS_TPOFF32 R_ARM_COPY R_ARM_GLOB_DAT R_ARM_JUMP_SLOT R_ARM_RELATIVE R_ARM_GOTOFF32 R_ARM_GOTPC R_ARM_GOT32 R_ARM_PLT32 R_ARM_CALL R_ARM_JUMP24 R_ARM_THM_JUMP24 R_ARM_BASE_ABS R_ARM_ALU_PCREL_7_0 R_ARM_ALU_PCREL_15_8 R_ARM_ALU_PCREL_23_15 R_ARM_LDR_SBREL_11_0 R_ARM_ALU_SBREL_19_12 R_ARM_ALU_SBREL_27_20 R_ARM_TARGET1 R_ARM_ROSEGREL32 R_ARM_V4BX R_ARM_TARGET2 R_ARM_PREL31 R_ARM_MOVW_ABS_NC R_ARM_MOVT_ABS R_ARM_MOVW_PREL_NC R_ARM_MOVT_PREL R_ARM_THM_MOVW_ABS_NC R_ARM_THM_MOVT_ABS R_ARM_THM_MOVW_PREL_NC R_ARM_THM_MOVT_PREL R_ARM_THM_JUMP19 R_ARM_THM_JUMP6 R_ARM_THM_ALU_PREL_11_0 R_ARM_THM_PC12 R_ARM_ABS32_NOI R_ARM_REL32_NOI R_ARM_ALU_PC_G0_NC R_ARM_ALU_PC_G0 R_ARM_ALU_PC_G1_NC R_ARM_ALU_PC_G1 R_ARM_ALU_PC_G2 R_ARM_LDR_PC_G1 R_ARM_LDR_PC_G2 R_ARM_LDRS_PC_G0 R_ARM_LDRS_PC_G1 R_ARM_LDRS_PC_G2 R_ARM_LDC_PC_G0 R_ARM_LDC_PC_G1 R_ARM_LDC_PC_G2 R_ARM_ALU_SB_G0_NC R_ARM_ALU_SB_G0 R_ARM_ALU_SB_G1_NC R_ARM_ALU_SB_G1 R_ARM_ALU_SB_G2 R_ARM_LDR_SB_G0 R_ARM_LDR_SB_G1 R_ARM_LDR_SB_G2 R_ARM_LDRS_SB_G0 R_ARM_LDRS_SB_G1 R_ARM_LDRS_SB_G2 R_ARM_LDC_SB_G0 R_ARM_LDC_SB_G1 R_ARM_LDC_SB_G2 R_ARM_MOVW_BREL_NC R_ARM_MOVT_BREL R_ARM_MOVW_BREL R_ARM_THM_MOVW_BREL_NC R_ARM_THM_MOVT_BREL R_ARM_THM_MOVW_BREL R_ARM_PLT32_ABS R_ARM_GOT_ABS R_ARM_GOT_PREL R_ARM_GOT_BREL12 R_ARM_GOTOFF12 R_ARM_GNU_VTENTRY R_ARM_GNU_VTINHERIT R_ARM_THM_JUMP11 R_ARM_THM_JUMP8 R_ARM_TLS_GD32 R_ARM_TLS_LDM32 R_ARM_TLS_LDO32 R_ARM_TLS_IE32 R_ARM_TLS_LE32 R_ARM_TLS_LDO12 R_ARM_TLS_LE12 R_ARM_TLS_IE12GP R_ARM_RREL32 R_ARM_RABS32 R_ARM_RPC24 R_ARM_RBASE variable-size Pre v4 ARM v4 ARM v4T ARM v5T ARM v5TE ARM v5TEJ ARM v6 ARM v6KZ ARM v6T2 ARM v6K ARM v7 ARM v6-M ARM v6S-M .init_array .fini_array .preinit_array Warning: Not setting interworking flag of %B since it has already been specified as non-interworking Warning: Clearing the interworking flag of %B due to outside request error: %B: Unknown CPU architecture error: %B: Conflicting CPU architectures %d/%d %B: warning: selected VFP11 erratum workaround is not necessary for target architecture /tmp/android-build-bb7e003d31d08f72cabc269a652912b7/src/build/../binutils/binutils-2.20.1/bfd/elf32-arm.c %B: error: VFP11 veneer out of range %B: error: Cortex-A8 erratum stub is allocated in unsafe location %B: error: Cortex-A8 erratum stub out of range (input file too large) %B: unable to find VFP11 veneer `%s' unable to find ARM glue '%s' for '%s' %B(%s): warning: interworking not enabled. first occurrence: %B: arm call to thumb unable to find THUMB glue '%s' for '%s' Invalid TARGET2 relocation type '%s'. dynamic variable `%s' is zero size %B: relocation %s against `%s' can not be used when making a shared object; recompile with -fPIC [floats passed in float registers] [dynamic symbols use segment index] [mapping symbols precede others] Warning: Clearing the interworking flag of %B because non-interworking code in %B has been linked with it error: %B uses VFP register arguments, %B does not error: %B: Conflicting architecture profiles %c/%c Warning: %B: Conflicting platform configuration error: %B: Conflicting use of R9 error: %B: SB relative addressing conflicts with use of R9 warning: %B uses %u-byte wchar_t yet the output is to use %u-byte wchar_t; use of wchar_t values across objects may fail warning: %B uses %s enums yet the output is to use %s enums; use of enum values across objects may fail error: %B uses iWMMXt register arguments, %B does not error: fp16 format mismatch between %B and %B %B: Unknown mandatory EABI object attribute %d Warning: %B: Unknown EABI object attribute %d error: %B is already in final BE8 format error: Source object %B has EABI version %d, but target %B has EABI version %d error: %B is compiled for APCS-%d, whereas target %B uses APCS-%d error: %B passes floats in float registers, whereas %B passes them in integer registers error: %B passes floats in integer registers, whereas %B passes them in float registers error: %B uses VFP instructions, whereas %B does not error: %B uses FPA instructions, whereas %B does not error: %B uses Maverick instructions, whereas %B does not error: %B does not use Maverick instructions, whereas %B does error: %B uses software FP, whereas %B uses hardware FP error: %B uses hardware FP, whereas %B uses software FP Warning: %B supports interworking, whereas %B does not Warning: %B does not support interworking, whereas %B does %B: BE8 images only valid in big-endian mode. Errors encountered processing file %s %B(%s): warning: interworking not enabled. first occurrence: %B: Thumb call to ARM %B(%s): warning: interworking not enabled. first occurrence: %B: ARM call to Thumb %s: cannot create stub entry %s %B: Warning: Arm BLX instruction targets Arm function '%s'. %B: Warning: Thumb BLX instruction targets thumb function '%s'. %B(%s): warning: interworking not enabled. first occurrence: %B: thumb call to arm %B(%A+0x%lx): R_ARM_TLS_LE32 relocation not permitted in shared object %B(%A+0x%lx): Overflow whilst splitting 0x%lx for group relocation %s %B(%A+0x%lx): Only ADD or SUB instructions are allowed for ALU group relocations %B(%A+0x%lx): %s relocation against SEC_MERGE section %B(%A+0x%lx): %s used with TLS symbol %s %B(%A+0x%lx): %s used with non-TLS symbol %s %B(%A+0x%lx): unresolvable %s relocation against symbol `%s' 0 () ) ) ) () () () () () () ) () () () () () () () () () () () () () () () h) ) ) ) ) () () () () () () () () () () () ) ) ) ) ) ) ) ) ) ) () () () ) ) () () () () () () () () () () () () () () () () () () () () () () () () () () () () () () () () () () () () () () () h) () () () () () () () h) H) () h) \ ] [ [ \ \ ] \ \ \ ] \ \ \ \ \ \ \ \ \ \ \ \ \ b] b] ] ] ] ] ] \ \ \ \ \ \ \ \ \ \ \ ] ^ ^ [ [ ^ ^ [ [ ] \ \ \ [ [ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ ] \ \ \ @^ ] \ \ ] ^ \ ] v v y y y y x y y ]{ z ~{ x lx Ex y lx y y y lx x w w v v v v v v y v y v =w v v v v v v v v v v v v v v v v v v v v v v v v v v v y x y v y H X X X P F F F F X F F F F F F F H X X X F p p p F F F F F F X @ @ @ @ P P P P 8 x X X x x x x x ` ` ` x x x x x ` ` ` @ @ @ P P P F F F F F F H F F F 8 8 H H H @ 4 ( p ` 0 p 0 r ? / 05 p6 8 p4 4 7 3 3 04 05 p6 8 p4 4 7 3 3 04 0; 0 ; x ; ` 0> < s t @< `= > `] l ` P @ @ 0 @3 ? ? Y X P@ l S Pk V j ; a a @? `? @ pi X 0 U p e e @ m d 0 l 8 PW $ I @ pB 0I H r ? / 5 7 p8 4 5 7 3 4 P4 5 7 p8 4 5 7 3 4 P4 0; 0 ; x ; ` 0> < s t @< `= > `] l ` P @ @ 0 @3 ? ? Y X P@ l S Pk V j ; a a @? `? @ pi X 0 U p e e @ m d 0 l 8 PW $ I @ pB 0I H @ r ? / 05 p6 8 p4 4 7 3 3 04 05 p6 8 p4 4 7 3 3 04 0; 0 ; x ; ` 0> < s t @< `= > `] l ` P @ @ 0 @3 ? ? Y X P@ l S Pk V j ; a a @? `? @ pi X 0 U p h e @ m d 0 l 8 PW $ I @ pB 0I H r ? / 5 7 p8 4 5 7 3 4 P4 5 7 p8 4 5 7 3 4 P4 0; 0 ; x ; ` 0> < s t @< `= > `] l ` P @ @ 0 @3 ? ? Y X P@ l S Pk V j ; a a @? `? @ pi X 0 U p h e @ m d 0 l 8 PW $ I @ pB 0I H s ? / 05 p6 8 p4 4 7 3 3 04 05 p6 8 p4 4 7 3 3 04 0; 0 ; x ; ` 0> < s t @< `= > `] l ` P @ @ 0 @3 ? ? Y X P@ l S Pk V j ; a a @? `? @ pi X 0 U p g e @ m d 0 l 8 PW $ I @ pB 0I H s ? / 5 7 p8 4 5 7 3 4 P4 5 7 p8 4 5 7 3 4 P4 0; 0 ; x ; ` 0> < s t @< `= > `] l ` P @ @ 0 @3 ? ? Y X P@ l S Pk V j ; a a @? `? @ pi X 0 U p g e @ m d 0 l 8 PW $ I @ pB 0I H @ elf32_arm_write_section Gr Js Ms 8 Ps 8 [s 8 fs 8 rs 8 ~s 8 s 8 s 8 s 8 s 8 s 8 s 8 s 8 s 8 s 8 t 8 t 8 t 8 -t 8 @t 8 St 8 et 8 pt 8 t 8 t 8 t 8 t 8 t 8 t 8 t 8 t 8 t / / 8 t 8 u ! 8 u " 8 2u # 8 Hu $ 8 ]u % 8 su & 8 u ' 8 u ( 8 u ) 8 u * 8 u + 8 u , 8 u - 8 u . 8 v / 8 v p p 0 8 (v p p 1 8 ;v p p 2 8 Rv p p 3 8 fv /? /? 4 8 wv 5 8 v 6 8 v 7 8 v 8 8 v 9 8 v : 8 v ; 8 v < 8 w = 8 w > 8 $w ? 8 4w @ 8 Dw A 8 Uw B 8 fw C 8 ww D 8 w E 8 w F 8 w G 8 w H 8 w I 8 w J 8 w K 8 w L 8 x M 8 x N 8 -x O 8 >x P 8 Ox Q 8 `x R 8 px S 8 x T 8 x U 8 x V 8 x W 8 x p p X 8 x p p Y 8 x p p Z [ \ ] ^ 8 y _ 8 y ` 8 y a 8 /y b 8 @y c d A Oy e ay f 8 uy g 8 y h y i 8 y j 8 y k y l 8 y m 8 y n 8 y o 8 z 8 z 8 z 8 -z 8 9z elf32_arm_final_link_relocate allocate_dynrelocs create_got_section elf32_arm_create_dynamic_sections F f 3 g 4 ` & ' * ) h j i k l e d + , - . / 0 1 2 9 : ; < = > ? @ A B C D E F G H I J K L M N O P Q R S ( Ez # Sz Zz az iz qz zz z z z z z z z bfd_elf32_arm_vfp11_fix_veneer_locations bfd_elf32_arm_vfp11_erratum_scan bfd_arm_vfp11_insn_decode record_vfp11_erratum_veneer bfd_elf32_arm_process_before_allocation arm_stub_required_alignment @ ` / H F `G xG F / xG F xG F / xG F / / xG F H F D `G #o o o o z z z Warning: %B is truncated: expected core file size >= %lu, found: %lu. /tmp/android-build-bb7e003d31d08f72cabc269a652912b7/src/build/../binutils/binutils-2.20.1/bfd/elfcode.h %s(%s): relocation %d has invalid symbol index %ld %s: version count (%ld) does not match symbol count (%ld) warning: %s has a corrupt string table index - ignoring X O X 4 ( ` p ` 0 p 0 bfd_elf32_write_relocs bfd_elf32_swap_symbol_out .tls_data .rel.plt.unloaded .rela.plt.unloaded __GOTT_BASE__ __GOTT_INDEX__ . . / / . / LINUX .reg2 .reg-xfp .reg-ppc-vmx .reg-ppc-vsx %s/%d .note .rela %s/%ld %s%d%s .symtab .strtab .shstrtab .symtab_shndx .gnu.libstr INTERP PHDR EH_FRAME STACK RELRO LOPROC+%7.7x LOOS+%7.7x %8.8x (*none*) Base %-11s .internal .hidden .protected 0x%02x Program Header: %8s off 0x vaddr 0x paddr 0x align 2**%u filesz 0x memsz 0x flags %c%c%c Dynamic Section: SONAME PLTGOT PLTRELSZ RELASZ RELAENT STRSZ SYMENT INIT FINI RPATH SYMBOLIC RELENT TEXTREL JMPREL BIND_NOW FINI_ARRAY FINI_ARRAYSZ RUNPATH FLAGS PREINIT_ARRAY PREINIT_ARRAYSZ CHECKSUM PLTPADSZ MOVEENT MOVESZ FEATURE POSFLAG_1 SYMINSZ SYMINENT CONFIG DEPAUDIT PLTPAD MOVETAB SYMINFO RELACOUNT RELCOUNT FLAGS_1 VERSYM VERDEF VERDEFNUM VERNEED VERNEEDNUM AUXILIARY USED FILTER GNU_HASH %-20s Version definitions: %d 0x%2.2x 0x%8.8lx %s Version References: required from %s: NEEDED (null) NetBSD-CORE .note.netbsdcore.procinfo OpenBSD .auxv .wcookie QNX .qnx_core_info .qnx_core_status/%ld .qnx_core_status SPU/ win32 .reg/%ld .module/%08lx GNU null load shlib phdr eh_frame_hdr relro proc %B: invalid SHT_GROUP entry .gnu.linkonce SHT_NULL SHT_PROGBITS SHT_SYMTAB SHT_STRTAB SHT_RELA SHT_HASH SHT_DYNAMIC SHT_NOTE SHT_NOBITS SHT_REL SHT_SHLIB SHT_DYNSYM LARGE_COMMON zdebug .comment .data1 .gnu.linkonce.b .gnu.liblist .gnu.conflict .gnu.hash .line .note.GNU-stack .rodata1 .tbss .tdata %B: unsupported relocation type %s %B: symbol `%s' required but not present /tmp/android-build-bb7e003d31d08f72cabc269a652912b7/src/build/../binutils/binutils-2.20.1/bfd/elf.c %B symbol number %lu references nonexistent SHT_SYMTAB_SHNDX section %B: warning: Empty loadable segment detected, is this intentional ? warning: section `%A' type changed to PROGBITS Unable to find equivalent output section for symbol '%s' from section '%s' %B: sh_link of section `%A' points to discarded section `%A' of `%B' %B: sh_link of section `%A' points to removed section `%A' of `%B' %B: warning: sh_link not set for section `%A' %B: The first section in the PT_DYNAMIC segment is not the .dynamic section %B: Not enough room for program headers, try linking with -N %B: section %A vma 0x%lx overlaps previous sections %B: section `%A' can't be allocated in segment %d %B: warning: allocated section `%s' not in segment %B: invalid string offset %u >= %lu for section `%s' 0x%8.8lx 0x%2.2x %2.2d %s %B: sh_link [%d] in section `%A' is incorrect %B: unknown [%d] section `%s' in group [%s] %B: Corrupt size field in group section header: 0x%lx %B: no group info for section %A %B: invalid link %lu for reloc section %s (index %u) %B: don't know how to handle allocated, application specific section `%s' [0x%8x] %B: don't know how to handle processor specific section `%s' [0x%8x] %B: don't know how to handle OS specific section `%s' [0x%8x] %B: don't know how to handle section `%s' [0x%8x] 8R Q Q Q (R Q Q Q R Q Q Q Q Q Q Q Q Q Q Q Q Q Q Q R Q Q Q Q Q Q Q Q Q Q Q Q Q Q Q Q Q Q Q Q Q Q Q Q Q Q Q Q Q Q Q HQ R Q Q Q Q Q R Q R Q Q Q Q Q Q Q Q Q pR Q Q Q Q Q hR Q Q Q Q Q Q Q Q Q Q Q Q Q Q Q Q Q Q Q Q Q Q Q Q Q Q Q Q Q Q Q HR h P ) _bfd_elf_no_info_to_howto get_program_header_size _bfd_elf_get_lineno rewrite_elf_program_header assign_file_positions_for_non_load_sections bfd_elf_set_group_contents @ ` ` @ @ 8 A bfd_elf_get_elf_syms p H R Q 8 @ ] #o o o R z X o o o o o o o h o u o R z Sr u z o R { lr R N l .gcc_except_table .gnu.linkonce. .gnu.linkonce.t. .gnu.linkonce.r. .end 0- << >> == != && || local _GLOBAL_OFFSET_TABLE_ _PROCEDURE_LINKAGE_TABLE_ %s: undefined version: %s .gnu.attributes .rela.dyn .rel.dyn .gnu.warning. .tcommon %B: bad relocation section name `%s' %P%X: can not read symbols: %E /tmp/android-build-bb7e003d31d08f72cabc269a652912b7/src/build/../binutils/binutils-2.20.1/bfd/elflink.c %B: ignoring duplicate section `%A' %B: duplicate section `%A' has different size %B: warning: could not read contents of section `%A' %B: warning: duplicate section `%A' has different contents %F%P: already_linked_table: %E %B: %A+%lu: No symbol found for INHERIT %B: Too many sections: %d (>= %d) %B: relocation size mismatch in %B section %A undefined %s reference in complex symbol: %s unknown operator '%c' in complex symbol %B: bad reloc symbol index (0x%lx >= 0x%lx) for offset 0x%lx in section `%A' %B: non-zero symbol index (0x%lx) for offset 0x%lx in section `%A' when the object file has no symbol table %B: %s symbol `%s' in %B is referenced by DSO %B: could not find output section %A for input section %A %B: %s symbol `%s' isn't defined %B: .preinit_array section is not allowed in DSO warning: type and size of dynamic symbol `%s' are not defined %B: version node not found for symbol %s %s: TLS definition in %B section %A mismatches non-TLS definition in %B section %A %s: TLS reference in %B mismatches non-TLS reference in %B %s: TLS definition in %B section %A mismatches non-TLS reference in %B %s: TLS reference in %B mismatches non-TLS definition in %B section %A Warning: gc-sections option ignored Removing unused section '%s' in file '%B' %A has both ordered [`%A' in %B] and unordered [`%A' in %B] sections %A has both ordered and unordered sections error: %B contains a reloc (0x%s) for section %A that references a non-existent global symbol %X`%s' referenced in section `%A' of %B: defined in discarded section `%A' of %B %B: Unable to sort relocs - they are in more than one size %B: Unable to sort relocs - they are of an unknown size Not enough memory to sort relocations %B: could not find output section %s warning: %s section has zero size %P: warning: creating a DT_TEXTREL in a shared object. %P: alternate ELF machine code found (%d) in %B, expecting %d %B: %s: invalid version %u (max %d) %B: %s: invalid needed version %d Warning: alignment %u of common symbol `%s' in %B is greater than the alignment (%u) of its section %A Warning: alignment %u of symbol `%s' in %B is smaller than %u in %B Warning: size of symbol `%s' changed from %lu in %B to %lu in %B Warning: type of symbol `%s' changed from %d to %d in %B %B: unexpected redefinition of indirect versioned symbol `%s' %s: invalid DSO for symbol `%s' definition NX Z Z Z Z ~X \ ] ] H_ H_ _ 2\ > @, * * * * * + , _bfd_elf_section_already_linked elf_link_input_bfd elf_reloc_link_order elf_link_adjust_relocs elf_link_output_extsym elf_link_check_versioned_symbol get_value put_value bfd_elf_size_dynsym_hash_dynstr % C a @ elf_link_add_object_symbols _bfd_elf_link_output_relocs bfd_elf_record_link_assignment error: %B: Must be processed by '%s' toolchain error: %B: Object tag '%d, %s' is incompatible with tag '%d, %s' /tmp/android-build-bb7e003d31d08f72cabc269a652912b7/src/build/../binutils/binutils-2.20.1/bfd/elf-attrs.c _bfd_elf_parse_attributes _bfd_elf_obj_attrs_arg_type _bfd_elf_copy_obj_attributes bfd_elf_set_obj_attr_contents /tmp/android-build-bb7e003d31d08f72cabc269a652912b7/src/build/../binutils/binutils-2.20.1/bfd/elf-strtab.c Q R xR `R HR Q Q Q Q Q Q Q Q Q Q Q Q Q Q Q Q Q Q xQ xQ xQ xQ xQ xQ 0R xQ xQ xQ xQ xQ xQ xQ xQ xQ xQ xQ xQ xQ xQ xQ Q Q Q xQ xQ xQ xQ xQ xQ xQ xQ xQ xQ xQ xQ xQ xQ xQ xQ Q xQ xQ xQ xQ xQ xQ xQ xQ xQ xQ xQ xQ xQ xQ xQ xQ xQ xQ xQ xQ xQ xQ xQ xQ xQ xQ xQ xQ xQ xQ xQ xQ xQ xQ xQ xQ xQ xQ xQ xQ xQ xQ xQ xQ xQ xQ xQ xQ xQ xQ xQ xQ xQ xQ xQ xQ xQ xQ xQ xQ xQ xQ xQ Q xQ xQ xQ xQ xQ xQ xQ xQ xQ xQ xQ xQ xQ xQ xQ xQ xQ xQ xQ xQ xQ xQ xQ xQ xQ xQ xQ xQ xQ xQ xQ xQ xQ xQ xQ xQ xQ xQ xQ xQ xQ xQ xQ xQ xQ xQ xQ xQ xQ xQ xQ xQ xQ xQ xQ xQ xQ xQ xQ xQ xQ xQ xQ Q _bfd_elf_write_section_eh_frame /tmp/android-build-bb7e003d31d08f72cabc269a652912b7/src/build/../binutils/binutils-2.20.1/bfd/elf-eh-frame.c %P: fde encoding in %B(%A) prevents .eh_frame_hdr table being created. %P: error in %B(%A); no .eh_frame_hdr table will be created. ~ @ ( ~ ~ ( ~ ~ %B: Relocations in generic ELF (EM: %d) elf32-big elf32-little UNKNOWN ? / 05 p6 8 p4 4 7 3 3 04 05 p6 8 p4 4 7 3 3 04 0; 0 ; w x ; P `N 0> < @3 @< `= > `] @3 ` P @ @ 0 @3 ? ? Y X P@ ; S V V `V ; a a @? `? ; X 0 U p m p 0 l 8 PW $ I @ pB 0I H ? / 5 7 p8 4 5 7 3 4 P4 5 7 p8 4 5 7 3 4 P4 0; 0 ; w x ; P `N 0> < @3 @< `= > `] @3 ` P @ @ 0 @3 ? ? Y X P@ ; S V V `V ; a a @? `? ; X 0 U p m p 0 l 8 PW $ I @ pB 0I H arch: arm2 arm250 arm3 arm6 arm60 arm600 arm610 arm7 arm710 arm7500 arm7d arm7di arm7dm arm7dmi arm7tdmi arm8 arm810 arm9 arm920 arm920t arm9tdmi sa1 strongarm strongarm110 strongarm1100 xscale ep9312 iwmmxt iwmmxt2 armv2 armv2a armv3 armv3M armv4 armv4t armv5 armv5t armv5te XScale iWMMXt iWMMXt2 armv3m error: %B is compiled for the EP9312, whereas %B is compiled for XScale warning: unable to update contents of %s section in %s # o o p & - 5 > C J O V ^ g k u # o p # o p # o p 0 # o p ` # o p # o p # o p # o p # o p P # o p # o p # o p # o p /tmp/android-build-bb7e003d31d08f72cabc269a652912b7/src/build/../binutils/binutils-2.20.1/bfd/cache.c w+ reopening %B: %s 0 ` P cache_bmmap bfd_cache_lookup_worker /tmp/android-build-bb7e003d31d08f72cabc269a652912b7/src/build/../binutils/binutils-2.20.1/bfd/reloc.c %P%F: --relax and -r may not be used together BFD_RELOC_SPARC_GOTDATA_OP_HIX22 BFD_RELOC_SPARC_GOTDATA_OP_LOX10 BFD_RELOC_MIPS_TLS_DTPREL_HI16 BFD_RELOC_MIPS_TLS_DTPREL_LO16 BFD_RELOC_FRV_FUNCDESC_GOTOFF12 BFD_RELOC_FRV_FUNCDESC_GOTOFFHI BFD_RELOC_FRV_FUNCDESC_GOTOFFLO BFD_RELOC_X86_64_GOTPC32_TLSDESC BFD_RELOC_PPC64_PLTGOT16_LO_DS BFD_RELOC_PPC64_TPREL16_HIGHER BFD_RELOC_PPC64_TPREL16_HIGHERA BFD_RELOC_PPC64_TPREL16_HIGHEST BFD_RELOC_PPC64_TPREL16_HIGHESTA BFD_RELOC_PPC64_DTPREL16_LO_DS BFD_RELOC_PPC64_DTPREL16_HIGHER BFD_RELOC_PPC64_DTPREL16_HIGHERA BFD_RELOC_PPC64_DTPREL16_HIGHEST BFD_RELOC_PPC64_DTPREL16_HIGHESTA BFD_RELOC_THUMB_PCREL_BRANCH12 BFD_RELOC_THUMB_PCREL_BRANCH20 BFD_RELOC_THUMB_PCREL_BRANCH23 BFD_RELOC_THUMB_PCREL_BRANCH25 BFD_RELOC_ARM_THUMB_MOVW_PCREL BFD_RELOC_ARM_THUMB_MOVT_PCREL BFD_RELOC_ARM_T32_CP_OFF_IMM_S2 BFD_RELOC_SH_IMM_MEDLOW16_PCREL BFD_RELOC_SH_IMM_MEDHI16_PCREL BFD_RELOC_BFIN_12_PCREL_JUMP_S BFD_RELOC_BFIN_24_PCREL_CALL_X BFD_RELOC_BFIN_24_PCREL_JUMP_L BFD_RELOC_BFIN_FUNCDESC_GOT17M4 BFD_RELOC_BFIN_FUNCDESC_GOTOFF17M4 BFD_RELOC_BFIN_FUNCDESC_GOTOFFHI BFD_RELOC_BFIN_FUNCDESC_GOTOFFLO BFD_RELOC_V850_SDA_16_16_OFFSET BFD_RELOC_V850_SDA_15_16_OFFSET BFD_RELOC_V850_ZDA_16_16_OFFSET BFD_RELOC_V850_ZDA_15_16_OFFSET BFD_RELOC_V850_TDA_16_16_OFFSET BFD_RELOC_V850_SDA_16_16_SPLIT_OFFSET BFD_RELOC_V850_ZDA_16_16_SPLIT_OFFSET BFD_RELOC_V850_CALLT_6_7_OFFSET BFD_RELOC_V850_CALLT_16_16_OFFSET BFD_RELOC_V850_LO16_SPLIT_OFFSET BFD_RELOC_MCORE_PCREL_IMM11BY2 BFD_RELOC_MCORE_PCREL_JSR_IMM11BY2 BFD_RELOC_MMIX_PUSHJ_STUBBABLE BFD_RELOC_MMIX_BASE_PLUS_OFFSET BFD_RELOC_IA64_LTOFF_FPTR32MSB BFD_RELOC_IA64_LTOFF_FPTR32LSB BFD_RELOC_IA64_LTOFF_FPTR64MSB BFD_RELOC_IA64_LTOFF_FPTR64LSB BFD_RELOC_MSP430_16_PCREL_BYTE BFD_RELOC_MICROBLAZE_32_LO_PCREL BFD_RELOC_MICROBLAZE_32_SYM_OP_SYM BFD_RELOC_MICROBLAZE_64_GOTOFF BFD_RELOC_MICROBLAZE_32_GOTOFF @@overflow: BFD_RELOC_UNUSED@@ 8 h @ 8 H P X p ( H P H bfd_generic_get_relocated_section_contents , 9 F S ` m y , B V j 3 G [ o " 9 O g ! 8 O e z 5 K Z i { / D Y p - | K f } ' ? W o ) = Q j ) E b ' B _ | ( ; N b w 0 D Z v ! : U p ! ! 8! Q! m! ! ! ! ! ! " #" 6" K" b" q" " " " " " " # # /# E# \# q# # # # # # # $ ,$ D$ Z$ p$ $ $ $ $ $ $ % &% :% V% r% % % % % % & )& G& e& y& & & & & & & ' *' @' V' l' ' ' ' ' ' ' ( $ D 3( J( a( x( ( ( ( ( ( ) -) E) _) y) ) ) ) ) ) * .* F* ^* v* * * * * * + %+ 9+ L+ c+ {+ + + + + + , , *, @, Y, q, , , , , , - &- >- U- l- - - - - - . . 4. M. d. {. . . . . . / ./ G/ a/ d {/ / / / / / 0 -0 J0 g0 ~0 0 0 0 0 1 $1 A1 X1 o1 1 1 1 1 1 1 2 2 42 O2 b2 }2 2 2 2 2 2 3 #3 =3 Z3 w3 3 3 3 3 3 4 -4 H4 c4 ~4 4 4 4 4 4 5 ,5 E5 ^5 r5 5 5 5 5 5 6 /6 K6 g6 6 6 6 6 6 7 7 +7 @7 V7 o7 7 7 7 7 7 8 8 /8 I8 f8 8 8 8 8 8 9 +9 H9 e9 9 9 9 9 9 : 0: , L l L: _: n: : : : : : ; 8 ); B; ]; s; ; ; ; ; ; ; < %< >< X x W< o< < < < < < < = = 4= L= g= = = = = = = > 0> H> `> x> > > > > > ? #? >? V? q? ? ? ? ? ? @ @ 4@ L@ d@ |@ @ @ @ @ @ A -A EA WA iA }A A A A A A B 'B AB ]B zB B B B B B C C 2C FC ]C tC C C C C C C D D .D HD bD xD D D D D D D D E +E =E SE iE E E E E E E F )F EF ^F uF F F F F F G *G CG _G zG G G G G G H H 3H LH bH |H H H H H H H I %I 9I MI dI I I I I I I J 'J ?J VJ mJ J J J J J J K (K ?K UK mK K 8 K K K K X K L 7L x UL oL L L L L L L M M /M CM WM nM M M M M M M M N &N ;N RN gN N N N N N N O O 0O JO \O tO O O O O O O P P 6P NP `P xP P P P P P Q Q /Q CQ [Q sQ Q Q Q Q Q R 'R CR [R wR R R R $ D R R S d 4S RS pS S S S S S S T 1T ET _T zT T T T T T T U &U < DU bU \ {U U U U U U U V V 8V LV `V tV V V V V V V W 'W AW UW kW W W W W W W X 'X >X UX lX X X X X X X Y Y -Y CY ZY nY Y Y Y Y Y Y Z .Z GZ `Z yZ Z Z Z Z [ [ '[ 7[ L[ ][ q[ [ [ [ [ [ [ \ \ 2\ H\ _\ v\ \ \ \ \ \ \ ] &] >] U] l] ] ] ] ] ] ] ^ .^ H^ `^ x^ ^ ^ ^ ^ ^ _ _ 5_ N_ f_ w_ _ _ _ _ _ _ ` ,` B` X` q` ` ` ` ` ` ` a 'a b Ub jb b b b b b b c #c =c Wc qc c c c c c d !d 8d Qd jd d d d d d d e ,e De ^e xe e e e e f f 6f Qf lf f f f f f g g 5g Mg eg }g g g g g g h h 3h Mh gh h h h h h i !i ~ Y~ t~ ~ ~ ~ ~ ~ 0 E Z v 7 Q e y + C [ s ` 5 Q m _bfd_clear_contents _bfd_relocate_contents bfd_perform_relocation bfd_check_overflow bfd_get_reloc_size coff-Intel-little coff-Intel-big coff-z8k unused @@uninitialized@@ BFD_RELOC_64 BFD_RELOC_32 BFD_RELOC_26 BFD_RELOC_24 BFD_RELOC_16 BFD_RELOC_14 BFD_RELOC_8 BFD_RELOC_64_PCREL BFD_RELOC_32_PCREL BFD_RELOC_24_PCREL BFD_RELOC_16_PCREL BFD_RELOC_12_PCREL BFD_RELOC_8_PCREL BFD_RELOC_32_SECREL BFD_RELOC_32_GOT_PCREL BFD_RELOC_16_GOT_PCREL BFD_RELOC_8_GOT_PCREL BFD_RELOC_32_GOTOFF BFD_RELOC_16_GOTOFF BFD_RELOC_LO16_GOTOFF BFD_RELOC_HI16_GOTOFF BFD_RELOC_HI16_S_GOTOFF BFD_RELOC_8_GOTOFF BFD_RELOC_64_PLT_PCREL BFD_RELOC_32_PLT_PCREL BFD_RELOC_24_PLT_PCREL BFD_RELOC_16_PLT_PCREL BFD_RELOC_8_PLT_PCREL BFD_RELOC_64_PLTOFF BFD_RELOC_32_PLTOFF BFD_RELOC_16_PLTOFF BFD_RELOC_LO16_PLTOFF BFD_RELOC_HI16_PLTOFF BFD_RELOC_HI16_S_PLTOFF BFD_RELOC_8_PLTOFF BFD_RELOC_68K_GLOB_DAT BFD_RELOC_68K_JMP_SLOT BFD_RELOC_68K_RELATIVE BFD_RELOC_68K_TLS_GD32 BFD_RELOC_68K_TLS_GD16 BFD_RELOC_68K_TLS_GD8 BFD_RELOC_68K_TLS_LDM32 BFD_RELOC_68K_TLS_LDM16 BFD_RELOC_68K_TLS_LDM8 BFD_RELOC_68K_TLS_LDO32 BFD_RELOC_68K_TLS_LDO16 BFD_RELOC_68K_TLS_LDO8 BFD_RELOC_68K_TLS_IE32 BFD_RELOC_68K_TLS_IE16 BFD_RELOC_68K_TLS_IE8 BFD_RELOC_68K_TLS_LE32 BFD_RELOC_68K_TLS_LE16 BFD_RELOC_68K_TLS_LE8 BFD_RELOC_32_BASEREL BFD_RELOC_16_BASEREL BFD_RELOC_LO16_BASEREL BFD_RELOC_HI16_BASEREL BFD_RELOC_HI16_S_BASEREL BFD_RELOC_8_BASEREL BFD_RELOC_RVA BFD_RELOC_8_FFnn BFD_RELOC_32_PCREL_S2 BFD_RELOC_16_PCREL_S2 BFD_RELOC_23_PCREL_S2 BFD_RELOC_HI22 BFD_RELOC_LO10 BFD_RELOC_GPREL16 BFD_RELOC_GPREL32 BFD_RELOC_I960_CALLJ BFD_RELOC_NONE BFD_RELOC_SPARC_WDISP22 BFD_RELOC_SPARC22 BFD_RELOC_SPARC13 BFD_RELOC_SPARC_GOT10 BFD_RELOC_SPARC_GOT13 BFD_RELOC_SPARC_GOT22 BFD_RELOC_SPARC_PC10 BFD_RELOC_SPARC_PC22 BFD_RELOC_SPARC_WPLT30 BFD_RELOC_SPARC_COPY BFD_RELOC_SPARC_GLOB_DAT BFD_RELOC_SPARC_JMP_SLOT BFD_RELOC_SPARC_RELATIVE BFD_RELOC_SPARC_UA16 BFD_RELOC_SPARC_UA32 BFD_RELOC_SPARC_UA64 BFD_RELOC_SPARC_GOTDATA_HIX22 BFD_RELOC_SPARC_GOTDATA_LOX10 BFD_RELOC_SPARC_GOTDATA_OP BFD_RELOC_SPARC_BASE13 BFD_RELOC_SPARC_BASE22 BFD_RELOC_SPARC_10 BFD_RELOC_SPARC_11 BFD_RELOC_SPARC_OLO10 BFD_RELOC_SPARC_HH22 BFD_RELOC_SPARC_HM10 BFD_RELOC_SPARC_LM22 BFD_RELOC_SPARC_PC_HH22 BFD_RELOC_SPARC_PC_HM10 BFD_RELOC_SPARC_PC_LM22 BFD_RELOC_SPARC_WDISP16 BFD_RELOC_SPARC_WDISP19 BFD_RELOC_SPARC_7 BFD_RELOC_SPARC_6 BFD_RELOC_SPARC_5 BFD_RELOC_SPARC_PLT32 BFD_RELOC_SPARC_PLT64 BFD_RELOC_SPARC_HIX22 BFD_RELOC_SPARC_LOX10 BFD_RELOC_SPARC_H44 BFD_RELOC_SPARC_M44 BFD_RELOC_SPARC_L44 BFD_RELOC_SPARC_REGISTER BFD_RELOC_SPARC_REV32 BFD_RELOC_SPARC_TLS_GD_HI22 BFD_RELOC_SPARC_TLS_GD_LO10 BFD_RELOC_SPARC_TLS_GD_ADD BFD_RELOC_SPARC_TLS_GD_CALL BFD_RELOC_SPARC_TLS_LDM_HI22 BFD_RELOC_SPARC_TLS_LDM_LO10 BFD_RELOC_SPARC_TLS_LDM_ADD BFD_RELOC_SPARC_TLS_LDM_CALL BFD_RELOC_SPARC_TLS_LDO_HIX22 BFD_RELOC_SPARC_TLS_LDO_LOX10 BFD_RELOC_SPARC_TLS_LDO_ADD BFD_RELOC_SPARC_TLS_IE_HI22 BFD_RELOC_SPARC_TLS_IE_LO10 BFD_RELOC_SPARC_TLS_IE_LD BFD_RELOC_SPARC_TLS_IE_LDX BFD_RELOC_SPARC_TLS_IE_ADD BFD_RELOC_SPARC_TLS_LE_HIX22 BFD_RELOC_SPARC_TLS_LE_LOX10 BFD_RELOC_SPARC_TLS_DTPMOD32 BFD_RELOC_SPARC_TLS_DTPMOD64 BFD_RELOC_SPARC_TLS_DTPOFF32 BFD_RELOC_SPARC_TLS_DTPOFF64 BFD_RELOC_SPARC_TLS_TPOFF32 BFD_RELOC_SPARC_TLS_TPOFF64 BFD_RELOC_SPU_IMM7 BFD_RELOC_SPU_IMM8 BFD_RELOC_SPU_IMM10 BFD_RELOC_SPU_IMM10W BFD_RELOC_SPU_IMM16 BFD_RELOC_SPU_IMM16W BFD_RELOC_SPU_IMM18 BFD_RELOC_SPU_PCREL9a BFD_RELOC_SPU_PCREL9b BFD_RELOC_SPU_PCREL16 BFD_RELOC_SPU_LO16 BFD_RELOC_SPU_HI16 BFD_RELOC_SPU_PPU32 BFD_RELOC_SPU_PPU64 BFD_RELOC_SPU_ADD_PIC BFD_RELOC_ALPHA_GPDISP_HI16 BFD_RELOC_ALPHA_GPDISP_LO16 BFD_RELOC_ALPHA_GPDISP BFD_RELOC_ALPHA_LITERAL BFD_RELOC_ALPHA_ELF_LITERAL BFD_RELOC_ALPHA_LITUSE BFD_RELOC_ALPHA_HINT BFD_RELOC_ALPHA_LINKAGE BFD_RELOC_ALPHA_CODEADDR BFD_RELOC_ALPHA_GPREL_HI16 BFD_RELOC_ALPHA_GPREL_LO16 BFD_RELOC_ALPHA_BRSGP BFD_RELOC_ALPHA_NOP BFD_RELOC_ALPHA_BSR BFD_RELOC_ALPHA_LDA BFD_RELOC_ALPHA_BOH BFD_RELOC_ALPHA_TLSGD BFD_RELOC_ALPHA_TLSLDM BFD_RELOC_ALPHA_DTPMOD64 BFD_RELOC_ALPHA_GOTDTPREL16 BFD_RELOC_ALPHA_DTPREL64 BFD_RELOC_ALPHA_DTPREL_HI16 BFD_RELOC_ALPHA_DTPREL_LO16 BFD_RELOC_ALPHA_DTPREL16 BFD_RELOC_ALPHA_GOTTPREL16 BFD_RELOC_ALPHA_TPREL64 BFD_RELOC_ALPHA_TPREL_HI16 BFD_RELOC_ALPHA_TPREL_LO16 BFD_RELOC_ALPHA_TPREL16 BFD_RELOC_MIPS_JMP BFD_RELOC_MIPS16_JMP BFD_RELOC_MIPS16_GPREL BFD_RELOC_HI16 BFD_RELOC_HI16_S BFD_RELOC_LO16 BFD_RELOC_HI16_PCREL BFD_RELOC_HI16_S_PCREL BFD_RELOC_LO16_PCREL BFD_RELOC_MIPS16_GOT16 BFD_RELOC_MIPS16_CALL16 BFD_RELOC_MIPS16_HI16 BFD_RELOC_MIPS16_HI16_S BFD_RELOC_MIPS16_LO16 BFD_RELOC_MIPS_LITERAL BFD_RELOC_MIPS_GOT16 BFD_RELOC_MIPS_CALL16 BFD_RELOC_MIPS_GOT_HI16 BFD_RELOC_MIPS_GOT_LO16 BFD_RELOC_MIPS_CALL_HI16 BFD_RELOC_MIPS_CALL_LO16 BFD_RELOC_MIPS_SUB BFD_RELOC_MIPS_GOT_PAGE BFD_RELOC_MIPS_GOT_OFST BFD_RELOC_MIPS_GOT_DISP BFD_RELOC_MIPS_SHIFT5 BFD_RELOC_MIPS_SHIFT6 BFD_RELOC_MIPS_INSERT_A BFD_RELOC_MIPS_INSERT_B BFD_RELOC_MIPS_DELETE BFD_RELOC_MIPS_HIGHEST BFD_RELOC_MIPS_HIGHER BFD_RELOC_MIPS_SCN_DISP BFD_RELOC_MIPS_REL16 BFD_RELOC_MIPS_RELGOT BFD_RELOC_MIPS_JALR BFD_RELOC_MIPS_TLS_DTPMOD32 BFD_RELOC_MIPS_TLS_DTPREL32 BFD_RELOC_MIPS_TLS_DTPMOD64 BFD_RELOC_MIPS_TLS_DTPREL64 BFD_RELOC_MIPS_TLS_GD BFD_RELOC_MIPS_TLS_LDM BFD_RELOC_MIPS_TLS_GOTTPREL BFD_RELOC_MIPS_TLS_TPREL32 BFD_RELOC_MIPS_TLS_TPREL64 BFD_RELOC_MIPS_TLS_TPREL_HI16 BFD_RELOC_MIPS_TLS_TPREL_LO16 BFD_RELOC_MIPS_COPY BFD_RELOC_MIPS_JUMP_SLOT BFD_RELOC_MOXIE_10_PCREL BFD_RELOC_FRV_LABEL16 BFD_RELOC_FRV_LABEL24 BFD_RELOC_FRV_LO16 BFD_RELOC_FRV_HI16 BFD_RELOC_FRV_GPREL12 BFD_RELOC_FRV_GPRELU12 BFD_RELOC_FRV_GPREL32 BFD_RELOC_FRV_GPRELHI BFD_RELOC_FRV_GPRELLO BFD_RELOC_FRV_GOT12 BFD_RELOC_FRV_GOTHI BFD_RELOC_FRV_GOTLO BFD_RELOC_FRV_FUNCDESC BFD_RELOC_FRV_FUNCDESC_GOT12 BFD_RELOC_FRV_FUNCDESC_GOTHI BFD_RELOC_FRV_FUNCDESC_GOTLO BFD_RELOC_FRV_FUNCDESC_VALUE BFD_RELOC_FRV_GOTOFF12 BFD_RELOC_FRV_GOTOFFHI BFD_RELOC_FRV_GOTOFFLO BFD_RELOC_FRV_GETTLSOFF BFD_RELOC_FRV_TLSDESC_VALUE BFD_RELOC_FRV_GOTTLSDESC12 BFD_RELOC_FRV_GOTTLSDESCHI BFD_RELOC_FRV_GOTTLSDESCLO BFD_RELOC_FRV_TLSMOFF12 BFD_RELOC_FRV_TLSMOFFHI BFD_RELOC_FRV_TLSMOFFLO BFD_RELOC_FRV_GOTTLSOFF12 BFD_RELOC_FRV_GOTTLSOFFHI BFD_RELOC_FRV_GOTTLSOFFLO BFD_RELOC_FRV_TLSOFF BFD_RELOC_FRV_TLSDESC_RELAX BFD_RELOC_FRV_GETTLSOFF_RELAX BFD_RELOC_FRV_TLSOFF_RELAX BFD_RELOC_FRV_TLSMOFF BFD_RELOC_MN10300_GOTOFF24 BFD_RELOC_MN10300_GOT32 BFD_RELOC_MN10300_GOT24 BFD_RELOC_MN10300_GOT16 BFD_RELOC_MN10300_COPY BFD_RELOC_MN10300_GLOB_DAT BFD_RELOC_MN10300_JMP_SLOT BFD_RELOC_MN10300_RELATIVE BFD_RELOC_MN10300_SYM_DIFF BFD_RELOC_MN10300_ALIGN BFD_RELOC_386_GOT32 BFD_RELOC_386_PLT32 BFD_RELOC_386_COPY BFD_RELOC_386_GLOB_DAT BFD_RELOC_386_JUMP_SLOT BFD_RELOC_386_RELATIVE BFD_RELOC_386_GOTOFF BFD_RELOC_386_GOTPC BFD_RELOC_386_TLS_TPOFF BFD_RELOC_386_TLS_IE BFD_RELOC_386_TLS_GOTIE BFD_RELOC_386_TLS_LE BFD_RELOC_386_TLS_GD BFD_RELOC_386_TLS_LDM BFD_RELOC_386_TLS_LDO_32 BFD_RELOC_386_TLS_IE_32 BFD_RELOC_386_TLS_LE_32 BFD_RELOC_386_TLS_DTPMOD32 BFD_RELOC_386_TLS_DTPOFF32 BFD_RELOC_386_TLS_TPOFF32 BFD_RELOC_386_TLS_GOTDESC BFD_RELOC_386_TLS_DESC_CALL BFD_RELOC_386_TLS_DESC BFD_RELOC_386_IRELATIVE BFD_RELOC_X86_64_GOT32 BFD_RELOC_X86_64_PLT32 BFD_RELOC_X86_64_COPY BFD_RELOC_X86_64_GLOB_DAT BFD_RELOC_X86_64_JUMP_SLOT BFD_RELOC_X86_64_RELATIVE BFD_RELOC_X86_64_GOTPCREL BFD_RELOC_X86_64_32S BFD_RELOC_X86_64_DTPMOD64 BFD_RELOC_X86_64_DTPOFF64 BFD_RELOC_X86_64_TPOFF64 BFD_RELOC_X86_64_TLSGD BFD_RELOC_X86_64_TLSLD BFD_RELOC_X86_64_DTPOFF32 BFD_RELOC_X86_64_GOTTPOFF BFD_RELOC_X86_64_TPOFF32 BFD_RELOC_X86_64_GOTOFF64 BFD_RELOC_X86_64_GOTPC32 BFD_RELOC_X86_64_GOT64 BFD_RELOC_X86_64_GOTPCREL64 BFD_RELOC_X86_64_GOTPC64 BFD_RELOC_X86_64_GOTPLT64 BFD_RELOC_X86_64_PLTOFF64 BFD_RELOC_X86_64_TLSDESC_CALL BFD_RELOC_X86_64_TLSDESC BFD_RELOC_X86_64_IRELATIVE BFD_RELOC_NS32K_IMM_8 BFD_RELOC_NS32K_IMM_16 BFD_RELOC_NS32K_IMM_32 BFD_RELOC_NS32K_IMM_8_PCREL BFD_RELOC_NS32K_IMM_16_PCREL BFD_RELOC_NS32K_IMM_32_PCREL BFD_RELOC_NS32K_DISP_8 BFD_RELOC_NS32K_DISP_16 BFD_RELOC_NS32K_DISP_32 BFD_RELOC_NS32K_DISP_8_PCREL BFD_RELOC_NS32K_DISP_16_PCREL BFD_RELOC_NS32K_DISP_32_PCREL BFD_RELOC_PDP11_DISP_8_PCREL BFD_RELOC_PDP11_DISP_6_PCREL BFD_RELOC_PJ_CODE_HI16 BFD_RELOC_PJ_CODE_LO16 BFD_RELOC_PJ_CODE_DIR16 BFD_RELOC_PJ_CODE_DIR32 BFD_RELOC_PJ_CODE_REL16 BFD_RELOC_PJ_CODE_REL32 BFD_RELOC_PPC_B26 BFD_RELOC_PPC_BA26 BFD_RELOC_PPC_TOC16 BFD_RELOC_PPC_B16 BFD_RELOC_PPC_B16_BRTAKEN BFD_RELOC_PPC_B16_BRNTAKEN BFD_RELOC_PPC_BA16 BFD_RELOC_PPC_BA16_BRTAKEN BFD_RELOC_PPC_BA16_BRNTAKEN BFD_RELOC_PPC_COPY BFD_RELOC_PPC_GLOB_DAT BFD_RELOC_PPC_JMP_SLOT BFD_RELOC_PPC_RELATIVE BFD_RELOC_PPC_LOCAL24PC BFD_RELOC_PPC_EMB_NADDR32 BFD_RELOC_PPC_EMB_NADDR16 BFD_RELOC_PPC_EMB_NADDR16_LO BFD_RELOC_PPC_EMB_NADDR16_HI BFD_RELOC_PPC_EMB_NADDR16_HA BFD_RELOC_PPC_EMB_SDAI16 BFD_RELOC_PPC_EMB_SDA2I16 BFD_RELOC_PPC_EMB_SDA2REL BFD_RELOC_PPC_EMB_SDA21 BFD_RELOC_PPC_EMB_MRKREF BFD_RELOC_PPC_EMB_RELSEC16 BFD_RELOC_PPC_EMB_RELST_LO BFD_RELOC_PPC_EMB_RELST_HI BFD_RELOC_PPC_EMB_RELST_HA BFD_RELOC_PPC_EMB_BIT_FLD BFD_RELOC_PPC_EMB_RELSDA BFD_RELOC_PPC64_HIGHER BFD_RELOC_PPC64_HIGHER_S BFD_RELOC_PPC64_HIGHEST BFD_RELOC_PPC64_HIGHEST_S BFD_RELOC_PPC64_TOC16_LO BFD_RELOC_PPC64_TOC16_HI BFD_RELOC_PPC64_TOC16_HA BFD_RELOC_PPC64_TOC BFD_RELOC_PPC64_PLTGOT16 BFD_RELOC_PPC64_PLTGOT16_LO BFD_RELOC_PPC64_PLTGOT16_HI BFD_RELOC_PPC64_PLTGOT16_HA BFD_RELOC_PPC64_ADDR16_DS BFD_RELOC_PPC64_ADDR16_LO_DS BFD_RELOC_PPC64_GOT16_DS BFD_RELOC_PPC64_GOT16_LO_DS BFD_RELOC_PPC64_PLT16_LO_DS BFD_RELOC_PPC64_SECTOFF_DS BFD_RELOC_PPC64_SECTOFF_LO_DS BFD_RELOC_PPC64_TOC16_DS BFD_RELOC_PPC64_TOC16_LO_DS BFD_RELOC_PPC64_PLTGOT16_DS BFD_RELOC_PPC_TLS BFD_RELOC_PPC_TLSGD BFD_RELOC_PPC_TLSLD BFD_RELOC_PPC_DTPMOD BFD_RELOC_PPC_TPREL16 BFD_RELOC_PPC_TPREL16_LO BFD_RELOC_PPC_TPREL16_HI BFD_RELOC_PPC_TPREL16_HA BFD_RELOC_PPC_TPREL BFD_RELOC_PPC_DTPREL16 BFD_RELOC_PPC_DTPREL16_LO BFD_RELOC_PPC_DTPREL16_HI BFD_RELOC_PPC_DTPREL16_HA BFD_RELOC_PPC_DTPREL BFD_RELOC_PPC_GOT_TLSGD16 BFD_RELOC_PPC_GOT_TLSGD16_LO BFD_RELOC_PPC_GOT_TLSGD16_HI BFD_RELOC_PPC_GOT_TLSGD16_HA BFD_RELOC_PPC_GOT_TLSLD16 BFD_RELOC_PPC_GOT_TLSLD16_LO BFD_RELOC_PPC_GOT_TLSLD16_HI BFD_RELOC_PPC_GOT_TLSLD16_HA BFD_RELOC_PPC_GOT_TPREL16 BFD_RELOC_PPC_GOT_TPREL16_LO BFD_RELOC_PPC_GOT_TPREL16_HI BFD_RELOC_PPC_GOT_TPREL16_HA BFD_RELOC_PPC_GOT_DTPREL16 BFD_RELOC_PPC_GOT_DTPREL16_LO BFD_RELOC_PPC_GOT_DTPREL16_HI BFD_RELOC_PPC_GOT_DTPREL16_HA BFD_RELOC_PPC64_TPREL16_DS BFD_RELOC_PPC64_TPREL16_LO_DS BFD_RELOC_PPC64_DTPREL16_DS BFD_RELOC_I370_D12 BFD_RELOC_CTOR BFD_RELOC_ARM_PCREL_BRANCH BFD_RELOC_ARM_PCREL_BLX BFD_RELOC_THUMB_PCREL_BLX BFD_RELOC_ARM_PCREL_CALL BFD_RELOC_ARM_PCREL_JUMP BFD_RELOC_THUMB_PCREL_BRANCH7 BFD_RELOC_THUMB_PCREL_BRANCH9 BFD_RELOC_ARM_OFFSET_IMM BFD_RELOC_ARM_THUMB_OFFSET BFD_RELOC_ARM_TARGET1 BFD_RELOC_ARM_ROSEGREL32 BFD_RELOC_ARM_SBREL32 BFD_RELOC_ARM_TARGET2 BFD_RELOC_ARM_PREL31 BFD_RELOC_ARM_MOVW BFD_RELOC_ARM_MOVT BFD_RELOC_ARM_MOVW_PCREL BFD_RELOC_ARM_MOVT_PCREL BFD_RELOC_ARM_THUMB_MOVW BFD_RELOC_ARM_THUMB_MOVT BFD_RELOC_ARM_JUMP_SLOT BFD_RELOC_ARM_GLOB_DAT BFD_RELOC_ARM_GOT32 BFD_RELOC_ARM_PLT32 BFD_RELOC_ARM_RELATIVE BFD_RELOC_ARM_GOTOFF BFD_RELOC_ARM_GOTPC BFD_RELOC_ARM_GOT_PREL BFD_RELOC_ARM_TLS_GD32 BFD_RELOC_ARM_TLS_LDO32 BFD_RELOC_ARM_TLS_LDM32 BFD_RELOC_ARM_TLS_DTPOFF32 BFD_RELOC_ARM_TLS_DTPMOD32 BFD_RELOC_ARM_TLS_TPOFF32 BFD_RELOC_ARM_TLS_IE32 BFD_RELOC_ARM_TLS_LE32 BFD_RELOC_ARM_ALU_PC_G0_NC BFD_RELOC_ARM_ALU_PC_G0 BFD_RELOC_ARM_ALU_PC_G1_NC BFD_RELOC_ARM_ALU_PC_G1 BFD_RELOC_ARM_ALU_PC_G2 BFD_RELOC_ARM_LDR_PC_G0 BFD_RELOC_ARM_LDR_PC_G1 BFD_RELOC_ARM_LDR_PC_G2 BFD_RELOC_ARM_LDRS_PC_G0 BFD_RELOC_ARM_LDRS_PC_G1 BFD_RELOC_ARM_LDRS_PC_G2 BFD_RELOC_ARM_LDC_PC_G0 BFD_RELOC_ARM_LDC_PC_G1 BFD_RELOC_ARM_LDC_PC_G2 BFD_RELOC_ARM_ALU_SB_G0_NC BFD_RELOC_ARM_ALU_SB_G0 BFD_RELOC_ARM_ALU_SB_G1_NC BFD_RELOC_ARM_ALU_SB_G1 BFD_RELOC_ARM_ALU_SB_G2 BFD_RELOC_ARM_LDR_SB_G0 BFD_RELOC_ARM_LDR_SB_G1 BFD_RELOC_ARM_LDR_SB_G2 BFD_RELOC_ARM_LDRS_SB_G0 BFD_RELOC_ARM_LDRS_SB_G1 BFD_RELOC_ARM_LDRS_SB_G2 BFD_RELOC_ARM_LDC_SB_G0 BFD_RELOC_ARM_LDC_SB_G1 BFD_RELOC_ARM_LDC_SB_G2 BFD_RELOC_ARM_V4BX BFD_RELOC_ARM_IMMEDIATE BFD_RELOC_ARM_ADRL_IMMEDIATE BFD_RELOC_ARM_T32_IMMEDIATE BFD_RELOC_ARM_T32_ADD_IMM BFD_RELOC_ARM_T32_IMM12 BFD_RELOC_ARM_T32_ADD_PC12 BFD_RELOC_ARM_SHIFT_IMM BFD_RELOC_ARM_SMC BFD_RELOC_ARM_SWI BFD_RELOC_ARM_MULTI BFD_RELOC_ARM_CP_OFF_IMM BFD_RELOC_ARM_CP_OFF_IMM_S2 BFD_RELOC_ARM_T32_CP_OFF_IMM BFD_RELOC_ARM_ADR_IMM BFD_RELOC_ARM_LDR_IMM BFD_RELOC_ARM_LITERAL BFD_RELOC_ARM_IN_POOL BFD_RELOC_ARM_OFFSET_IMM8 BFD_RELOC_ARM_T32_OFFSET_U8 BFD_RELOC_ARM_T32_OFFSET_IMM BFD_RELOC_ARM_HWLITERAL BFD_RELOC_ARM_THUMB_ADD BFD_RELOC_ARM_THUMB_IMM BFD_RELOC_ARM_THUMB_SHIFT BFD_RELOC_SH_PCDISP8BY2 BFD_RELOC_SH_PCDISP12BY2 BFD_RELOC_SH_IMM3 BFD_RELOC_SH_IMM3U BFD_RELOC_SH_DISP12 BFD_RELOC_SH_DISP12BY2 BFD_RELOC_SH_DISP12BY4 BFD_RELOC_SH_DISP12BY8 BFD_RELOC_SH_DISP20 BFD_RELOC_SH_DISP20BY8 BFD_RELOC_SH_IMM4 BFD_RELOC_SH_IMM4BY2 BFD_RELOC_SH_IMM4BY4 BFD_RELOC_SH_IMM8 BFD_RELOC_SH_IMM8BY2 BFD_RELOC_SH_IMM8BY4 BFD_RELOC_SH_PCRELIMM8BY2 BFD_RELOC_SH_PCRELIMM8BY4 BFD_RELOC_SH_SWITCH16 BFD_RELOC_SH_SWITCH32 BFD_RELOC_SH_USES BFD_RELOC_SH_COUNT BFD_RELOC_SH_ALIGN BFD_RELOC_SH_CODE BFD_RELOC_SH_DATA BFD_RELOC_SH_LABEL BFD_RELOC_SH_LOOP_START BFD_RELOC_SH_LOOP_END BFD_RELOC_SH_COPY BFD_RELOC_SH_GLOB_DAT BFD_RELOC_SH_JMP_SLOT BFD_RELOC_SH_RELATIVE BFD_RELOC_SH_GOTPC BFD_RELOC_SH_GOT_LOW16 BFD_RELOC_SH_GOT_MEDLOW16 BFD_RELOC_SH_GOT_MEDHI16 BFD_RELOC_SH_GOT_HI16 BFD_RELOC_SH_GOTPLT_LOW16 BFD_RELOC_SH_GOTPLT_MEDLOW16 BFD_RELOC_SH_GOTPLT_MEDHI16 BFD_RELOC_SH_GOTPLT_HI16 BFD_RELOC_SH_PLT_LOW16 BFD_RELOC_SH_PLT_MEDLOW16 BFD_RELOC_SH_PLT_MEDHI16 BFD_RELOC_SH_PLT_HI16 BFD_RELOC_SH_GOTOFF_LOW16 BFD_RELOC_SH_GOTOFF_MEDLOW16 BFD_RELOC_SH_GOTOFF_MEDHI16 BFD_RELOC_SH_GOTOFF_HI16 BFD_RELOC_SH_GOTPC_LOW16 BFD_RELOC_SH_GOTPC_MEDLOW16 BFD_RELOC_SH_GOTPC_MEDHI16 BFD_RELOC_SH_GOTPC_HI16 BFD_RELOC_SH_COPY64 BFD_RELOC_SH_GLOB_DAT64 BFD_RELOC_SH_JMP_SLOT64 BFD_RELOC_SH_RELATIVE64 BFD_RELOC_SH_GOT10BY4 BFD_RELOC_SH_GOT10BY8 BFD_RELOC_SH_GOTPLT10BY4 BFD_RELOC_SH_GOTPLT10BY8 BFD_RELOC_SH_GOTPLT32 BFD_RELOC_SH_SHMEDIA_CODE BFD_RELOC_SH_IMMU5 BFD_RELOC_SH_IMMS6 BFD_RELOC_SH_IMMS6BY32 BFD_RELOC_SH_IMMU6 BFD_RELOC_SH_IMMS10 BFD_RELOC_SH_IMMS10BY2 BFD_RELOC_SH_IMMS10BY4 BFD_RELOC_SH_IMMS10BY8 BFD_RELOC_SH_IMMS16 BFD_RELOC_SH_IMMU16 BFD_RELOC_SH_IMM_LOW16 BFD_RELOC_SH_IMM_LOW16_PCREL BFD_RELOC_SH_IMM_MEDLOW16 BFD_RELOC_SH_IMM_MEDHI16 BFD_RELOC_SH_IMM_HI16 BFD_RELOC_SH_IMM_HI16_PCREL BFD_RELOC_SH_PT_16 BFD_RELOC_SH_TLS_GD_32 BFD_RELOC_SH_TLS_LD_32 BFD_RELOC_SH_TLS_LDO_32 BFD_RELOC_SH_TLS_IE_32 BFD_RELOC_SH_TLS_LE_32 BFD_RELOC_SH_TLS_DTPMOD32 BFD_RELOC_SH_TLS_DTPOFF32 BFD_RELOC_SH_TLS_TPOFF32 BFD_RELOC_ARC_B22_PCREL BFD_RELOC_ARC_B26 BFD_RELOC_BFIN_16_IMM BFD_RELOC_BFIN_16_HIGH BFD_RELOC_BFIN_4_PCREL BFD_RELOC_BFIN_5_PCREL BFD_RELOC_BFIN_16_LOW BFD_RELOC_BFIN_10_PCREL BFD_RELOC_BFIN_11_PCREL BFD_RELOC_BFIN_12_PCREL_JUMP BFD_RELOC_BFIN_GOT17M4 BFD_RELOC_BFIN_GOTHI BFD_RELOC_BFIN_GOTLO BFD_RELOC_BFIN_FUNCDESC BFD_RELOC_BFIN_FUNCDESC_GOTHI BFD_RELOC_BFIN_FUNCDESC_GOTLO BFD_RELOC_BFIN_FUNCDESC_VALUE BFD_RELOC_BFIN_GOTOFF17M4 BFD_RELOC_BFIN_GOTOFFHI BFD_RELOC_BFIN_GOTOFFLO BFD_RELOC_BFIN_GOT BFD_RELOC_BFIN_PLTPC BFD_ARELOC_BFIN_PUSH BFD_ARELOC_BFIN_CONST BFD_ARELOC_BFIN_ADD BFD_ARELOC_BFIN_SUB BFD_ARELOC_BFIN_MULT BFD_ARELOC_BFIN_DIV BFD_ARELOC_BFIN_MOD BFD_ARELOC_BFIN_LSHIFT BFD_ARELOC_BFIN_RSHIFT BFD_ARELOC_BFIN_AND BFD_ARELOC_BFIN_OR BFD_ARELOC_BFIN_XOR BFD_ARELOC_BFIN_LAND BFD_ARELOC_BFIN_LOR BFD_ARELOC_BFIN_LEN BFD_ARELOC_BFIN_NEG BFD_ARELOC_BFIN_COMP BFD_ARELOC_BFIN_PAGE BFD_ARELOC_BFIN_HWPAGE BFD_ARELOC_BFIN_ADDR BFD_RELOC_D10V_10_PCREL_R BFD_RELOC_D10V_10_PCREL_L BFD_RELOC_D10V_18 BFD_RELOC_D10V_18_PCREL BFD_RELOC_D30V_6 BFD_RELOC_D30V_9_PCREL BFD_RELOC_D30V_9_PCREL_R BFD_RELOC_D30V_15 BFD_RELOC_D30V_15_PCREL BFD_RELOC_D30V_15_PCREL_R BFD_RELOC_D30V_21 BFD_RELOC_D30V_21_PCREL BFD_RELOC_D30V_21_PCREL_R BFD_RELOC_D30V_32 BFD_RELOC_D30V_32_PCREL BFD_RELOC_DLX_HI16_S BFD_RELOC_DLX_LO16 BFD_RELOC_DLX_JMP26 BFD_RELOC_M32C_HI8 BFD_RELOC_M32C_RL_JUMP BFD_RELOC_M32C_RL_1ADDR BFD_RELOC_M32C_RL_2ADDR BFD_RELOC_M32R_24 BFD_RELOC_M32R_10_PCREL BFD_RELOC_M32R_18_PCREL BFD_RELOC_M32R_26_PCREL BFD_RELOC_M32R_HI16_ULO BFD_RELOC_M32R_HI16_SLO BFD_RELOC_M32R_LO16 BFD_RELOC_M32R_SDA16 BFD_RELOC_M32R_GOT24 BFD_RELOC_M32R_26_PLTREL BFD_RELOC_M32R_COPY BFD_RELOC_M32R_GLOB_DAT BFD_RELOC_M32R_JMP_SLOT BFD_RELOC_M32R_RELATIVE BFD_RELOC_M32R_GOTOFF BFD_RELOC_M32R_GOTOFF_HI_ULO BFD_RELOC_M32R_GOTOFF_HI_SLO BFD_RELOC_M32R_GOTOFF_LO BFD_RELOC_M32R_GOTPC24 BFD_RELOC_M32R_GOT16_HI_ULO BFD_RELOC_M32R_GOT16_HI_SLO BFD_RELOC_M32R_GOT16_LO BFD_RELOC_M32R_GOTPC_HI_ULO BFD_RELOC_M32R_GOTPC_HI_SLO BFD_RELOC_M32R_GOTPC_LO BFD_RELOC_V850_9_PCREL BFD_RELOC_V850_22_PCREL BFD_RELOC_V850_TDA_6_8_OFFSET BFD_RELOC_V850_TDA_7_8_OFFSET BFD_RELOC_V850_TDA_7_7_OFFSET BFD_RELOC_V850_TDA_4_5_OFFSET BFD_RELOC_V850_TDA_4_4_OFFSET BFD_RELOC_V850_LONGCALL BFD_RELOC_V850_LONGJUMP BFD_RELOC_V850_ALIGN BFD_RELOC_MN10300_32_PCREL BFD_RELOC_MN10300_16_PCREL BFD_RELOC_TIC30_LDP BFD_RELOC_TIC54X_PARTLS7 BFD_RELOC_TIC54X_PARTMS9 BFD_RELOC_TIC54X_23 BFD_RELOC_TIC54X_16_OF_23 BFD_RELOC_TIC54X_MS7_OF_23 BFD_RELOC_FR30_48 BFD_RELOC_FR30_20 BFD_RELOC_FR30_6_IN_4 BFD_RELOC_FR30_8_IN_8 BFD_RELOC_FR30_9_IN_8 BFD_RELOC_FR30_10_IN_8 BFD_RELOC_FR30_9_PCREL BFD_RELOC_FR30_12_PCREL BFD_RELOC_MCORE_PCREL_IMM8BY4 BFD_RELOC_MCORE_PCREL_IMM4BY2 BFD_RELOC_MCORE_PCREL_32 BFD_RELOC_MCORE_RVA BFD_RELOC_MEP_8 BFD_RELOC_MEP_16 BFD_RELOC_MEP_32 BFD_RELOC_MEP_PCREL8A2 BFD_RELOC_MEP_PCREL12A2 BFD_RELOC_MEP_PCREL17A2 BFD_RELOC_MEP_PCREL24A2 BFD_RELOC_MEP_PCABS24A2 BFD_RELOC_MEP_LOW16 BFD_RELOC_MEP_HI16U BFD_RELOC_MEP_HI16S BFD_RELOC_MEP_GPREL BFD_RELOC_MEP_TPREL BFD_RELOC_MEP_TPREL7 BFD_RELOC_MEP_TPREL7A2 BFD_RELOC_MEP_TPREL7A4 BFD_RELOC_MEP_UIMM24 BFD_RELOC_MEP_ADDR24A4 BFD_RELOC_MEP_GNU_VTINHERIT BFD_RELOC_MEP_GNU_VTENTRY BFD_RELOC_MMIX_GETA BFD_RELOC_MMIX_GETA_1 BFD_RELOC_MMIX_GETA_2 BFD_RELOC_MMIX_GETA_3 BFD_RELOC_MMIX_CBRANCH BFD_RELOC_MMIX_CBRANCH_J BFD_RELOC_MMIX_CBRANCH_1 BFD_RELOC_MMIX_CBRANCH_2 BFD_RELOC_MMIX_CBRANCH_3 BFD_RELOC_MMIX_PUSHJ BFD_RELOC_MMIX_PUSHJ_1 BFD_RELOC_MMIX_PUSHJ_2 BFD_RELOC_MMIX_PUSHJ_3 BFD_RELOC_MMIX_JMP BFD_RELOC_MMIX_JMP_1 BFD_RELOC_MMIX_JMP_2 BFD_RELOC_MMIX_JMP_3 BFD_RELOC_MMIX_ADDR19 BFD_RELOC_MMIX_ADDR27 BFD_RELOC_MMIX_REG_OR_BYTE BFD_RELOC_MMIX_REG BFD_RELOC_MMIX_LOCAL BFD_RELOC_AVR_7_PCREL BFD_RELOC_AVR_13_PCREL BFD_RELOC_AVR_16_PM BFD_RELOC_AVR_LO8_LDI BFD_RELOC_AVR_HI8_LDI BFD_RELOC_AVR_HH8_LDI BFD_RELOC_AVR_MS8_LDI BFD_RELOC_AVR_LO8_LDI_NEG BFD_RELOC_AVR_HI8_LDI_NEG BFD_RELOC_AVR_HH8_LDI_NEG BFD_RELOC_AVR_MS8_LDI_NEG BFD_RELOC_AVR_LO8_LDI_PM BFD_RELOC_AVR_LO8_LDI_GS BFD_RELOC_AVR_HI8_LDI_PM BFD_RELOC_AVR_HI8_LDI_GS BFD_RELOC_AVR_HH8_LDI_PM BFD_RELOC_AVR_LO8_LDI_PM_NEG BFD_RELOC_AVR_HI8_LDI_PM_NEG BFD_RELOC_AVR_HH8_LDI_PM_NEG BFD_RELOC_AVR_CALL BFD_RELOC_AVR_LDI BFD_RELOC_AVR_6 BFD_RELOC_AVR_6_ADIW BFD_RELOC_390_12 BFD_RELOC_390_GOT12 BFD_RELOC_390_PLT32 BFD_RELOC_390_COPY BFD_RELOC_390_GLOB_DAT BFD_RELOC_390_JMP_SLOT BFD_RELOC_390_RELATIVE BFD_RELOC_390_GOTPC BFD_RELOC_390_GOT16 BFD_RELOC_390_PC16DBL BFD_RELOC_390_PLT16DBL BFD_RELOC_390_PC32DBL BFD_RELOC_390_PLT32DBL BFD_RELOC_390_GOTPCDBL BFD_RELOC_390_GOT64 BFD_RELOC_390_PLT64 BFD_RELOC_390_GOTENT BFD_RELOC_390_GOTOFF64 BFD_RELOC_390_GOTPLT12 BFD_RELOC_390_GOTPLT16 BFD_RELOC_390_GOTPLT32 BFD_RELOC_390_GOTPLT64 BFD_RELOC_390_GOTPLTENT BFD_RELOC_390_PLTOFF16 BFD_RELOC_390_PLTOFF32 BFD_RELOC_390_PLTOFF64 BFD_RELOC_390_TLS_LOAD BFD_RELOC_390_TLS_GDCALL BFD_RELOC_390_TLS_LDCALL BFD_RELOC_390_TLS_GD32 BFD_RELOC_390_TLS_GD64 BFD_RELOC_390_TLS_GOTIE12 BFD_RELOC_390_TLS_GOTIE32 BFD_RELOC_390_TLS_GOTIE64 BFD_RELOC_390_TLS_LDM32 BFD_RELOC_390_TLS_LDM64 BFD_RELOC_390_TLS_IE32 BFD_RELOC_390_TLS_IE64 BFD_RELOC_390_TLS_IEENT BFD_RELOC_390_TLS_LE32 BFD_RELOC_390_TLS_LE64 BFD_RELOC_390_TLS_LDO32 BFD_RELOC_390_TLS_LDO64 BFD_RELOC_390_TLS_DTPMOD BFD_RELOC_390_TLS_DTPOFF BFD_RELOC_390_TLS_TPOFF BFD_RELOC_390_20 BFD_RELOC_390_GOT20 BFD_RELOC_390_GOTPLT20 BFD_RELOC_390_TLS_GOTIE20 BFD_RELOC_SCORE_GPREL15 BFD_RELOC_SCORE_DUMMY2 BFD_RELOC_SCORE_JMP BFD_RELOC_SCORE_BRANCH BFD_RELOC_SCORE_IMM30 BFD_RELOC_SCORE_IMM32 BFD_RELOC_SCORE16_JMP BFD_RELOC_SCORE16_BRANCH BFD_RELOC_SCORE_BCMP BFD_RELOC_SCORE_GOT15 BFD_RELOC_SCORE_GOT_LO16 BFD_RELOC_SCORE_CALL15 BFD_RELOC_SCORE_DUMMY_HI16 BFD_RELOC_IP2K_FR9 BFD_RELOC_IP2K_BANK BFD_RELOC_IP2K_ADDR16CJP BFD_RELOC_IP2K_PAGE3 BFD_RELOC_IP2K_LO8DATA BFD_RELOC_IP2K_HI8DATA BFD_RELOC_IP2K_EX8DATA BFD_RELOC_IP2K_LO8INSN BFD_RELOC_IP2K_HI8INSN BFD_RELOC_IP2K_PC_SKIP BFD_RELOC_IP2K_TEXT BFD_RELOC_IP2K_FR_OFFSET BFD_RELOC_VPE4KMATH_DATA BFD_RELOC_VPE4KMATH_INSN BFD_RELOC_VTABLE_INHERIT BFD_RELOC_VTABLE_ENTRY BFD_RELOC_IA64_IMM14 BFD_RELOC_IA64_IMM22 BFD_RELOC_IA64_IMM64 BFD_RELOC_IA64_DIR32MSB BFD_RELOC_IA64_DIR32LSB BFD_RELOC_IA64_DIR64MSB BFD_RELOC_IA64_DIR64LSB BFD_RELOC_IA64_GPREL22 BFD_RELOC_IA64_GPREL64I BFD_RELOC_IA64_GPREL32MSB BFD_RELOC_IA64_GPREL32LSB BFD_RELOC_IA64_GPREL64MSB BFD_RELOC_IA64_GPREL64LSB BFD_RELOC_IA64_LTOFF22 BFD_RELOC_IA64_LTOFF64I BFD_RELOC_IA64_PLTOFF22 BFD_RELOC_IA64_PLTOFF64I BFD_RELOC_IA64_PLTOFF64MSB BFD_RELOC_IA64_PLTOFF64LSB BFD_RELOC_IA64_FPTR64I BFD_RELOC_IA64_FPTR32MSB BFD_RELOC_IA64_FPTR32LSB BFD_RELOC_IA64_FPTR64MSB BFD_RELOC_IA64_FPTR64LSB BFD_RELOC_IA64_PCREL21B BFD_RELOC_IA64_PCREL21BI BFD_RELOC_IA64_PCREL21M BFD_RELOC_IA64_PCREL21F BFD_RELOC_IA64_PCREL22 BFD_RELOC_IA64_PCREL60B BFD_RELOC_IA64_PCREL64I BFD_RELOC_IA64_PCREL32MSB BFD_RELOC_IA64_PCREL32LSB BFD_RELOC_IA64_PCREL64MSB BFD_RELOC_IA64_PCREL64LSB BFD_RELOC_IA64_LTOFF_FPTR22 BFD_RELOC_IA64_LTOFF_FPTR64I BFD_RELOC_IA64_SEGREL32MSB BFD_RELOC_IA64_SEGREL32LSB BFD_RELOC_IA64_SEGREL64MSB BFD_RELOC_IA64_SEGREL64LSB BFD_RELOC_IA64_SECREL32MSB BFD_RELOC_IA64_SECREL32LSB BFD_RELOC_IA64_SECREL64MSB BFD_RELOC_IA64_SECREL64LSB BFD_RELOC_IA64_REL32MSB BFD_RELOC_IA64_REL32LSB BFD_RELOC_IA64_REL64MSB BFD_RELOC_IA64_REL64LSB BFD_RELOC_IA64_LTV32MSB BFD_RELOC_IA64_LTV32LSB BFD_RELOC_IA64_LTV64MSB BFD_RELOC_IA64_LTV64LSB BFD_RELOC_IA64_IPLTMSB BFD_RELOC_IA64_IPLTLSB BFD_RELOC_IA64_COPY BFD_RELOC_IA64_LTOFF22X BFD_RELOC_IA64_LDXMOV BFD_RELOC_IA64_TPREL14 BFD_RELOC_IA64_TPREL22 BFD_RELOC_IA64_TPREL64I BFD_RELOC_IA64_TPREL64MSB BFD_RELOC_IA64_TPREL64LSB BFD_RELOC_IA64_LTOFF_TPREL22 BFD_RELOC_IA64_DTPMOD64MSB BFD_RELOC_IA64_DTPMOD64LSB BFD_RELOC_IA64_LTOFF_DTPMOD22 BFD_RELOC_IA64_DTPREL14 BFD_RELOC_IA64_DTPREL22 BFD_RELOC_IA64_DTPREL64I BFD_RELOC_IA64_DTPREL32MSB BFD_RELOC_IA64_DTPREL32LSB BFD_RELOC_IA64_DTPREL64MSB BFD_RELOC_IA64_DTPREL64LSB BFD_RELOC_IA64_LTOFF_DTPREL22 BFD_RELOC_M68HC11_HI8 BFD_RELOC_M68HC11_LO8 BFD_RELOC_M68HC11_3B BFD_RELOC_M68HC11_RL_JUMP BFD_RELOC_M68HC11_RL_GROUP BFD_RELOC_M68HC11_LO16 BFD_RELOC_M68HC11_PAGE BFD_RELOC_M68HC11_24 BFD_RELOC_M68HC12_5B BFD_RELOC_16C_NUM08 BFD_RELOC_16C_NUM08_C BFD_RELOC_16C_NUM16 BFD_RELOC_16C_NUM16_C BFD_RELOC_16C_NUM32 BFD_RELOC_16C_NUM32_C BFD_RELOC_16C_DISP04 BFD_RELOC_16C_DISP04_C BFD_RELOC_16C_DISP08 BFD_RELOC_16C_DISP08_C BFD_RELOC_16C_DISP16 BFD_RELOC_16C_DISP16_C BFD_RELOC_16C_DISP24 BFD_RELOC_16C_DISP24_C BFD_RELOC_16C_DISP24a BFD_RELOC_16C_DISP24a_C BFD_RELOC_16C_REG04 BFD_RELOC_16C_REG04_C BFD_RELOC_16C_REG04a BFD_RELOC_16C_REG04a_C BFD_RELOC_16C_REG14 BFD_RELOC_16C_REG14_C BFD_RELOC_16C_REG16 BFD_RELOC_16C_REG16_C BFD_RELOC_16C_REG20 BFD_RELOC_16C_REG20_C BFD_RELOC_16C_ABS20 BFD_RELOC_16C_ABS20_C BFD_RELOC_16C_ABS24 BFD_RELOC_16C_ABS24_C BFD_RELOC_16C_IMM04 BFD_RELOC_16C_IMM04_C BFD_RELOC_16C_IMM16 BFD_RELOC_16C_IMM16_C BFD_RELOC_16C_IMM20 BFD_RELOC_16C_IMM20_C BFD_RELOC_16C_IMM24 BFD_RELOC_16C_IMM24_C BFD_RELOC_16C_IMM32 BFD_RELOC_16C_IMM32_C BFD_RELOC_CR16_NUM8 BFD_RELOC_CR16_NUM16 BFD_RELOC_CR16_NUM32 BFD_RELOC_CR16_NUM32a BFD_RELOC_CR16_REGREL0 BFD_RELOC_CR16_REGREL4 BFD_RELOC_CR16_REGREL4a BFD_RELOC_CR16_REGREL14 BFD_RELOC_CR16_REGREL14a BFD_RELOC_CR16_REGREL16 BFD_RELOC_CR16_REGREL20 BFD_RELOC_CR16_REGREL20a BFD_RELOC_CR16_ABS20 BFD_RELOC_CR16_ABS24 BFD_RELOC_CR16_IMM4 BFD_RELOC_CR16_IMM8 BFD_RELOC_CR16_IMM16 BFD_RELOC_CR16_IMM20 BFD_RELOC_CR16_IMM24 BFD_RELOC_CR16_IMM32 BFD_RELOC_CR16_IMM32a BFD_RELOC_CR16_DISP4 BFD_RELOC_CR16_DISP8 BFD_RELOC_CR16_DISP16 BFD_RELOC_CR16_DISP20 BFD_RELOC_CR16_DISP24 BFD_RELOC_CR16_DISP24a BFD_RELOC_CR16_SWITCH8 BFD_RELOC_CR16_SWITCH16 BFD_RELOC_CR16_SWITCH32 BFD_RELOC_CR16_GOT_REGREL20 BFD_RELOC_CR16_GOTC_REGREL20 BFD_RELOC_CR16_GLOB_DAT BFD_RELOC_CRX_REL4 BFD_RELOC_CRX_REL8 BFD_RELOC_CRX_REL8_CMP BFD_RELOC_CRX_REL16 BFD_RELOC_CRX_REL24 BFD_RELOC_CRX_REL32 BFD_RELOC_CRX_REGREL12 BFD_RELOC_CRX_REGREL22 BFD_RELOC_CRX_REGREL28 BFD_RELOC_CRX_REGREL32 BFD_RELOC_CRX_ABS16 BFD_RELOC_CRX_ABS32 BFD_RELOC_CRX_NUM8 BFD_RELOC_CRX_NUM16 BFD_RELOC_CRX_NUM32 BFD_RELOC_CRX_IMM16 BFD_RELOC_CRX_IMM32 BFD_RELOC_CRX_SWITCH8 BFD_RELOC_CRX_SWITCH16 BFD_RELOC_CRX_SWITCH32 BFD_RELOC_CRIS_BDISP8 BFD_RELOC_CRIS_UNSIGNED_5 BFD_RELOC_CRIS_SIGNED_6 BFD_RELOC_CRIS_UNSIGNED_6 BFD_RELOC_CRIS_SIGNED_8 BFD_RELOC_CRIS_UNSIGNED_8 BFD_RELOC_CRIS_SIGNED_16 BFD_RELOC_CRIS_UNSIGNED_16 BFD_RELOC_CRIS_LAPCQ_OFFSET BFD_RELOC_CRIS_UNSIGNED_4 BFD_RELOC_CRIS_COPY BFD_RELOC_CRIS_GLOB_DAT BFD_RELOC_CRIS_JUMP_SLOT BFD_RELOC_CRIS_RELATIVE BFD_RELOC_CRIS_32_GOT BFD_RELOC_CRIS_16_GOT BFD_RELOC_CRIS_32_GOTPLT BFD_RELOC_CRIS_16_GOTPLT BFD_RELOC_CRIS_32_GOTREL BFD_RELOC_CRIS_32_PLT_GOTREL BFD_RELOC_CRIS_32_PLT_PCREL BFD_RELOC_CRIS_32_GOT_GD BFD_RELOC_CRIS_16_GOT_GD BFD_RELOC_CRIS_32_GD BFD_RELOC_CRIS_DTP BFD_RELOC_CRIS_32_DTPREL BFD_RELOC_CRIS_16_DTPREL BFD_RELOC_CRIS_32_GOT_TPREL BFD_RELOC_CRIS_16_GOT_TPREL BFD_RELOC_CRIS_32_TPREL BFD_RELOC_CRIS_16_TPREL BFD_RELOC_CRIS_DTPMOD BFD_RELOC_CRIS_32_IE BFD_RELOC_860_COPY BFD_RELOC_860_GLOB_DAT BFD_RELOC_860_JUMP_SLOT BFD_RELOC_860_RELATIVE BFD_RELOC_860_PC26 BFD_RELOC_860_PLT26 BFD_RELOC_860_PC16 BFD_RELOC_860_LOW0 BFD_RELOC_860_SPLIT0 BFD_RELOC_860_LOW1 BFD_RELOC_860_SPLIT1 BFD_RELOC_860_LOW2 BFD_RELOC_860_SPLIT2 BFD_RELOC_860_LOW3 BFD_RELOC_860_LOGOT0 BFD_RELOC_860_SPGOT0 BFD_RELOC_860_LOGOT1 BFD_RELOC_860_SPGOT1 BFD_RELOC_860_LOGOTOFF0 BFD_RELOC_860_SPGOTOFF0 BFD_RELOC_860_LOGOTOFF1 BFD_RELOC_860_SPGOTOFF1 BFD_RELOC_860_LOGOTOFF2 BFD_RELOC_860_LOGOTOFF3 BFD_RELOC_860_LOPC BFD_RELOC_860_HIGHADJ BFD_RELOC_860_HAGOT BFD_RELOC_860_HAGOTOFF BFD_RELOC_860_HAPC BFD_RELOC_860_HIGH BFD_RELOC_860_HIGOT BFD_RELOC_860_HIGOTOFF BFD_RELOC_OPENRISC_ABS_26 BFD_RELOC_OPENRISC_REL_26 BFD_RELOC_H8_DIR16A8 BFD_RELOC_H8_DIR16R8 BFD_RELOC_H8_DIR24A8 BFD_RELOC_H8_DIR24R8 BFD_RELOC_H8_DIR32A16 BFD_RELOC_XSTORMY16_REL_12 BFD_RELOC_XSTORMY16_12 BFD_RELOC_XSTORMY16_24 BFD_RELOC_XSTORMY16_FPTR16 BFD_RELOC_RELC BFD_RELOC_XC16X_PAG BFD_RELOC_XC16X_POF BFD_RELOC_XC16X_SEG BFD_RELOC_XC16X_SOF BFD_RELOC_VAX_GLOB_DAT BFD_RELOC_VAX_JMP_SLOT BFD_RELOC_VAX_RELATIVE BFD_RELOC_MT_PC16 BFD_RELOC_MT_HI16 BFD_RELOC_MT_LO16 BFD_RELOC_MT_GNU_VTINHERIT BFD_RELOC_MT_GNU_VTENTRY BFD_RELOC_MT_PCINSN8 BFD_RELOC_MSP430_10_PCREL BFD_RELOC_MSP430_16_PCREL BFD_RELOC_MSP430_16 BFD_RELOC_MSP430_16_BYTE BFD_RELOC_MSP430_2X_PCREL BFD_RELOC_MSP430_RL_PCREL BFD_RELOC_IQ2000_OFFSET_16 BFD_RELOC_IQ2000_OFFSET_21 BFD_RELOC_IQ2000_UHI16 BFD_RELOC_XTENSA_RTLD BFD_RELOC_XTENSA_GLOB_DAT BFD_RELOC_XTENSA_JMP_SLOT BFD_RELOC_XTENSA_RELATIVE BFD_RELOC_XTENSA_PLT BFD_RELOC_XTENSA_DIFF8 BFD_RELOC_XTENSA_DIFF16 BFD_RELOC_XTENSA_DIFF32 BFD_RELOC_XTENSA_SLOT0_OP BFD_RELOC_XTENSA_SLOT1_OP BFD_RELOC_XTENSA_SLOT2_OP BFD_RELOC_XTENSA_SLOT3_OP BFD_RELOC_XTENSA_SLOT4_OP BFD_RELOC_XTENSA_SLOT5_OP BFD_RELOC_XTENSA_SLOT6_OP BFD_RELOC_XTENSA_SLOT7_OP BFD_RELOC_XTENSA_SLOT8_OP BFD_RELOC_XTENSA_SLOT9_OP BFD_RELOC_XTENSA_SLOT10_OP BFD_RELOC_XTENSA_SLOT11_OP BFD_RELOC_XTENSA_SLOT12_OP BFD_RELOC_XTENSA_SLOT13_OP BFD_RELOC_XTENSA_SLOT14_OP BFD_RELOC_XTENSA_SLOT0_ALT BFD_RELOC_XTENSA_SLOT1_ALT BFD_RELOC_XTENSA_SLOT2_ALT BFD_RELOC_XTENSA_SLOT3_ALT BFD_RELOC_XTENSA_SLOT4_ALT BFD_RELOC_XTENSA_SLOT5_ALT BFD_RELOC_XTENSA_SLOT6_ALT BFD_RELOC_XTENSA_SLOT7_ALT BFD_RELOC_XTENSA_SLOT8_ALT BFD_RELOC_XTENSA_SLOT9_ALT BFD_RELOC_XTENSA_SLOT10_ALT BFD_RELOC_XTENSA_SLOT11_ALT BFD_RELOC_XTENSA_SLOT12_ALT BFD_RELOC_XTENSA_SLOT13_ALT BFD_RELOC_XTENSA_SLOT14_ALT BFD_RELOC_XTENSA_OP0 BFD_RELOC_XTENSA_OP1 BFD_RELOC_XTENSA_OP2 BFD_RELOC_XTENSA_ASM_EXPAND BFD_RELOC_XTENSA_ASM_SIMPLIFY BFD_RELOC_XTENSA_TLSDESC_FN BFD_RELOC_XTENSA_TLSDESC_ARG BFD_RELOC_XTENSA_TLS_DTPOFF BFD_RELOC_XTENSA_TLS_TPOFF BFD_RELOC_XTENSA_TLS_FUNC BFD_RELOC_XTENSA_TLS_ARG BFD_RELOC_XTENSA_TLS_CALL BFD_RELOC_Z80_DISP8 BFD_RELOC_Z8K_DISP7 BFD_RELOC_Z8K_CALLR BFD_RELOC_Z8K_IMM4L BFD_RELOC_LM32_CALL BFD_RELOC_LM32_BRANCH BFD_RELOC_LM32_16_GOT BFD_RELOC_LM32_GOTOFF_HI16 BFD_RELOC_LM32_GOTOFF_LO16 BFD_RELOC_LM32_COPY BFD_RELOC_LM32_GLOB_DAT BFD_RELOC_LM32_JMP_SLOT BFD_RELOC_LM32_RELATIVE BFD_RELOC_MACH_O_SECTDIFF BFD_RELOC_MACH_O_PAIR BFD_RELOC_MICROBLAZE_32_LO BFD_RELOC_MICROBLAZE_32_ROSDA BFD_RELOC_MICROBLAZE_32_RWSDA BFD_RELOC_MICROBLAZE_64_NONE BFD_RELOC_MICROBLAZE_64_GOTPC BFD_RELOC_MICROBLAZE_64_GOT BFD_RELOC_MICROBLAZE_64_PLT BFD_RELOC_MICROBLAZE_COPY VRT32 __imp_%s __real_ /tmp/android-build-bb7e003d31d08f72cabc269a652912b7/src/build/../binutils/binutils-2.20.1/bfd/linker.c %B: warning: ignoring duplicate section `%A' %B: warning: duplicate section `%A' has different size Attempt to do relocatable link with %s input and %s output %B: indirect symbol `%s' to `%s' is a loop @ / 8 H - P p p 0 0 _bfd_generic_section_already_linked _bfd_default_link_order set_symbol_from_hash _bfd_generic_reloc_link_order _bfd_generic_link_write_global_symbol _bfd_generic_link_output_symbols _bfd_generic_link_add_one_symbol /tmp/android-build-bb7e003d31d08f72cabc269a652912b7/src/build/../binutils/binutils-2.20.1/bfd/stabs.c %B(%A+0x%lx): Stabs entry has invalid string index. %s: access beyond end of merged section (%ld) /tmp/android-build-bb7e003d31d08f72cabc269a652912b7/src/build/../binutils/binutils-2.20.1/bfd/merge.c _bfd_merged_section_offset _bfd_add_merge_section T%d const volatile const __restrict const volatile __restrict [ __complex int%u_t template < > class _GLOBAL_ {anonymous} __thunk_ __t type_info function type_info node virtual table 0123456789Qt _imp__ __imp_ __std__ __sti__ __vtbl__ global constructors keyed to global destructors keyed to import stub for _ada_ ___ <%s> -2147483648 __pt__ __tm__ __ps__ __S assign_ operator operator false true JArray1Z ~ static none Demangling disabled auto GNU (g++) style demangling lucid Lucid (lcc) style demangling ARM style demangling hp HP (aCC) style demangling edg EDG style demangling gnu-v3 java Java style demangling gnat GNAT style demangling nw new dl delete vn new [] vd delete [] as apl += ami -= mult amu *= aml convert negate trunc_mod amd %= trunc_div adv /= truth_andif aa truth_orif oo truth_not postincrement ++ pp postdecrement -- mm bit_ior aor |= bit_xor aer ^= bit_and aad &= bit_not co alshift als <<= arshift >>= component -> pt method_call ->() compound cm cond ?: cn max >? min * sz sizeof x i i i i i i i i 0 i 0 i i P i i i i i i i i i i i i i i i i i i i i i i i i i i i i i i @ @ @ @ @ @ @ @ @ @ @ @ @ @ @ @ @ @ @ x x * j j j j j j j j j j j j j j j j j j j j j j j j j j j j j j j j j j j j j j j j j j j j j j j y y y y y y y y y y j j j j j j j j j j j j j j 1 j j j j j j j j j j j j j j j j j j j j j * j j A j j j j j s j j j j j = j | G _ _ _ _ _ _ _ _ _ _ _ _ _ _ x _ H _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ B B B B B B B B B B ? ? ? ? ? ? ? ? xB @B ? ? A ? D ? ? D XD ? ? ? ? A ? A ? ? @B ? ? ? ? ? ? ? ? @ ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? @B qT o + @ C ] a v @ } " g g ^ { { g { c c c3 + c3 * . 1 = @ K N X f i f l z } z (2 (2 H H Y R E z l 0e 0e _ A o ! virtual function thunk (delta:%d) for Automatic selection based on executable GNU (g++) V3 ABI-style demangling yO O O O O yO yO yO yO O O O O O O O O O O O O O yO O O O O O O O O O O O O yO O O O O yO O O yO yO O O O O O O O O O O O yO O O O O T T T T T T T T T T T T T T T T T T T T T T T T T T T T T T T T T T T T T T T T T T T T T T T T T T T T T T T T T T T T T V V V V V V V V V V lV lV lV lV lV lV lV xY lV V W lV Y @W lV lV lV lV lV HY V pW W lV W X XX X lV lV lV lV V lV lV lV lV lV lV X X X X X X X X X X lV X X X X lV lV lV X X Y X X X X X [ lV lV lV lV lV lV lV lV lV lV lV lV lV p[ lV lV lV lV lV lV lV lV lV lV lV lV lV lV lV 6[ Z j\ lV 0\ Z lV lV lV lV lV lV Z lV lV `Z p[ n :l :l n :l :l |n Xn :l :l :l :l :l :l :l :l 4n n :l m :l :l :l :l :l :l :l :l :l :l :l :l m :l :l :l :l [m :l :l :l :l :l :l :l :l :l :l :l :l :l m l m m l l l l k k l l l l l l l l l l l l l l l l l l l l l l l l l l l l l l l l l l l l k q r r r r q q r q q q q q q q q q q q q q q q q q q r r r 0 e| e| G | / % | | G| | } } } } P S| 8} } s s T e | p | | 1 ; Z @ H @ H P h = ? r . sA w@ + c3 H e { } z " { K (2 g i f g o c Ve ! ! E t? t? S@ ? {? T T T T 3 3 X@ X@ r? r? @ @ @ T ? ? ? ? l@ l@ c@ c@ ? ? ? ? 3 3 @ {? $@ ? @ @ u@ u@ ( ( - - 6 6 t f f a ? ? D b N N S s ` F S i l 1 y o < 1 d p 2 (anonymous namespace) string literal JArray VTT for construction vtable for -in- typeinfo for typeinfo name for typeinfo fn for non-virtual thunk to covariant return thunk to java Class for guard variable for reference temporary for hidden alias for ::* _Sat _Accum _Fract java resource decltype ( parm# restrict imaginary aN aS dV da delete[] eO eo lS mI mL na new[] oR pL pm ps qu rM rS alignof az byte decimal32 decimal64 decimal128 half char16_t char32_t std::allocator std::basic_string std::string std::istream basic_istream std::ostream basic_ostream std::iostream basic_iostream std::basic_string, std::allocator > std::basic_istream > std::basic_ostream > std::basic_iostream > out of memory floatformat_ieee_single_big floatformat_ieee_double_big floatformat_vax_f floatformat_vax_d floatformat_vax_g floatformat_i387_ext floatformat_m68881_ext floatformat_i960_ext floatformat_m88110_ext floatformat_m88110_ext_harris floatformat_arm_ext_big floatformat_ia64_spill_big floatformat_ia64_spill_little floatformat_ia64_quad_big floatformat_ia64_quad_little floatformat_ibm_long_double p p @ 4 p @ 4 4 p @ 4 T p p @ 7 p @ 4 p P ? @ ` ? @ p ` ? @ & p P ? @ ; p 4 R p ` ? @ p p ` ? @ p @ p @ p ? p p ? p p 4 floatformat_ieee_single_little floatformat_ieee_double_little floatformat_ieee_double_littlebyte_bigword floatformat_arm_ext_littlebyte_bigword A { r i ` Z Q H ? 6 - $ %I $ < ;G ]t B { = 0 $ ~ `2 fC O m A oE! a 0 P A A ? & * " @ ` 0 P H X ? " A ! ) ? Cannot find prime bigger than %lu cccccccccccccccccccccccccccccccccccccccccccccccc ccccccc cccccccccccccccccccccccccc cccccccccccccccccccccccccccccccccccccccccccccccccccccccccccccccccccccccccccccccccccccccccccccccccccccccccccccccccccccccccccccccccccccccccccccccccccccccccTMPDIR TMP TEMP /tmp Cannot create temporary file in %s: %s /var/tmp /usr/tmp /tmp C B B B B Q 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 !"#$%&'()*+,-./0123456789:;<=>?@abcdefghijklmnopqrstuvwxyz[\]^_`abcdefghijklmnopqrstuvwxyz{|}~ !"#$%&'()*+,-./0123456789:;<=>?@ABCDEFGHIJKLMNOPQRSTUVWXYZ[\]^_`ABCDEFGHIJKLMNOPQRSTUVWXYZ{|}~ %s%sout of memory allocating %lu bytes after a total of %lu bytes undocumented error #%d
x p m * a : g D e S C \ d h D x M z R T da f F ( s h H i l x l r JU j * h x : S A , N I V G t E b o V \ w a h u @ N p ( ] l @u ( | } ( y ( c ( _ ( } ( p ( ( @X ( + ; _ ( L Z PS ( i | ` ` ` ` Q R Q @ R Q 0R Q HR T U & # ( A d c p K 2 b Z pV ? 7 `$ - + ; `+ * ( % p# j 0 " " S S S 0S 0) @ P ` 4s :s ` p 8'/ # ( A d c p K b Z pV ? 7 `$ - + ; `+ * ( % p# j 9 " " S S S 0S 0) @ P ` 4s :s ` p #/ # ( A d c p K b Z pV ? 7 $ - `, ; `+ * ( % p# j 9 " " S S S 0S 0) 0 @ P ` 4s :s ` p "/ 4 ` A p 3 ; . k j 9 A S S S 0S 0) @ P PB ` ` o 8 , $.$ ` p
GCC: (Ubuntu 4.4.3-4ubuntu5) 4.4.3
.shstrtab .interp .note.ABI-tag .note.gnu.build-id .gnu.hash .dynsym .dynstr .gnu.version .gnu.version_r .rel.dyn .rel.plt .init .text .fini .rodata .eh_frame_hdr .eh_frame .ctors .dtors .jcr .dynamic .got .got.plt .data .bss .comment
