Lines Matching refs:KnownZero2
1244 APInt KnownZero2, KnownOne2, KnownZeroOut, KnownOneOut;
1274 KnownZero2, KnownOne2, TLO, Depth+1))
1276 assert((KnownZero2 & KnownOne2) == 0 && "Bits known to be one AND zero?");
1280 if ((NewMask & ~KnownZero2 & KnownOne) == (~KnownZero2 & NewMask))
1285 if ((NewMask & (KnownZero|KnownZero2)) == NewMask)
1288 if (TLO.ShrinkDemandedConstant(Op, ~KnownZero2 & NewMask))
1297 KnownZero |= KnownZero2;
1305 KnownZero2, KnownOne2, TLO, Depth+1))
1307 assert((KnownZero2 & KnownOne2) == 0 && "Bits known to be one AND zero?");
1313 if ((NewMask & ~KnownOne & KnownZero2) == (~KnownOne & NewMask))
1319 if ((NewMask & ~KnownZero2 & KnownOne) == (~KnownZero2 & NewMask))
1329 KnownZero &= KnownZero2;
1338 if (SimplifyDemandedBits(Op.getOperand(0), NewMask, KnownZero2,
1341 assert((KnownZero2 & KnownOne2) == 0 && "Bits known to be one AND zero?");
1347 if ((KnownZero2 & NewMask) == NewMask)
1356 if ((NewMask & ~KnownZero & ~KnownZero2) == 0)
1362 KnownZeroOut = (KnownZero & KnownZero2) | (KnownOne & KnownOne2);
1364 KnownOneOut = (KnownZero & KnownOne2) | (KnownOne & KnownZero2);
1407 if (SimplifyDemandedBits(Op.getOperand(1), NewMask, KnownZero2,
1411 assert((KnownZero2 & KnownOne2) == 0 && "Bits known to be one AND zero?");
1419 KnownZero &= KnownZero2;
1425 if (SimplifyDemandedBits(Op.getOperand(2), NewMask, KnownZero2,
1429 assert((KnownZero2 & KnownOne2) == 0 && "Bits known to be one AND zero?");
1437 KnownZero &= KnownZero2;
1835 if (SimplifyDemandedBits(Op.getOperand(0), LoMask, KnownZero2,
1838 if (SimplifyDemandedBits(Op.getOperand(1), LoMask, KnownZero2,
