Lines Matching refs:Rd
328 } else if (format[1] == 'd') { // 'rd: Rd register
414 int rd = instr->RdValue();
415 PrintRegister(rd);
690 // The MUL instruction description (A 4.1.33) refers to Rd as being
696 // of registers as "Rd, Rm, Rs, Rn". But confusingly it uses the
697 // Rn field to encode the Rd register and the Rd field to encode
699 Format(instr, "mla'cond's 'rn, 'rm, 'rs, 'rd");
704 // and Rd fields as follows:
705 // RdLo == Rd field
708 Format(instr, "'um'al'cond's 'rd, 'rn, 'rm, 'rs");
718 Format(instr, "'memop'cond's 'rd, ['rn], -'rm");
720 Format(instr, "'memop'cond's 'rd, ['rn], #-'off8");
726 Format(instr, "'memop'cond's 'rd, ['rn], +'rm");
728 Format(instr, "'memop'cond's 'rd, ['rn], #+'off8");
734 Format(instr, "'memop'cond's 'rd, ['rn, -'rm]'w");
736 Format(instr, "'memop'cond's 'rd, ['rn, #-'off8]'w");
742 Format(instr, "'memop'cond's 'rd, ['rn, +'rm]'w");
744 Format(instr, "'memop'cond's 'rd, ['rn, #+'off8]'w");
759 Format(instr, "'memop'cond'sign'h 'rd, ['rn], -'rm");
761 Format(instr, "'memop'cond'sign'h 'rd, ['rn], #-'off8");
767 Format(instr, "'memop'cond'sign'h 'rd, ['rn], +'rm");
769 Format(instr, "'memop'cond'sign'h 'rd, ['rn], #+'off8");
775 Format(instr, "'memop'cond'sign'h 'rd, ['rn, -'rm]'w");
777 Format(instr, "'memop'cond'sign'h 'rd, ['rn, #-'off8]'w");
783 Format(instr, "'memop'cond'sign'h 'rd, ['rn, +'rm]'w");
785 Format(instr, "'memop'cond'sign'h 'rd, ['rn, #+'off8]'w");
816 Format(instr, "clz'cond 'rd, 'rm");
828 Format(instr, "and'cond's 'rd, 'rn, 'shift_op");
832 Format(instr, "eor'cond's 'rd, 'rn, 'shift_op");
836 Format(instr, "sub'cond's 'rd, 'rn, 'shift_op");
840 Format(instr, "rsb'cond's 'rd, 'rn, 'shift_op");
844 Format(instr, "add'cond's 'rd, 'rn, 'shift_op");
848 Format(instr, "adc'cond's 'rd, 'rn, 'shift_op");
852 Format(instr, "sbc'cond's 'rd, 'rn, 'shift_op");
856 Format(instr, "rsc'cond's 'rd, 'rn, 'shift_op");
896 Format(instr, "orr'cond's 'rd, 'rn, 'shift_op");
900 Format(instr, "mov'cond's 'rd, 'shift_op");
904 Format(instr, "bic'cond's 'rd, 'rn, 'shift_op");
908 Format(instr, "mvn'cond's 'rd, 'shift_op");
928 Format(instr, "'memop'cond'b 'rd, ['rn], #-'off12");
936 Format(instr, "'memop'cond'b 'rd, ['rn], #+'off12");
940 Format(instr, "'memop'cond'b 'rd, ['rn, #-'off12]'w");
944 Format(instr, "'memop'cond'b 'rd, ['rn, #+'off12]'w");
960 Format(instr, "'memop'cond'b 'rd, ['rn], -'shift_rm");
967 Format(instr, "usat 'rd, #'imm05@16, 'rm'shift_sat");
972 Format(instr, "'memop'cond'b 'rd, ['rn], +'shift_rm");
977 Format(instr, "'memop'cond'b 'rd, ['rn, -'shift_rm]'w");
987 Format(instr, "ubfx'cond 'rd, 'rm, 'f");
989 Format(instr, "sbfx'cond 'rd, 'rm, 'f");
999 Format(instr, "bfc'cond 'rd, 'f");
1001 Format(instr, "bfi'cond 'rd, 'rm, 'f");
1007 Format(instr, "'memop'cond'b 'rd, ['rn, +'shift_rm]'w");
