Lines Matching full:i16
1 target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:64:128-a0:0:64-n32-S64"
34 define <2 x float> @_Z14convert_float2Dv2_t(<2 x i16> %in) nounwind readnone alwaysinline {
35 %1 = uitofp <2 x i16> %in to <2 x float>
39 define <3 x float> @_Z14convert_float3Dv3_t(<3 x i16> %in) nounwind readnone alwaysinline {
40 %1 = uitofp <3 x i16> %in to <3 x float>
44 define <4 x float> @_Z14convert_float4Dv4_t(<4 x i16> %in) nounwind readnone alwaysinline {
45 %1 = uitofp <4 x i16> %in to <4 x float>
49 define <2 x float> @_Z14convert_float2Dv2_s(<2 x i16> %in) nounwind readnone alwaysinline {
50 %1 = sitofp <2 x i16> %in to <2 x float>
54 define <3 x float> @_Z14convert_float3Dv3_s(<3 x i16> %in) nounwind readnone alwaysinline {
55 %1 = sitofp <3 x i16> %in to <3 x float>
59 define <4 x float> @_Z14convert_float4Dv4_s(<4 x i16> %in) nounwind readnone alwaysinline {
60 %1 = sitofp <4 x i16> %in to <4 x float>
110 %2 = trunc <4 x i32> %1 to <4 x i16>
111 %3 = shufflevector <4 x i16> %2, <4 x i16> undef, <8 x i32> <i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7>
112 %4 = trunc <8 x i16> %3 to <8 x i8>
120 %2 = trunc <4 x i32> %1 to <4 x i16>
121 %3 = shufflevector <4 x i16> %2, <4 x i16> undef, <8 x i32> <i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7>
122 %4 = trunc <8 x i16> %3 to <8 x i8>
130 %2 = trunc <4 x i32> %1 to <4 x i16>
131 %3 = shufflevector <4 x i16> %2, <4 x i16> undef, <8 x i32> <i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7>
132 %4 = trunc <8 x i16> %3 to <8 x i8>
162 define <4 x i8> @_Z14convert_uchar4Dv4_t(<4 x i16> %in) nounwind readnone alwaysinline {
163 %1 = shufflevector <4 x i16> %in, <4 x i16> undef, <8 x i32> <i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7>
164 %2 = trunc <8 x i16> %1 to <8 x i8>
169 define <3 x i8> @_Z14convert_uchar3Dv3_t(<3 x i16> %in) nounwind readnone alwaysinline {
170 %1 = shufflevector <3 x i16> %in, <3 x i16> undef, <8 x i32> <i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 5, i32 5>
171 %2 = trunc <8 x i16> %1 to <8 x i8>
176 define <2 x i8> @_Z14convert_uchar2Dv2_t(<2 x i16> %in) nounwind readnone alwaysinline {
177 %1 = shufflevector <2 x i16> %in, <2 x i16> undef, <8 x i32> <i32 0, i32 1, i32 2, i32 2, i32 2, i32 2, i32 2, i32 2>
178 %2 = trunc <8 x i16> %1 to <8 x i8>
183 define <4 x i8> @_Z14convert_uchar4Dv4_s(<4 x i16> %in) nounwind readnone alwaysinline {
184 %1 = shufflevector <4 x i16> %in, <4 x i16> undef, <8 x i32> <i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7>
185 %2 = trunc <8 x i16> %1 to <8 x i8>
190 define <3 x i8> @_Z14convert_uchar3Dv3_s(<3 x i16> %in) nounwind readnone alwaysinline {
191 %1 = shufflevector <3 x i16> %in, <3 x i16> undef, <8 x i32> <i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 5, i32 5>
192 %2 = trunc <8 x i16> %1 to <8 x i8>
197 define <2 x i8> @_Z14convert_uchar2Dv2_s(<2 x i16> %in) nounwind readnone alwaysinline {
198 %1 = shufflevector <2 x i16> %in, <2 x i16> undef, <8 x i32> <i32 0, i32 1, i32 2, i32 2, i32 2, i32 2, i32 2, i32 2>
199 %2 = trunc <8 x i16> %1 to <8 x i8>
206 %1 = trunc <4 x i32> %in to <4 x i16>
207 %2 = shufflevector <4 x i16> %1, <4 x i16> undef, <8 x i32> <i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7>
208 %3 = trunc <8 x i16> %2 to <8 x i8>
215 %2 = trunc <4 x i32> %1 to <4 x i16>
216 %3 = shufflevector <4 x i16> %2, <4 x i16> undef, <8 x i32> <i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7>
217 %4 = trunc <8 x i16> %3 to <8 x i8>
224 %2 = trunc <4 x i32> %1 to <4 x i16>
225 %3 = shufflevector <4 x i16> %2, <4 x i16> undef, <8 x i32> <i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7>
226 %4 = trunc <8 x i16> %3 to <8 x i8>
232 %1 = trunc <4 x i32> %in to <4 x i16>
233 %2 = shufflevector <4 x i16> %1, <4 x i16> undef, <8 x i32> <i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7>
234 %3 = trunc <8 x i16> %2 to <8 x i8>
241 %2 = trunc <4 x i32> %1 to <4 x i16>
242 %3 = shufflevector <4 x i16> %2, <4 x i16> undef, <8 x i32> <i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7>
243 %4 = trunc <8 x i16> %3 to <8 x i8>
250 %2 = trunc <4 x i32> %1 to <4 x i16>
251 %3 = shufflevector <4 x i16> %2, <4 x i16> undef, <8 x i32> <i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7>
252 %4 = trunc <8 x i16> %3 to <8 x i8>
