1 //===-- PhiElimination.cpp - Eliminate PHI nodes by inserting copies ------===// 2 // 3 // The LLVM Compiler Infrastructure 4 // 5 // This file is distributed under the University of Illinois Open Source 6 // License. See LICENSE.TXT for details. 7 // 8 //===----------------------------------------------------------------------===// 9 // 10 // This pass eliminates machine instruction PHI nodes by inserting copy 11 // instructions. This destroys SSA information, but is the desired input for 12 // some register allocators. 13 // 14 //===----------------------------------------------------------------------===// 15 16 #define DEBUG_TYPE "phielim" 17 #include "PHIEliminationUtils.h" 18 #include "llvm/CodeGen/LiveVariables.h" 19 #include "llvm/CodeGen/Passes.h" 20 #include "llvm/CodeGen/MachineDominators.h" 21 #include "llvm/CodeGen/MachineInstr.h" 22 #include "llvm/CodeGen/MachineInstrBuilder.h" 23 #include "llvm/CodeGen/MachineLoopInfo.h" 24 #include "llvm/CodeGen/MachineRegisterInfo.h" 25 #include "llvm/Target/TargetInstrInfo.h" 26 #include "llvm/Function.h" 27 #include "llvm/Target/TargetMachine.h" 28 #include "llvm/ADT/SmallPtrSet.h" 29 #include "llvm/ADT/STLExtras.h" 30 #include "llvm/ADT/Statistic.h" 31 #include "llvm/Support/CommandLine.h" 32 #include "llvm/Support/Compiler.h" 33 #include "llvm/Support/Debug.h" 34 #include <algorithm> 35 using namespace llvm; 36 37 static cl::opt<bool> 38 DisableEdgeSplitting("disable-phi-elim-edge-splitting", cl::init(false), 39 cl::Hidden, cl::desc("Disable critical edge splitting " 40 "during PHI elimination")); 41 42 namespace { 43 class PHIElimination : public MachineFunctionPass { 44 MachineRegisterInfo *MRI; // Machine register information 45 46 public: 47 static char ID; // Pass identification, replacement for typeid 48 PHIElimination() : MachineFunctionPass(ID) { 49 initializePHIEliminationPass(*PassRegistry::getPassRegistry()); 50 } 51 52 virtual bool runOnMachineFunction(MachineFunction &Fn); 53 virtual void getAnalysisUsage(AnalysisUsage &AU) const; 54 55 private: 56 /// EliminatePHINodes - Eliminate phi nodes by inserting copy instructions 57 /// in predecessor basic blocks. 58 /// 59 bool EliminatePHINodes(MachineFunction &MF, MachineBasicBlock &MBB); 60 void LowerAtomicPHINode(MachineBasicBlock &MBB, 61 MachineBasicBlock::iterator AfterPHIsIt); 62 63 /// analyzePHINodes - Gather information about the PHI nodes in 64 /// here. In particular, we want to map the number of uses of a virtual 65 /// register which is used in a PHI node. We map that to the BB the 66 /// vreg is coming from. This is used later to determine when the vreg 67 /// is killed in the BB. 68 /// 69 void analyzePHINodes(const MachineFunction& Fn); 70 71 /// Split critical edges where necessary for good coalescer performance. 72 bool SplitPHIEdges(MachineFunction &MF, MachineBasicBlock &MBB, 73 LiveVariables &LV, MachineLoopInfo *MLI); 74 75 typedef std::pair<unsigned, unsigned> BBVRegPair; 76 typedef DenseMap<BBVRegPair, unsigned> VRegPHIUse; 77 78 VRegPHIUse VRegPHIUseCount; 79 80 // Defs of PHI sources which are implicit_def. 81 SmallPtrSet<MachineInstr*, 4> ImpDefs; 82 83 // Map reusable lowered PHI node -> incoming join register. 84 typedef DenseMap<MachineInstr*, unsigned, 85 MachineInstrExpressionTrait> LoweredPHIMap; 86 LoweredPHIMap LoweredPHIs; 87 }; 88 } 89 90 STATISTIC(NumAtomic, "Number of atomic phis lowered"); 91 STATISTIC(NumCriticalEdgesSplit, "Number of critical edges split"); 92 STATISTIC(NumReused, "Number of reused lowered phis"); 93 94 char PHIElimination::ID = 0; 95 char& llvm::PHIEliminationID = PHIElimination::ID; 96 97 INITIALIZE_PASS_BEGIN(PHIElimination, "phi-node-elimination", 98 "Eliminate PHI nodes for register allocation", 99 false, false) 100 INITIALIZE_PASS_DEPENDENCY(LiveVariables) 101 INITIALIZE_PASS_END(PHIElimination, "phi-node-elimination", 102 "Eliminate PHI nodes for register allocation", false, false) 103 104 void PHIElimination::getAnalysisUsage(AnalysisUsage &AU) const { 105 AU.addPreserved<LiveVariables>(); 106 AU.addPreserved<MachineDominatorTree>(); 107 AU.addPreserved<MachineLoopInfo>(); 108 MachineFunctionPass::getAnalysisUsage(AU); 109 } 110 111 bool PHIElimination::runOnMachineFunction(MachineFunction &MF) { 112 MRI = &MF.getRegInfo(); 113 114 bool Changed = false; 115 116 // This pass takes the function out of SSA form. 117 MRI->leaveSSA(); 118 119 // Split critical edges to help the coalescer 120 if (!DisableEdgeSplitting) { 121 if (LiveVariables *LV = getAnalysisIfAvailable<LiveVariables>()) { 122 MachineLoopInfo *MLI = getAnalysisIfAvailable<MachineLoopInfo>(); 123 for (MachineFunction::iterator I = MF.begin(), E = MF.end(); I != E; ++I) 124 Changed |= SplitPHIEdges(MF, *I, *LV, MLI); 125 } 126 } 127 128 // Populate VRegPHIUseCount 129 analyzePHINodes(MF); 130 131 // Eliminate PHI instructions by inserting copies into predecessor blocks. 132 for (MachineFunction::iterator I = MF.begin(), E = MF.end(); I != E; ++I) 133 Changed |= EliminatePHINodes(MF, *I); 134 135 // Remove dead IMPLICIT_DEF instructions. 136 for (SmallPtrSet<MachineInstr*, 4>::iterator I = ImpDefs.begin(), 137 E = ImpDefs.end(); I != E; ++I) { 138 MachineInstr *DefMI = *I; 139 unsigned DefReg = DefMI->getOperand(0).getReg(); 140 if (MRI->use_nodbg_empty(DefReg)) 141 DefMI->eraseFromParent(); 142 } 143 144 // Clean up the lowered PHI instructions. 145 for (LoweredPHIMap::iterator I = LoweredPHIs.begin(), E = LoweredPHIs.end(); 146 I != E; ++I) 147 MF.DeleteMachineInstr(I->first); 148 149 LoweredPHIs.clear(); 150 ImpDefs.clear(); 151 VRegPHIUseCount.clear(); 152 153 return Changed; 154 } 155 156 /// EliminatePHINodes - Eliminate phi nodes by inserting copy instructions in 157 /// predecessor basic blocks. 158 /// 159 bool PHIElimination::EliminatePHINodes(MachineFunction &MF, 160 MachineBasicBlock &MBB) { 161 if (MBB.empty() || !MBB.front().isPHI()) 162 return false; // Quick exit for basic blocks without PHIs. 163 164 // Get an iterator to the first instruction after the last PHI node (this may 165 // also be the end of the basic block). 166 MachineBasicBlock::iterator AfterPHIsIt = MBB.SkipPHIsAndLabels(MBB.begin()); 167 168 while (MBB.front().isPHI()) 169 LowerAtomicPHINode(MBB, AfterPHIsIt); 170 171 return true; 172 } 173 174 /// isSourceDefinedByImplicitDef - Return true if all sources of the phi node 175 /// are implicit_def's. 176 static bool isSourceDefinedByImplicitDef(const MachineInstr *MPhi, 177 const MachineRegisterInfo *MRI) { 178 for (unsigned i = 1; i != MPhi->getNumOperands(); i += 2) { 179 unsigned SrcReg = MPhi->getOperand(i).getReg(); 180 const MachineInstr *DefMI = MRI->getVRegDef(SrcReg); 181 if (!DefMI || !DefMI->isImplicitDef()) 182 return false; 183 } 184 return true; 185 } 186 187 188 189 /// LowerAtomicPHINode - Lower the PHI node at the top of the specified block, 190 /// under the assuption that it needs to be lowered in a way that supports 191 /// atomic execution of PHIs. This lowering method is always correct all of the 192 /// time. 193 /// 194 void PHIElimination::LowerAtomicPHINode( 195 MachineBasicBlock &MBB, 196 MachineBasicBlock::iterator AfterPHIsIt) { 197 ++NumAtomic; 198 // Unlink the PHI node from the basic block, but don't delete the PHI yet. 199 MachineInstr *MPhi = MBB.remove(MBB.begin()); 200 201 unsigned NumSrcs = (MPhi->getNumOperands() - 1) / 2; 202 unsigned DestReg = MPhi->getOperand(0).getReg(); 203 assert(MPhi->getOperand(0).getSubReg() == 0 && "Can't handle sub-reg PHIs"); 204 bool isDead = MPhi->getOperand(0).isDead(); 205 206 // Create a new register for the incoming PHI arguments. 207 MachineFunction &MF = *MBB.getParent(); 208 unsigned IncomingReg = 0; 209 bool reusedIncoming = false; // Is IncomingReg reused from an earlier PHI? 210 211 // Insert a register to register copy at the top of the current block (but 212 // after any remaining phi nodes) which copies the new incoming register 213 // into the phi node destination. 214 const TargetInstrInfo *TII = MF.getTarget().getInstrInfo(); 215 if (isSourceDefinedByImplicitDef(MPhi, MRI)) 216 // If all sources of a PHI node are implicit_def, just emit an 217 // implicit_def instead of a copy. 218 BuildMI(MBB, AfterPHIsIt, MPhi->getDebugLoc(), 219 TII->get(TargetOpcode::IMPLICIT_DEF), DestReg); 220 else { 221 // Can we reuse an earlier PHI node? This only happens for critical edges, 222 // typically those created by tail duplication. 223 unsigned &entry = LoweredPHIs[MPhi]; 224 if (entry) { 225 // An identical PHI node was already lowered. Reuse the incoming register. 226 IncomingReg = entry; 227 reusedIncoming = true; 228 ++NumReused; 229 DEBUG(dbgs() << "Reusing " << PrintReg(IncomingReg) << " for " << *MPhi); 230 } else { 231 const TargetRegisterClass *RC = MF.getRegInfo().getRegClass(DestReg); 232 entry = IncomingReg = MF.getRegInfo().createVirtualRegister(RC); 233 } 234 BuildMI(MBB, AfterPHIsIt, MPhi->getDebugLoc(), 235 TII->get(TargetOpcode::COPY), DestReg) 236 .addReg(IncomingReg); 237 } 238 239 // Update live variable information if there is any. 240 LiveVariables *LV = getAnalysisIfAvailable<LiveVariables>(); 241 if (LV) { 242 MachineInstr *PHICopy = prior(AfterPHIsIt); 243 244 if (IncomingReg) { 245 LiveVariables::VarInfo &VI = LV->getVarInfo(IncomingReg); 246 247 // Increment use count of the newly created virtual register. 248 LV->setPHIJoin(IncomingReg); 249 250 // When we are reusing the incoming register, it may already have been 251 // killed in this block. The old kill will also have been inserted at 252 // AfterPHIsIt, so it appears before the current PHICopy. 253 if (reusedIncoming) 254 if (MachineInstr *OldKill = VI.findKill(&MBB)) { 255 DEBUG(dbgs() << "Remove old kill from " << *OldKill); 256 LV->removeVirtualRegisterKilled(IncomingReg, OldKill); 257 DEBUG(MBB.dump()); 258 } 259 260 // Add information to LiveVariables to know that the incoming value is 261 // killed. Note that because the value is defined in several places (once 262 // each for each incoming block), the "def" block and instruction fields 263 // for the VarInfo is not filled in. 264 LV->addVirtualRegisterKilled(IncomingReg, PHICopy); 265 } 266 267 // Since we are going to be deleting the PHI node, if it is the last use of 268 // any registers, or if the value itself is dead, we need to move this 269 // information over to the new copy we just inserted. 270 LV->removeVirtualRegistersKilled(MPhi); 271 272 // If the result is dead, update LV. 273 if (isDead) { 274 LV->addVirtualRegisterDead(DestReg, PHICopy); 275 LV->removeVirtualRegisterDead(DestReg, MPhi); 276 } 277 } 278 279 // Adjust the VRegPHIUseCount map to account for the removal of this PHI node. 280 for (unsigned i = 1; i != MPhi->getNumOperands(); i += 2) 281 --VRegPHIUseCount[BBVRegPair(MPhi->getOperand(i+1).getMBB()->getNumber(), 282 MPhi->getOperand(i).getReg())]; 283 284 // Now loop over all of the incoming arguments, changing them to copy into the 285 // IncomingReg register in the corresponding predecessor basic block. 286 SmallPtrSet<MachineBasicBlock*, 8> MBBsInsertedInto; 287 for (int i = NumSrcs - 1; i >= 0; --i) { 288 unsigned SrcReg = MPhi->getOperand(i*2+1).getReg(); 289 unsigned SrcSubReg = MPhi->getOperand(i*2+1).getSubReg(); 290 291 assert(TargetRegisterInfo::isVirtualRegister(SrcReg) && 292 "Machine PHI Operands must all be virtual registers!"); 293 294 // Get the MachineBasicBlock equivalent of the BasicBlock that is the source 295 // path the PHI. 296 MachineBasicBlock &opBlock = *MPhi->getOperand(i*2+2).getMBB(); 297 298 // If source is defined by an implicit def, there is no need to insert a 299 // copy. 300 MachineInstr *DefMI = MRI->getVRegDef(SrcReg); 301 if (DefMI->isImplicitDef()) { 302 ImpDefs.insert(DefMI); 303 continue; 304 } 305 306 // Check to make sure we haven't already emitted the copy for this block. 307 // This can happen because PHI nodes may have multiple entries for the same 308 // basic block. 309 if (!MBBsInsertedInto.insert(&opBlock)) 310 continue; // If the copy has already been emitted, we're done. 311 312 // Find a safe location to insert the copy, this may be the first terminator 313 // in the block (or end()). 314 MachineBasicBlock::iterator InsertPos = 315 findPHICopyInsertPoint(&opBlock, &MBB, SrcReg); 316 317 // Insert the copy. 318 if (!reusedIncoming && IncomingReg) 319 BuildMI(opBlock, InsertPos, MPhi->getDebugLoc(), 320 TII->get(TargetOpcode::COPY), IncomingReg).addReg(SrcReg, 0, SrcSubReg); 321 322 // Now update live variable information if we have it. Otherwise we're done 323 if (!LV) continue; 324 325 // We want to be able to insert a kill of the register if this PHI (aka, the 326 // copy we just inserted) is the last use of the source value. Live 327 // variable analysis conservatively handles this by saying that the value is 328 // live until the end of the block the PHI entry lives in. If the value 329 // really is dead at the PHI copy, there will be no successor blocks which 330 // have the value live-in. 331 332 // Also check to see if this register is in use by another PHI node which 333 // has not yet been eliminated. If so, it will be killed at an appropriate 334 // point later. 335 336 // Is it used by any PHI instructions in this block? 337 bool ValueIsUsed = VRegPHIUseCount[BBVRegPair(opBlock.getNumber(), SrcReg)]; 338 339 // Okay, if we now know that the value is not live out of the block, we can 340 // add a kill marker in this block saying that it kills the incoming value! 341 if (!ValueIsUsed && !LV->isLiveOut(SrcReg, opBlock)) { 342 // In our final twist, we have to decide which instruction kills the 343 // register. In most cases this is the copy, however, the first 344 // terminator instruction at the end of the block may also use the value. 345 // In this case, we should mark *it* as being the killing block, not the 346 // copy. 347 MachineBasicBlock::iterator KillInst; 348 MachineBasicBlock::iterator Term = opBlock.getFirstTerminator(); 349 if (Term != opBlock.end() && Term->readsRegister(SrcReg)) { 350 KillInst = Term; 351 352 // Check that no other terminators use values. 353 #ifndef NDEBUG 354 for (MachineBasicBlock::iterator TI = llvm::next(Term); 355 TI != opBlock.end(); ++TI) { 356 if (TI->isDebugValue()) 357 continue; 358 assert(!TI->readsRegister(SrcReg) && 359 "Terminator instructions cannot use virtual registers unless" 360 "they are the first terminator in a block!"); 361 } 362 #endif 363 } else if (reusedIncoming || !IncomingReg) { 364 // We may have to rewind a bit if we didn't insert a copy this time. 365 KillInst = Term; 366 while (KillInst != opBlock.begin()) { 367 --KillInst; 368 if (KillInst->isDebugValue()) 369 continue; 370 if (KillInst->readsRegister(SrcReg)) 371 break; 372 } 373 } else { 374 // We just inserted this copy. 375 KillInst = prior(InsertPos); 376 } 377 assert(KillInst->readsRegister(SrcReg) && "Cannot find kill instruction"); 378 379 // Finally, mark it killed. 380 LV->addVirtualRegisterKilled(SrcReg, KillInst); 381 382 // This vreg no longer lives all of the way through opBlock. 383 unsigned opBlockNum = opBlock.getNumber(); 384 LV->getVarInfo(SrcReg).AliveBlocks.reset(opBlockNum); 385 } 386 } 387 388 // Really delete the PHI instruction now, if it is not in the LoweredPHIs map. 389 if (reusedIncoming || !IncomingReg) 390 MF.DeleteMachineInstr(MPhi); 391 } 392 393 /// analyzePHINodes - Gather information about the PHI nodes in here. In 394 /// particular, we want to map the number of uses of a virtual register which is 395 /// used in a PHI node. We map that to the BB the vreg is coming from. This is 396 /// used later to determine when the vreg is killed in the BB. 397 /// 398 void PHIElimination::analyzePHINodes(const MachineFunction& MF) { 399 for (MachineFunction::const_iterator I = MF.begin(), E = MF.end(); 400 I != E; ++I) 401 for (MachineBasicBlock::const_iterator BBI = I->begin(), BBE = I->end(); 402 BBI != BBE && BBI->isPHI(); ++BBI) 403 for (unsigned i = 1, e = BBI->getNumOperands(); i != e; i += 2) 404 ++VRegPHIUseCount[BBVRegPair(BBI->getOperand(i+1).getMBB()->getNumber(), 405 BBI->getOperand(i).getReg())]; 406 } 407 408 bool PHIElimination::SplitPHIEdges(MachineFunction &MF, 409 MachineBasicBlock &MBB, 410 LiveVariables &LV, 411 MachineLoopInfo *MLI) { 412 if (MBB.empty() || !MBB.front().isPHI() || MBB.isLandingPad()) 413 return false; // Quick exit for basic blocks without PHIs. 414 415 bool Changed = false; 416 for (MachineBasicBlock::iterator BBI = MBB.begin(), BBE = MBB.end(); 417 BBI != BBE && BBI->isPHI(); ++BBI) { 418 for (unsigned i = 1, e = BBI->getNumOperands(); i != e; i += 2) { 419 unsigned Reg = BBI->getOperand(i).getReg(); 420 MachineBasicBlock *PreMBB = BBI->getOperand(i+1).getMBB(); 421 // We break edges when registers are live out from the predecessor block 422 // (not considering PHI nodes). If the register is live in to this block 423 // anyway, we would gain nothing from splitting. 424 // Avoid splitting backedges of loops. It would introduce small 425 // out-of-line blocks into the loop which is very bad for code placement. 426 if (PreMBB != &MBB && 427 !LV.isLiveIn(Reg, MBB) && LV.isLiveOut(Reg, *PreMBB)) { 428 if (!MLI || 429 !(MLI->getLoopFor(PreMBB) == MLI->getLoopFor(&MBB) && 430 MLI->isLoopHeader(&MBB))) { 431 if (PreMBB->SplitCriticalEdge(&MBB, this)) { 432 Changed = true; 433 ++NumCriticalEdgesSplit; 434 } 435 } 436 } 437 } 438 } 439 return Changed; 440 } 441