| /external/llvm/include/llvm/CodeGen/ |
| MachineInstrBundle.h | 133 /// RegInfo - Information about a virtual register used by a set of operands.
135 struct RegInfo {
156 /// @returns A filled-in RegInfo struct.
157 RegInfo analyzeVirtReg(unsigned Reg,
|
| FunctionLoweringInfo.h | 59 MachineRegisterInfo *RegInfo;
|
| MachineFunction.h | 81 // RegInfo - Information about each register in use in the function.
82 MachineRegisterInfo *RegInfo;
156 MachineRegisterInfo &getRegInfo() { return *RegInfo; }
157 const MachineRegisterInfo &getRegInfo() const { return *RegInfo; }
|
| SelectionDAGISel.h | 49 MachineRegisterInfo *RegInfo;
|
| /external/llvm/lib/Target/MBlaze/ |
| MBlazeInstrInfo.cpp | 287 MachineRegisterInfo &RegInfo = MF->getRegInfo();
290 GlobalBaseReg = RegInfo.createVirtualRegister(MBlaze::GPRRegisterClass);
293 RegInfo.addLiveIn(MBlaze::R20);
|
| /external/llvm/lib/Target/Sparc/ |
| SparcInstrInfo.cpp | 347 MachineRegisterInfo &RegInfo = MF->getRegInfo();
349 GlobalBaseReg = RegInfo.createVirtualRegister(&SP::IntRegsRegClass);
|
| SparcISelLowering.cpp | 157 MachineRegisterInfo &RegInfo = MF.getRegInfo();
185 unsigned VRegHi = RegInfo.createVirtualRegister(&SP::IntRegsRegClass);
211 unsigned VReg = RegInfo.createVirtualRegister(&SP::IntRegsRegClass);
323 unsigned VReg = RegInfo.createVirtualRegister(&SP::IntRegsRegClass);
[all...] |
| /external/llvm/lib/Target/ARM/ |
| Thumb1FrameLowering.cpp | 51 const Thumb1RegisterInfo *RegInfo =
60 unsigned FramePtr = RegInfo->getFrameRegister(MF);
61 unsigned BasePtr = RegInfo->getBaseRegister();
73 emitSPUpdate(MBB, MBBI, TII, dl, *RegInfo, -VARegSaveSize,
78 emitSPUpdate(MBB, MBBI, TII, dl, *RegInfo, -NumBytes,
146 emitSPUpdate(MBB, MBBI, TII, dl, *RegInfo, -NumBytes,
159 if (RegInfo->needsStackRealignment(MF))
166 if (RegInfo->hasBasePointer(MF))
209 const Thumb1RegisterInfo *RegInfo =
216 const uint16_t *CSRegs = RegInfo->getCalleeSavedRegs()
[all...] |
| ARMFrameLowering.cpp | 42 const TargetRegisterInfo *RegInfo = MF.getTarget().getRegisterInfo();
52 RegInfo->needsStackRealignment(MF) ||
135 const ARMBaseRegisterInfo *RegInfo =
146 unsigned FramePtr = RegInfo->getFrameRegister(MF);
285 if (!AFI->getNumAlignedDPRCS2Regs() && RegInfo->needsStackRealignment(MF)) {
319 if (RegInfo->hasBasePointer(MF)) {
322 TII.get(ARM::MOVr), RegInfo->getBaseRegister())
327 RegInfo->getBaseRegister())
346 const TargetRegisterInfo *RegInfo = MF.getTarget().getRegisterInfo();
355 unsigned FramePtr = RegInfo->getFrameRegister(MF)
[all...] |
| ARMAsmPrinter.cpp | [all...] |
| ARMISelLowering.h | 384 const TargetRegisterInfo *RegInfo;
|
| /external/llvm/lib/Target/PTX/ |
| PTXMachineFunctionInfo.h | 52 RegisterInfoMap RegInfo;
84 if (!RegInfo.count(Reg)) {
92 for(RegisterInfoMap::const_iterator i = RegInfo.begin(),
93 e = RegInfo.end(); i != e; ++i) {
103 RegInfo[Reg] = Info;
116 for(RegisterInfoMap::const_iterator i = RegInfo.begin(), e = RegInfo.end();
127 return RegInfo.lookup(Reg).Encoded;
145 if (RegInfo.count(Reg)) {
146 const RegisterInfo& RI = RegInfo.lookup(Reg)
[all...] |
| /external/llvm/lib/Target/Mips/ |
| MipsFrameLowering.cpp | 133 const MipsRegisterInfo *RegInfo =
221 const uint16_t *SubRegs = RegInfo->getSubRegisters(Reg);
|
| MipsISelDAGToDAG.cpp | 125 MachineRegisterInfo &RegInfo = MF.getRegInfo();
139 V0 = RegInfo.createVirtualRegister(RC);
140 V1 = RegInfo.createVirtualRegister(RC);
|
| /external/llvm/lib/Target/XCore/ |
| XCoreFrameLowering.cpp | 342 const TargetRegisterInfo *RegInfo = MF.getTarget().getRegisterInfo();
361 if (RegInfo->requiresRegisterScavenging(MF)) {
|
| /external/llvm/lib/CodeGen/ |
| PrologEpilogInserter.cpp | 153 const TargetRegisterInfo *RegInfo = Fn.getTarget().getRegisterInfo();
200 RegInfo->eliminateCallFramePseudoInstr(Fn, *I->getParent(), I);
208 const TargetRegisterInfo *RegInfo = Fn.getTarget().getRegisterInfo();
213 const uint16_t *CSRegs = RegInfo->getCalleeSavedRegs(&Fn);
248 const TargetRegisterClass *RC = RegInfo->getMinimalPhysRegClass(Reg);
251 if (RegInfo->hasReservedSpillSlot(Fn, Reg, FrameIdx)) {
560 const TargetRegisterInfo *RegInfo = Fn.getTarget().getRegisterInfo();
561 if (RS && TFI.hasFP(Fn) && RegInfo->useFPForScavengingIndex(Fn) &&
562 !RegInfo->needsStackRealignment(Fn)) {
644 if (RS && (!TFI.hasFP(Fn) || RegInfo->needsStackRealignment(Fn) |
[all...] |
| MachineBasicBlock.cpp | 74 // Make sure the instructions have their operands in the reginfo lists.
75 MachineRegisterInfo &RegInfo = MF.getRegInfo();
78 I->AddRegOperandsToUseLists(RegInfo);
[all...] |
| RegAllocGreedy.cpp | 126 // RegInfo - Keep additional information about each live range.
127 struct RegInfo {
133 RegInfo() : Stage(RS_New), Cascade(0) {}
136 IndexedMap<RegInfo, VirtReg2IndexFunctor> ExtraRegInfo;
[all...] |
| MachineInstr.cpp | 53 void MachineOperand::AddRegOperandToRegInfo(MachineRegisterInfo *RegInfo) {
56 // If the reginfo pointer is null, just explicitly null out or next/prev
58 if (RegInfo == 0) {
65 MachineOperand **Head = &RegInfo->getRegUseDefListHead(getReg());
618 void MachineInstr::AddRegOperandsToUseLists(MachineRegisterInfo &RegInfo) {
621 Operands[i].AddRegOperandToRegInfo(&RegInfo);
633 MachineRegisterInfo *RegInfo = getRegInfo();
636 // be removed and re-added to RegInfo. It is storing pointers to operands.
637 bool Reallocate = RegInfo &&
644 // Remove all the implicit operands from RegInfo if they need to be shifted
[all...] |
| /external/llvm/lib/Target/Hexagon/ |
| HexagonInstrInfo.cpp | 453 MachineRegisterInfo &RegInfo = MF->getRegInfo();
465 unsigned NewReg = RegInfo.createVirtualRegister(TRC);
[all...] |
| HexagonISelLowering.cpp | 806 MachineRegisterInfo &RegInfo = MF.getRegInfo();
842 RegInfo.createVirtualRegister(Hexagon::IntRegsRegisterClass);
843 RegInfo.addLiveIn(VA.getLocReg(), VReg);
847 RegInfo.createVirtualRegister(Hexagon::DoubleRegsRegisterClass);
848 RegInfo.addLiveIn(VA.getLocReg(), VReg);
[all...] |
| /external/llvm/lib/Target/MSP430/ |
| MSP430ISelLowering.cpp | 308 MachineRegisterInfo &RegInfo = MF.getRegInfo();
334 RegInfo.createVirtualRegister(MSP430::GR16RegisterClass);
335 RegInfo.addLiveIn(VA.getLocReg(), VReg);
[all...] |
| /external/llvm/lib/Target/PowerPC/ |
| PPCFrameLowering.cpp | 737 const TargetRegisterInfo *RegInfo = MF.getTarget().getRegisterInfo();
741 unsigned LR = RegInfo->getRARegister();
775 if (RegInfo->requiresRegisterScavenging(MF))
[all...] |
| /external/llvm/lib/Target/X86/ |
| X86ISelLowering.h | 656 const X86RegisterInfo *RegInfo;
[all...] |
| X86InstrInfo.cpp | [all...] |
