| /external/llvm/lib/Target/X86/AsmParser/ |
| X86AsmLexer.cpp | 105 int RegNo = -1;
107 case '0': RegNo = X86::DR0; break;
108 case '1': RegNo = X86::DR1; break;
109 case '2': RegNo = X86::DR2; break;
110 case '3': RegNo = X86::DR3; break;
111 case '4': RegNo = X86::DR4; break;
112 case '5': RegNo = X86::DR5; break;
113 case '6': RegNo = X86::DR6; break;
114 case '7': RegNo = X86::DR7; break;
117 if (RegNo != -1)
[all...] |
| X86AsmParser.cpp | 100 virtual bool ParseRegister(unsigned &RegNo, SMLoc &StartLoc, SMLoc &EndLoc);
166 unsigned RegNo;
207 return Reg.RegNo;
407 static X86Operand *CreateReg(unsigned RegNo, SMLoc StartLoc, SMLoc EndLoc) {
409 Res->Reg.RegNo = RegNo;
477 bool X86AsmParser::ParseRegister(unsigned &RegNo,
479 RegNo = 0;
494 RegNo = MatchRegisterName(Tok.getString());
497 if (RegNo == 0
[all...] |
| /external/llvm/lib/Target/Hexagon/ |
| HexagonAsmPrinter.h | 64 unsigned RegNo = MO.getReg();
65 assert(TargetRegisterInfo::isPhysicalRegister(RegNo) && "Not physreg??");
66 O << getRegisterName(RegNo);
156 static const char *getRegisterName(unsigned RegNo);
|
| /external/llvm/lib/Target/Mips/MCTargetDesc/ |
| MipsMCCodeEmitter.cpp | 175 unsigned RegNo = getMipsRegisterNumbering(Reg);
176 return RegNo;
|
| /external/llvm/lib/Target/PowerPC/InstPrinter/ |
| PPCInstPrinter.cpp | 26 void PPCInstPrinter::printRegName(raw_ostream &OS, unsigned RegNo) const {
27 OS << getRegisterName(RegNo);
171 unsigned RegNo;
174 case PPC::CR0: RegNo = 0; break;
175 case PPC::CR1: RegNo = 1; break;
176 case PPC::CR2: RegNo = 2; break;
177 case PPC::CR3: RegNo = 3; break;
178 case PPC::CR4: RegNo = 4; break;
179 case PPC::CR5: RegNo = 5; break;
180 case PPC::CR6: RegNo = 6; break
[all...] |
| /external/llvm/lib/Target/MBlaze/AsmParser/ |
| MBlazeAsmParser.cpp | 38 MBlazeOperand *ParseRegister(unsigned &RegNo);
43 virtual bool ParseRegister(unsigned &RegNo, SMLoc &StartLoc, SMLoc &EndLoc);
385 bool MBlazeAsmParser::ParseRegister(unsigned &RegNo,
387 return (ParseRegister(RegNo) == 0);
390 MBlazeOperand *MBlazeAsmParser::ParseRegister(unsigned &RegNo) {
397 RegNo = MatchRegisterName(getLexer().getTok().getIdentifier());
398 if (RegNo == 0)
402 return MBlazeOperand::CreateReg(RegNo, S, E);
458 unsigned RegNo;
459 Op = ParseRegister(RegNo);
[all...] |
| /external/llvm/utils/TableGen/ |
| RegisterInfoEmitter.cpp | 297 int RegNo = I->second[i];
298 if (RegNo == -1) // -1 is the default value, don't emit a mapping.
301 OS << " { " << getQualifiedName(I->first) << ", " << RegNo
[all...] |
| /external/llvm/include/llvm/CodeGen/ |
| MachineOperand.h | 131 unsigned RegNo; // For MO_Register.
150 // Register number is in SmallContents.RegNo.
239 return SmallContents.RegNo;
555 Op.SmallContents.RegNo = Reg;
|
| /external/llvm/lib/Target/PowerPC/ |
| PPCFrameLowering.cpp | 112 unsigned RegNo = getPPCRegisterNumbering(I->first);
113 if (VRRegNo[RegNo] == I->first) // If this really is a vector reg.
114 UsedRegMask &= ~(1 << (31-RegNo)); // Doesn't need to be marked.
119 unsigned RegNo = getPPCRegisterNumbering(*I);
120 if (VRRegNo[RegNo] == *I) // If this really is a vector reg.
121 UsedRegMask &= ~(1 << (31-RegNo)); // Doesn't need to be marked.
[all...] |
| /external/llvm/lib/Target/ARM/MCTargetDesc/ |
| ARMMCCodeEmitter.cpp | 407 unsigned RegNo = getARMRegisterNumbering(Reg);
412 return RegNo;
417 return 2 * RegNo;
[all...] |
| /external/llvm/lib/CodeGen/AsmPrinter/ |
| AsmPrinter.cpp | 536 unsigned RegNo = MI->getOperand(0).getReg();
538 AP.TM.getRegisterInfo()->getName(RegNo));
[all...] |
| /external/llvm/lib/MC/MCParser/ |
| AsmParser.cpp | [all...] |
| /external/llvm/lib/Target/ARM/ |
| ARMBaseInstrInfo.cpp | [all...] |
| /external/llvm/lib/Target/ARM/AsmParser/ |
| ARMAsmParser.cpp | 257 bool ParseRegister(unsigned &RegNo, SMLoc &StartLoc, SMLoc &EndLoc);
[all...] |
