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    Searched refs:Demanded (Results 1 - 4 of 4) sorted by null

  /external/llvm/lib/Transforms/InstCombine/
InstCombineSimplifyDemanded.cpp 25 /// are any bits set in the constant that are not demanded. If so, shrink the
28 APInt Demanded) {
36 // If there are no bits set that aren't demanded, nothing to do.
37 Demanded = Demanded.zextOrTrunc(OpC->getValue().getBitWidth());
38 if ((~Demanded & OpC->getValue()) == 0)
41 // This instruction is producing bits that are not demanded. Shrink the RHS.
42 Demanded &= OpC->getValue();
43 I->setOperand(OpNo, ConstantInt::get(OpC->getType(), Demanded));
80 /// value based on the demanded bits. When this function is called, it is know
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  /external/llvm/include/llvm/Target/
TargetLowering.h     [all...]
  /external/llvm/lib/CodeGen/SelectionDAG/
TargetLowering.cpp     [all...]
DAGCombiner.cpp 138 APInt Demanded = APInt::getAllOnesValue(BitWidth);
139 return SimplifyDemandedBits(Op, Demanded);
142 bool SimplifyDemandedBits(SDValue Op, const APInt &Demanded);
678 bool DAGCombiner::SimplifyDemandedBits(SDValue Op, const APInt &Demanded) {
681 if (!TLI.SimplifyDemandedBits(Op, Demanded, KnownZero, KnownOne, TLO))
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