/external/llvm/include/llvm/CodeGen/ |
ISDOpcodes.h | 687 /// EXTLOAD is used for two things: floating point extending loads and 691 EXTLOAD, [all...] |
SelectionDAGNodes.h | [all...] |
/external/llvm/lib/Target/PTX/ |
PTXISelLowering.cpp | 59 // (any/zero/sign) extload => load + (any/zero/sign) extend 61 setLoadExtAction(ISD::EXTLOAD, MVT::i16, Expand); 65 // f32 extload => load + fextend 67 setLoadExtAction(ISD::EXTLOAD, MVT::f32, Expand);
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/external/llvm/lib/CodeGen/SelectionDAG/ |
LegalizeDAG.cpp | 264 // Only do this if the target has a native EXTLOAD instruction from 266 TLI.isLoadExtLegal(ISD::EXTLOAD, SVT) && 279 DAG.getExtLoad(ISD::EXTLOAD, dl, OrigVT, 364 SDValue Load = DAG.getExtLoad(ISD::EXTLOAD, dl, RegVT, Store, StackPtr, 479 SDValue Load = DAG.getExtLoad(ISD::EXTLOAD, dl, RegVT, Chain, Ptr, 573 // with a "move to register" or "extload into register" instruction, then [all...] |
SelectionDAGDumper.cpp | 443 case ISD::EXTLOAD: OS << ", anyext"; break;
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DAGCombiner.cpp | 147 void ReplaceLoadWithPromotedLoad(SDNode *Load, SDNode *ExtLoad); 157 SDValue Trunc, SDValue ExtLoad, DebugLoc DL, 699 void DAGCombiner::ReplaceLoadWithPromotedLoad(SDNode *Load, SDNode *ExtLoad) { 702 SDValue Trunc = DAG.getNode(ISD::TRUNCATE, dl, VT, SDValue(ExtLoad, 0)); 711 DAG.ReplaceAllUsesOfValueWith(SDValue(Load, 1), SDValue(ExtLoad, 1), 725 : ISD::EXTLOAD) [all...] |
LegalizeIntegerTypes.cpp | 417 ISD::isNON_EXTLoad(N) ? ISD::EXTLOAD : N->getExtensionType(); [all...] |
LegalizeVectorTypes.cpp | [all...] |
SelectionDAG.cpp | [all...] |
/external/llvm/lib/Target/MBlaze/ |
MBlazeISelLowering.cpp | 92 setLoadExtAction(ISD::EXTLOAD, MVT::i1, Promote); 184 setLoadExtAction(ISD::EXTLOAD, MVT::f32, Expand); [all...] |
/external/llvm/lib/Target/CellSPU/ |
SPUISelLowering.cpp | 112 setLoadExtAction(ISD::EXTLOAD, MVT::i1, Promote); 116 setLoadExtAction(ISD::EXTLOAD, MVT::f32, Expand); 117 setLoadExtAction(ISD::EXTLOAD, MVT::f64, Expand); 137 setLoadExtAction(ISD::EXTLOAD, VT, Custom); 740 } else if (ExtType == ISD::EXTLOAD) { [all...] |
/external/llvm/lib/Target/XCore/ |
XCoreISelLowering.cpp | 129 setLoadExtAction(ISD::EXTLOAD, MVT::i1, Promote); 465 SDValue High = DAG.getExtLoad(ISD::EXTLOAD, DL, MVT::i32, Chain, [all...] |
/external/llvm/lib/Target/Hexagon/ |
HexagonISelLowering.cpp | [all...] |
/external/llvm/lib/Target/MSP430/ |
MSP430ISelLowering.cpp | 86 setLoadExtAction(ISD::EXTLOAD, MVT::i1, Promote); [all...] |
/external/llvm/lib/Target/Sparc/ |
SparcISelLowering.cpp | 696 // Turn FP extload into load/fextend 697 setLoadExtAction(ISD::EXTLOAD, MVT::f32, Expand); [all...] |
/external/llvm/lib/Target/Mips/ |
MipsISelLowering.cpp | 117 setLoadExtAction(ISD::EXTLOAD, MVT::i1, Promote); 122 setLoadExtAction(ISD::EXTLOAD, MVT::f32, Expand); [all...] |
/external/llvm/lib/Target/X86/ |
X86ISelDAGToDAG.cpp | 500 // FPStack has extload and truncstore. SSE can fold direct loads into other 516 SDValue Result = CurDAG->getExtLoad(ISD::EXTLOAD, dl, DstVT, Store, MemTmp, 521 // extload we created. This will cause general havok on the dag because [all...] |
X86ISelLowering.cpp | [all...] |
/external/llvm/lib/Target/ARM/ |
ARMISelLowering.cpp | 454 setLoadExtAction(ISD::EXTLOAD, (MVT::SimpleValueType)VT, Expand); 562 // It is legal to extload from v4i8 to v4i16 or v4i32. 567 setLoadExtAction(ISD::EXTLOAD, Tys[i], Legal); 576 setLoadExtAction(ISD::EXTLOAD, MVT::f32, Expand); [all...] |
/external/llvm/lib/Target/PowerPC/ |
PPCISelLowering.cpp | [all...] |