| /external/llvm/include/llvm/CodeGen/ |
| ISDOpcodes.h | 706 /// floating point. For integer, only the SETEQ,SETNE,SETLT,SETLE,SETGT,
[all...] |
| /external/llvm/lib/CodeGen/ |
| Analysis.cpp | 180 case ISD::SETOGT: case ISD::SETUGT: return ISD::SETGT;
199 case ICmpInst::ICMP_SGT: return ISD::SETGT;
|
| /external/llvm/lib/Target/PowerPC/ |
| PPCISelDAGToDAG.cpp | 560 case ISD::SETGT: return PPC::PRED_GT;
585 case ISD::SETGT: return 1; // Bit #1 = SETOGT
639 case ISD::SETGT: {
676 case ISD::SETGT: {
[all...] |
| PPCISelLowering.cpp | [all...] |
| /external/llvm/lib/CodeGen/SelectionDAG/ |
| TargetLowering.cpp | 513 CCs[RTLIB::OGT_F32] = ISD::SETGT;
514 CCs[RTLIB::OGT_F64] = ISD::SETGT;
[all...] |
| SelectionDAGDumper.cpp | 301 case ISD::SETGT: return "setgt";
|
| LegalizeIntegerTypes.cpp | [all...] |
| DAGCombiner.cpp | [all...] |
| SelectionDAG.cpp | 258 case ISD::SETGT:
[all...] |
| LegalizeFloatTypes.cpp | 643 case ISD::SETGT:
[all...] |
| LegalizeDAG.cpp | [all...] |
| /external/llvm/lib/Target/Sparc/ |
| SparcISelLowering.cpp | 650 case ISD::SETGT: return SPCC::ICC_G;
671 case ISD::SETGT:
[all...] |
| /external/llvm/lib/Target/Hexagon/ |
| HexagonISelDAGToDAG.cpp | 851 // i16:Other), IntRegs:i32:$src1, SETGT:Other), IntRegs:i32:$src1,
855 if (cast<CondCodeSDNode>(N02)->get() == ISD::SETGT) {
[all...] |
| /external/llvm/lib/Target/MSP430/ |
| MSP430ISelLowering.cpp | 722 case ISD::SETGT:
[all...] |
| /external/llvm/lib/Target/CellSPU/ |
| SPUISelLowering.cpp | [all...] |
| /external/llvm/lib/Target/X86/ |
| X86ISelLowering.cpp | [all...] |
| /external/llvm/lib/Target/ARM/ |
| ARMISelLowering.cpp | [all...] |
| /external/llvm/lib/Target/Mips/ |
| MipsISelLowering.cpp | 515 case ISD::SETGT:
[all...] |
