| /external/llvm/include/llvm/CodeGen/ |
| ISDOpcodes.h | 683 /// SEXTLOAD loads the integer operand and sign extends it to a larger
692 SEXTLOAD,
[all...] |
| SelectionDAGNodes.h | [all...] |
| /external/llvm/lib/Target/Hexagon/ |
| HexagonISelDAGToDAG.cpp | 527 LD->getExtensionType() == ISD::SEXTLOAD) {
751 // Handle sign_extend and sextload.
762 LD->getExtensionType() != ISD::SEXTLOAD ||
788 LD->getExtensionType() != ISD::SEXTLOAD ||
[all...] |
| HexagonISelLowering.cpp | 635 isSEXTLoad = LD->getExtensionType() == ISD::SEXTLOAD;
[all...] |
| /external/llvm/lib/Target/MBlaze/ |
| MBlazeISelLowering.cpp | 94 setLoadExtAction(ISD::SEXTLOAD, MVT::i1, Promote);
97 setLoadExtAction(ISD::SEXTLOAD, MVT::i8, Expand);
98 setLoadExtAction(ISD::SEXTLOAD, MVT::i16, Expand);
[all...] |
| /external/llvm/lib/Target/MSP430/ |
| MSP430ISelLowering.cpp | 87 setLoadExtAction(ISD::SEXTLOAD, MVT::i1, Promote);
89 setLoadExtAction(ISD::SEXTLOAD, MVT::i8, Expand);
90 setLoadExtAction(ISD::SEXTLOAD, MVT::i16, Expand);
[all...] |
| /external/llvm/lib/CodeGen/SelectionDAG/ |
| SelectionDAGDumper.cpp | 444 case ISD::SEXTLOAD: OS << ", sext"; break;
|
| DAGCombiner.cpp | [all...] |
| LegalizeDAG.cpp | [all...] |
| LegalizeIntegerTypes.cpp | [all...] |
| SelectionDAG.cpp | [all...] |
| /external/llvm/lib/Target/PTX/ |
| PTXISelLowering.cpp | 63 setLoadExtAction(ISD::SEXTLOAD, MVT::i16, Expand);
|
| /external/llvm/lib/Target/Sparc/ |
| SparcISelLowering.cpp | 277 ISD::LoadExtType LoadOp = ISD::SEXTLOAD;
699 setLoadExtAction(ISD::SEXTLOAD, MVT::i1, Promote);
[all...] |
| /external/llvm/lib/Target/CellSPU/ |
| SPUISelLowering.cpp | 113 setLoadExtAction(ISD::SEXTLOAD, MVT::i1, Promote);
139 setLoadExtAction(ISD::SEXTLOAD, VT, Custom);
736 if (ExtType == ISD::SEXTLOAD) {
[all...] |
| /external/llvm/lib/Transforms/Scalar/ |
| CodeGenPrepare.cpp | [all...] |
| /external/llvm/lib/Target/XCore/ |
| XCoreISelLowering.cpp | 131 setLoadExtAction(ISD::SEXTLOAD, MVT::i1, Promote);
133 setLoadExtAction(ISD::SEXTLOAD, MVT::i8, Expand);
[all...] |
| /external/llvm/lib/Target/PowerPC/ |
| PPCISelDAGToDAG.cpp | [all...] |
| PPCISelLowering.cpp | 83 // PowerPC has an i16 but no i8 (or i1) SEXTLOAD
84 setLoadExtAction(ISD::SEXTLOAD, MVT::i1, Promote);
85 setLoadExtAction(ISD::SEXTLOAD, MVT::i8, Expand);
[all...] |
| /external/llvm/lib/Target/ARM/ |
| ARMISelDAGToDAG.cpp | [all...] |
| ARMISelLowering.cpp | 452 setLoadExtAction(ISD::SEXTLOAD, (MVT::SimpleValueType)VT, Expand);
569 setLoadExtAction(ISD::SEXTLOAD, Tys[i], Legal);
579 setLoadExtAction(ISD::SEXTLOAD, MVT::i1, Promote);
[all...] |
| /external/llvm/lib/Target/Mips/ |
| MipsISelLowering.cpp | 119 setLoadExtAction(ISD::SEXTLOAD, MVT::i1, Promote);
[all...] |
| /external/llvm/lib/Target/X86/ |
| X86ISelLowering.cpp | 225 setLoadExtAction(ISD::SEXTLOAD, MVT::i1, Promote);
[all...] |
