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  /external/llvm/lib/Target/PowerPC/
PPCRegisterInfo.h 58 int SPAdj, RegScavenger *RS) const;
60 int SPAdj, RegScavenger *RS) const;
62 int SPAdj, RegScavenger *RS) const;
64 int SPAdj, RegScavenger *RS = NULL) const;
PPCRegisterInfo.cpp 242 const TargetRegisterClass *RC, int SPAdj) {
248 Reg = RS->scavengeRegister(RC, II, SPAdj);
260 int SPAdj, RegScavenger *RS) const {
297 Reg = findScratchRegister(II, RS, RC, SPAdj);
375 unsigned FrameIndex, int SPAdj,
386 (void) SPAdj;
418 unsigned FrameIndex, int SPAdj,
429 (void) SPAdj;
461 int SPAdj, RegScavenger *RS) const {
462 assert(SPAdj == 0 && "Unexpected")
    [all...]
  /external/llvm/lib/Target/CellSPU/
SPURegisterInfo.h 74 void eliminateFrameIndex(MachineBasicBlock::iterator II, int SPAdj,
96 int SPAdj) const;
SPURegisterInfo.cpp 254 SPURegisterInfo::eliminateFrameIndex(MachineBasicBlock::iterator II, int SPAdj,
299 unsigned tmpReg = findScratchRegister(II, RS, &SPU::R32CRegClass, SPAdj);
348 int SPAdj) const
353 Reg = RS->scavengeRegister(RC, II, SPAdj);
  /external/llvm/include/llvm/CodeGen/
RegisterScavenging.h 119 /// available and do the appropriate bookkeeping. SPAdj is the stack
123 MachineBasicBlock::iterator I, int SPAdj);
124 unsigned scavengeRegister(const TargetRegisterClass *RegClass, int SPAdj) {
125 return scavengeRegister(RegClass, MBBI, SPAdj);
  /external/llvm/lib/Target/MBlaze/
MBlazeRegisterInfo.h 59 int SPAdj, RegScavenger *RS = NULL) const;
MBlazeRegisterInfo.cpp 128 eliminateFrameIndex(MachineBasicBlock::iterator II, int SPAdj,
  /external/llvm/lib/Target/MSP430/
MSP430RegisterInfo.h 49 int SPAdj, RegScavenger *RS = NULL) const;
MSP430RegisterInfo.cpp 165 int SPAdj, RegScavenger *RS) const {
166 assert(SPAdj == 0 && "Unexpected");
  /external/llvm/lib/Target/PTX/
PTXRegisterInfo.h 47 int SPAdj,
  /external/llvm/lib/Target/Sparc/
SparcRegisterInfo.h 44 int SPAdj, RegScavenger *RS = NULL) const;
SparcRegisterInfo.cpp 74 int SPAdj, RegScavenger *RS) const {
75 assert(SPAdj == 0 && "Unexpected");
  /external/llvm/lib/Target/Hexagon/
HexagonRegisterInfo.h 64 int SPAdj, RegScavenger *RS = NULL) const;
HexagonRegisterInfo.cpp 134 int SPAdj, RegScavenger *RS) const {
138 assert(SPAdj == 0 && "Unexpected");
  /external/llvm/lib/Target/Mips/
MipsRegisterInfo.h 58 int SPAdj, RegScavenger *RS = NULL) const;
MipsRegisterInfo.cpp 153 eliminateFrameIndex(MachineBasicBlock::iterator II, int SPAdj,
  /external/llvm/lib/Target/XCore/
XCoreRegisterInfo.h 60 int SPAdj, RegScavenger *RS = NULL) const;
XCoreRegisterInfo.cpp 153 int SPAdj, RegScavenger *RS) const {
154 assert(SPAdj == 0 && "Unexpected");
221 SPAdj);
  /external/llvm/lib/Target/ARM/
ARMFrameLowering.h 56 unsigned &FrameReg, int SPAdj) const;
Thumb1RegisterInfo.h 64 int SPAdj, RegScavenger *RS = NULL) const;
ARMBaseRegisterInfo.h 185 int SPAdj, RegScavenger *RS = NULL) const;
  /external/llvm/lib/Target/X86/
X86RegisterInfo.h 119 int SPAdj, RegScavenger *RS = NULL) const;
  /external/llvm/lib/CodeGen/
RegisterScavenging.cpp 333 int SPAdj) {
379 TRI->eliminateFrameIndex(II, SPAdj, this);
384 TRI->eliminateFrameIndex(II, SPAdj, this);
PrologEpilogInserter.cpp 729 int SPAdj = 0; // SP offset due to call frame setup / destroy.
748 SPAdj += Size;
779 TRI.eliminateFrameIndex(MI, SPAdj,
801 // due to a custom inserter playing tricks, so just asserting SPAdj==0
803 assert((SPAdjCount || SPAdj == 0) &&
823 int SPAdj = 0;
849 ScratchReg = RS->scavengeRegister(RC, I, SPAdj);
  /external/llvm/include/llvm/Target/
TargetRegisterInfo.h 691 /// finished product. SPAdj is the SP adjustment due to call frame setup
694 int SPAdj, RegScavenger *RS=NULL) const = 0;

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