| /external/llvm/include/llvm/MC/ |
| MCInstrDesc.h | 29 TIED_TO = 0, // Must be allocated the same register as.
|
| /external/llvm/lib/Target/ARM/ |
| ARMCodeEmitter.cpp | [all...] |
| /external/llvm/lib/CodeGen/ |
| TargetInstrInfoImpl.cpp | 89 MI->getDesc().getOperandConstraint(Idx1, MCOI::TIED_TO) == 0) {
94 MI->getDesc().getOperandConstraint(Idx2, MCOI::TIED_TO) == 0) {
|
| MachineInstr.cpp | [all...] |
| RegAllocFast.cpp | [all...] |
| /external/llvm/lib/Target/X86/ |
| X86CodeEmitter.cpp | 162 Desc.getOperandConstraint(1, MCOI::TIED_TO) != -1;
720 if (NumOps > 1 && Desc->getOperandConstraint(1, MCOI::TIED_TO) != -1)
722 else if (NumOps > 2 && Desc->getOperandConstraint(NumOps-1,MCOI::TIED_TO)== 0)
723 // Skip the last source operand that is tied_to the dest reg. e.g. LXADD32
[all...] |
| X86InstrInfo.cpp | [all...] |
| /external/llvm/lib/Target/X86/MCTargetDesc/ |
| X86MCCodeEmitter.cpp | 722 Desc.getOperandConstraint(1, MCOI::TIED_TO) != -1;
[all...] |
| /external/llvm/lib/CodeGen/SelectionDAG/ |
| ScheduleDAGFast.cpp | 254 if (MCID.getOperandConstraint(i, MCOI::TIED_TO) != -1) {
|
| ScheduleDAGRRList.cpp | [all...] |
| InstrEmitter.cpp | 323 bool isTied = MI->getDesc().getOperandConstraint(Idx, MCOI::TIED_TO) != -1;
[all...] |
| ScheduleDAGSDNodes.cpp | 404 if (MCID.getOperandConstraint(i, MCOI::TIED_TO) != -1) {
|
| /external/llvm/lib/Target/PowerPC/ |
| PPCInstrInfo.cpp | 146 assert(MI->getDesc().getOperandConstraint(0, MCOI::TIED_TO) &&
|
