| /external/llvm/include/llvm/CodeGen/ |
| ISDOpcodes.h | 182 ADD, SUB, MUL, SDIV, UDIV, SREM, UREM,
[all...] |
| /external/llvm/lib/Target/Hexagon/ |
| HexagonISelLowering.cpp | [all...] |
| /external/llvm/lib/CodeGen/SelectionDAG/ |
| LegalizeVectorOps.cpp | 174 case ISD::UREM:
|
| SelectionDAGBuilder.h | 486 void visitURem(const User &I) { visitBinary(I, ISD::UREM); }
|
| SelectionDAGDumper.cpp | 162 case ISD::UREM: return "urem";
|
| FastISel.cpp | 398 // Transform "urem x, pow2" -> "and x, pow2-1".
399 if (ISDOpcode == ISD::UREM && isa<BinaryOperator>(I) &&
[all...] |
| LegalizeVectorTypes.cpp | 111 case ISD::UREM:
527 case ISD::UREM:
[all...] |
| SelectionDAG.cpp | [all...] |
| LegalizeDAG.cpp | [all...] |
| LegalizeIntegerTypes.cpp | 113 case ISD::UREM: Res = PromoteIntRes_UDIV(N); break;
[all...] |
| DAGCombiner.cpp | [all...] |
| TargetLowering.cpp | 647 case ISD::UREM:
[all...] |
| /external/llvm/lib/Target/CellSPU/ |
| SPUISelLowering.cpp | 177 setOperationAction(ISD::UREM, MVT::i8, Expand);
183 setOperationAction(ISD::UREM, MVT::i16, Expand);
189 setOperationAction(ISD::UREM, MVT::i32, Expand);
195 setOperationAction(ISD::UREM, MVT::i64, Expand);
201 setOperationAction(ISD::UREM, MVT::i128, Expand);
431 setOperationAction(ISD::UREM, VT, Expand);
[all...] |
| /external/llvm/lib/Target/MSP430/ |
| MSP430ISelLowering.cpp | 156 setOperationAction(ISD::UREM, MVT::i8, Expand);
162 setOperationAction(ISD::UREM, MVT::i16, Expand);
[all...] |
| /external/llvm/lib/Target/MBlaze/ |
| MBlazeISelLowering.cpp | 101 setOperationAction(ISD::UREM, MVT::i32, Expand);
[all...] |
| /external/llvm/lib/Target/Sparc/ |
| SparcISelLowering.cpp | 714 setOperationAction(ISD::UREM, MVT::i32, Expand);
[all...] |
| /external/llvm/lib/Target/Mips/ |
| MipsISelLowering.cpp | 168 setOperationAction(ISD::UREM, MVT::i32, Expand);
172 setOperationAction(ISD::UREM, MVT::i64, Expand);
[all...] |
| /external/llvm/lib/Target/PowerPC/ |
| PPCISelLowering.cpp | 112 // PowerPC has no SREM/UREM instructions
114 setOperationAction(ISD::UREM, MVT::i32, Expand);
116 setOperationAction(ISD::UREM, MVT::i64, Expand);
118 // Don't use SMUL_LOHI/UMUL_LOHI or SDIVREM/UDIVREM to lower SREM/UREM.
343 setOperationAction(ISD::UREM, VT, Expand);
[all...] |
| /external/llvm/lib/Target/ARM/ |
| ARMISelLowering.cpp | 151 setOperationAction(ISD::UREM, VT.getSimpleVT(), Expand);
643 setOperationAction(ISD::UREM, MVT::i32, Expand);
[all...] |
| /external/llvm/lib/Target/X86/ |
| X86ISelLowering.cpp | 356 setOperationAction(ISD::UREM, VT, Expand);
722 setOperationAction(ISD::UREM, (MVT::SimpleValueType)VT, Expand);
[all...] |
