| /external/llvm/lib/Target/ |
| TargetInstrInfo.cpp | 53 unsigned Class = MI->getDesc().getSchedClass();
70 unsigned DefClass = DefMI->getDesc().getSchedClass();
71 unsigned UseClass = UseMI->getDesc().getSchedClass();
81 return ItinData->getStageLatency(MI->getDesc().getSchedClass());
90 unsigned DefClass = DefMI->getDesc().getSchedClass();
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| /external/llvm/lib/Target/ARM/ |
| ARMHazardRecognizer.cpp | 22 const MCInstrDesc &MCID = MI->getDesc();
43 const MCInstrDesc &MCID = MI->getDesc();
46 const MCInstrDesc &LastMCID = LastMI->getDesc();
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| ARMCodeEmitter.cpp | 279 const MCInstrDesc &MCID = MI.getDesc();
469 const MCInstrDesc &MCID = MI.getDesc();
551 switch (MI.getDesc().TSFlags & ARMII::FormMask) {
810 const MCInstrDesc &MCID = MI.getDesc();
837 const MCInstrDesc &MCID = MI.getDesc();
862 unsigned Opcode = MI.getDesc().Opcode;
[all...] |
| MLxExpansionPass.cpp | 140 const MCInstrDesc &MCID = MI->getDesc();
276 const MCInstrDesc &MCID = MI->getDesc();
|
| ARMBaseInstrInfo.cpp | 127 uint64_t TSFlags = MI->getDesc().TSFlags;
147 const MCInstrDesc &MCID = MI->getDesc();
526 if ((MI->getDesc().TSFlags & ARMII::DomainMask) == ARMII::DomainNEON) {
551 const MCInstrDesc &MCID = MI->getDesc();
[all...] |
| /external/llvm/lib/Support/ |
| Statistic.cpp | 93 return std::strcmp(LHS->getDesc(), RHS->getDesc()) < 0;
137 Stats.Stats[i]->getDesc());
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| /external/llvm/include/llvm/ADT/ |
| Statistic.h | 44 const char *getDesc() const { return Desc; }
|
| /external/llvm/lib/CodeGen/ |
| PeepholeOptimizer.cpp | 270 unsigned NumDefs = MI->getDesc().getNumDefs();
271 unsigned NumSrcs = MI->getDesc().getNumOperands() - NumDefs;
300 NumDefs = DefMI->getDesc().getNumDefs();
301 NumSrcs = DefMI->getDesc().getNumOperands() - NumDefs;
356 const MCInstrDesc &MCID = MI->getDesc();
377 for (unsigned i = 0, e = MI->getDesc().getNumOperands(); i != e; ++i) {
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| DFAPacketizer.cpp | 92 const llvm::MCInstrDesc &MID = MI->getDesc();
99 const llvm::MCInstrDesc &MID = MI->getDesc();
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| ExecutionDepsFix.cpp | 455 const MCInstrDesc &MCID = MI->getDesc();
511 for (unsigned i = mi->getDesc().getNumDefs(),
512 e = mi->getDesc().getNumOperands(); i != e; ++i) {
521 for (unsigned i = 0, e = mi->getDesc().getNumDefs(); i != e; ++i) {
540 for (unsigned i = mi->getDesc().getNumDefs(),
541 e = mi->getDesc().getNumOperands(); i != e; ++i) {
630 for (unsigned i = 0, e = mi->getDesc().getNumOperands(); i != e; ++i) {
|
| TargetInstrInfoImpl.cpp | 63 const MCInstrDesc &MCID = MI->getDesc();
89 MI->getDesc().getOperandConstraint(Idx1, MCOI::TIED_TO) == 0) {
94 MI->getDesc().getOperandConstraint(Idx2, MCOI::TIED_TO) == 0) {
105 return BuildMI(MF, MI->getDebugLoc(), MI->getDesc())
110 return BuildMI(MF, MI->getDebugLoc(), MI->getDesc())
137 const MCInstrDesc &MCID = MI->getDesc();
172 const MCInstrDesc &MCID = MI->getDesc();
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| CriticalAntiDepBreaker.cpp | 210 if (i < MI->getDesc().getNumOperands())
211 NewRC = TII->getRegClass(MI->getDesc(), i, TRI);
310 if (i < MI->getDesc().getNumOperands())
311 NewRC = TII->getRegClass(MI->getDesc(), i, TRI);
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| MachineInstr.cpp | 567 : MCID(&MI.getDesc()), Flags(0), AsmPrinterFlags(0),
759 if (MII->getDesc().getFlags() & Mask) {
[all...] |
| AggressiveAntiDepBreaker.cpp | 406 if (i < MI->getDesc().getNumOperands())
407 RC = TII->getRegClass(MI->getDesc(), i, TRI);
481 if (i < MI->getDesc().getNumOperands())
482 RC = TII->getRegClass(MI->getDesc(), i, TRI);
[all...] |
| ScheduleDAGInstrs.cpp | 252 const MCInstrDesc &UseMCID = UseMI->getDesc();
332 const MCInstrDesc &UseMCID = UseMI->getDesc();
769 DefIdx >= (int)DefMI->getDesc().getNumOperands()) {
800 unsigned DefClass = DefMI->getDesc().getSchedClass();
[all...] |
| /external/llvm/include/llvm/Support/ |
| Registry.h | 31 const char *getDesc() const { return Desc; }
48 static const char *descof(const entry &Entry) { return Entry.getDesc(); }
|
| /frameworks/base/tools/aidl/ |
| generate_java_binder.cpp | 506 Method* getDesc = new Method;
507 getDesc->modifiers = PUBLIC;
508 getDesc->returnType = STRING_TYPE;
509 getDesc->returnTypeDimension = 0;
510 getDesc->name = "getInterfaceDescriptor";
511 getDesc->statements = new StatementBlock;
512 getDesc->statements->Add(new ReturnStatement(new LiteralExpression("DESCRIPTOR")));
513 proxy->elements.push_back(getDesc);
|
| /external/llvm/lib/Target/CellSPU/ |
| SPUNopFiller.cpp | 139 int sc = instr.getDesc().getSchedClass();
|
| /external/llvm/lib/Target/Mips/ |
| MipsExpandPseudo.cpp | 64 const MCInstrDesc& MCid = I->getDesc();
|
| MipsCodeEmitter.cpp | 160 uint64_t TSFlags = MI.getDesc().TSFlags;
384 if ((MI.getDesc().TSFlags & MipsII::FormMask) == MipsII::Pseudo)
|
| /external/skia/include/core/ |
| SkDescriptor.h | 167 SkDescriptor* getDesc() const { return fDesc; }
|
| /external/llvm/include/llvm/CodeGen/ |
| LexicalScopes.h | 170 const MDNode *getDesc() const { return Desc; }
|
| MachineInstr.h | 251 /// getDesc - Returns the target instruction descriptor of this
253 const MCInstrDesc &getDesc() const { return *MCID; }
314 return getDesc().getFlags() & (1 << MCFlag);
[all...] |
| /external/llvm/lib/Target/X86/ |
| X86InstrBuilder.h | 152 const MCInstrDesc &MCID = MI->getDesc();
|
| /external/llvm/include/llvm/Target/ |
| TargetInstrInfo.h | 68 (MI->getDesc().isRematerializable() &&
583 return MI->getDesc().isPredicable();
[all...] |
