/external/llvm/test/CodeGen/ARM/ |
vstlane.ll | 26 define void @vst1lanei16(i16* %A, <4 x i16>* %B) nounwind { 30 %tmp1 = load <4 x i16>* %B 31 %tmp2 = extractelement <4 x i16> %tmp1, i32 2 32 store i16 %tmp2, i16* %A, align 8 65 define void @vst1laneQi16(i16* %A, <8 x i16>* %B) nounwind { 68 %tmp1 = load <8 x i16>* %B 69 %tmp2 = extractelement <8 x i16> %tmp1, i32 [all...] |
vcombine.ll | 13 define <8 x i16> @vcombine16(<4 x i16>* %A, <4 x i16>* %B) nounwind { 17 %tmp1 = load <4 x i16>* %A 18 %tmp2 = load <4 x i16>* %B 19 %tmp3 = shufflevector <4 x i16> %tmp1, <4 x i16> %tmp2, <8 x i32> <i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7> 20 ret <8 x i16> %tmp3 56 define <4 x i16> @vget_low16(<8 x i16>* %A) nounwind [all...] |
vdup.ll | 17 define <4 x i16> @v_dup16(i16 %A) nounwind { 20 %tmp1 = insertelement <4 x i16> zeroinitializer, i16 %A, i32 0 21 %tmp2 = insertelement <4 x i16> %tmp1, i16 %A, i32 1 22 %tmp3 = insertelement <4 x i16> %tmp2, i16 %A, i32 2 23 %tmp4 = insertelement <4 x i16> %tmp3, i16 %A, i32 [all...] |
atomic-op.ll | 107 %val = alloca i16 108 %old = alloca i16 109 store i16 31, i16* %val 113 %0 = atomicrmw umin i16* %val, i16 16 monotonic 114 store i16 %0, i16* %old 115 %uneg = sub i16 0, 1 119 %1 = atomicrmw umin i16* %val, i16 %uneg monotoni [all...] |
int-to-fp.ll | 2 target datalayout = "e-p:32:32:32-i1:8:32-i8:8:32-i16:16:32-i32:32:32-i64:32:32-f32:32:32-f64:32:32-v64:64:64-v128:128:128-a0:0:32-n32" 8 define <4 x float> @sint_to_fp(<4 x i16> %x) nounwind ssp { 9 %a = sitofp <4 x i16> %x to <4 x float> 16 define <4 x float> @uint_to_fp(<4 x i16> %x) nounwind ssp { 17 %a = uitofp <4 x i16> %x to <4 x float>
|
/external/llvm/test/CodeGen/X86/ |
atomic_add.ll | 63 define void @inc2(i16* nocapture %p) nounwind ssp { 67 %0 = atomicrmw add i16* %p, i16 1 monotonic 71 define void @add6(i16* nocapture %p) nounwind ssp { 75 %0 = atomicrmw add i16* %p, i16 2 monotonic 79 define void @add2(i16* nocapture %p, i32 %v) nounwind ssp { 83 %0 = trunc i32 %v to i16 ; <i16> [#uses=1] 84 %1 = atomicrmw add i16* %p, i16 %0 monotoni [all...] |
avx2-unpack.ll | 32 define <16 x i16> @unpackhwd(<16 x i16> %src1, <16 x i16> %src2) nounwind uwtable readnone ssp { 34 %shuffle.i = shufflevector <16 x i16> %src1, <16 x i16> %src2, <16 x i32> <i32 4, i32 20, i32 5, i32 21, i32 6, i32 22, i32 7, i32 23, i32 12, i32 28, i32 13, i32 29, i32 14, i32 30, i32 15, i32 31> 35 ret <16 x i16> %shuffle.i 39 define <16 x i16> @unpacklwd(<16 x i16> %src1, <16 x i16> %src2) nounwind uwtable readnone ssp { 41 %shuffle.i = shufflevector <16 x i16> %src1, <16 x i16> %src2, <16 x i32> <i32 0, i32 16, i32 1, i32 17, i32 2, i32 18, i32 3, i32 19, (…) [all...] |
basic-promote-integers.ll | 74 define <4 x i64> @test_arith_9(<4 x i64> %A, <2 x i32> %B, <4 x i16> %C) { 75 %T = add <4 x i16> %C, %C 76 %F0 = extractelement <4 x i16> %T, i32 0 77 %F1 = extractelement <4 x i16> %T, i32 1 78 %W0 = zext i16 %F0 to i64 79 %W1 = zext i16 %F1 to i64 85 define <4 x i16> @test_arith_10(<4 x i64> %A, <2 x i32> %B, <4 x i32> %C) { 86 %F = bitcast <2 x i32> %B to <4 x i16> 87 %T = add <4 x i16> %F , <i16 0, i16 1, i16 2, i16 3 [all...] |
avx2-vbroadcast.ll | 66 define <8 x i16> @W16(i16* %ptr) nounwind uwtable readnone ssp { 68 %q = load i16* %ptr, align 4 69 %q0 = insertelement <8 x i16> undef, i16 %q, i32 0 70 %q1 = insertelement <8 x i16> %q0, i16 %q, i32 1 71 %q2 = insertelement <8 x i16> %q1, i16 %q, i32 2 72 %q3 = insertelement <8 x i16> %q2, i16 %q, i32 [all...] |
inline-asm-R-constraint.ll | 4 target datalayout = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-s0:64:64-f80:128:128" 7 define void @udiv8(i8* %quotient, i16 zeroext %a, i8 zeroext %b, i8 zeroext %c, i8* %remainder) nounwind ssp { 11 %a_addr = alloca i16, align 2 ; <i16*> [#uses=2] 13 store i16 %a, i16* %a_addr 15 call void asm "\09\09movw\09$2, %ax\09\09\0A\09\09divb\09$3\09\09\09\0A\09\09movb\09%al, $0\09\0A\09\09movb %ah, ($4)", "=*m,=*m,*m,*m,R,~{dirflag},~{fpsr},~{flags},~{ax}"(i8* %quotient, i8* %remainder, i16* %a_addr, i8* %b_addr, i8* %remainder) nounwind
|
pr2177.ll | 4 target datalayout = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-s0:64:64-f80:128:128" 6 %struct.S2259 = type { <4 x i16>, i8, i64 } 27 %tmp128 = getelementptr %struct.S2259* %tmp125126, i32 0, i32 0 ; <<4 x i16>*> [#uses=1] 28 %tmp129 = load <4 x i16>* %tmp128, align 8 ; <<4 x i16>> [#uses=1] 29 store <4 x i16> %tmp129, <4 x i16>* null, align 8
|
utf16-cfstrings.ll | 8 @.str = internal unnamed_addr constant [5 x i16] [i16 252, i16 98, i16 101, i16 114, i16 0], align 2 9 @_unnamed_cfstring_ = private constant %struct.NSConstantString { i32* getelementptr inbounds ([0 x i32]* @__CFConstantStringClassReference, i32 0, i32 0), i32 2000, i8* bitcast ([5 x i16]* @.str to i8*), i64 4 }, section "__DATA,__cfstring"
|
2009-01-18-ConstantExprCrash.ll | 5 target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-a0:0:64-f80:128:128" 9 @_ZN11xercesc_2_5L17gIdeographicCharsE = external constant [7 x i16] ; <[7 x i16]*> [#uses=3] 28 %0 = load i16* getelementptr ([7 x i16]* @_ZN11xercesc_2_5L17gIdeographicCharsE, i32 0, i32 add (i32 ashr (i32 sub (i32 ptrtoint (i16* getelementptr ([7 x i16]* @_ZN11xercesc_2_5L17gIdeographicCharsE, i32 0, i32 4) to i32), i32 ptrtoint ([7 x i16]* @_ZN11xercesc_2_5L17gIdeographicCharsE to i32)), i32 1), i32 1)), align 4 ; <i16> [#uses=0]
|
/external/llvm/test/CodeGen/CellSPU/ |
trunc.ll | 24 target datalayout = "E-p:32:32:128-i1:8:128-i8:8:128-i16:16:128-i32:32:128-i64:32:128-f32:32:128-f64:64:128-v64:64:64-v128:128:128-a0:0:128-s0:128:128" 34 define <8 x i16> @trunc_i128_i16(i128 %u, <8 x i16> %v) { 36 %0 = trunc i128 %u to i16 37 %tmp1 = insertelement <8 x i16> %v, i16 %0, i32 8 38 ret <8 x i16> %tmp1 62 define <8 x i16> @trunc_i64_i16(i64 %u, <8 x i16> %v) { 64 %0 = trunc i64 %u to i16 [all...] |
eqv.ll | 13 target datalayout = "E-p:32:32:128-f64:64:128-f32:32:128-i64:32:128-i32:32:128-i16:16:128-i8:8:128-i1:8:128-a0:0:128-v128:128:128-s0:128:128" 82 define signext i16 @equiv_i16_1(i16 signext %arg1, i16 signext %arg2) { 83 %A = and i16 %arg1, %arg2 ; <i16> [#uses=1] 84 %B = or i16 %arg1, %arg2 ; <i16> [#uses=1] 85 %Bnot = xor i16 %B, -1 ; <i16> [#uses=1 [all...] |
sub_ops.ll | 11 define i16 @subhword( i16 %param1, i16 %param2) { 15 %1 = sub i16 %param1, %param2 16 ret i16 %1
|
/external/llvm/test/Analysis/BasicAA/ |
2007-01-13-BasePointerBadNoAlias.ll | 11 %struct.FILE_POS = type { i8, i8, i16, i32 } 14 %struct.GAP = type { i8, i8, i16 } 16 %struct.SECOND_UNION = type { { i16, i8, i8 } } 17 %struct.STYLE = type { { %struct.GAP }, { %struct.GAP }, i16, i16, i16, i8, i8 } 29 %tmp18272 = getelementptr %struct.STYLE* %tmp18269, i32 0, i32 0, i32 0, i32 2 ; <i16*> [#uses=1] 30 store i16 123, i16* %tmp18272
|
/external/llvm/test/Analysis/ScalarEvolution/ |
trip-count12.ll | 7 define zeroext i16 @test(i16* nocapture %p, i32 %len) nounwind readonly { 16 %p.addr.05 = phi i16* [ %incdec.ptr, %for.body ], [ %p, %for.body.preheader ] 19 %incdec.ptr = getelementptr inbounds i16* %p.addr.05, i32 1 20 %0 = load i16* %p.addr.05, align 2 21 %conv = zext i16 %0 to i32 28 %extract.t = trunc i32 %add to i16 32 %res.0.lcssa.off0 = phi i16 [ %extract.t, %for.cond.for.end_crit_edge ], [ 0, %entry ] 33 ret i16 %res.0.lcssa.off0
|
zext-wrap.ll | 5 define i16 @main() nounwind { 13 ; CHECK: %tmp = zext i8 %l_95.0.i1 to i16 14 ; CHECK: --> (zext i8 {0,+,-1}<%bb.i> to i16) Exits: 2 16 %tmp = zext i8 %l_95.0.i1 to i16 23 ret i16 %tmp
|
/external/llvm/test/CodeGen/Thumb2/ |
2010-04-26-CopyRegCrash.ll | 4 target datalayout = "e-p:32:32:32-i1:8:32-i8:8:32-i16:16:32-i32:32:32-i64:32:32-f32:32:32-f64:32:32-v64:64:64-v128:128:128-a0:0:32-n32" 54 %asmtmp.i.i179 = tail call i16 asm "rev16 $0, $1\0A", "=l,l"(i16 undef) nounwind ; <i16> [#uses=1] 55 %asmtmp.i.i178 = tail call i16 asm "rev16 $0, $1\0A", "=l,l"(i16 %asmtmp.i.i179) nounwind ; <i16> [#uses=1] 56 store i16 %asmtmp.i.i178, i16* undef, align 2
|
/external/llvm/test/Transforms/GlobalOpt/ |
2009-11-16-BrokenPerformHeapAllocSRoA.ll | 3 target datalayout = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-s0:64:64-f80:128:128" 6 %struct.hashheader = type { i16, i16, i16, i16, i16, i16, i32, i32, i32, i32, i32, i32, i32, i32, i32, [5 x i8], [13 x i8], i8, i8, i8, [228 x i16], [228 x i8], [228 x i8], [228 x i8], [228 x i8], [228 x i8], [228 x i8], [128 x i8], [100 x [11 x i8]], [100 x i32], [100 x i32], i16 }
|
/external/llvm/test/Transforms/InstCombine/ |
2011-05-28-swapmulsub.ll | 5 define zeroext i16 @foo1(i32 %on_off) nounwind uwtable ssp { 18 %conv = trunc i32 %tmp1 to i16 19 ret i16 %conv 22 define zeroext i16 @foo2(i32 %on_off, i32 %q) nounwind uwtable ssp { 38 %conv = trunc i32 %tmp2 to i16 39 ret i16 %conv 42 define zeroext i16 @foo3(i32 %on_off) nounwind uwtable ssp { 55 %conv = trunc i32 %tmp1 to i16 56 ret i16 %conv
|
/external/clang/test/CodeGen/ |
string-literal.c | 39 // CHECK-CPP0X: private unnamed_addr constant [3 x i16] [i16 69, i16 70, i16 0], align 2 43 // CHECK-CPP0X: private unnamed_addr constant [5 x i16] [i16 4384, i16 544, i16 -9272, i16 -9168, i16 0], align [all...] |
/external/llvm/test/CodeGen/MBlaze/ |
mul.ll | 23 define i16 @test_i16(i16 %a, i16 %b) { 27 %tmp.1 = mul i16 %a, %b 32 ret i16 %tmp.1
|
/external/llvm/test/CodeGen/MSP430/ |
2010-05-01-CombinerAnd.ll | 4 target datalayout = "e-p:16:16:16-i8:8:8-i16:16:16-i32:16:32-n8:16" 7 define i16 @main() nounwind { 22 %tmp4 = load i16* undef ; <i16> [#uses=0] 26 ret i16 undef
|