| /external/clang/test/CodeGen/ |
| BasicInstrs.c | 19 _Bool setlt(int X, int Y) { function
|
| /external/llvm/test/Transforms/InstCombine/ |
| setcc-strength-reduce.ll | 2 ; working. Basically this boils down to converting setlt,gt,le,ge instructions
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| /external/llvm/test/CodeGen/PowerPC/ |
| ppc-vaarg-agg.ll | 44 ; with an error like: Cannot select: ch = setlt [ID=6]
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| /external/llvm/test/Transforms/LoopStrengthReduce/ |
| dont-hoist-simple-loop-constants.ll | 4 ; The setlt wants to use a value that is incremented one more than the dominant
|
| /external/llvm/lib/Target/Hexagon/ |
| HexagonSelectCCInfo.td | 43 IntRegs:$fval, SETLT)),
111 // setlt-64 -> setgt-64.
113 DoubleRegs:$fval, SETLT)),
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| HexagonInstrInfoV3.td | 89 [(set DoubleRegs:$dst, (select (i1 (setlt DoubleRegs:$src2,
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| HexagonInstrInfo.td | 550 defm CMPLT : CMP32_rr<"cmp.lt", setlt>;
609 [(set IntRegs:$dst, (select (i1 (setlt IntRegs:$src2,
[all...] |
| /external/llvm/utils/emacs/ |
| llvm-mode.el | 37 "setne" "seteq" "setlt" "setgt" "setle" "setge") 'words) . font-lock-keyword-face)
|
| /external/llvm/lib/CodeGen/ |
| Analysis.cpp | 178 case ISD::SETOLT: case ISD::SETULT: return ISD::SETLT;
197 case ICmpInst::ICMP_SLT: return ISD::SETLT;
|
| /external/llvm/lib/Target/CellSPU/ |
| SPU64InstrInfo.td | 225 // i64 setge/setlt:
253 def : I64SETCCNegCond<setlt, I64GEr64>;
254 def : I64SELECTNegCond<setlt, I64GEr64>;
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| SPUInstrInfo.td | [all...] |
| /external/llvm/lib/Target/Mips/ |
| Mips64InstrInfo.td | 86 def SLTi64 : SetCC_I<0x0a, "slti", setlt, simm16_64, immSExt16, CPU64Regs>;
95 def SLT64 : SetCC_R<0x00, 0x2a, "slt", setlt, CPU64Regs>;
157 def BLTZ64 : CBranchZero<0x01, 0, "bltz", setlt, CPU64Regs>;
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| MipsInstrInfo.td | [all...] |
| /external/llvm/lib/Target/MBlaze/ |
| MBlazeInstrInfo.td | 769 def : Pat<(setcc (i32 GPR:$L), (i32 0), SETLT),
794 def : Pat<(setcc (i32 0), (i32 GPR:$R), SETLT),
822 def : Pat<(setcc (i32 GPR:$L), (i32 GPR:$R), SETLT),
[all...] |
| MBlazeInstrFPU.td | 160 def : Pat<(setcc (f32 GPR:$L), (f32 GPR:$R), SETLT),
|
| /external/llvm/lib/Target/PowerPC/ |
| PPCISelDAGToDAG.cpp | 556 case ISD::SETLT: return PPC::PRED_LT;
583 case ISD::SETLT: return 0; // Bit #0 = SETOLT
635 case ISD::SETLT: {
668 case ISD::SETLT: {
[all...] |
| /external/llvm/lib/CodeGen/SelectionDAG/ |
| SelectionDAGDumper.cpp | 303 case ISD::SETLT: return "setlt";
|
| TargetLowering.cpp | 509 CCs[RTLIB::OLT_F32] = ISD::SETLT;
510 CCs[RTLIB::OLT_F64] = ISD::SETLT;
[all...] |
| LegalizeIntegerTypes.cpp | [all...] |
| LegalizeDAG.cpp | [all...] |
| LegalizeFloatTypes.cpp | 635 case ISD::SETLT:
[all...] |
| /external/llvm/include/llvm/CodeGen/ |
| ISDOpcodes.h | 706 /// floating point. For integer, only the SETEQ,SETNE,SETLT,SETLE,SETGT,
[all...] |
| /external/clang/www/demo/ |
| index.cgi | 99 $input =~ s@\b(add|sub|mul|div|rem|and|or|xor|setne|seteq|setlt|setgt|setle|setge|phi|tail|call|cast|to|shl|shr|vaarg|vanext|ret|br|switch|invoke|unwind|malloc|alloca|free|load|store|getelementptr|begin|end|true|false|declare|global|constant|const|internal|uninitialized|external|implementation|linkonce|weak|appending|null|to|except|not|target|endian|pointersize|big|little|volatile)\b@<span class="llvm_keyword">$1</span>@g;
|
| /external/llvm/include/llvm/Target/ |
| TargetSelectionDAG.td | 500 def SETLT : CondCode; def SETLE : CondCode; def SETNE : CondCode;
[all...] |
| /external/llvm/lib/Target/XCore/ |
| XCoreInstrInfo.td | [all...] |
