1 /* 2 * Copyright (c) 2008, Google Inc. 3 * All rights reserved. 4 * 5 * Redistribution and use in source and binary forms, with or without 6 * modification, are permitted provided that the following conditions 7 * are met: 8 * * Redistributions of source code must retain the above copyright 9 * notice, this list of conditions and the following disclaimer. 10 * * Redistributions in binary form must reproduce the above copyright 11 * notice, this list of conditions and the following disclaimer in 12 * the documentation and/or other materials provided with the 13 * distribution. 14 * 15 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 16 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 17 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS 18 * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE 19 * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, 20 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, 21 * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS 22 * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED 23 * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, 24 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT 25 * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 26 * SUCH DAMAGE. 27 */ 28 29 #ifndef __ASM_ARCH_MSM7200_MDP_H 30 #define __ASM_ARCH_MSM7200_MDP_H 31 32 #define MSM_MDP_BASE1 0xAA200000 33 #define MSM_MDP_BASE2 0xAA210100 34 35 /* see 80-VA736-2 C pp 587-627 */ 36 37 #define MDP_REG1(off) (MSM_MDP_BASE1 + (off)) 38 #define MDP_REG(off) (MSM_MDP_BASE2 + (off)) 39 40 41 #define MDP_SYNC_CONFIG_0 MDP_REG1(0x0000) 42 #define MDP_SYNC_CONFIG_1 MDP_REG1(0x0004) 43 #define MDP_SYNC_CONFIG_2 MDP_REG1(0x0008) 44 #define MDP_SYNC_VSYNC_EN (1 << 17) 45 #define MDP_SYNC_SYNC_EN (1 << 16) 46 #define MDP_SYNC_DIV_CNT(n) ((n) & 0xffff) 47 48 #define MDP_SYNC_STATUS_0 MDP_REG1(0x000C) 49 #define MDP_SYNC_STATUS_1 MDP_REG1(0x0010) 50 #define MDP_SYNC_STATUS_2 MDP_REG1(0x0014) 51 #define MDP_SYNC_FRAME_COUNT(n) (((n) >> 16) & 0xfff) 52 #define MDP_SYNC_LINE_COUNT(n) ((n) & 0x3ff) 53 54 #define MDP_SYNC_THRESH_0 MDP_REG1(0x0018) 55 #define MDP_SYNC_SEC_ABOVE(n) (((n) & 0xFF) << 24) 56 #define MDP_SYNC_SEC_BELOW(n) (((n) & 0xFF) << 16) 57 #define MDP_SYNC_PRIM_ABOVE(n) (((n) & 0xFF) << 8) 58 #define MDP_SYNC_PRIM_BELOW(n) ((n) & 0xFF) 59 60 #define MDP_SYNC_THRESH_1 MDP_REG1(0x001C) 61 #define MDP_SYNC_EXT_ABOVE(n) (((n) & 0xFF) << 8) 62 #define MDP_SYNC_EXT_BELOW(n) ((n) & 0xFF) 63 64 #define MDP_INTR_ENABLE MDP_REG1(0x0020) 65 #define MDP_INTR_STATUS MDP_REG1(0x0024) 66 #define MDP_INTR_CLEAR MDP_REG1(0x0028) 67 #define MDP_INTR_LIST0_DONE (1 << 0) 68 #define MDP_INTR_LIST1_DONE (1 << 1) 69 #define MDP_INTR_DMA_DONE (1 << 2) 70 #define MDP_INTR_TV_DONE (1 << 3) 71 #define MDP_INTR_CONFIG_ERR (1 << 4) 72 #define MDP_INTR_ROI_ERR (1 << 5) 73 #define MDP_INTR_TV_UNDERRUN (1 << 6) 74 75 #define MDP_HW_VERSION MDP_REG1(0x0070) 76 77 78 #define MDP_EDGE_CONFIG MDP_REG(0x0000) 79 #define MDP_TILE_CONFIG MDP_REG(0x0004) 80 81 /* BLT controls */ 82 #define MDP_SRC_ROI MDP_REG(0x0008) 83 #define MDP_SRCP0_ADDR MDP_REG(0x000C) 84 #define MDP_SRCP1_ADDR MDP_REG(0x0010) 85 #define MDP_SRCP2_ADDR MDP_REG(0x0014) 86 #define MDP_SRCP3_ADDR MDP_REG(0x0018) 87 #define MDP_SRCP01_STRIDE MDP_REG(0x001C) 88 #define MDP_SRCP23_STRIDE MDP_REG(0x0020) 89 #define MDP_SRC_CONFIG MDP_REG(0x0024) 90 #define MDP_UNPACK_PATTERN0 MDP_REG(0x0028) 91 #define MDP_UNPACK_PATTERN1 MDP_REG(0x002C) 92 #define MDP_UNPACK_PATTERN2 MDP_REG(0x0030) 93 #define MDP_UNPACK_PATTERN3 MDP_REG(0x0034) 94 #define MDP_PPP_CONFIG MDP_REG(0x0038) 95 #define MDP_PHASEX_INIT MDP_REG(0x003C) 96 #define MDP_PHASEY_INIT MDP_REG(0x0040) 97 #define MDP_PHASEX_STEP MDP_REG(0x0044) 98 #define MDP_PHASEY_STEP MDP_REG(0x0048) 99 #define MDP_ALPHA_CONFIG MDP_REG(0x004C) 100 #define MDP_DST_CONFIG MDP_REG(0x0050) 101 #define MDP_PACK_PATTERN0 MDP_REG(0x0054) 102 #define MDP_PACK_PATTERN1 MDP_REG(0x0058) 103 #define MDP_PACK_PATTERN2 MDP_REG(0x005C) 104 #define MDP_PACK_PATTERN3 MDP_REG(0x0060) 105 #define MDP_DST_ROI MDP_REG(0x0064) 106 #define MDP_DSTP0_ADDR MDP_REG(0x0068) 107 #define MDP_DSTP1_ADDR MDP_REG(0x006C) 108 #define MDP_DSTP2_ADDR MDP_REG(0x0070) 109 #define MDP_DSTP3_ADDR MDP_REG(0x0074) 110 #define MDP_DSTP01_STRIDE MDP_REG(0x0078) 111 #define MDP_DSTP23_STRIDE MDP_REG(0x007C) 112 113 #endif 114
